]>
Commit | Line | Data |
---|---|---|
c906108c SS |
1 | /* Target machine sub-parameters for SPARC64, for GDB, the GNU debugger. |
2 | This is included by other tm-*.h files to define SPARC64 cpu-related info. | |
3 | Copyright 1994, 1995, 1996, 1998 Free Software Foundation, Inc. | |
4 | This is (obviously) based on the SPARC Vn (n<9) port. | |
5 | Contributed by Doug Evans (dje@cygnus.com). | |
6 | Further modified by Bob Manson (manson@cygnus.com). | |
7 | ||
c5aa993b | 8 | This file is part of GDB. |
c906108c | 9 | |
c5aa993b JM |
10 | This program is free software; you can redistribute it and/or modify |
11 | it under the terms of the GNU General Public License as published by | |
12 | the Free Software Foundation; either version 2 of the License, or | |
13 | (at your option) any later version. | |
c906108c | 14 | |
c5aa993b JM |
15 | This program is distributed in the hope that it will be useful, |
16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | GNU General Public License for more details. | |
c906108c | 19 | |
c5aa993b JM |
20 | You should have received a copy of the GNU General Public License |
21 | along with this program; if not, write to the Free Software | |
22 | Foundation, Inc., 59 Temple Place - Suite 330, | |
23 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
24 | |
25 | #define GDB_TARGET_IS_SPARC64 | |
26 | ||
27 | #ifdef __STDC__ | |
28 | struct value; | |
29 | #endif | |
30 | ||
31 | /* Eeeew. Ok, we have to assume (for now) that the processor really is | |
32 | in sparc64 mode. While this is the same instruction sequence as | |
33 | on the Sparc, the stack frames are offset by +2047 (and the arguments | |
34 | are 8 bytes instead of 4). */ | |
35 | /* Instructions are: | |
36 | std %f10, [ %fp + 0x7a7 ] | |
37 | std %f8, [ %fp + 0x79f ] | |
38 | std %f6, [ %fp + 0x797 ] | |
39 | std %f4, [ %fp + 0x78f ] | |
40 | std %f2, [ %fp + 0x787 ] | |
41 | std %f0, [ %fp + 0x77f ] | |
42 | std %g6, [ %fp + 0x777 ] | |
43 | std %g4, [ %fp + 0x76f ] | |
44 | std %g2, [ %fp + 0x767 ] | |
45 | std %g0, [ %fp + 0x75f ] | |
46 | std %fp, [ %fp + 0x757 ] | |
47 | std %i4, [ %fp + 0x74f ] | |
48 | std %i2, [ %fp + 0x747 ] | |
49 | std %i0, [ %fp + 0x73f ] | |
50 | nop | |
51 | nop | |
52 | nop | |
53 | nop | |
54 | rd %tbr, %o0 | |
55 | st %o0, [ %fp + 0x72b ] | |
56 | rd %tpc, %o0 | |
57 | st %o0, [ %fp + 0x727 ] | |
58 | rd %psr, %o0 | |
59 | st %o0, [ %fp + 0x723 ] | |
60 | rd %y, %o0 | |
61 | st %o0, [ %fp + 0x71f ] | |
62 | ldx [ %sp + 0x8a7 ], %o5 | |
63 | ldx [ %sp + 0x89f ], %o4 | |
64 | ldx [ %sp + 0x897 ], %o3 | |
65 | ldx [ %sp + 0x88f ], %o2 | |
66 | ldx [ %sp + 0x887 ], %o1 | |
67 | call %g0 | |
68 | ldx [ %sp + 0x87f ], %o0 | |
69 | nop | |
70 | ta 1 | |
71 | nop | |
72 | nop | |
c5aa993b | 73 | */ |
c906108c SS |
74 | |
75 | #define CALL_DUMMY { 0x9de3bec0fd3fa7f7LL, 0xf93fa7eff53fa7e7LL,\ | |
76 | 0xf13fa7dfed3fa7d7LL, 0xe93fa7cfe53fa7c7LL,\ | |
77 | 0xe13fa7bfdd3fa7b7LL, 0xd93fa7afd53fa7a7LL,\ | |
78 | 0xd13fa79fcd3fa797LL, 0xc93fa78fc53fa787LL,\ | |
79 | 0xc13fa77fcc3fa777LL, 0xc83fa76fc43fa767LL,\ | |
80 | 0xc03fa75ffc3fa757LL, 0xf83fa74ff43fa747LL,\ | |
81 | 0xf03fa73f01000000LL, 0x0100000001000000LL,\ | |
82 | 0x0100000091580000LL, 0xd027a72b93500000LL,\ | |
83 | 0xd027a72791480000LL, 0xd027a72391400000LL,\ | |
84 | 0xd027a71fda5ba8a7LL, 0xd85ba89fd65ba897LL,\ | |
85 | 0xd45ba88fd25ba887LL, 0x9fc02000d05ba87fLL,\ | |
86 | 0x0100000091d02001LL, 0x0100000001000000LL } | |
87 | ||
88 | ||
89 | /* 128 is to reserve space to write the %i/%l registers that will be restored | |
90 | when we resume. */ | |
91 | #define CALL_DUMMY_STACK_ADJUST 128 | |
92 | ||
93 | #define CALL_DUMMY_LENGTH 192 | |
94 | ||
95 | #define CALL_DUMMY_START_OFFSET 148 | |
96 | ||
97 | #define CALL_DUMMY_CALL_OFFSET (CALL_DUMMY_START_OFFSET + (5 * 4)) | |
98 | ||
99 | #define CALL_DUMMY_BREAKPOINT_OFFSET (CALL_DUMMY_START_OFFSET + (8 * 4)) | |
100 | ||
101 | #include "sparc/tm-sparc.h" | |
102 | ||
103 | /* Stack must be aligned on 128-bit boundaries when synthesizing | |
104 | function calls. */ | |
105 | ||
106 | #undef STACK_ALIGN | |
107 | #define STACK_ALIGN(ADDR) (((ADDR) + 15 ) & -16) | |
108 | ||
109 | /* Number of machine registers. */ | |
110 | ||
111 | #undef NUM_REGS | |
112 | #define NUM_REGS 125 | |
113 | ||
114 | /* Initializer for an array of names of registers. | |
115 | There should be NUM_REGS strings in this initializer. */ | |
116 | /* Some of these registers are only accessible from priviledged mode. | |
117 | They are here for kernel debuggers, etc. */ | |
118 | /* FIXME: icc and xcc are currently considered separate registers. | |
119 | This may have to change and consider them as just one (ccr). | |
120 | Let's postpone this as long as we can. It's nice to be able to set | |
121 | them individually. */ | |
122 | /* FIXME: fcc0-3 are currently separate, even though they are also part of | |
123 | fsr. May have to remove them but let's postpone this as long as | |
124 | possible. It's nice to be able to set them individually. */ | |
125 | /* FIXME: Whether to include f33, f35, etc. here is not clear. | |
126 | There are advantages and disadvantages. */ | |
127 | ||
128 | #undef REGISTER_NAMES | |
129 | #define REGISTER_NAMES \ | |
130 | { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", \ | |
131 | "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7", \ | |
132 | "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", \ | |
133 | "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7", \ | |
134 | \ | |
135 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \ | |
136 | "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \ | |
137 | "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", \ | |
138 | "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", \ | |
139 | "f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46", \ | |
140 | "f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62", \ | |
141 | \ | |
142 | "pc", "npc", "ccr", "fsr", "fprs", "y", "asi", \ | |
143 | "ver", "tick", "pil", "pstate", \ | |
144 | "tstate", "tba", "tl", "tt", "tpc", "tnpc", "wstate", \ | |
145 | "cwp", "cansave", "canrestore", "cleanwin", "otherwin", \ | |
146 | "asr16", "asr17", "asr18", "asr19", "asr20", "asr21", \ | |
147 | "asr22", "asr23", "asr24", "asr25", "asr26", "asr27", \ | |
148 | "asr28", "asr29", "asr30", "asr31", \ | |
149 | /* These are here at the end to simplify removing them if we have to. */ \ | |
150 | "icc", "xcc", "fcc0", "fcc1", "fcc2", "fcc3" \ | |
151 | } | |
152 | ||
153 | /* Register numbers of various important registers. | |
154 | Note that some of these values are "real" register numbers, | |
155 | and correspond to the general registers of the machine, | |
156 | and some are "phony" register numbers which are too large | |
157 | to be actual register numbers as far as the user is concerned | |
158 | but do serve to get the desired values when passed to read_register. */ | |
159 | ||
c5aa993b JM |
160 | #if 0 /* defined in tm-sparc.h, replicated for doc purposes */ |
161 | #define G0_REGNUM 0 /* %g0 */ | |
c906108c SS |
162 | #define G1_REGNUM 1 /* %g1 */ |
163 | #define O0_REGNUM 8 /* %o0 */ | |
164 | #define SP_REGNUM 14 /* Contains address of top of stack, \ | |
165 | which is also the bottom of the frame. */ | |
166 | #define RP_REGNUM 15 /* Contains return address value, *before* \ | |
167 | any windows get switched. */ | |
168 | #define O7_REGNUM 15 /* Last local reg not saved on stack frame */ | |
169 | #define L0_REGNUM 16 /* First local reg that's saved on stack frame | |
170 | rather than in machine registers */ | |
171 | #define I0_REGNUM 24 /* %i0 */ | |
172 | #define FP_REGNUM 30 /* Contains address of executing stack frame */ | |
173 | #define I7_REGNUM 31 /* Last local reg saved on stack frame */ | |
174 | #define FP0_REGNUM 32 /* Floating point register 0 */ | |
175 | #endif | |
176 | ||
177 | #define FP_MAX_REGNUM 80 /* 1 + last fp reg number */ | |
178 | ||
179 | /* #undef v8 misc. regs */ | |
180 | ||
181 | #undef Y_REGNUM | |
182 | #undef PS_REGNUM | |
183 | #undef WIM_REGNUM | |
184 | #undef TBR_REGNUM | |
185 | #undef PC_REGNUM | |
186 | #undef NPC_REGNUM | |
187 | #undef FPS_REGNUM | |
188 | #undef CPS_REGNUM | |
189 | ||
190 | /* v9 misc. and priv. regs */ | |
191 | ||
c5aa993b JM |
192 | #define C0_REGNUM FP_MAX_REGNUM /* Start of control registers */ |
193 | #define PC_REGNUM (C0_REGNUM + 0) /* Current PC */ | |
194 | #define NPC_REGNUM (C0_REGNUM + 1) /* Next PC */ | |
195 | #define CCR_REGNUM (C0_REGNUM + 2) /* Condition Code Register (%xcc,%icc) */ | |
196 | #define FSR_REGNUM (C0_REGNUM + 3) /* Floating Point State */ | |
197 | #define FPRS_REGNUM (C0_REGNUM + 4) /* Floating Point Registers State */ | |
198 | #define Y_REGNUM (C0_REGNUM + 5) /* Temp register for multiplication, etc. */ | |
199 | #define ASI_REGNUM (C0_REGNUM + 6) /* Alternate Space Identifier */ | |
200 | #define VER_REGNUM (C0_REGNUM + 7) /* Version register */ | |
201 | #define TICK_REGNUM (C0_REGNUM + 8) /* Tick register */ | |
202 | #define PIL_REGNUM (C0_REGNUM + 9) /* Processor Interrupt Level */ | |
203 | #define PSTATE_REGNUM (C0_REGNUM + 10) /* Processor State */ | |
204 | #define TSTATE_REGNUM (C0_REGNUM + 11) /* Trap State */ | |
205 | #define TBA_REGNUM (C0_REGNUM + 12) /* Trap Base Address */ | |
206 | #define TL_REGNUM (C0_REGNUM + 13) /* Trap Level */ | |
207 | #define TT_REGNUM (C0_REGNUM + 14) /* Trap Type */ | |
208 | #define TPC_REGNUM (C0_REGNUM + 15) /* Trap pc */ | |
209 | #define TNPC_REGNUM (C0_REGNUM + 16) /* Trap npc */ | |
210 | #define WSTATE_REGNUM (C0_REGNUM + 17) /* Window State */ | |
211 | #define CWP_REGNUM (C0_REGNUM + 18) /* Current Window Pointer */ | |
c906108c SS |
212 | #define CANSAVE_REGNUM (C0_REGNUM + 19) /* Savable Windows */ |
213 | #define CANRESTORE_REGNUM (C0_REGNUM + 20) /* Restorable Windows */ | |
214 | #define CLEANWIN_REGNUM (C0_REGNUM + 21) /* Clean Windows */ | |
215 | #define OTHERWIN_REGNUM (C0_REGNUM + 22) /* Other Windows */ | |
216 | #define ASR_REGNUM(n) (C0_REGNUM+(23-16)+(n)) /* Ancillary State Register | |
217 | (n = 16...31) */ | |
c5aa993b JM |
218 | #define ICC_REGNUM (C0_REGNUM + 39) /* 32 bit condition codes */ |
219 | #define XCC_REGNUM (C0_REGNUM + 40) /* 64 bit condition codes */ | |
220 | #define FCC0_REGNUM (C0_REGNUM + 41) /* fp cc reg 0 */ | |
221 | #define FCC1_REGNUM (C0_REGNUM + 42) /* fp cc reg 1 */ | |
222 | #define FCC2_REGNUM (C0_REGNUM + 43) /* fp cc reg 2 */ | |
223 | #define FCC3_REGNUM (C0_REGNUM + 44) /* fp cc reg 3 */ | |
c906108c SS |
224 | |
225 | /* Total amount of space needed to store our copies of the machine's | |
226 | register state, the array `registers'. | |
227 | Some of the registers aren't 64 bits, but it's a lot simpler just to assume | |
228 | they all are (since most of them are). */ | |
229 | #undef REGISTER_BYTES | |
230 | #define REGISTER_BYTES (32*8+32*8+45*8) | |
231 | ||
232 | /* Index within `registers' of the first byte of the space for | |
233 | register N. */ | |
234 | #undef REGISTER_BYTE | |
235 | #define REGISTER_BYTE(N) \ | |
236 | ((N) < 32 ? (N)*8 \ | |
237 | : (N) < 64 ? 32*8 + ((N)-32)*4 \ | |
238 | : (N) < C0_REGNUM ? 32*8 + 32*4 + ((N)-64)*8 \ | |
239 | : 64*8 + ((N)-C0_REGNUM)*8) | |
240 | ||
241 | /* Say how long (ordinary) registers are. This is a piece of bogosity | |
242 | used in push_word and a few other places; REGISTER_RAW_SIZE is the | |
243 | real way to know how big a register is. */ | |
244 | ||
245 | #undef REGISTER_SIZE | |
246 | #define REGISTER_SIZE 8 | |
247 | ||
248 | /* Number of bytes of storage in the actual machine representation | |
249 | for register N. */ | |
250 | ||
251 | #undef REGISTER_RAW_SIZE | |
252 | #define REGISTER_RAW_SIZE(N) \ | |
253 | ((N) < 32 ? 8 : (N) < 64 ? 4 : 8) | |
254 | ||
255 | /* Number of bytes of storage in the program's representation | |
256 | for register N. */ | |
257 | ||
258 | #undef REGISTER_VIRTUAL_SIZE | |
259 | #define REGISTER_VIRTUAL_SIZE(N) \ | |
260 | ((N) < 32 ? 8 : (N) < 64 ? 4 : 8) | |
261 | ||
262 | /* Largest value REGISTER_RAW_SIZE can have. */ | |
263 | /* tm-sparc.h defines this as 8, but play it safe. */ | |
264 | ||
265 | #undef MAX_REGISTER_RAW_SIZE | |
266 | #define MAX_REGISTER_RAW_SIZE 8 | |
267 | ||
268 | /* Largest value REGISTER_VIRTUAL_SIZE can have. */ | |
269 | /* tm-sparc.h defines this as 8, but play it safe. */ | |
270 | ||
271 | #undef MAX_REGISTER_VIRTUAL_SIZE | |
272 | #define MAX_REGISTER_VIRTUAL_SIZE 8 | |
273 | ||
274 | /* Return the GDB type object for the "standard" data type | |
275 | of data in register N. */ | |
276 | ||
277 | #undef REGISTER_VIRTUAL_TYPE | |
278 | #define REGISTER_VIRTUAL_TYPE(N) \ | |
279 | ((N) < 32 ? builtin_type_long_long \ | |
280 | : (N) < 64 ? builtin_type_float \ | |
281 | : (N) < 80 ? builtin_type_double \ | |
282 | : builtin_type_long_long) | |
283 | ||
284 | /* We use to support both 32 bit and 64 bit pointers. | |
285 | We can't anymore because TARGET_PTR_BIT must now be a constant. */ | |
286 | #undef TARGET_PTR_BIT | |
287 | #define TARGET_PTR_BIT 64 | |
288 | ||
289 | /* Longs are 64 bits. */ | |
290 | #undef TARGET_LONG_BIT | |
291 | #define TARGET_LONG_BIT 64 | |
292 | ||
293 | #undef TARGET_LONG_LONG_BIT | |
294 | #define TARGET_LONG_LONG_BIT 64 | |
295 | ||
296 | /* Does the specified function use the "struct returning" convention | |
297 | or the "value returning" convention? The "value returning" convention | |
298 | almost invariably returns the entire value in registers. The | |
299 | "struct returning" convention often returns the entire value in | |
300 | memory, and passes a pointer (out of or into the function) saying | |
301 | where the value (is or should go). | |
302 | ||
303 | Since this sometimes depends on whether it was compiled with GCC, | |
304 | this is also an argument. This is used in call_function to build a | |
305 | stack, and in value_being_returned to print return values. | |
306 | ||
307 | On Sparc64, we only pass pointers to structs if they're larger then | |
308 | 32 bytes. Otherwise they're stored in %o0-%o3 (floating-point | |
309 | values go into %fp0-%fp3). */ | |
310 | ||
311 | ||
312 | #undef USE_STRUCT_CONVENTION | |
313 | #define USE_STRUCT_CONVENTION(gcc_p, type) (TYPE_LENGTH (type) > 32) | |
314 | ||
315 | #undef REG_STRUCT_HAS_ADDR | |
316 | #define REG_STRUCT_HAS_ADDR(gcc_p,type) (TYPE_LENGTH (type) > 32) | |
317 | ||
318 | /* Store the address of the place in which to copy the structure the | |
319 | subroutine will return. This is called from call_function. */ | |
320 | /* FIXME: V9 uses %o0 for this. */ | |
321 | ||
322 | #undef STORE_STRUCT_RETURN | |
323 | #define STORE_STRUCT_RETURN(ADDR, SP) \ | |
324 | { target_write_memory ((SP)+(16*8), (char *)&(ADDR), 8); } | |
325 | ||
326 | /* Return number of bytes at start of arglist that are not really args. */ | |
327 | ||
328 | #undef FRAME_ARGS_SKIP | |
329 | #define FRAME_ARGS_SKIP 136 | |
330 | \f | |
331 | /* Offsets into jmp_buf. | |
332 | FIXME: This was borrowed from the v8 stuff and will probably have to change | |
333 | for v9. */ | |
334 | ||
335 | #define JB_ELEMENT_SIZE 8 /* Size of each element in jmp_buf */ | |
336 | ||
337 | #define JB_ONSSTACK 0 | |
338 | #define JB_SIGMASK 1 | |
339 | #define JB_SP 2 | |
340 | #define JB_PC 3 | |
341 | #define JB_NPC 4 | |
342 | #define JB_PSR 5 | |
343 | #define JB_G1 6 | |
344 | #define JB_O0 7 | |
345 | #define JB_WBCNT 8 | |
346 | ||
347 | /* Figure out where the longjmp will land. We expect that we have just entered | |
348 | longjmp and haven't yet setup the stack frame, so the args are still in the | |
349 | output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we | |
350 | extract the pc (JB_PC) that we will land at. The pc is copied into ADDR. | |
351 | This routine returns true on success */ | |
352 | ||
353 | extern int | |
354 | get_longjmp_target PARAMS ((CORE_ADDR *)); | |
355 | ||
356 | #define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR) | |
357 | ||
358 | extern CORE_ADDR sparc64_read_sp (); | |
359 | extern CORE_ADDR sparc64_read_fp (); | |
360 | extern void sparc64_write_sp PARAMS ((CORE_ADDR)); | |
361 | extern void sparc64_write_fp PARAMS ((CORE_ADDR)); | |
362 | ||
363 | #define TARGET_READ_SP() (sparc64_read_sp ()) | |
364 | #define TARGET_READ_FP() (sparc64_read_fp ()) | |
365 | #define TARGET_WRITE_SP(X) (sparc64_write_sp (X)) | |
366 | #define TARGET_WRITE_FP(X) (sparc64_write_fp (X)) | |
367 | ||
368 | #undef TM_PRINT_INSN_MACH | |
369 | #define TM_PRINT_INSN_MACH bfd_mach_sparc_v9a | |
370 | ||
371 | CORE_ADDR sp64_push_arguments PARAMS ((int, struct value **, CORE_ADDR, unsigned char, CORE_ADDR)); | |
372 | #undef PUSH_ARGUMENTS | |
392a587b | 373 | #define PUSH_ARGUMENTS(A,B,C,D,E) (sp64_push_arguments ((A), (B), (C), (D), (E))) |
c906108c SS |
374 | |
375 | #undef EXTRACT_RETURN_VALUE | |
376 | #define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \ | |
377 | sparc64_extract_return_value(TYPE, REGBUF, VALBUF, 0) | |
378 | extern void | |
c5aa993b | 379 | sparc64_extract_return_value PARAMS ((struct type *, char[], char *, int)); |