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[thirdparty/binutils-gdb.git] / gdb / config / sparc / tm-sparclet.h
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c906108c
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1/* Target machine definitions for GDB for an embedded SPARC.
2 Copyright 1996 Free Software Foundation, Inc.
3
c5aa993b 4 This file is part of GDB.
c906108c 5
c5aa993b
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6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
c906108c 10
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11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
c906108c 15
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16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
c906108c
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20
21#include "sparc/tm-sparc.h"
22
23#define TARGET_SPARCLET 1
24
25/* Select the sparclet disassembler. Slightly different instruction set from
26 the V8 sparc. */
27
28#undef TM_PRINT_INSN_MACH
29#define TM_PRINT_INSN_MACH bfd_mach_sparc_sparclet
30
31/* overrides of tm-sparc.h */
32
33#undef TARGET_BYTE_ORDER
34#define TARGET_BYTE_ORDER_SELECTABLE
35
36/* Sequence of bytes for breakpoint instruction (ta 1). */
37#undef BREAKPOINT
38#define BIG_BREAKPOINT {0x91, 0xd0, 0x20, 0x01}
39#define LITTLE_BREAKPOINT {0x01, 0x20, 0xd0, 0x91}
40
c5aa993b 41#undef NUM_REGS /* formerly "72" */
c906108c
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42/* WIN FP CPU CCP ASR AWR APSR */
43#define NUM_REGS (32 + 32 + 8 + 8 + 8/*+ 32 + 1*/)
44
c5aa993b 45#undef REGISTER_BYTES /* formerly "(32*4 + 32*4 + 8*4)" */
c906108c
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46#define REGISTER_BYTES (32*4 + 32*4 + 8*4 + 8*4 + 8*4/* + 32*4 + 1*4*/)
47
48/* Initializer for an array of names of registers.
49 There should be NUM_REGS strings in this initializer. */
50/* Sparclet has no fp! */
51/* Compiler maps types for floats by number, so can't
52 change the numbers here. */
53
54#undef REGISTER_NAMES
55#define REGISTER_NAMES \
56{ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", \
57 "o0", "o1", "o2", "o3", "o4", "o5", "o6", "o7", \
58 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", \
59 "i0", "i1", "i2", "i3", "i4", "i5", "i6", "i7", \
60 \
61 "", "", "", "", "", "", "", "", /* no FPU regs */ \
62 "", "", "", "", "", "", "", "", \
63 "", "", "", "", "", "", "", "", \
64 "", "", "", "", "", "", "", "", \
65 /* no CPSR, FPSR */ \
66 "y", "psr", "wim", "tbr", "pc", "npc", "", "", \
67 \
68 "ccsr", "ccpr", "cccrcr", "ccor", "ccobr", "ccibr", "ccir", "", \
69 \
70 /* ASR15 ASR19 (don't display them) */ \
71 "asr1", "", "asr17", "asr18", "", "asr20", "asr21", "asr22", \
72/* \
73 "awr0", "awr1", "awr2", "awr3", "awr4", "awr5", "awr6", "awr7", \
74 "awr8", "awr9", "awr10", "awr11", "awr12", "awr13", "awr14", "awr15", \
75 "awr16", "awr17", "awr18", "awr19", "awr20", "awr21", "awr22", "awr23", \
76 "awr24", "awr25", "awr26", "awr27", "awr28", "awr29", "awr30", "awr31", \
77 "apsr", \
78 */ \
79}
80
81/* Remove FP dependant code which was defined in tm-sparc.h */
c5aa993b
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82#undef FP0_REGNUM /* Floating point register 0 */
83#undef FPS_REGNUM /* Floating point status register */
84#undef CPS_REGNUM /* Coprocessor status register */
c906108c
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85
86/* sparclet register numbers */
87#define CCSR_REGNUM 72
88
89#undef EXTRACT_RETURN_VALUE
90#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
91 { \
92 memcpy ((VALBUF), \
93 (char *)(REGBUF) + REGISTER_RAW_SIZE (O0_REGNUM) * 8 + \
94 (TYPE_LENGTH(TYPE) >= REGISTER_RAW_SIZE (O0_REGNUM) \
95 ? 0 : REGISTER_RAW_SIZE (O0_REGNUM) - TYPE_LENGTH(TYPE)), \
96 TYPE_LENGTH(TYPE)); \
97 }
98#undef STORE_RETURN_VALUE
99#define STORE_RETURN_VALUE(TYPE,VALBUF) \
100 { \
101 /* Other values are returned in register %o0. */ \
102 write_register_bytes (REGISTER_BYTE (O0_REGNUM), (VALBUF), \
103 TYPE_LENGTH (TYPE)); \
104 }
105
106#undef PRINT_REGISTER_HOOK
107#define PRINT_REGISTER_HOOK(regno)
108
109/* Offsets into jmp_buf. Not defined by Sun, but at least documented in a
110 comment in <machine/setjmp.h>! */
111
112#define JB_ELEMENT_SIZE 4 /* Size of each element in jmp_buf */
113
114#define JB_ONSSTACK 0
115#define JB_SIGMASK 1
116#define JB_SP 2
117#define JB_PC 3
118#define JB_NPC 4
119#define JB_PSR 5
120#define JB_G1 6
121#define JB_O0 7
122#define JB_WBCNT 8
123
124/* Figure out where the longjmp will land. We expect that we have just entered
125 longjmp and haven't yet setup the stack frame, so the args are still in the
126 output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
127 extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
128 This routine returns true on success */
129
130extern int
131get_longjmp_target PARAMS ((CORE_ADDR *));
132
133#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)