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1/* Target-machine dependent code for Renesas H8/300, for GDB.
2
6aba47ca 3 Copyright (C) 1988, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999,
0fb0cc75
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4 2000, 2001, 2002, 2003, 2005, 2007, 2008, 2009
5 Free Software Foundation, Inc.
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6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
a9762ec7 11 the Free Software Foundation; either version 3 of the License, or
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12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
a9762ec7 20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
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21
22/*
23 Contributed by Steve Chamberlain
24 sac@cygnus.com
25 */
26
27#include "defs.h"
28#include "value.h"
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29#include "arch-utils.h"
30#include "regcache.h"
31#include "gdbcore.h"
32#include "objfiles.h"
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33#include "gdb_assert.h"
34#include "dis-asm.h"
35#include "dwarf2-frame.h"
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36#include "frame-base.h"
37#include "frame-unwind.h"
38
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39enum gdb_regnum
40{
41 E_R0_REGNUM, E_ER0_REGNUM = E_R0_REGNUM, E_ARG0_REGNUM = E_R0_REGNUM,
42 E_RET0_REGNUM = E_R0_REGNUM,
43 E_R1_REGNUM, E_ER1_REGNUM = E_R1_REGNUM, E_RET1_REGNUM = E_R1_REGNUM,
44 E_R2_REGNUM, E_ER2_REGNUM = E_R2_REGNUM, E_ARGLAST_REGNUM = E_R2_REGNUM,
45 E_R3_REGNUM, E_ER3_REGNUM = E_R3_REGNUM,
46 E_R4_REGNUM, E_ER4_REGNUM = E_R4_REGNUM,
47 E_R5_REGNUM, E_ER5_REGNUM = E_R5_REGNUM,
48 E_R6_REGNUM, E_ER6_REGNUM = E_R6_REGNUM, E_FP_REGNUM = E_R6_REGNUM,
49 E_SP_REGNUM,
50 E_CCR_REGNUM,
51 E_PC_REGNUM,
52 E_CYCLES_REGNUM,
53 E_TICK_REGNUM, E_EXR_REGNUM = E_TICK_REGNUM,
54 E_INST_REGNUM, E_TICKS_REGNUM = E_INST_REGNUM,
55 E_INSTS_REGNUM,
56 E_MACH_REGNUM,
57 E_MACL_REGNUM,
58 E_SBR_REGNUM,
59 E_VBR_REGNUM
60};
61
62#define H8300_MAX_NUM_REGS 18
63
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64#define E_PSEUDO_CCR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch))
65#define E_PSEUDO_EXR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch)+1)
f0bdd87d 66
862ba188
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67struct h8300_frame_cache
68{
69 /* Base address. */
70 CORE_ADDR base;
71 CORE_ADDR sp_offset;
72 CORE_ADDR pc;
73
74 /* Flag showing that a frame has been created in the prologue code. */
75 int uses_fp;
f0bdd87d 76
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77 /* Saved registers. */
78 CORE_ADDR saved_regs[H8300_MAX_NUM_REGS];
79 CORE_ADDR saved_sp;
80};
81
82enum
83{
84 h8300_reg_size = 2,
85 h8300h_reg_size = 4,
86 h8300_max_reg_size = 4,
87};
88
89static int is_h8300hmode (struct gdbarch *gdbarch);
90static int is_h8300smode (struct gdbarch *gdbarch);
91static int is_h8300sxmode (struct gdbarch *gdbarch);
92static int is_h8300_normal_mode (struct gdbarch *gdbarch);
93
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94#define BINWORD(gdbarch) ((is_h8300hmode (gdbarch) \
95 && !is_h8300_normal_mode (gdbarch)) \
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96 ? h8300h_reg_size : h8300_reg_size)
97
98static CORE_ADDR
99h8300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
100{
101 return frame_unwind_register_unsigned (next_frame, E_PC_REGNUM);
102}
103
104static CORE_ADDR
105h8300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
106{
107 return frame_unwind_register_unsigned (next_frame, E_SP_REGNUM);
108}
109
110static struct frame_id
94afd7a6 111h8300_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
862ba188 112{
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UW
113 CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
114 return frame_id_build (sp, get_frame_pc (this_frame));
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115}
116
117/* Normal frames. */
118
119/* Allocate and initialize a frame cache. */
120
121static void
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122h8300_init_frame_cache (struct gdbarch *gdbarch,
123 struct h8300_frame_cache *cache)
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124{
125 int i;
126
127 /* Base address. */
128 cache->base = 0;
129 cache->sp_offset = 0;
130 cache->pc = 0;
131
132 /* Frameless until proven otherwise. */
133 cache->uses_fp = 0;
134
135 /* Saved registers. We initialize these to -1 since zero is a valid
136 offset (that's where %fp is supposed to be stored). */
be8626e0 137 for (i = 0; i < gdbarch_num_regs (gdbarch); i++)
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138 cache->saved_regs[i] = -1;
139}
140
141#define IS_MOVB_RnRm(x) (((x) & 0xff88) == 0x0c88)
142#define IS_MOVW_RnRm(x) (((x) & 0xff88) == 0x0d00)
143#define IS_MOVL_RnRm(x) (((x) & 0xff88) == 0x0f80)
144#define IS_MOVB_Rn16_SP(x) (((x) & 0xfff0) == 0x6ee0)
145#define IS_MOVB_EXT(x) ((x) == 0x7860)
146#define IS_MOVB_Rn24_SP(x) (((x) & 0xfff0) == 0x6aa0)
147#define IS_MOVW_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0)
148#define IS_MOVW_EXT(x) ((x) == 0x78e0)
149#define IS_MOVW_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0)
150/* Same instructions as mov.w, just prefixed with 0x0100 */
151#define IS_MOVL_PRE(x) ((x) == 0x0100)
152#define IS_MOVL_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0)
153#define IS_MOVL_EXT(x) ((x) == 0x78e0)
154#define IS_MOVL_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0)
155
156#define IS_PUSHFP_MOVESPFP(x) ((x) == 0x6df60d76)
157#define IS_PUSH_FP(x) ((x) == 0x01006df6)
158#define IS_MOV_SP_FP(x) ((x) == 0x0ff6)
159#define IS_SUB2_SP(x) ((x) == 0x1b87)
160#define IS_SUB4_SP(x) ((x) == 0x1b97)
161#define IS_ADD_IMM_SP(x) ((x) == 0x7a1f)
162#define IS_SUB_IMM_SP(x) ((x) == 0x7a3f)
163#define IS_SUBL4_SP(x) ((x) == 0x1acf)
164#define IS_MOV_IMM_Rn(x) (((x) & 0xfff0) == 0x7905)
165#define IS_SUB_RnSP(x) (((x) & 0xff0f) == 0x1907)
166#define IS_ADD_RnSP(x) (((x) & 0xff0f) == 0x0907)
167#define IS_PUSH(x) (((x) & 0xfff0) == 0x6df0)
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168
169/* If the instruction at PC is an argument register spill, return its
170 length. Otherwise, return zero.
171
172 An argument register spill is an instruction that moves an argument
173 from the register in which it was passed to the stack slot in which
174 it really lives. It is a byte, word, or longword move from an
175 argument register to a negative offset from the frame pointer.
176
177 CV, 2003-06-16: Or, in optimized code or when the `register' qualifier
178 is used, it could be a byte, word or long move to registers r3-r5. */
179
180static int
181h8300_is_argument_spill (CORE_ADDR pc)
182{
183 int w = read_memory_unsigned_integer (pc, 2);
184
862ba188 185 if ((IS_MOVB_RnRm (w) || IS_MOVW_RnRm (w) || IS_MOVL_RnRm (w))
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186 && (w & 0x70) <= 0x20 /* Rs is R0, R1 or R2 */
187 && (w & 0x7) >= 0x3 && (w & 0x7) <= 0x5) /* Rd is R3, R4 or R5 */
188 return 2;
189
862ba188 190 if (IS_MOVB_Rn16_SP (w)
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191 && 8 <= (w & 0xf) && (w & 0xf) <= 10) /* Rs is R0L, R1L, or R2L */
192 {
862ba188 193 if (read_memory_integer (pc + 2, 2) < 0) /* ... and d:16 is negative. */
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194 return 4;
195 }
862ba188 196 else if (IS_MOVB_EXT (w))
f0bdd87d 197 {
862ba188 198 if (IS_MOVB_Rn24_SP (read_memory_unsigned_integer (pc + 2, 2)))
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199 {
200 LONGEST disp = read_memory_integer (pc + 4, 4);
201
202 /* ... and d:24 is negative. */
203 if (disp < 0 && disp > 0xffffff)
204 return 8;
205 }
206 }
862ba188 207 else if (IS_MOVW_Rn16_SP (w)
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208 && (w & 0xf) <= 2) /* Rs is R0, R1, or R2 */
209 {
f0bdd87d 210 /* ... and d:16 is negative. */
862ba188 211 if (read_memory_integer (pc + 2, 2) < 0)
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212 return 4;
213 }
862ba188 214 else if (IS_MOVW_EXT (w))
f0bdd87d 215 {
862ba188 216 if (IS_MOVW_Rn24_SP (read_memory_unsigned_integer (pc + 2, 2)))
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217 {
218 LONGEST disp = read_memory_integer (pc + 4, 4);
219
220 /* ... and d:24 is negative. */
221 if (disp < 0 && disp > 0xffffff)
222 return 8;
223 }
224 }
862ba188 225 else if (IS_MOVL_PRE (w))
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226 {
227 int w2 = read_memory_integer (pc + 2, 2);
228
862ba188 229 if (IS_MOVL_Rn16_SP (w2)
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230 && (w2 & 0xf) <= 2) /* Rs is ER0, ER1, or ER2 */
231 {
f0bdd87d 232 /* ... and d:16 is negative. */
862ba188 233 if (read_memory_integer (pc + 4, 2) < 0)
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234 return 6;
235 }
862ba188 236 else if (IS_MOVL_EXT (w2))
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237 {
238 int w3 = read_memory_integer (pc + 4, 2);
239
862ba188 240 if (IS_MOVL_Rn24_SP (read_memory_integer (pc + 4, 2)))
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241 {
242 LONGEST disp = read_memory_integer (pc + 6, 4);
243
244 /* ... and d:24 is negative. */
245 if (disp < 0 && disp > 0xffffff)
246 return 10;
247 }
248 }
249 }
250
251 return 0;
252}
253
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254/* Do a full analysis of the prologue at PC and update CACHE
255 accordingly. Bail out early if CURRENT_PC is reached. Return the
256 address where the analysis stopped.
257
258 We handle all cases that can be generated by gcc.
259
260 For allocating a stack frame:
261
262 mov.w r6,@-sp
263 mov.w sp,r6
264 mov.w #-n,rN
265 add.w rN,sp
266
267 mov.w r6,@-sp
268 mov.w sp,r6
269 subs #2,sp
270 (repeat)
271
272 mov.l er6,@-sp
273 mov.l sp,er6
274 add.l #-n,sp
275
276 mov.w r6,@-sp
277 mov.w sp,r6
278 subs #4,sp
279 (repeat)
280
281 For saving registers:
282
283 mov.w rN,@-sp
284 mov.l erN,@-sp
285 stm.l reglist,@-sp
286
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287 */
288
289static CORE_ADDR
290h8300_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc,
291 struct h8300_frame_cache *cache)
292{
293 unsigned int op;
862ba188
CV
294 int regno, i, spill_size;
295
296 cache->sp_offset = 0;
f0bdd87d 297
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298 if (pc >= current_pc)
299 return current_pc;
300
862ba188
CV
301 op = read_memory_unsigned_integer (pc, 4);
302
303 if (IS_PUSHFP_MOVESPFP (op))
304 {
305 cache->saved_regs[E_FP_REGNUM] = 0;
306 cache->uses_fp = 1;
307 pc += 4;
308 }
309 else if (IS_PUSH_FP (op))
310 {
311 cache->saved_regs[E_FP_REGNUM] = 0;
312 pc += 4;
313 if (pc >= current_pc)
314 return current_pc;
315 op = read_memory_unsigned_integer (pc, 2);
316 if (IS_MOV_SP_FP (op))
317 {
318 cache->uses_fp = 1;
319 pc += 2;
320 }
321 }
322
323 while (pc < current_pc)
324 {
325 op = read_memory_unsigned_integer (pc, 2);
326 if (IS_SUB2_SP (op))
327 {
328 cache->sp_offset += 2;
329 pc += 2;
330 }
331 else if (IS_SUB4_SP (op))
332 {
333 cache->sp_offset += 4;
334 pc += 2;
335 }
336 else if (IS_ADD_IMM_SP (op))
337 {
338 cache->sp_offset += -read_memory_integer (pc + 2, 2);
339 pc += 4;
340 }
341 else if (IS_SUB_IMM_SP (op))
342 {
343 cache->sp_offset += read_memory_integer (pc + 2, 2);
344 pc += 4;
345 }
346 else if (IS_SUBL4_SP (op))
347 {
348 cache->sp_offset += 4;
349 pc += 2;
350 }
351 else if (IS_MOV_IMM_Rn (op))
352 {
353 int offset = read_memory_integer (pc + 2, 2);
354 regno = op & 0x000f;
355 op = read_memory_unsigned_integer (pc + 4, 2);
356 if (IS_ADD_RnSP (op) && (op & 0x00f0) == regno)
357 {
358 cache->sp_offset -= offset;
359 pc += 6;
360 }
361 else if (IS_SUB_RnSP (op) && (op & 0x00f0) == regno)
362 {
363 cache->sp_offset += offset;
364 pc += 6;
365 }
366 else
367 break;
368 }
369 else if (IS_PUSH (op))
370 {
371 regno = op & 0x000f;
372 cache->sp_offset += 2;
373 cache->saved_regs[regno] = cache->sp_offset;
374 pc += 2;
375 }
376 else if (op == 0x0100)
377 {
378 op = read_memory_unsigned_integer (pc + 2, 2);
379 if (IS_PUSH (op))
380 {
381 regno = op & 0x000f;
382 cache->sp_offset += 4;
383 cache->saved_regs[regno] = cache->sp_offset;
384 pc += 4;
385 }
386 else
387 break;
388 }
389 else if ((op & 0xffcf) == 0x0100)
390 {
391 int op1;
392 op1 = read_memory_unsigned_integer (pc + 2, 2);
393 if (IS_PUSH (op1))
394 {
395 /* Since the prefix is 0x01x0, this is not a simple pushm but a
396 stm.l reglist,@-sp */
397 i = ((op & 0x0030) >> 4) + 1;
398 regno = op1 & 0x000f;
399 for (; i > 0; regno++, --i)
400 {
401 cache->sp_offset += 4;
402 cache->saved_regs[regno] = cache->sp_offset;
403 }
404 pc += 4;
405 }
406 else
407 break;
408 }
409 else
410 break;
411 }
412
413 /* Check for spilling an argument register to the stack frame.
414 This could also be an initializing store from non-prologue code,
415 but I don't think there's any harm in skipping that. */
416 while ((spill_size = h8300_is_argument_spill (pc)) > 0
417 && pc + spill_size <= current_pc)
418 pc += spill_size;
f0bdd87d
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419
420 return pc;
421}
422
423static struct h8300_frame_cache *
94afd7a6 424h8300_frame_cache (struct frame_info *this_frame, void **this_cache)
f0bdd87d 425{
94afd7a6 426 struct gdbarch *gdbarch = get_frame_arch (this_frame);
f0bdd87d
YS
427 struct h8300_frame_cache *cache;
428 char buf[4];
429 int i;
862ba188 430 CORE_ADDR current_pc;
f0bdd87d
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431
432 if (*this_cache)
433 return *this_cache;
434
862ba188 435 cache = FRAME_OBSTACK_ZALLOC (struct h8300_frame_cache);
be8626e0 436 h8300_init_frame_cache (gdbarch, cache);
f0bdd87d
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437 *this_cache = cache;
438
439 /* In principle, for normal frames, %fp holds the frame pointer,
440 which holds the base address for the current stack frame.
441 However, for functions that don't need it, the frame pointer is
442 optional. For these "frameless" functions the frame pointer is
862ba188 443 actually the frame pointer of the calling frame. */
f0bdd87d 444
94afd7a6 445 cache->base = get_frame_register_unsigned (this_frame, E_FP_REGNUM);
f0bdd87d
YS
446 if (cache->base == 0)
447 return cache;
448
be8626e0 449 cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch);
f0bdd87d 450
94afd7a6
UW
451 cache->pc = get_frame_func (this_frame);
452 current_pc = get_frame_pc (this_frame);
f0bdd87d 453 if (cache->pc != 0)
862ba188 454 h8300_analyze_prologue (cache->pc, current_pc, cache);
f0bdd87d 455
862ba188 456 if (!cache->uses_fp)
f0bdd87d
YS
457 {
458 /* We didn't find a valid frame, which means that CACHE->base
459 currently holds the frame pointer for our calling frame. If
460 we're at the start of a function, or somewhere half-way its
461 prologue, the function's frame probably hasn't been fully
462 setup yet. Try to reconstruct the base address for the stack
463 frame by looking at the stack pointer. For truly "frameless"
464 functions this might work too. */
465
94afd7a6 466 cache->base = get_frame_register_unsigned (this_frame, E_SP_REGNUM)
862ba188 467 + cache->sp_offset;
be8626e0 468 cache->saved_sp = cache->base + BINWORD (gdbarch);
862ba188
CV
469 cache->saved_regs[E_PC_REGNUM] = 0;
470 }
471 else
472 {
be8626e0
MD
473 cache->saved_sp = cache->base + 2 * BINWORD (gdbarch);
474 cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch);
f0bdd87d 475 }
f0bdd87d
YS
476
477 /* Adjust all the saved registers such that they contain addresses
478 instead of offsets. */
be8626e0 479 for (i = 0; i < gdbarch_num_regs (gdbarch); i++)
f0bdd87d 480 if (cache->saved_regs[i] != -1)
862ba188 481 cache->saved_regs[i] = cache->base - cache->saved_regs[i];
f0bdd87d
YS
482
483 return cache;
484}
485
486static void
94afd7a6 487h8300_frame_this_id (struct frame_info *this_frame, void **this_cache,
f0bdd87d
YS
488 struct frame_id *this_id)
489{
490 struct h8300_frame_cache *cache =
94afd7a6 491 h8300_frame_cache (this_frame, this_cache);
f0bdd87d
YS
492
493 /* This marks the outermost frame. */
494 if (cache->base == 0)
495 return;
496
862ba188 497 *this_id = frame_id_build (cache->saved_sp, cache->pc);
f0bdd87d
YS
498}
499
94afd7a6
UW
500static struct value *
501h8300_frame_prev_register (struct frame_info *this_frame, void **this_cache,
502 int regnum)
f0bdd87d 503{
94afd7a6 504 struct gdbarch *gdbarch = get_frame_arch (this_frame);
f0bdd87d 505 struct h8300_frame_cache *cache =
94afd7a6 506 h8300_frame_cache (this_frame, this_cache);
f0bdd87d
YS
507
508 gdb_assert (regnum >= 0);
509
510 if (regnum == E_SP_REGNUM && cache->saved_sp)
94afd7a6 511 return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp);
f0bdd87d 512
ea78bae4 513 if (regnum < gdbarch_num_regs (gdbarch)
f57d151a 514 && cache->saved_regs[regnum] != -1)
94afd7a6
UW
515 return frame_unwind_got_memory (this_frame, regnum,
516 cache->saved_regs[regnum]);
f0bdd87d 517
94afd7a6 518 return frame_unwind_got_register (this_frame, regnum, regnum);
f0bdd87d
YS
519}
520
521static const struct frame_unwind h8300_frame_unwind = {
522 NORMAL_FRAME,
523 h8300_frame_this_id,
94afd7a6
UW
524 h8300_frame_prev_register,
525 NULL,
526 default_frame_sniffer
f0bdd87d
YS
527};
528
862ba188 529static CORE_ADDR
94afd7a6 530h8300_frame_base_address (struct frame_info *this_frame, void **this_cache)
862ba188 531{
94afd7a6 532 struct h8300_frame_cache *cache = h8300_frame_cache (this_frame, this_cache);
862ba188
CV
533 return cache->base;
534}
535
536static const struct frame_base h8300_frame_base = {
537 &h8300_frame_unwind,
538 h8300_frame_base_address,
539 h8300_frame_base_address,
540 h8300_frame_base_address
541};
542
543static CORE_ADDR
6093d2eb 544h8300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
862ba188
CV
545{
546 CORE_ADDR func_addr = 0 , func_end = 0;
547
548 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
549 {
550 struct symtab_and_line sal;
551 struct h8300_frame_cache cache;
552
553 /* Found a function. */
554 sal = find_pc_line (func_addr, 0);
555 if (sal.end && sal.end < func_end)
556 /* Found a line number, use it as end of prologue. */
557 return sal.end;
558
559 /* No useable line symbol. Use prologue parsing method. */
be8626e0 560 h8300_init_frame_cache (gdbarch, &cache);
862ba188
CV
561 return h8300_analyze_prologue (func_addr, func_end, &cache);
562 }
563
564 /* No function symbol -- just return the PC. */
565 return (CORE_ADDR) pc;
566}
567
f0bdd87d
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568/* Function: push_dummy_call
569 Setup the function arguments for calling a function in the inferior.
570 In this discussion, a `word' is 16 bits on the H8/300s, and 32 bits
571 on the H8/300H.
572
573 There are actually two ABI's here: -mquickcall (the default) and
574 -mno-quickcall. With -mno-quickcall, all arguments are passed on
575 the stack after the return address, word-aligned. With
576 -mquickcall, GCC tries to use r0 -- r2 to pass registers. Since
577 GCC doesn't indicate in the object file which ABI was used to
578 compile it, GDB only supports the default --- -mquickcall.
579
580 Here are the rules for -mquickcall, in detail:
581
582 Each argument, whether scalar or aggregate, is padded to occupy a
583 whole number of words. Arguments smaller than a word are padded at
584 the most significant end; those larger than a word are padded at
585 the least significant end.
586
587 The initial arguments are passed in r0 -- r2. Earlier arguments go in
588 lower-numbered registers. Multi-word arguments are passed in
589 consecutive registers, with the most significant end in the
590 lower-numbered register.
591
592 If an argument doesn't fit entirely in the remaining registers, it
593 is passed entirely on the stack. Stack arguments begin just after
594 the return address. Once an argument has overflowed onto the stack
595 this way, all subsequent arguments are passed on the stack.
596
597 The above rule has odd consequences. For example, on the h8/300s,
598 if a function takes two longs and an int as arguments:
599 - the first long will be passed in r0/r1,
600 - the second long will be passed entirely on the stack, since it
601 doesn't fit in r2,
602 - and the int will be passed on the stack, even though it could fit
603 in r2.
604
605 A weird exception: if an argument is larger than a word, but not a
606 whole number of words in length (before padding), it is passed on
607 the stack following the rules for stack arguments above, even if
608 there are sufficient registers available to hold it. Stranger
609 still, the argument registers are still `used up' --- even though
610 there's nothing in them.
611
612 So, for example, on the h8/300s, if a function expects a three-byte
613 structure and an int, the structure will go on the stack, and the
614 int will go in r2, not r0.
615
616 If the function returns an aggregate type (struct, union, or class)
617 by value, the caller must allocate space to hold the return value,
618 and pass the callee a pointer to this space as an invisible first
619 argument, in R0.
620
621 For varargs functions, the last fixed argument and all the variable
622 arguments are always passed on the stack. This means that calls to
623 varargs functions don't work properly unless there is a prototype
624 in scope.
625
626 Basically, this ABI is not good, for the following reasons:
627 - You can't call vararg functions properly unless a prototype is in scope.
628 - Structure passing is inconsistent, to no purpose I can see.
629 - It often wastes argument registers, of which there are only three
630 to begin with. */
631
632static CORE_ADDR
633h8300_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
634 struct regcache *regcache, CORE_ADDR bp_addr,
635 int nargs, struct value **args, CORE_ADDR sp,
636 int struct_return, CORE_ADDR struct_addr)
637{
638 int stack_alloc = 0, stack_offset = 0;
be8626e0 639 int wordsize = BINWORD (gdbarch);
f0bdd87d
YS
640 int reg = E_ARG0_REGNUM;
641 int argument;
642
643 /* First, make sure the stack is properly aligned. */
644 sp = align_down (sp, wordsize);
645
646 /* Now make sure there's space on the stack for the arguments. We
647 may over-allocate a little here, but that won't hurt anything. */
648 for (argument = 0; argument < nargs; argument++)
649 stack_alloc += align_up (TYPE_LENGTH (value_type (args[argument])),
650 wordsize);
651 sp -= stack_alloc;
652
653 /* Now load as many arguments as possible into registers, and push
654 the rest onto the stack.
655 If we're returning a structure by value, then we must pass a
656 pointer to the buffer for the return value as an invisible first
657 argument. */
658 if (struct_return)
659 regcache_cooked_write_unsigned (regcache, reg++, struct_addr);
660
661 for (argument = 0; argument < nargs; argument++)
662 {
663 struct type *type = value_type (args[argument]);
664 int len = TYPE_LENGTH (type);
665 char *contents = (char *) value_contents (args[argument]);
666
667 /* Pad the argument appropriately. */
668 int padded_len = align_up (len, wordsize);
5d0d05b6 669 gdb_byte *padded = alloca (padded_len);
f0bdd87d
YS
670
671 memset (padded, 0, padded_len);
672 memcpy (len < wordsize ? padded + padded_len - len : padded,
673 contents, len);
674
675 /* Could the argument fit in the remaining registers? */
676 if (padded_len <= (E_ARGLAST_REGNUM - reg + 1) * wordsize)
677 {
678 /* Are we going to pass it on the stack anyway, for no good
679 reason? */
680 if (len > wordsize && len % wordsize)
681 {
682 /* I feel so unclean. */
683 write_memory (sp + stack_offset, padded, padded_len);
684 stack_offset += padded_len;
685
686 /* That's right --- even though we passed the argument
687 on the stack, we consume the registers anyway! Love
688 me, love my dog. */
689 reg += padded_len / wordsize;
690 }
691 else
692 {
693 /* Heavens to Betsy --- it's really going in registers!
694 It would be nice if we could use write_register_bytes
695 here, but on the h8/300s, there are gaps between
696 the registers in the register file. */
697 int offset;
698
699 for (offset = 0; offset < padded_len; offset += wordsize)
700 {
701 ULONGEST word = extract_unsigned_integer (padded + offset,
702 wordsize);
703 regcache_cooked_write_unsigned (regcache, reg++, word);
704 }
705 }
706 }
707 else
708 {
709 /* It doesn't fit in registers! Onto the stack it goes. */
710 write_memory (sp + stack_offset, padded, padded_len);
711 stack_offset += padded_len;
712
713 /* Once one argument has spilled onto the stack, all
714 subsequent arguments go on the stack. */
715 reg = E_ARGLAST_REGNUM + 1;
716 }
717 }
718
719 /* Store return address. */
720 sp -= wordsize;
721 write_memory_unsigned_integer (sp, wordsize, bp_addr);
722
723 /* Update stack pointer. */
724 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
725
862ba188
CV
726 /* Return the new stack pointer minus the return address slot since
727 that's what DWARF2/GCC uses as the frame's CFA. */
728 return sp + wordsize;
f0bdd87d
YS
729}
730
731/* Function: extract_return_value
732 Figure out where in REGBUF the called function has left its return value.
733 Copy that into VALBUF. Be sure to account for CPU type. */
734
735static void
736h8300_extract_return_value (struct type *type, struct regcache *regcache,
737 void *valbuf)
738{
739 int len = TYPE_LENGTH (type);
740 ULONGEST c, addr;
741
742 switch (len)
743 {
744 case 1:
745 case 2:
746 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
747 store_unsigned_integer (valbuf, len, c);
748 break;
749 case 4: /* Needs two registers on plain H8/300 */
750 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
751 store_unsigned_integer (valbuf, 2, c);
752 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
753 store_unsigned_integer ((void *) ((char *) valbuf + 2), 2, c);
754 break;
755 case 8: /* long long is now 8 bytes. */
756 if (TYPE_CODE (type) == TYPE_CODE_INT)
757 {
758 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
759 c = read_memory_unsigned_integer ((CORE_ADDR) addr, len);
760 store_unsigned_integer (valbuf, len, c);
761 }
762 else
763 {
764 error ("I don't know how this 8 byte value is returned.");
765 }
766 break;
767 }
768}
769
770static void
771h8300h_extract_return_value (struct type *type, struct regcache *regcache,
772 void *valbuf)
773{
774 int len = TYPE_LENGTH (type);
775 ULONGEST c, addr;
776
777 switch (len)
778 {
779 case 1:
780 case 2:
781 case 4:
782 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
783 store_unsigned_integer (valbuf, len, c);
784 break;
785 case 8: /* long long is now 8 bytes. */
786 if (TYPE_CODE (type) == TYPE_CODE_INT)
787 {
862ba188
CV
788 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
789 store_unsigned_integer (valbuf, 4, c);
790 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
791 store_unsigned_integer ((void *) ((char *) valbuf + 4), 4, c);
f0bdd87d
YS
792 }
793 else
794 {
795 error ("I don't know how this 8 byte value is returned.");
796 }
797 break;
798 }
799}
800
63807e1d 801static int
862ba188
CV
802h8300_use_struct_convention (struct type *value_type)
803{
804 /* Types of 1, 2 or 4 bytes are returned in R0/R1, everything else on the
805 stack. */
806
807 if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT
808 || TYPE_CODE (value_type) == TYPE_CODE_UNION)
809 return 1;
810 return !(TYPE_LENGTH (value_type) == 1
811 || TYPE_LENGTH (value_type) == 2
812 || TYPE_LENGTH (value_type) == 4);
813}
814
63807e1d 815static int
862ba188
CV
816h8300h_use_struct_convention (struct type *value_type)
817{
818 /* Types of 1, 2 or 4 bytes are returned in R0, INT types of 8 bytes are
819 returned in R0/R1, everything else on the stack. */
820 if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT
821 || TYPE_CODE (value_type) == TYPE_CODE_UNION)
822 return 1;
823 return !(TYPE_LENGTH (value_type) == 1
824 || TYPE_LENGTH (value_type) == 2
825 || TYPE_LENGTH (value_type) == 4
826 || (TYPE_LENGTH (value_type) == 8
827 && TYPE_CODE (value_type) == TYPE_CODE_INT));
828}
f0bdd87d
YS
829
830/* Function: store_return_value
831 Place the appropriate value in the appropriate registers.
832 Primarily used by the RETURN command. */
833
834static void
835h8300_store_return_value (struct type *type, struct regcache *regcache,
836 const void *valbuf)
837{
838 int len = TYPE_LENGTH (type);
839 ULONGEST val;
840
841 switch (len)
842 {
843 case 1:
844 case 2: /* short... */
845 val = extract_unsigned_integer (valbuf, len);
846 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
847 break;
848 case 4: /* long, float */
849 val = extract_unsigned_integer (valbuf, len);
850 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
851 (val >> 16) & 0xffff);
852 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, val & 0xffff);
853 break;
854 case 8: /* long long, double and long double are all defined
855 as 4 byte types so far so this shouldn't happen. */
856 error ("I don't know how to return an 8 byte value.");
857 break;
858 }
859}
860
861static void
862h8300h_store_return_value (struct type *type, struct regcache *regcache,
863 const void *valbuf)
864{
865 int len = TYPE_LENGTH (type);
866 ULONGEST val;
867
868 switch (len)
869 {
870 case 1:
871 case 2:
872 case 4: /* long, float */
873 val = extract_unsigned_integer (valbuf, len);
874 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
875 break;
862ba188
CV
876 case 8:
877 val = extract_unsigned_integer (valbuf, len);
878 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
879 (val >> 32) & 0xffffffff);
880 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM,
881 val & 0xffffffff);
f0bdd87d
YS
882 break;
883 }
884}
885
862ba188 886static enum return_value_convention
c055b101
CV
887h8300_return_value (struct gdbarch *gdbarch, struct type *func_type,
888 struct type *type, struct regcache *regcache,
5d0d05b6 889 gdb_byte *readbuf, const gdb_byte *writebuf)
862ba188
CV
890{
891 if (h8300_use_struct_convention (type))
892 return RETURN_VALUE_STRUCT_CONVENTION;
893 if (writebuf)
894 h8300_store_return_value (type, regcache, writebuf);
895 else if (readbuf)
896 h8300_extract_return_value (type, regcache, readbuf);
897 return RETURN_VALUE_REGISTER_CONVENTION;
898}
899
900static enum return_value_convention
c055b101
CV
901h8300h_return_value (struct gdbarch *gdbarch, struct type *func_type,
902 struct type *type, struct regcache *regcache,
5d0d05b6 903 gdb_byte *readbuf, const gdb_byte *writebuf)
862ba188
CV
904{
905 if (h8300h_use_struct_convention (type))
906 {
907 if (readbuf)
908 {
909 ULONGEST addr;
910
911 regcache_raw_read_unsigned (regcache, E_R0_REGNUM, &addr);
912 read_memory (addr, readbuf, TYPE_LENGTH (type));
913 }
914
915 return RETURN_VALUE_ABI_RETURNS_ADDRESS;
916 }
917 if (writebuf)
918 h8300h_store_return_value (type, regcache, writebuf);
919 else if (readbuf)
920 h8300h_extract_return_value (type, regcache, readbuf);
921 return RETURN_VALUE_REGISTER_CONVENTION;
922}
923
f0bdd87d
YS
924static struct cmd_list_element *setmachinelist;
925
926static const char *
d93859e2 927h8300_register_name (struct gdbarch *gdbarch, int regno)
f0bdd87d
YS
928{
929 /* The register names change depending on which h8300 processor
930 type is selected. */
931 static char *register_names[] = {
932 "r0", "r1", "r2", "r3", "r4", "r5", "r6",
933 "sp", "", "pc", "cycles", "tick", "inst",
934 "ccr", /* pseudo register */
935 };
936 if (regno < 0
937 || regno >= (sizeof (register_names) / sizeof (*register_names)))
938 internal_error (__FILE__, __LINE__,
939 "h8300_register_name: illegal register number %d", regno);
940 else
941 return register_names[regno];
942}
943
944static const char *
d93859e2 945h8300s_register_name (struct gdbarch *gdbarch, int regno)
f0bdd87d
YS
946{
947 static char *register_names[] = {
948 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
949 "sp", "", "pc", "cycles", "", "tick", "inst",
950 "mach", "macl",
951 "ccr", "exr" /* pseudo registers */
952 };
953 if (regno < 0
954 || regno >= (sizeof (register_names) / sizeof (*register_names)))
955 internal_error (__FILE__, __LINE__,
956 "h8300s_register_name: illegal register number %d",
957 regno);
958 else
959 return register_names[regno];
960}
961
962static const char *
d93859e2 963h8300sx_register_name (struct gdbarch *gdbarch, int regno)
f0bdd87d
YS
964{
965 static char *register_names[] = {
966 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
967 "sp", "", "pc", "cycles", "", "tick", "inst",
968 "mach", "macl", "sbr", "vbr",
969 "ccr", "exr" /* pseudo registers */
970 };
971 if (regno < 0
972 || regno >= (sizeof (register_names) / sizeof (*register_names)))
973 internal_error (__FILE__, __LINE__,
974 "h8300sx_register_name: illegal register number %d",
975 regno);
976 else
977 return register_names[regno];
978}
979
980static void
981h8300_print_register (struct gdbarch *gdbarch, struct ui_file *file,
982 struct frame_info *frame, int regno)
983{
984 LONGEST rval;
985 const char *name = gdbarch_register_name (gdbarch, regno);
986
987 if (!name || !*name)
988 return;
989
990 rval = get_frame_register_signed (frame, regno);
991
992 fprintf_filtered (file, "%-14s ", name);
be8626e0
MD
993 if ((regno == E_PSEUDO_CCR_REGNUM (gdbarch)) || \
994 (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch)))
f0bdd87d
YS
995 {
996 fprintf_filtered (file, "0x%02x ", (unsigned char) rval);
997 print_longest (file, 'u', 1, rval);
998 }
999 else
1000 {
be8626e0
MD
1001 fprintf_filtered (file, "0x%s ", phex ((ULONGEST) rval,
1002 BINWORD (gdbarch)));
f0bdd87d
YS
1003 print_longest (file, 'd', 1, rval);
1004 }
be8626e0 1005 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
f0bdd87d
YS
1006 {
1007 /* CCR register */
1008 int C, Z, N, V;
1009 unsigned char l = rval & 0xff;
1010 fprintf_filtered (file, "\t");
1011 fprintf_filtered (file, "I-%d ", (l & 0x80) != 0);
1012 fprintf_filtered (file, "UI-%d ", (l & 0x40) != 0);
1013 fprintf_filtered (file, "H-%d ", (l & 0x20) != 0);
1014 fprintf_filtered (file, "U-%d ", (l & 0x10) != 0);
1015 N = (l & 0x8) != 0;
1016 Z = (l & 0x4) != 0;
1017 V = (l & 0x2) != 0;
1018 C = (l & 0x1) != 0;
1019 fprintf_filtered (file, "N-%d ", N);
1020 fprintf_filtered (file, "Z-%d ", Z);
1021 fprintf_filtered (file, "V-%d ", V);
1022 fprintf_filtered (file, "C-%d ", C);
1023 if ((C | Z) == 0)
1024 fprintf_filtered (file, "u> ");
1025 if ((C | Z) == 1)
1026 fprintf_filtered (file, "u<= ");
1027 if ((C == 0))
1028 fprintf_filtered (file, "u>= ");
1029 if (C == 1)
1030 fprintf_filtered (file, "u< ");
1031 if (Z == 0)
1032 fprintf_filtered (file, "!= ");
1033 if (Z == 1)
1034 fprintf_filtered (file, "== ");
1035 if ((N ^ V) == 0)
1036 fprintf_filtered (file, ">= ");
1037 if ((N ^ V) == 1)
1038 fprintf_filtered (file, "< ");
1039 if ((Z | (N ^ V)) == 0)
1040 fprintf_filtered (file, "> ");
1041 if ((Z | (N ^ V)) == 1)
1042 fprintf_filtered (file, "<= ");
1043 }
be8626e0 1044 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch))
f0bdd87d
YS
1045 {
1046 /* EXR register */
1047 unsigned char l = rval & 0xff;
1048 fprintf_filtered (file, "\t");
1049 fprintf_filtered (file, "T-%d - - - ", (l & 0x80) != 0);
1050 fprintf_filtered (file, "I2-%d ", (l & 4) != 0);
1051 fprintf_filtered (file, "I1-%d ", (l & 2) != 0);
1052 fprintf_filtered (file, "I0-%d", (l & 1) != 0);
1053 }
1054 fprintf_filtered (file, "\n");
1055}
1056
1057static void
1058h8300_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
1059 struct frame_info *frame, int regno, int cpregs)
1060{
1061 if (regno < 0)
1062 {
1063 for (regno = E_R0_REGNUM; regno <= E_SP_REGNUM; ++regno)
1064 h8300_print_register (gdbarch, file, frame, regno);
be8626e0
MD
1065 h8300_print_register (gdbarch, file, frame,
1066 E_PSEUDO_CCR_REGNUM (gdbarch));
f0bdd87d 1067 h8300_print_register (gdbarch, file, frame, E_PC_REGNUM);
ea78bae4 1068 if (is_h8300smode (gdbarch))
f0bdd87d 1069 {
be8626e0
MD
1070 h8300_print_register (gdbarch, file, frame,
1071 E_PSEUDO_EXR_REGNUM (gdbarch));
ea78bae4 1072 if (is_h8300sxmode (gdbarch))
f0bdd87d
YS
1073 {
1074 h8300_print_register (gdbarch, file, frame, E_SBR_REGNUM);
1075 h8300_print_register (gdbarch, file, frame, E_VBR_REGNUM);
1076 }
1077 h8300_print_register (gdbarch, file, frame, E_MACH_REGNUM);
1078 h8300_print_register (gdbarch, file, frame, E_MACL_REGNUM);
1079 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1080 h8300_print_register (gdbarch, file, frame, E_TICKS_REGNUM);
1081 h8300_print_register (gdbarch, file, frame, E_INSTS_REGNUM);
1082 }
1083 else
1084 {
1085 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1086 h8300_print_register (gdbarch, file, frame, E_TICK_REGNUM);
1087 h8300_print_register (gdbarch, file, frame, E_INST_REGNUM);
1088 }
1089 }
1090 else
1091 {
1092 if (regno == E_CCR_REGNUM)
be8626e0
MD
1093 h8300_print_register (gdbarch, file, frame,
1094 E_PSEUDO_CCR_REGNUM (gdbarch));
1095 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch)
ea78bae4 1096 && is_h8300smode (gdbarch))
be8626e0
MD
1097 h8300_print_register (gdbarch, file, frame,
1098 E_PSEUDO_EXR_REGNUM (gdbarch));
f0bdd87d
YS
1099 else
1100 h8300_print_register (gdbarch, file, frame, regno);
1101 }
1102}
1103
1104static struct type *
1105h8300_register_type (struct gdbarch *gdbarch, int regno)
1106{
ea78bae4
UW
1107 if (regno < 0 || regno >= gdbarch_num_regs (gdbarch)
1108 + gdbarch_num_pseudo_regs (gdbarch))
f0bdd87d
YS
1109 internal_error (__FILE__, __LINE__,
1110 "h8300_register_type: illegal register number %d", regno);
1111 else
1112 {
1113 switch (regno)
1114 {
1115 case E_PC_REGNUM:
0dfff4cb 1116 return builtin_type (gdbarch)->builtin_func_ptr;
f0bdd87d
YS
1117 case E_SP_REGNUM:
1118 case E_FP_REGNUM:
0dfff4cb 1119 return builtin_type (gdbarch)->builtin_data_ptr;
f0bdd87d 1120 default:
be8626e0 1121 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
df4df182 1122 return builtin_type (gdbarch)->builtin_uint8;
be8626e0 1123 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
df4df182 1124 return builtin_type (gdbarch)->builtin_uint8;
ea78bae4 1125 else if (is_h8300hmode (gdbarch))
df4df182 1126 return builtin_type (gdbarch)->builtin_int32;
f0bdd87d 1127 else
df4df182 1128 return builtin_type (gdbarch)->builtin_int16;
f0bdd87d
YS
1129 }
1130 }
1131}
1132
1133static void
1134h8300_pseudo_register_read (struct gdbarch *gdbarch,
5d0d05b6
CV
1135 struct regcache *regcache, int regno,
1136 gdb_byte *buf)
f0bdd87d 1137{
be8626e0 1138 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
f0bdd87d 1139 regcache_raw_read (regcache, E_CCR_REGNUM, buf);
be8626e0 1140 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
f0bdd87d
YS
1141 regcache_raw_read (regcache, E_EXR_REGNUM, buf);
1142 else
1143 regcache_raw_read (regcache, regno, buf);
1144}
1145
1146static void
1147h8300_pseudo_register_write (struct gdbarch *gdbarch,
1148 struct regcache *regcache, int regno,
5d0d05b6 1149 const gdb_byte *buf)
f0bdd87d 1150{
be8626e0 1151 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
f0bdd87d 1152 regcache_raw_write (regcache, E_CCR_REGNUM, buf);
be8626e0 1153 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
f0bdd87d
YS
1154 regcache_raw_write (regcache, E_EXR_REGNUM, buf);
1155 else
1156 regcache_raw_write (regcache, regno, buf);
1157}
1158
1159static int
d3f73121 1160h8300_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno)
f0bdd87d
YS
1161{
1162 if (regno == E_CCR_REGNUM)
be8626e0 1163 return E_PSEUDO_CCR_REGNUM (gdbarch);
f0bdd87d
YS
1164 return regno;
1165}
1166
1167static int
d3f73121 1168h8300s_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno)
f0bdd87d
YS
1169{
1170 if (regno == E_CCR_REGNUM)
be8626e0 1171 return E_PSEUDO_CCR_REGNUM (gdbarch);
f0bdd87d 1172 if (regno == E_EXR_REGNUM)
be8626e0 1173 return E_PSEUDO_EXR_REGNUM (gdbarch);
f0bdd87d
YS
1174 return regno;
1175}
1176
f0bdd87d 1177const static unsigned char *
67d57894
MD
1178h8300_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr,
1179 int *lenptr)
f0bdd87d
YS
1180{
1181 /*static unsigned char breakpoint[] = { 0x7A, 0xFF }; *//* ??? */
1182 static unsigned char breakpoint[] = { 0x01, 0x80 }; /* Sleep */
1183
1184 *lenptr = sizeof (breakpoint);
1185 return breakpoint;
1186}
1187
f0bdd87d
YS
1188static void
1189h8300_print_float_info (struct gdbarch *gdbarch, struct ui_file *file,
1190 struct frame_info *frame, const char *args)
1191{
1192 fprintf_filtered (file, "\
1193No floating-point info available for this processor.\n");
1194}
1195
1196static struct gdbarch *
1197h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1198{
1199 struct gdbarch_tdep *tdep = NULL;
1200 struct gdbarch *gdbarch;
1201
1202 arches = gdbarch_list_lookup_by_info (arches, &info);
1203 if (arches != NULL)
1204 return arches->gdbarch;
1205
1206#if 0
1207 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
1208#endif
1209
1210 if (info.bfd_arch_info->arch != bfd_arch_h8300)
1211 return NULL;
1212
1213 gdbarch = gdbarch_alloc (&info, 0);
1214
1215 switch (info.bfd_arch_info->mach)
1216 {
1217 case bfd_mach_h8300:
1218 set_gdbarch_num_regs (gdbarch, 13);
1219 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1220 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
f0bdd87d
YS
1221 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1222 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1223 set_gdbarch_register_name (gdbarch, h8300_register_name);
1224 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1225 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
862ba188 1226 set_gdbarch_return_value (gdbarch, h8300_return_value);
f0bdd87d
YS
1227 set_gdbarch_print_insn (gdbarch, print_insn_h8300);
1228 break;
1229 case bfd_mach_h8300h:
1230 case bfd_mach_h8300hn:
1231 set_gdbarch_num_regs (gdbarch, 13);
1232 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1233 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
f0bdd87d
YS
1234 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1235 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1236 set_gdbarch_register_name (gdbarch, h8300_register_name);
1237 if (info.bfd_arch_info->mach != bfd_mach_h8300hn)
1238 {
1239 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1240 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1241 }
1242 else
1243 {
1244 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1245 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1246 }
862ba188 1247 set_gdbarch_return_value (gdbarch, h8300h_return_value);
f0bdd87d
YS
1248 set_gdbarch_print_insn (gdbarch, print_insn_h8300h);
1249 break;
1250 case bfd_mach_h8300s:
1251 case bfd_mach_h8300sn:
1252 set_gdbarch_num_regs (gdbarch, 16);
1253 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1254 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
f0bdd87d
YS
1255 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1256 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1257 set_gdbarch_register_name (gdbarch, h8300s_register_name);
1258 if (info.bfd_arch_info->mach != bfd_mach_h8300sn)
1259 {
1260 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1261 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1262 }
1263 else
1264 {
1265 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1266 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1267 }
862ba188 1268 set_gdbarch_return_value (gdbarch, h8300h_return_value);
f0bdd87d
YS
1269 set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
1270 break;
1271 case bfd_mach_h8300sx:
1272 case bfd_mach_h8300sxn:
1273 set_gdbarch_num_regs (gdbarch, 18);
1274 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1275 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
f0bdd87d
YS
1276 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1277 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1278 set_gdbarch_register_name (gdbarch, h8300sx_register_name);
1279 if (info.bfd_arch_info->mach != bfd_mach_h8300sxn)
1280 {
1281 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1282 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1283 }
1284 else
1285 {
1286 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1287 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1288 }
862ba188 1289 set_gdbarch_return_value (gdbarch, h8300h_return_value);
f0bdd87d
YS
1290 set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
1291 break;
1292 }
1293
1294 set_gdbarch_pseudo_register_read (gdbarch, h8300_pseudo_register_read);
1295 set_gdbarch_pseudo_register_write (gdbarch, h8300_pseudo_register_write);
1296
1297 /*
1298 * Basic register fields and methods.
1299 */
1300
1301 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
f0bdd87d
YS
1302 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
1303 set_gdbarch_register_type (gdbarch, h8300_register_type);
1304 set_gdbarch_print_registers_info (gdbarch, h8300_print_registers_info);
1305 set_gdbarch_print_float_info (gdbarch, h8300_print_float_info);
1306
1307 /*
1308 * Frame Info
1309 */
1310 set_gdbarch_skip_prologue (gdbarch, h8300_skip_prologue);
1311
1312 /* Frame unwinder. */
f0bdd87d 1313 set_gdbarch_unwind_pc (gdbarch, h8300_unwind_pc);
862ba188 1314 set_gdbarch_unwind_sp (gdbarch, h8300_unwind_sp);
94afd7a6 1315 set_gdbarch_dummy_id (gdbarch, h8300_dummy_id);
862ba188 1316 frame_base_set_default (gdbarch, &h8300_frame_base);
f0bdd87d
YS
1317
1318 /*
1319 * Miscelany
1320 */
1321 /* Stack grows up. */
1322 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1323
f0bdd87d 1324 set_gdbarch_breakpoint_from_pc (gdbarch, h8300_breakpoint_from_pc);
f0bdd87d
YS
1325 set_gdbarch_push_dummy_call (gdbarch, h8300_push_dummy_call);
1326
862ba188 1327 set_gdbarch_char_signed (gdbarch, 0);
f0bdd87d
YS
1328 set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1329 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1330 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1331 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1332 set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1333
1334 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1335
862ba188 1336 /* Hook in the DWARF CFI frame unwinder. */
94afd7a6
UW
1337 dwarf2_append_unwinders (gdbarch);
1338 frame_unwind_append_unwinder (gdbarch, &h8300_frame_unwind);
f0bdd87d
YS
1339
1340 return gdbarch;
1341
1342}
1343
1344extern initialize_file_ftype _initialize_h8300_tdep; /* -Wmissing-prototypes */
1345
1346void
1347_initialize_h8300_tdep (void)
1348{
1349 register_gdbarch_init (bfd_arch_h8300, h8300_gdbarch_init);
1350}
1351
1352static int
1353is_h8300hmode (struct gdbarch *gdbarch)
1354{
1355 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1356 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1357 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1358 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1359 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300h
1360 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1361}
1362
1363static int
1364is_h8300smode (struct gdbarch *gdbarch)
1365{
1366 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1367 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1368 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1369 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn;
1370}
1371
1372static int
1373is_h8300sxmode (struct gdbarch *gdbarch)
1374{
1375 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1376 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn;
1377}
1378
1379static int
1380is_h8300_normal_mode (struct gdbarch *gdbarch)
1381{
1382 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1383 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1384 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1385}