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a7aad9aa 1/* Target-dependent code for the HP PA-RISC architecture.
cda5a58a 2
4a94e368 3 Copyright (C) 1986-2022 Free Software Foundation, Inc.
c906108c
SS
4
5 Contributed by the Center for Software Science at the
6 University of Utah (pa-gdb-bugs@cs.utah.edu).
7
c5aa993b 8 This file is part of GDB.
c906108c 9
c5aa993b
JM
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
c5aa993b 13 (at your option) any later version.
c906108c 14
c5aa993b
JM
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
c906108c 19
c5aa993b 20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c906108c
SS
22
23#include "defs.h"
c906108c
SS
24#include "bfd.h"
25#include "inferior.h"
4e052eda 26#include "regcache.h"
e5d66720 27#include "completer.h"
59623e27 28#include "osabi.h"
343af405 29#include "arch-utils.h"
1777feb0 30/* For argument passing to the inferior. */
c906108c 31#include "symtab.h"
fde2cceb 32#include "dis-asm.h"
26d08f08
AC
33#include "trad-frame.h"
34#include "frame-unwind.h"
35#include "frame-base.h"
c906108c 36
c906108c
SS
37#include "gdbcore.h"
38#include "gdbcmd.h"
e6bb342a 39#include "gdbtypes.h"
c906108c 40#include "objfiles.h"
3ff7cf9e 41#include "hppa-tdep.h"
325fac50 42#include <algorithm>
c906108c 43
491144b5 44static bool hppa_debug = false;
369aa520 45
60383d10 46/* Some local constants. */
3ff7cf9e
JB
47static const int hppa32_num_regs = 128;
48static const int hppa64_num_regs = 96;
49
61a12cfa
JK
50/* We use the objfile->obj_private pointer for two things:
51 * 1. An unwind table;
52 *
53 * 2. A pointer to any associated shared library object.
54 *
55 * #defines are used to help refer to these objects.
56 */
57
58/* Info about the unwind table associated with an object file.
59 * This is hung off of the "objfile->obj_private" pointer, and
60 * is allocated in the objfile's psymbol obstack. This allows
61 * us to have unique unwind info for each executable and shared
62 * library that we are debugging.
63 */
64struct hppa_unwind_info
65 {
66 struct unwind_table_entry *table; /* Pointer to unwind info */
67 struct unwind_table_entry *cache; /* Pointer to last entry we found */
68 int last; /* Index of last entry */
69 };
70
71struct hppa_objfile_private
72 {
73 struct hppa_unwind_info *unwind_info; /* a pointer */
74 struct so_list *so_info; /* a pointer */
75 CORE_ADDR dp;
76
77 int dummy_call_sequence_reg;
78 CORE_ADDR dummy_call_sequence_addr;
79 };
80
7c46b9fb
RC
81/* hppa-specific object data -- unwind and solib info.
82 TODO/maybe: think about splitting this into two parts; the unwind data is
83 common to all hppa targets, but is only used in this file; we can register
84 that separately and make this static. The solib data is probably hpux-
85 specific, so we can create a separate extern objfile_data that is registered
86 by hppa-hpux-tdep.c and shared with pa64solib.c and somsolib.c. */
9a73f0ad
TT
87static const struct objfile_key<hppa_objfile_private,
88 gdb::noop_deleter<hppa_objfile_private>>
89 hppa_objfile_priv_data;
7c46b9fb 90
405feb71 91/* Get at various relevant fields of an instruction word. */
e2ac8128
JB
92#define MASK_5 0x1f
93#define MASK_11 0x7ff
94#define MASK_14 0x3fff
95#define MASK_21 0x1fffff
96
e2ac8128
JB
97/* Sizes (in bytes) of the native unwind entries. */
98#define UNWIND_ENTRY_SIZE 16
99#define STUB_UNWIND_ENTRY_SIZE 8
100
c906108c 101/* Routines to extract various sized constants out of hppa
1777feb0 102 instructions. */
c906108c
SS
103
104/* This assumes that no garbage lies outside of the lower bits of
1777feb0 105 value. */
c906108c 106
63807e1d 107static int
abc485a1 108hppa_sign_extend (unsigned val, unsigned bits)
c906108c 109{
66c6502d 110 return (int) (val >> (bits - 1) ? (-(1 << bits)) | val : val);
c906108c
SS
111}
112
1777feb0 113/* For many immediate values the sign bit is the low bit! */
c906108c 114
63807e1d 115static int
abc485a1 116hppa_low_hppa_sign_extend (unsigned val, unsigned bits)
c906108c 117{
66c6502d 118 return (int) ((val & 0x1 ? (-(1 << (bits - 1))) : 0) | val >> 1);
c906108c
SS
119}
120
e2ac8128 121/* Extract the bits at positions between FROM and TO, using HP's numbering
1777feb0 122 (MSB = 0). */
e2ac8128 123
abc485a1
RC
124int
125hppa_get_field (unsigned word, int from, int to)
e2ac8128
JB
126{
127 return ((word) >> (31 - (to)) & ((1 << ((to) - (from) + 1)) - 1));
128}
129
1777feb0 130/* Extract the immediate field from a ld{bhw}s instruction. */
c906108c 131
abc485a1
RC
132int
133hppa_extract_5_load (unsigned word)
c906108c 134{
abc485a1 135 return hppa_low_hppa_sign_extend (word >> 16 & MASK_5, 5);
c906108c
SS
136}
137
1777feb0 138/* Extract the immediate field from a break instruction. */
c906108c 139
abc485a1
RC
140unsigned
141hppa_extract_5r_store (unsigned word)
c906108c
SS
142{
143 return (word & MASK_5);
144}
145
1777feb0 146/* Extract the immediate field from a {sr}sm instruction. */
c906108c 147
abc485a1
RC
148unsigned
149hppa_extract_5R_store (unsigned word)
c906108c
SS
150{
151 return (word >> 16 & MASK_5);
152}
153
1777feb0 154/* Extract a 14 bit immediate field. */
c906108c 155
abc485a1
RC
156int
157hppa_extract_14 (unsigned word)
c906108c 158{
abc485a1 159 return hppa_low_hppa_sign_extend (word & MASK_14, 14);
c906108c
SS
160}
161
1777feb0 162/* Extract a 21 bit constant. */
c906108c 163
abc485a1
RC
164int
165hppa_extract_21 (unsigned word)
c906108c
SS
166{
167 int val;
168
169 word &= MASK_21;
170 word <<= 11;
abc485a1 171 val = hppa_get_field (word, 20, 20);
c906108c 172 val <<= 11;
abc485a1 173 val |= hppa_get_field (word, 9, 19);
c906108c 174 val <<= 2;
abc485a1 175 val |= hppa_get_field (word, 5, 6);
c906108c 176 val <<= 5;
abc485a1 177 val |= hppa_get_field (word, 0, 4);
c906108c 178 val <<= 2;
abc485a1
RC
179 val |= hppa_get_field (word, 7, 8);
180 return hppa_sign_extend (val, 21) << 11;
c906108c
SS
181}
182
c906108c 183/* extract a 17 bit constant from branch instructions, returning the
1777feb0 184 19 bit signed value. */
c906108c 185
abc485a1
RC
186int
187hppa_extract_17 (unsigned word)
c906108c 188{
abc485a1
RC
189 return hppa_sign_extend (hppa_get_field (word, 19, 28) |
190 hppa_get_field (word, 29, 29) << 10 |
191 hppa_get_field (word, 11, 15) << 11 |
c906108c
SS
192 (word & 0x1) << 16, 17) << 2;
193}
3388d7ff
RC
194
195CORE_ADDR
196hppa_symbol_address(const char *sym)
197{
3b7344d5 198 struct bound_minimal_symbol minsym;
3388d7ff
RC
199
200 minsym = lookup_minimal_symbol (sym, NULL, NULL);
3b7344d5 201 if (minsym.minsym)
77e371c0 202 return BMSYMBOL_VALUE_ADDRESS (minsym);
3388d7ff
RC
203 else
204 return (CORE_ADDR)-1;
205}
77d18ded 206
61a12cfa 207static struct hppa_objfile_private *
77d18ded
RC
208hppa_init_objfile_priv_data (struct objfile *objfile)
209{
e39db4db
SM
210 hppa_objfile_private *priv
211 = OBSTACK_ZALLOC (&objfile->objfile_obstack, hppa_objfile_private);
77d18ded 212
9a73f0ad 213 hppa_objfile_priv_data.set (objfile, priv);
77d18ded
RC
214
215 return priv;
216}
c906108c
SS
217\f
218
219/* Compare the start address for two unwind entries returning 1 if
220 the first address is larger than the second, -1 if the second is
221 larger than the first, and zero if they are equal. */
222
223static int
fba45db2 224compare_unwind_entries (const void *arg1, const void *arg2)
c906108c 225{
9a3c8263
SM
226 const struct unwind_table_entry *a = (const struct unwind_table_entry *) arg1;
227 const struct unwind_table_entry *b = (const struct unwind_table_entry *) arg2;
c906108c
SS
228
229 if (a->region_start > b->region_start)
230 return 1;
231 else if (a->region_start < b->region_start)
232 return -1;
233 else
234 return 0;
235}
236
53a5351d 237static void
fdd72f95 238record_text_segment_lowaddr (bfd *abfd, asection *section, void *data)
53a5351d 239{
fdd72f95 240 if ((section->flags & (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
53a5351d 241 == (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
fdd72f95
RC
242 {
243 bfd_vma value = section->vma - section->filepos;
244 CORE_ADDR *low_text_segment_address = (CORE_ADDR *)data;
245
246 if (value < *low_text_segment_address)
dda83cd7 247 *low_text_segment_address = value;
fdd72f95 248 }
53a5351d
JM
249}
250
c906108c 251static void
fba45db2 252internalize_unwinds (struct objfile *objfile, struct unwind_table_entry *table,
1777feb0 253 asection *section, unsigned int entries,
241fd515 254 size_t size, CORE_ADDR text_offset)
c906108c
SS
255{
256 /* We will read the unwind entries into temporary memory, then
257 fill in the actual unwind table. */
fdd72f95 258
c906108c
SS
259 if (size > 0)
260 {
08feed99 261 struct gdbarch *gdbarch = objfile->arch ();
345bd07c 262 hppa_gdbarch_tdep *tdep = (hppa_gdbarch_tdep *) gdbarch_tdep (gdbarch);
c906108c
SS
263 unsigned long tmp;
264 unsigned i;
224c3ddb 265 char *buf = (char *) alloca (size);
fdd72f95 266 CORE_ADDR low_text_segment_address;
c906108c 267
fdd72f95 268 /* For ELF targets, then unwinds are supposed to
1777feb0 269 be segment relative offsets instead of absolute addresses.
c2c6d25f
JM
270
271 Note that when loading a shared library (text_offset != 0) the
272 unwinds are already relative to the text_offset that will be
273 passed in. */
345bd07c 274 if (tdep->is_elf && text_offset == 0)
53a5351d 275 {
dda83cd7 276 low_text_segment_address = -1;
fdd72f95 277
53a5351d 278 bfd_map_over_sections (objfile->obfd,
fdd72f95
RC
279 record_text_segment_lowaddr,
280 &low_text_segment_address);
53a5351d 281
fdd72f95 282 text_offset = low_text_segment_address;
53a5351d 283 }
345bd07c 284 else if (tdep->solib_get_text_base)
dda83cd7 285 {
345bd07c 286 text_offset = tdep->solib_get_text_base (objfile);
acf86d54 287 }
53a5351d 288
c906108c
SS
289 bfd_get_section_contents (objfile->obfd, section, buf, 0, size);
290
291 /* Now internalize the information being careful to handle host/target
dda83cd7 292 endian issues. */
c906108c
SS
293 for (i = 0; i < entries; i++)
294 {
295 table[i].region_start = bfd_get_32 (objfile->obfd,
c5aa993b 296 (bfd_byte *) buf);
c906108c
SS
297 table[i].region_start += text_offset;
298 buf += 4;
c5aa993b 299 table[i].region_end = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
300 table[i].region_end += text_offset;
301 buf += 4;
c5aa993b 302 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
303 buf += 4;
304 table[i].Cannot_unwind = (tmp >> 31) & 0x1;
305 table[i].Millicode = (tmp >> 30) & 0x1;
306 table[i].Millicode_save_sr0 = (tmp >> 29) & 0x1;
307 table[i].Region_description = (tmp >> 27) & 0x3;
6fcecea0 308 table[i].reserved = (tmp >> 26) & 0x1;
c906108c
SS
309 table[i].Entry_SR = (tmp >> 25) & 0x1;
310 table[i].Entry_FR = (tmp >> 21) & 0xf;
311 table[i].Entry_GR = (tmp >> 16) & 0x1f;
312 table[i].Args_stored = (tmp >> 15) & 0x1;
313 table[i].Variable_Frame = (tmp >> 14) & 0x1;
314 table[i].Separate_Package_Body = (tmp >> 13) & 0x1;
315 table[i].Frame_Extension_Millicode = (tmp >> 12) & 0x1;
316 table[i].Stack_Overflow_Check = (tmp >> 11) & 0x1;
317 table[i].Two_Instruction_SP_Increment = (tmp >> 10) & 0x1;
6fcecea0 318 table[i].sr4export = (tmp >> 9) & 0x1;
c906108c
SS
319 table[i].cxx_info = (tmp >> 8) & 0x1;
320 table[i].cxx_try_catch = (tmp >> 7) & 0x1;
321 table[i].sched_entry_seq = (tmp >> 6) & 0x1;
6fcecea0 322 table[i].reserved1 = (tmp >> 5) & 0x1;
c906108c
SS
323 table[i].Save_SP = (tmp >> 4) & 0x1;
324 table[i].Save_RP = (tmp >> 3) & 0x1;
325 table[i].Save_MRP_in_frame = (tmp >> 2) & 0x1;
6fcecea0 326 table[i].save_r19 = (tmp >> 1) & 0x1;
c906108c 327 table[i].Cleanup_defined = tmp & 0x1;
c5aa993b 328 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
329 buf += 4;
330 table[i].MPE_XL_interrupt_marker = (tmp >> 31) & 0x1;
331 table[i].HP_UX_interrupt_marker = (tmp >> 30) & 0x1;
332 table[i].Large_frame = (tmp >> 29) & 0x1;
6fcecea0
RC
333 table[i].alloca_frame = (tmp >> 28) & 0x1;
334 table[i].reserved2 = (tmp >> 27) & 0x1;
c906108c
SS
335 table[i].Total_frame_size = tmp & 0x7ffffff;
336
1777feb0 337 /* Stub unwinds are handled elsewhere. */
c906108c
SS
338 table[i].stub_unwind.stub_type = 0;
339 table[i].stub_unwind.padding = 0;
340 }
341 }
342}
343
344/* Read in the backtrace information stored in the `$UNWIND_START$' section of
345 the object file. This info is used mainly by find_unwind_entry() to find
346 out the stack frame size and frame pointer used by procedures. We put
347 everything on the psymbol obstack in the objfile so that it automatically
348 gets freed when the objfile is destroyed. */
349
350static void
fba45db2 351read_unwind_info (struct objfile *objfile)
c906108c 352{
d4f3574e 353 asection *unwind_sec, *stub_unwind_sec;
241fd515 354 size_t unwind_size, stub_unwind_size, total_size;
d4f3574e 355 unsigned index, unwind_entries;
c906108c
SS
356 unsigned stub_entries, total_entries;
357 CORE_ADDR text_offset;
7c46b9fb
RC
358 struct hppa_unwind_info *ui;
359 struct hppa_objfile_private *obj_private;
c906108c 360
b3b3bada 361 text_offset = objfile->text_section_offset ();
7c46b9fb
RC
362 ui = (struct hppa_unwind_info *) obstack_alloc (&objfile->objfile_obstack,
363 sizeof (struct hppa_unwind_info));
c906108c
SS
364
365 ui->table = NULL;
366 ui->cache = NULL;
367 ui->last = -1;
368
d4f3574e
SS
369 /* For reasons unknown the HP PA64 tools generate multiple unwinder
370 sections in a single executable. So we just iterate over every
85102364 371 section in the BFD looking for unwinder sections instead of trying
1777feb0 372 to do a lookup with bfd_get_section_by_name.
c906108c 373
d4f3574e
SS
374 First determine the total size of the unwind tables so that we
375 can allocate memory in a nice big hunk. */
376 total_entries = 0;
377 for (unwind_sec = objfile->obfd->sections;
378 unwind_sec;
379 unwind_sec = unwind_sec->next)
c906108c 380 {
d4f3574e
SS
381 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
382 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
383 {
fd361982 384 unwind_size = bfd_section_size (unwind_sec);
d4f3574e 385 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
c906108c 386
d4f3574e
SS
387 total_entries += unwind_entries;
388 }
c906108c
SS
389 }
390
d4f3574e 391 /* Now compute the size of the stub unwinds. Note the ELF tools do not
043f5962 392 use stub unwinds at the current time. */
d4f3574e
SS
393 stub_unwind_sec = bfd_get_section_by_name (objfile->obfd, "$UNWIND_END$");
394
c906108c
SS
395 if (stub_unwind_sec)
396 {
fd361982 397 stub_unwind_size = bfd_section_size (stub_unwind_sec);
c906108c
SS
398 stub_entries = stub_unwind_size / STUB_UNWIND_ENTRY_SIZE;
399 }
400 else
401 {
402 stub_unwind_size = 0;
403 stub_entries = 0;
404 }
405
406 /* Compute total number of unwind entries and their total size. */
d4f3574e 407 total_entries += stub_entries;
c906108c
SS
408 total_size = total_entries * sizeof (struct unwind_table_entry);
409
410 /* Allocate memory for the unwind table. */
411 ui->table = (struct unwind_table_entry *)
8b92e4d5 412 obstack_alloc (&objfile->objfile_obstack, total_size);
c5aa993b 413 ui->last = total_entries - 1;
c906108c 414
d4f3574e
SS
415 /* Now read in each unwind section and internalize the standard unwind
416 entries. */
c906108c 417 index = 0;
d4f3574e
SS
418 for (unwind_sec = objfile->obfd->sections;
419 unwind_sec;
420 unwind_sec = unwind_sec->next)
421 {
422 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
423 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
424 {
fd361982 425 unwind_size = bfd_section_size (unwind_sec);
d4f3574e
SS
426 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
427
428 internalize_unwinds (objfile, &ui->table[index], unwind_sec,
429 unwind_entries, unwind_size, text_offset);
430 index += unwind_entries;
431 }
432 }
433
434 /* Now read in and internalize the stub unwind entries. */
c906108c
SS
435 if (stub_unwind_size > 0)
436 {
437 unsigned int i;
224c3ddb 438 char *buf = (char *) alloca (stub_unwind_size);
c906108c
SS
439
440 /* Read in the stub unwind entries. */
441 bfd_get_section_contents (objfile->obfd, stub_unwind_sec, buf,
442 0, stub_unwind_size);
443
444 /* Now convert them into regular unwind entries. */
445 for (i = 0; i < stub_entries; i++, index++)
446 {
447 /* Clear out the next unwind entry. */
448 memset (&ui->table[index], 0, sizeof (struct unwind_table_entry));
449
1777feb0 450 /* Convert offset & size into region_start and region_end.
c906108c
SS
451 Stuff away the stub type into "reserved" fields. */
452 ui->table[index].region_start = bfd_get_32 (objfile->obfd,
453 (bfd_byte *) buf);
454 ui->table[index].region_start += text_offset;
455 buf += 4;
456 ui->table[index].stub_unwind.stub_type = bfd_get_8 (objfile->obfd,
c5aa993b 457 (bfd_byte *) buf);
c906108c
SS
458 buf += 2;
459 ui->table[index].region_end
c5aa993b
JM
460 = ui->table[index].region_start + 4 *
461 (bfd_get_16 (objfile->obfd, (bfd_byte *) buf) - 1);
c906108c
SS
462 buf += 2;
463 }
464
465 }
466
467 /* Unwind table needs to be kept sorted. */
468 qsort (ui->table, total_entries, sizeof (struct unwind_table_entry),
469 compare_unwind_entries);
470
471 /* Keep a pointer to the unwind information. */
9a73f0ad 472 obj_private = hppa_objfile_priv_data.get (objfile);
7c46b9fb 473 if (obj_private == NULL)
77d18ded
RC
474 obj_private = hppa_init_objfile_priv_data (objfile);
475
c906108c
SS
476 obj_private->unwind_info = ui;
477}
478
479/* Lookup the unwind (stack backtrace) info for the given PC. We search all
480 of the objfiles seeking the unwind table entry for this PC. Each objfile
481 contains a sorted list of struct unwind_table_entry. Since we do a binary
482 search of the unwind tables, we depend upon them to be sorted. */
483
484struct unwind_table_entry *
fba45db2 485find_unwind_entry (CORE_ADDR pc)
c906108c
SS
486{
487 int first, middle, last;
7c46b9fb 488 struct hppa_objfile_private *priv;
c906108c 489
369aa520 490 if (hppa_debug)
5af949e3 491 fprintf_unfiltered (gdb_stdlog, "{ find_unwind_entry %s -> ",
dda83cd7 492 hex_string (pc));
369aa520 493
1777feb0 494 /* A function at address 0? Not in HP-UX! */
c906108c 495 if (pc == (CORE_ADDR) 0)
369aa520
RC
496 {
497 if (hppa_debug)
498 fprintf_unfiltered (gdb_stdlog, "NULL }\n");
499 return NULL;
500 }
c906108c 501
2030c079 502 for (objfile *objfile : current_program_space->objfiles ())
aed57c53
TT
503 {
504 struct hppa_unwind_info *ui;
505 ui = NULL;
9a73f0ad 506 priv = hppa_objfile_priv_data.get (objfile);
aed57c53
TT
507 if (priv)
508 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
509
510 if (!ui)
511 {
512 read_unwind_info (objfile);
9a73f0ad 513 priv = hppa_objfile_priv_data.get (objfile);
aed57c53
TT
514 if (priv == NULL)
515 error (_("Internal error reading unwind information."));
516 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
517 }
518
519 /* First, check the cache. */
520
521 if (ui->cache
522 && pc >= ui->cache->region_start
523 && pc <= ui->cache->region_end)
524 {
525 if (hppa_debug)
526 fprintf_unfiltered (gdb_stdlog, "%s (cached) }\n",
527 hex_string ((uintptr_t) ui->cache));
528 return ui->cache;
529 }
530
531 /* Not in the cache, do a binary search. */
532
533 first = 0;
534 last = ui->last;
535
536 while (first <= last)
537 {
538 middle = (first + last) / 2;
539 if (pc >= ui->table[middle].region_start
540 && pc <= ui->table[middle].region_end)
541 {
542 ui->cache = &ui->table[middle];
543 if (hppa_debug)
544 fprintf_unfiltered (gdb_stdlog, "%s }\n",
545 hex_string ((uintptr_t) ui->cache));
546 return &ui->table[middle];
547 }
548
549 if (pc < ui->table[middle].region_start)
550 last = middle - 1;
551 else
552 first = middle + 1;
553 }
554 }
369aa520
RC
555
556 if (hppa_debug)
557 fprintf_unfiltered (gdb_stdlog, "NULL (not found) }\n");
558
c906108c
SS
559 return NULL;
560}
561
c9cf6e20
MG
562/* Implement the stack_frame_destroyed_p gdbarch method.
563
564 The epilogue is defined here as the area either on the `bv' instruction
1777feb0 565 itself or an instruction which destroys the function's stack frame.
1fb24930
RC
566
567 We do not assume that the epilogue is at the end of a function as we can
568 also have return sequences in the middle of a function. */
c9cf6e20 569
1fb24930 570static int
c9cf6e20 571hppa_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1fb24930 572{
e17a4113 573 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1fb24930
RC
574 unsigned long status;
575 unsigned int inst;
e362b510 576 gdb_byte buf[4];
1fb24930 577
8defab1a 578 status = target_read_memory (pc, buf, 4);
1fb24930
RC
579 if (status != 0)
580 return 0;
581
e17a4113 582 inst = extract_unsigned_integer (buf, 4, byte_order);
1fb24930
RC
583
584 /* The most common way to perform a stack adjustment ldo X(sp),sp
585 We are destroying a stack frame if the offset is negative. */
586 if ((inst & 0xffffc000) == 0x37de0000
587 && hppa_extract_14 (inst) < 0)
588 return 1;
589
590 /* ldw,mb D(sp),X or ldd,mb D(sp),X */
591 if (((inst & 0x0fc010e0) == 0x0fc010e0
592 || (inst & 0x0fc010e0) == 0x0fc010e0)
593 && hppa_extract_14 (inst) < 0)
594 return 1;
595
596 /* bv %r0(%rp) or bv,n %r0(%rp) */
597 if (inst == 0xe840c000 || inst == 0xe840c002)
598 return 1;
599
600 return 0;
601}
602
04180708 603constexpr gdb_byte hppa_break_insn[] = {0x00, 0x01, 0x00, 0x04};
598cc9dc 604
04180708 605typedef BP_MANIPULATION (hppa_break_insn) hppa_breakpoint;
aaab4dba 606
e23457df
AC
607/* Return the name of a register. */
608
4a302917 609static const char *
d93859e2 610hppa32_register_name (struct gdbarch *gdbarch, int i)
e23457df 611{
a121b7c1 612 static const char *names[] = {
e23457df
AC
613 "flags", "r1", "rp", "r3",
614 "r4", "r5", "r6", "r7",
615 "r8", "r9", "r10", "r11",
616 "r12", "r13", "r14", "r15",
617 "r16", "r17", "r18", "r19",
618 "r20", "r21", "r22", "r23",
619 "r24", "r25", "r26", "dp",
620 "ret0", "ret1", "sp", "r31",
621 "sar", "pcoqh", "pcsqh", "pcoqt",
622 "pcsqt", "eiem", "iir", "isr",
623 "ior", "ipsw", "goto", "sr4",
624 "sr0", "sr1", "sr2", "sr3",
625 "sr5", "sr6", "sr7", "cr0",
626 "cr8", "cr9", "ccr", "cr12",
627 "cr13", "cr24", "cr25", "cr26",
628 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
629 "fpsr", "fpe1", "fpe2", "fpe3",
630 "fpe4", "fpe5", "fpe6", "fpe7",
631 "fr4", "fr4R", "fr5", "fr5R",
632 "fr6", "fr6R", "fr7", "fr7R",
633 "fr8", "fr8R", "fr9", "fr9R",
634 "fr10", "fr10R", "fr11", "fr11R",
635 "fr12", "fr12R", "fr13", "fr13R",
636 "fr14", "fr14R", "fr15", "fr15R",
637 "fr16", "fr16R", "fr17", "fr17R",
638 "fr18", "fr18R", "fr19", "fr19R",
639 "fr20", "fr20R", "fr21", "fr21R",
640 "fr22", "fr22R", "fr23", "fr23R",
641 "fr24", "fr24R", "fr25", "fr25R",
642 "fr26", "fr26R", "fr27", "fr27R",
643 "fr28", "fr28R", "fr29", "fr29R",
644 "fr30", "fr30R", "fr31", "fr31R"
645 };
646 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
647 return NULL;
648 else
649 return names[i];
650}
651
4a302917 652static const char *
d93859e2 653hppa64_register_name (struct gdbarch *gdbarch, int i)
e23457df 654{
a121b7c1 655 static const char *names[] = {
e23457df
AC
656 "flags", "r1", "rp", "r3",
657 "r4", "r5", "r6", "r7",
658 "r8", "r9", "r10", "r11",
659 "r12", "r13", "r14", "r15",
660 "r16", "r17", "r18", "r19",
661 "r20", "r21", "r22", "r23",
662 "r24", "r25", "r26", "dp",
663 "ret0", "ret1", "sp", "r31",
664 "sar", "pcoqh", "pcsqh", "pcoqt",
665 "pcsqt", "eiem", "iir", "isr",
666 "ior", "ipsw", "goto", "sr4",
667 "sr0", "sr1", "sr2", "sr3",
668 "sr5", "sr6", "sr7", "cr0",
669 "cr8", "cr9", "ccr", "cr12",
670 "cr13", "cr24", "cr25", "cr26",
671 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
672 "fpsr", "fpe1", "fpe2", "fpe3",
673 "fr4", "fr5", "fr6", "fr7",
674 "fr8", "fr9", "fr10", "fr11",
675 "fr12", "fr13", "fr14", "fr15",
676 "fr16", "fr17", "fr18", "fr19",
677 "fr20", "fr21", "fr22", "fr23",
678 "fr24", "fr25", "fr26", "fr27",
679 "fr28", "fr29", "fr30", "fr31"
680 };
681 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
682 return NULL;
683 else
684 return names[i];
685}
686
85c83e99 687/* Map dwarf DBX register numbers to GDB register numbers. */
1ef7fcb5 688static int
d3f73121 689hppa64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1ef7fcb5 690{
85c83e99 691 /* The general registers and the sar are the same in both sets. */
0fde2c53 692 if (reg >= 0 && reg <= 32)
1ef7fcb5
RC
693 return reg;
694
695 /* fr4-fr31 are mapped from 72 in steps of 2. */
85c83e99 696 if (reg >= 72 && reg < 72 + 28 * 2 && !(reg & 1))
1ef7fcb5
RC
697 return HPPA64_FP4_REGNUM + (reg - 72) / 2;
698
1ef7fcb5
RC
699 return -1;
700}
701
79508e1e
AC
702/* This function pushes a stack frame with arguments as part of the
703 inferior function calling mechanism.
704
705 This is the version of the function for the 32-bit PA machines, in
706 which later arguments appear at lower addresses. (The stack always
707 grows towards higher addresses.)
708
709 We simply allocate the appropriate amount of stack space and put
710 arguments into their proper slots. */
711
4a302917 712static CORE_ADDR
7d9b040b 713hppa32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
79508e1e
AC
714 struct regcache *regcache, CORE_ADDR bp_addr,
715 int nargs, struct value **args, CORE_ADDR sp,
cf84fa6b
AH
716 function_call_return_method return_method,
717 CORE_ADDR struct_addr)
79508e1e 718{
e17a4113
UW
719 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
720
79508e1e
AC
721 /* Stack base address at which any pass-by-reference parameters are
722 stored. */
723 CORE_ADDR struct_end = 0;
724 /* Stack base address at which the first parameter is stored. */
725 CORE_ADDR param_end = 0;
726
79508e1e
AC
727 /* Two passes. First pass computes the location of everything,
728 second pass writes the bytes out. */
729 int write_pass;
d49771ef
RC
730
731 /* Global pointer (r19) of the function we are trying to call. */
732 CORE_ADDR gp;
733
345bd07c 734 hppa_gdbarch_tdep *tdep = (hppa_gdbarch_tdep *) gdbarch_tdep (gdbarch);
d49771ef 735
79508e1e
AC
736 for (write_pass = 0; write_pass < 2; write_pass++)
737 {
1797a8f6 738 CORE_ADDR struct_ptr = 0;
1777feb0 739 /* The first parameter goes into sp-36, each stack slot is 4-bytes.
dda83cd7 740 struct_ptr is adjusted for each argument below, so the first
2a6228ef
RC
741 argument will end up at sp-36. */
742 CORE_ADDR param_ptr = 32;
79508e1e 743 int i;
2a6228ef
RC
744 int small_struct = 0;
745
79508e1e
AC
746 for (i = 0; i < nargs; i++)
747 {
748 struct value *arg = args[i];
4991999e 749 struct type *type = check_typedef (value_type (arg));
79508e1e
AC
750 /* The corresponding parameter that is pushed onto the
751 stack, and [possibly] passed in a register. */
948f8e3d 752 gdb_byte param_val[8];
79508e1e
AC
753 int param_len;
754 memset (param_val, 0, sizeof param_val);
755 if (TYPE_LENGTH (type) > 8)
756 {
757 /* Large parameter, pass by reference. Store the value
758 in "struct" area and then pass its address. */
759 param_len = 4;
1797a8f6 760 struct_ptr += align_up (TYPE_LENGTH (type), 8);
79508e1e 761 if (write_pass)
50888e42
SM
762 write_memory (struct_end - struct_ptr,
763 value_contents (arg).data (), TYPE_LENGTH (type));
e17a4113
UW
764 store_unsigned_integer (param_val, 4, byte_order,
765 struct_end - struct_ptr);
79508e1e 766 }
78134374
SM
767 else if (type->code () == TYPE_CODE_INT
768 || type->code () == TYPE_CODE_ENUM)
79508e1e
AC
769 {
770 /* Integer value store, right aligned. "unpack_long"
771 takes care of any sign-extension problems. */
772 param_len = align_up (TYPE_LENGTH (type), 4);
50888e42
SM
773 store_unsigned_integer
774 (param_val, param_len, byte_order,
775 unpack_long (type, value_contents (arg).data ()));
79508e1e 776 }
78134374 777 else if (type->code () == TYPE_CODE_FLT)
dda83cd7 778 {
2a6228ef
RC
779 /* Floating point value store, right aligned. */
780 param_len = align_up (TYPE_LENGTH (type), 4);
50888e42 781 memcpy (param_val, value_contents (arg).data (), param_len);
dda83cd7 782 }
79508e1e
AC
783 else
784 {
79508e1e 785 param_len = align_up (TYPE_LENGTH (type), 4);
2a6228ef
RC
786
787 /* Small struct value are stored right-aligned. */
79508e1e 788 memcpy (param_val + param_len - TYPE_LENGTH (type),
50888e42 789 value_contents (arg).data (), TYPE_LENGTH (type));
2a6228ef
RC
790
791 /* Structures of size 5, 6 and 7 bytes are special in that
dda83cd7 792 the higher-ordered word is stored in the lower-ordered
2a6228ef
RC
793 argument, and even though it is a 8-byte quantity the
794 registers need not be 8-byte aligned. */
1b07b470 795 if (param_len > 4 && param_len < 8)
2a6228ef 796 small_struct = 1;
79508e1e 797 }
2a6228ef 798
1797a8f6 799 param_ptr += param_len;
2a6228ef 800 if (param_len == 8 && !small_struct)
dda83cd7 801 param_ptr = align_up (param_ptr, 8);
2a6228ef
RC
802
803 /* First 4 non-FP arguments are passed in gr26-gr23.
804 First 4 32-bit FP arguments are passed in fr4L-fr7L.
805 First 2 64-bit FP arguments are passed in fr5 and fr7.
806
807 The rest go on the stack, starting at sp-36, towards lower
808 addresses. 8-byte arguments must be aligned to a 8-byte
809 stack boundary. */
79508e1e
AC
810 if (write_pass)
811 {
1797a8f6 812 write_memory (param_end - param_ptr, param_val, param_len);
2a6228ef
RC
813
814 /* There are some cases when we don't know the type
815 expected by the callee (e.g. for variadic functions), so
816 pass the parameters in both general and fp regs. */
817 if (param_ptr <= 48)
79508e1e 818 {
2a6228ef
RC
819 int grreg = 26 - (param_ptr - 36) / 4;
820 int fpLreg = 72 + (param_ptr - 36) / 4 * 2;
821 int fpreg = 74 + (param_ptr - 32) / 8 * 4;
822
b66f5587
SM
823 regcache->cooked_write (grreg, param_val);
824 regcache->cooked_write (fpLreg, param_val);
2a6228ef 825
79508e1e 826 if (param_len > 4)
2a6228ef 827 {
b66f5587 828 regcache->cooked_write (grreg + 1, param_val + 4);
2a6228ef 829
b66f5587
SM
830 regcache->cooked_write (fpreg, param_val);
831 regcache->cooked_write (fpreg + 1, param_val + 4);
2a6228ef 832 }
79508e1e
AC
833 }
834 }
835 }
836
837 /* Update the various stack pointers. */
838 if (!write_pass)
839 {
2a6228ef 840 struct_end = sp + align_up (struct_ptr, 64);
79508e1e
AC
841 /* PARAM_PTR already accounts for all the arguments passed
842 by the user. However, the ABI mandates minimum stack
843 space allocations for outgoing arguments. The ABI also
844 mandates minimum stack alignments which we must
845 preserve. */
2a6228ef 846 param_end = struct_end + align_up (param_ptr, 64);
79508e1e
AC
847 }
848 }
849
850 /* If a structure has to be returned, set up register 28 to hold its
1777feb0 851 address. */
cf84fa6b 852 if (return_method == return_method_struct)
9c9acae0 853 regcache_cooked_write_unsigned (regcache, 28, struct_addr);
79508e1e 854
e38c262f 855 gp = tdep->find_global_pointer (gdbarch, function);
d49771ef
RC
856
857 if (gp != 0)
9c9acae0 858 regcache_cooked_write_unsigned (regcache, 19, gp);
d49771ef 859
79508e1e 860 /* Set the return address. */
77d18ded
RC
861 if (!gdbarch_push_dummy_code_p (gdbarch))
862 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
79508e1e 863
c4557624 864 /* Update the Stack Pointer. */
34f75cc1 865 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, param_end);
c4557624 866
2a6228ef 867 return param_end;
79508e1e
AC
868}
869
38ca4e0c
MK
870/* The 64-bit PA-RISC calling conventions are documented in "64-Bit
871 Runtime Architecture for PA-RISC 2.0", which is distributed as part
872 as of the HP-UX Software Transition Kit (STK). This implementation
873 is based on version 3.3, dated October 6, 1997. */
2f690297 874
38ca4e0c 875/* Check whether TYPE is an "Integral or Pointer Scalar Type". */
2f690297 876
38ca4e0c
MK
877static int
878hppa64_integral_or_pointer_p (const struct type *type)
879{
78134374 880 switch (type->code ())
38ca4e0c
MK
881 {
882 case TYPE_CODE_INT:
883 case TYPE_CODE_BOOL:
884 case TYPE_CODE_CHAR:
885 case TYPE_CODE_ENUM:
886 case TYPE_CODE_RANGE:
887 {
888 int len = TYPE_LENGTH (type);
889 return (len == 1 || len == 2 || len == 4 || len == 8);
890 }
891 case TYPE_CODE_PTR:
892 case TYPE_CODE_REF:
aa006118 893 case TYPE_CODE_RVALUE_REF:
38ca4e0c
MK
894 return (TYPE_LENGTH (type) == 8);
895 default:
896 break;
897 }
898
899 return 0;
900}
901
902/* Check whether TYPE is a "Floating Scalar Type". */
903
904static int
905hppa64_floating_p (const struct type *type)
906{
78134374 907 switch (type->code ())
38ca4e0c
MK
908 {
909 case TYPE_CODE_FLT:
910 {
911 int len = TYPE_LENGTH (type);
912 return (len == 4 || len == 8 || len == 16);
913 }
914 default:
915 break;
916 }
917
918 return 0;
919}
2f690297 920
1218e655
RC
921/* If CODE points to a function entry address, try to look up the corresponding
922 function descriptor and return its address instead. If CODE is not a
923 function entry address, then just return it unchanged. */
924static CORE_ADDR
e17a4113 925hppa64_convert_code_addr_to_fptr (struct gdbarch *gdbarch, CORE_ADDR code)
1218e655 926{
e17a4113 927 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1218e655
RC
928 struct obj_section *sec, *opd;
929
930 sec = find_pc_section (code);
931
932 if (!sec)
933 return code;
934
935 /* If CODE is in a data section, assume it's already a fptr. */
936 if (!(sec->the_bfd_section->flags & SEC_CODE))
937 return code;
938
939 ALL_OBJFILE_OSECTIONS (sec->objfile, opd)
940 {
941 if (strcmp (opd->the_bfd_section->name, ".opd") == 0)
aded6f54 942 break;
1218e655
RC
943 }
944
945 if (opd < sec->objfile->sections_end)
946 {
0c1bcd23 947 for (CORE_ADDR addr = opd->addr (); addr < opd->endaddr (); addr += 2 * 8)
aded6f54 948 {
1218e655 949 ULONGEST opdaddr;
948f8e3d 950 gdb_byte tmp[8];
1218e655
RC
951
952 if (target_read_memory (addr, tmp, sizeof (tmp)))
953 break;
e17a4113 954 opdaddr = extract_unsigned_integer (tmp, sizeof (tmp), byte_order);
1218e655 955
aded6f54 956 if (opdaddr == code)
1218e655
RC
957 return addr - 16;
958 }
959 }
960
961 return code;
962}
963
4a302917 964static CORE_ADDR
7d9b040b 965hppa64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
2f690297
AC
966 struct regcache *regcache, CORE_ADDR bp_addr,
967 int nargs, struct value **args, CORE_ADDR sp,
cf84fa6b
AH
968 function_call_return_method return_method,
969 CORE_ADDR struct_addr)
2f690297 970{
345bd07c 971 hppa_gdbarch_tdep *tdep = (hppa_gdbarch_tdep *) gdbarch_tdep (gdbarch);
e17a4113 972 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
38ca4e0c
MK
973 int i, offset = 0;
974 CORE_ADDR gp;
2f690297 975
38ca4e0c
MK
976 /* "The outgoing parameter area [...] must be aligned at a 16-byte
977 boundary." */
978 sp = align_up (sp, 16);
2f690297 979
38ca4e0c
MK
980 for (i = 0; i < nargs; i++)
981 {
982 struct value *arg = args[i];
983 struct type *type = value_type (arg);
984 int len = TYPE_LENGTH (type);
0fd88904 985 const bfd_byte *valbuf;
1218e655 986 bfd_byte fptrbuf[8];
38ca4e0c 987 int regnum;
2f690297 988
38ca4e0c
MK
989 /* "Each parameter begins on a 64-bit (8-byte) boundary." */
990 offset = align_up (offset, 8);
77d18ded 991
38ca4e0c 992 if (hppa64_integral_or_pointer_p (type))
2f690297 993 {
38ca4e0c 994 /* "Integral scalar parameters smaller than 64 bits are
dda83cd7
SM
995 padded on the left (i.e., the value is in the
996 least-significant bits of the 64-bit storage unit, and
997 the high-order bits are undefined)." Therefore we can
998 safely sign-extend them. */
38ca4e0c 999 if (len < 8)
449e1137 1000 {
df4df182 1001 arg = value_cast (builtin_type (gdbarch)->builtin_int64, arg);
38ca4e0c
MK
1002 len = 8;
1003 }
1004 }
1005 else if (hppa64_floating_p (type))
1006 {
1007 if (len > 8)
1008 {
1009 /* "Quad-precision (128-bit) floating-point scalar
1010 parameters are aligned on a 16-byte boundary." */
1011 offset = align_up (offset, 16);
1012
1013 /* "Double-extended- and quad-precision floating-point
dda83cd7
SM
1014 parameters within the first 64 bytes of the parameter
1015 list are always passed in general registers." */
449e1137
AC
1016 }
1017 else
1018 {
38ca4e0c 1019 if (len == 4)
449e1137 1020 {
38ca4e0c
MK
1021 /* "Single-precision (32-bit) floating-point scalar
1022 parameters are padded on the left with 32 bits of
1023 garbage (i.e., the floating-point value is in the
1024 least-significant 32 bits of a 64-bit storage
1025 unit)." */
1026 offset += 4;
449e1137 1027 }
38ca4e0c
MK
1028
1029 /* "Single- and double-precision floating-point
dda83cd7
SM
1030 parameters in this area are passed according to the
1031 available formal parameter information in a function
1032 prototype. [...] If no prototype is in scope,
1033 floating-point parameters must be passed both in the
1034 corresponding general registers and in the
1035 corresponding floating-point registers." */
38ca4e0c
MK
1036 regnum = HPPA64_FP4_REGNUM + offset / 8;
1037
1038 if (regnum < HPPA64_FP4_REGNUM + 8)
449e1137 1039 {
38ca4e0c
MK
1040 /* "Single-precision floating-point parameters, when
1041 passed in floating-point registers, are passed in
1042 the right halves of the floating point registers;
1043 the left halves are unused." */
e4c4a59b 1044 regcache->cooked_write_part (regnum, offset % 8, len,
50888e42 1045 value_contents (arg).data ());
449e1137
AC
1046 }
1047 }
2f690297 1048 }
38ca4e0c 1049 else
2f690297 1050 {
38ca4e0c
MK
1051 if (len > 8)
1052 {
1053 /* "Aggregates larger than 8 bytes are aligned on a
1054 16-byte boundary, possibly leaving an unused argument
1777feb0 1055 slot, which is filled with garbage. If necessary,
38ca4e0c
MK
1056 they are padded on the right (with garbage), to a
1057 multiple of 8 bytes." */
1058 offset = align_up (offset, 16);
1059 }
1060 }
1061
1218e655 1062 /* If we are passing a function pointer, make sure we pass a function
dda83cd7 1063 descriptor instead of the function entry address. */
78134374 1064 if (type->code () == TYPE_CODE_PTR
dda83cd7
SM
1065 && TYPE_TARGET_TYPE (type)->code () == TYPE_CODE_FUNC)
1066 {
1218e655
RC
1067 ULONGEST codeptr, fptr;
1068
50888e42 1069 codeptr = unpack_long (type, value_contents (arg).data ());
e17a4113
UW
1070 fptr = hppa64_convert_code_addr_to_fptr (gdbarch, codeptr);
1071 store_unsigned_integer (fptrbuf, TYPE_LENGTH (type), byte_order,
1072 fptr);
1218e655
RC
1073 valbuf = fptrbuf;
1074 }
1075 else
dda83cd7 1076 {
50888e42 1077 valbuf = value_contents (arg).data ();
1218e655
RC
1078 }
1079
38ca4e0c 1080 /* Always store the argument in memory. */
1218e655 1081 write_memory (sp + offset, valbuf, len);
38ca4e0c 1082
38ca4e0c
MK
1083 regnum = HPPA_ARG0_REGNUM - offset / 8;
1084 while (regnum > HPPA_ARG0_REGNUM - 8 && len > 0)
1085 {
e4c4a59b
SM
1086 regcache->cooked_write_part (regnum, offset % 8, std::min (len, 8),
1087 valbuf);
325fac50
PA
1088 offset += std::min (len, 8);
1089 valbuf += std::min (len, 8);
1090 len -= std::min (len, 8);
38ca4e0c 1091 regnum--;
2f690297 1092 }
38ca4e0c
MK
1093
1094 offset += len;
2f690297
AC
1095 }
1096
38ca4e0c
MK
1097 /* Set up GR29 (%ret1) to hold the argument pointer (ap). */
1098 regcache_cooked_write_unsigned (regcache, HPPA_RET1_REGNUM, sp + 64);
1099
1100 /* Allocate the outgoing parameter area. Make sure the outgoing
1101 parameter area is multiple of 16 bytes in length. */
325fac50 1102 sp += std::max (align_up (offset, 16), (ULONGEST) 64);
38ca4e0c
MK
1103
1104 /* Allocate 32-bytes of scratch space. The documentation doesn't
1105 mention this, but it seems to be needed. */
1106 sp += 32;
1107
1108 /* Allocate the frame marker area. */
1109 sp += 16;
1110
1111 /* If a structure has to be returned, set up GR 28 (%ret0) to hold
1112 its address. */
cf84fa6b 1113 if (return_method == return_method_struct)
38ca4e0c 1114 regcache_cooked_write_unsigned (regcache, HPPA_RET0_REGNUM, struct_addr);
2f690297 1115
38ca4e0c 1116 /* Set up GR27 (%dp) to hold the global pointer (gp). */
e38c262f 1117 gp = tdep->find_global_pointer (gdbarch, function);
77d18ded 1118 if (gp != 0)
38ca4e0c 1119 regcache_cooked_write_unsigned (regcache, HPPA_DP_REGNUM, gp);
77d18ded 1120
38ca4e0c 1121 /* Set up GR2 (%rp) to hold the return pointer (rp). */
77d18ded
RC
1122 if (!gdbarch_push_dummy_code_p (gdbarch))
1123 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
2f690297 1124
38ca4e0c
MK
1125 /* Set up GR30 to hold the stack pointer (sp). */
1126 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, sp);
c4557624 1127
38ca4e0c 1128 return sp;
2f690297 1129}
38ca4e0c 1130\f
2f690297 1131
08a27113
MK
1132/* Handle 32/64-bit struct return conventions. */
1133
1134static enum return_value_convention
6a3a010b 1135hppa32_return_value (struct gdbarch *gdbarch, struct value *function,
08a27113 1136 struct type *type, struct regcache *regcache,
e127f0db 1137 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1138{
1139 if (TYPE_LENGTH (type) <= 2 * 4)
1140 {
1141 /* The value always lives in the right hand end of the register
1142 (or register pair)? */
1143 int b;
78134374 1144 int reg = type->code () == TYPE_CODE_FLT ? HPPA_FP4_REGNUM : 28;
08a27113
MK
1145 int part = TYPE_LENGTH (type) % 4;
1146 /* The left hand register contains only part of the value,
1147 transfer that first so that the rest can be xfered as entire
1148 4-byte registers. */
1149 if (part > 0)
1150 {
1151 if (readbuf != NULL)
73bb0000 1152 regcache->cooked_read_part (reg, 4 - part, part, readbuf);
08a27113 1153 if (writebuf != NULL)
e4c4a59b 1154 regcache->cooked_write_part (reg, 4 - part, part, writebuf);
08a27113
MK
1155 reg++;
1156 }
1157 /* Now transfer the remaining register values. */
1158 for (b = part; b < TYPE_LENGTH (type); b += 4)
1159 {
1160 if (readbuf != NULL)
dca08e1f 1161 regcache->cooked_read (reg, readbuf + b);
08a27113 1162 if (writebuf != NULL)
b66f5587 1163 regcache->cooked_write (reg, writebuf + b);
08a27113
MK
1164 reg++;
1165 }
1166 return RETURN_VALUE_REGISTER_CONVENTION;
1167 }
1168 else
1169 return RETURN_VALUE_STRUCT_CONVENTION;
1170}
1171
1172static enum return_value_convention
6a3a010b 1173hppa64_return_value (struct gdbarch *gdbarch, struct value *function,
08a27113 1174 struct type *type, struct regcache *regcache,
e127f0db 1175 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1176{
1177 int len = TYPE_LENGTH (type);
1178 int regnum, offset;
1179
bad43aa5 1180 if (len > 16)
08a27113 1181 {
85102364 1182 /* All return values larger than 128 bits must be aggregate
dda83cd7 1183 return values. */
9738b034
MK
1184 gdb_assert (!hppa64_integral_or_pointer_p (type));
1185 gdb_assert (!hppa64_floating_p (type));
08a27113
MK
1186
1187 /* "Aggregate return values larger than 128 bits are returned in
1188 a buffer allocated by the caller. The address of the buffer
1189 must be passed in GR 28." */
1190 return RETURN_VALUE_STRUCT_CONVENTION;
1191 }
1192
1193 if (hppa64_integral_or_pointer_p (type))
1194 {
1195 /* "Integral return values are returned in GR 28. Values
dda83cd7 1196 smaller than 64 bits are padded on the left (with garbage)." */
08a27113
MK
1197 regnum = HPPA_RET0_REGNUM;
1198 offset = 8 - len;
1199 }
1200 else if (hppa64_floating_p (type))
1201 {
1202 if (len > 8)
1203 {
1204 /* "Double-extended- and quad-precision floating-point
1205 values are returned in GRs 28 and 29. The sign,
1206 exponent, and most-significant bits of the mantissa are
1207 returned in GR 28; the least-significant bits of the
1208 mantissa are passed in GR 29. For double-extended
1209 precision values, GR 29 is padded on the right with 48
1210 bits of garbage." */
1211 regnum = HPPA_RET0_REGNUM;
1212 offset = 0;
1213 }
1214 else
1215 {
1216 /* "Single-precision and double-precision floating-point
1217 return values are returned in FR 4R (single precision) or
1218 FR 4 (double-precision)." */
1219 regnum = HPPA64_FP4_REGNUM;
1220 offset = 8 - len;
1221 }
1222 }
1223 else
1224 {
1225 /* "Aggregate return values up to 64 bits in size are returned
dda83cd7
SM
1226 in GR 28. Aggregates smaller than 64 bits are left aligned
1227 in the register; the pad bits on the right are undefined."
08a27113
MK
1228
1229 "Aggregate return values between 65 and 128 bits are returned
1230 in GRs 28 and 29. The first 64 bits are placed in GR 28, and
1231 the remaining bits are placed, left aligned, in GR 29. The
1232 pad bits on the right of GR 29 (if any) are undefined." */
1233 regnum = HPPA_RET0_REGNUM;
1234 offset = 0;
1235 }
1236
1237 if (readbuf)
1238 {
08a27113
MK
1239 while (len > 0)
1240 {
73bb0000
SM
1241 regcache->cooked_read_part (regnum, offset, std::min (len, 8),
1242 readbuf);
325fac50
PA
1243 readbuf += std::min (len, 8);
1244 len -= std::min (len, 8);
08a27113
MK
1245 regnum++;
1246 }
1247 }
1248
1249 if (writebuf)
1250 {
08a27113
MK
1251 while (len > 0)
1252 {
e4c4a59b
SM
1253 regcache->cooked_write_part (regnum, offset, std::min (len, 8),
1254 writebuf);
325fac50
PA
1255 writebuf += std::min (len, 8);
1256 len -= std::min (len, 8);
08a27113
MK
1257 regnum++;
1258 }
1259 }
1260
1261 return RETURN_VALUE_REGISTER_CONVENTION;
1262}
1263\f
1264
d49771ef 1265static CORE_ADDR
a7aad9aa 1266hppa32_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr,
d49771ef
RC
1267 struct target_ops *targ)
1268{
1269 if (addr & 2)
1270 {
0dfff4cb 1271 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
a7aad9aa 1272 CORE_ADDR plabel = addr & ~3;
0dfff4cb 1273 return read_memory_typed_address (plabel, func_ptr_type);
d49771ef
RC
1274 }
1275
1276 return addr;
1277}
1278
1797a8f6
AC
1279static CORE_ADDR
1280hppa32_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1281{
1282 /* HP frames are 64-byte (or cache line) aligned (yes that's _byte_
1283 and not _bit_)! */
1284 return align_up (addr, 64);
1285}
1286
2f690297
AC
1287/* Force all frames to 16-byte alignment. Better safe than sorry. */
1288
1289static CORE_ADDR
1797a8f6 1290hppa64_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2f690297
AC
1291{
1292 /* Just always 16-byte align. */
1293 return align_up (addr, 16);
1294}
1295
cb8c24b6 1296static CORE_ADDR
c113ed0c 1297hppa_read_pc (readable_regcache *regcache)
c906108c 1298{
cc72850f 1299 ULONGEST ipsw;
61a1198a 1300 ULONGEST pc;
c906108c 1301
c113ed0c
YQ
1302 regcache->cooked_read (HPPA_IPSW_REGNUM, &ipsw);
1303 regcache->cooked_read (HPPA_PCOQ_HEAD_REGNUM, &pc);
fe46cd3a
RC
1304
1305 /* If the current instruction is nullified, then we are effectively
1306 still executing the previous instruction. Pretend we are still
cc72850f
MK
1307 there. This is needed when single stepping; if the nullified
1308 instruction is on a different line, we don't want GDB to think
1309 we've stepped onto that line. */
fe46cd3a
RC
1310 if (ipsw & 0x00200000)
1311 pc -= 4;
1312
cc72850f 1313 return pc & ~0x3;
c906108c
SS
1314}
1315
cc72850f 1316void
61a1198a 1317hppa_write_pc (struct regcache *regcache, CORE_ADDR pc)
c906108c 1318{
61a1198a
UW
1319 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, pc);
1320 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_TAIL_REGNUM, pc + 4);
c906108c
SS
1321}
1322
c906108c 1323/* For the given instruction (INST), return any adjustment it makes
1777feb0 1324 to the stack pointer or zero for no adjustment.
c906108c
SS
1325
1326 This only handles instructions commonly found in prologues. */
1327
1328static int
fba45db2 1329prologue_inst_adjust_sp (unsigned long inst)
c906108c
SS
1330{
1331 /* This must persist across calls. */
1332 static int save_high21;
1333
1334 /* The most common way to perform a stack adjustment ldo X(sp),sp */
1335 if ((inst & 0xffffc000) == 0x37de0000)
abc485a1 1336 return hppa_extract_14 (inst);
c906108c
SS
1337
1338 /* stwm X,D(sp) */
1339 if ((inst & 0xffe00000) == 0x6fc00000)
abc485a1 1340 return hppa_extract_14 (inst);
c906108c 1341
104c1213
JM
1342 /* std,ma X,D(sp) */
1343 if ((inst & 0xffe00008) == 0x73c00008)
66c6502d 1344 return (inst & 0x1 ? -(1 << 13) : 0) | (((inst >> 4) & 0x3ff) << 3);
104c1213 1345
e22b26cb 1346 /* addil high21,%r30; ldo low11,(%r1),%r30)
c906108c 1347 save high bits in save_high21 for later use. */
e22b26cb 1348 if ((inst & 0xffe00000) == 0x2bc00000)
c906108c 1349 {
abc485a1 1350 save_high21 = hppa_extract_21 (inst);
c906108c
SS
1351 return 0;
1352 }
1353
1354 if ((inst & 0xffff0000) == 0x343e0000)
abc485a1 1355 return save_high21 + hppa_extract_14 (inst);
c906108c
SS
1356
1357 /* fstws as used by the HP compilers. */
1358 if ((inst & 0xffffffe0) == 0x2fd01220)
abc485a1 1359 return hppa_extract_5_load (inst);
c906108c
SS
1360
1361 /* No adjustment. */
1362 return 0;
1363}
1364
1365/* Return nonzero if INST is a branch of some kind, else return zero. */
1366
1367static int
fba45db2 1368is_branch (unsigned long inst)
c906108c
SS
1369{
1370 switch (inst >> 26)
1371 {
1372 case 0x20:
1373 case 0x21:
1374 case 0x22:
1375 case 0x23:
7be570e7 1376 case 0x27:
c906108c
SS
1377 case 0x28:
1378 case 0x29:
1379 case 0x2a:
1380 case 0x2b:
7be570e7 1381 case 0x2f:
c906108c
SS
1382 case 0x30:
1383 case 0x31:
1384 case 0x32:
1385 case 0x33:
1386 case 0x38:
1387 case 0x39:
1388 case 0x3a:
7be570e7 1389 case 0x3b:
c906108c
SS
1390 return 1;
1391
1392 default:
1393 return 0;
1394 }
1395}
1396
1397/* Return the register number for a GR which is saved by INST or
b35018fd 1398 zero if INST does not save a GR.
c906108c 1399
b35018fd 1400 Referenced from:
7be570e7 1401
b35018fd
CG
1402 parisc 1.1:
1403 https://parisc.wiki.kernel.org/images-parisc/6/68/Pa11_acd.pdf
c906108c 1404
b35018fd
CG
1405 parisc 2.0:
1406 https://parisc.wiki.kernel.org/images-parisc/7/73/Parisc2.0.pdf
c906108c 1407
b35018fd
CG
1408 According to Table 6-5 of Chapter 6 (Memory Reference Instructions)
1409 on page 106 in parisc 2.0, all instructions for storing values from
1410 the general registers are:
c5aa993b 1411
b35018fd 1412 Store: stb, sth, stw, std (according to Chapter 7, they
dda83cd7 1413 are only in both "inst >> 26" and "inst >> 6".
b35018fd 1414 Store Absolute: stwa, stda (according to Chapter 7, they are only
dda83cd7 1415 in "inst >> 6".
b35018fd 1416 Store Bytes: stby, stdby (according to Chapter 7, they are
dda83cd7 1417 only in "inst >> 6").
b35018fd
CG
1418
1419 For (inst >> 26), according to Chapter 7:
1420
1421 The effective memory reference address is formed by the addition
1422 of an immediate displacement to a base value.
1423
1424 - stb: 0x18, store a byte from a general register.
1425
1426 - sth: 0x19, store a halfword from a general register.
1427
1428 - stw: 0x1a, store a word from a general register.
1429
1430 - stwm: 0x1b, store a word from a general register and perform base
85102364 1431 register modification (2.0 will still treat it as stw).
b35018fd
CG
1432
1433 - std: 0x1c, store a doubleword from a general register (2.0 only).
1434
1435 - stw: 0x1f, store a word from a general register (2.0 only).
1436
1437 For (inst >> 6) when ((inst >> 26) == 0x03), according to Chapter 7:
1438
1439 The effective memory reference address is formed by the addition
1440 of an index value to a base value specified in the instruction.
1441
1442 - stb: 0x08, store a byte from a general register (1.1 calls stbs).
1443
1444 - sth: 0x09, store a halfword from a general register (1.1 calls
1445 sths).
1446
1447 - stw: 0x0a, store a word from a general register (1.1 calls stws).
1448
1449 - std: 0x0b: store a doubleword from a general register (2.0 only)
1450
1451 Implement fast byte moves (stores) to unaligned word or doubleword
1452 destination.
1453
1454 - stby: 0x0c, for unaligned word (1.1 calls stbys).
1455
1456 - stdby: 0x0d for unaligned doubleword (2.0 only).
1457
1458 Store a word or doubleword using an absolute memory address formed
1459 using short or long displacement or indexed
1460
1461 - stwa: 0x0e, store a word from a general register to an absolute
1462 address (1.0 calls stwas).
1463
1464 - stda: 0x0f, store a doubleword from a general register to an
1465 absolute address (2.0 only). */
1466
1467static int
1468inst_saves_gr (unsigned long inst)
1469{
1470 switch ((inst >> 26) & 0x0f)
1471 {
1472 case 0x03:
1473 switch ((inst >> 6) & 0x0f)
1474 {
1475 case 0x08:
1476 case 0x09:
1477 case 0x0a:
1478 case 0x0b:
1479 case 0x0c:
1480 case 0x0d:
1481 case 0x0e:
1482 case 0x0f:
1483 return hppa_extract_5R_store (inst);
1484 default:
1485 return 0;
1486 }
1487 case 0x18:
1488 case 0x19:
1489 case 0x1a:
1490 case 0x1b:
1491 case 0x1c:
1492 /* no 0x1d or 0x1e -- according to parisc 2.0 document */
1493 case 0x1f:
1494 return hppa_extract_5R_store (inst);
1495 default:
1496 return 0;
1497 }
c906108c
SS
1498}
1499
1500/* Return the register number for a FR which is saved by INST or
1501 zero it INST does not save a FR.
1502
1503 Note we only care about full 64bit register stores (that's the only
1504 kind of stores the prologue will use).
1505
1506 FIXME: What about argument stores with the HP compiler in ANSI mode? */
1507
1508static int
fba45db2 1509inst_saves_fr (unsigned long inst)
c906108c 1510{
1777feb0 1511 /* Is this an FSTD? */
c906108c 1512 if ((inst & 0xfc00dfc0) == 0x2c001200)
abc485a1 1513 return hppa_extract_5r_store (inst);
7be570e7 1514 if ((inst & 0xfc000002) == 0x70000002)
abc485a1 1515 return hppa_extract_5R_store (inst);
1777feb0 1516 /* Is this an FSTW? */
c906108c 1517 if ((inst & 0xfc00df80) == 0x24001200)
abc485a1 1518 return hppa_extract_5r_store (inst);
7be570e7 1519 if ((inst & 0xfc000002) == 0x7c000000)
abc485a1 1520 return hppa_extract_5R_store (inst);
c906108c
SS
1521 return 0;
1522}
1523
1524/* Advance PC across any function entry prologue instructions
1777feb0 1525 to reach some "real" code.
c906108c
SS
1526
1527 Use information in the unwind table to determine what exactly should
1528 be in the prologue. */
1529
1530
a71f8c30 1531static CORE_ADDR
be8626e0
MD
1532skip_prologue_hard_way (struct gdbarch *gdbarch, CORE_ADDR pc,
1533 int stop_before_branch)
c906108c 1534{
e17a4113 1535 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
e362b510 1536 gdb_byte buf[4];
c906108c
SS
1537 CORE_ADDR orig_pc = pc;
1538 unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp;
1539 unsigned long args_stored, status, i, restart_gr, restart_fr;
1540 struct unwind_table_entry *u;
a71f8c30 1541 int final_iteration;
c906108c
SS
1542
1543 restart_gr = 0;
1544 restart_fr = 0;
1545
1546restart:
1547 u = find_unwind_entry (pc);
1548 if (!u)
1549 return pc;
1550
1777feb0 1551 /* If we are not at the beginning of a function, then return now. */
c906108c
SS
1552 if ((pc & ~0x3) != u->region_start)
1553 return pc;
1554
1555 /* This is how much of a frame adjustment we need to account for. */
1556 stack_remaining = u->Total_frame_size << 3;
1557
1558 /* Magic register saves we want to know about. */
1559 save_rp = u->Save_RP;
1560 save_sp = u->Save_SP;
1561
1562 /* An indication that args may be stored into the stack. Unfortunately
1563 the HPUX compilers tend to set this in cases where no args were
1564 stored too!. */
1565 args_stored = 1;
1566
1567 /* Turn the Entry_GR field into a bitmask. */
1568 save_gr = 0;
1569 for (i = 3; i < u->Entry_GR + 3; i++)
1570 {
1571 /* Frame pointer gets saved into a special location. */
eded0a31 1572 if (u->Save_SP && i == HPPA_FP_REGNUM)
c906108c
SS
1573 continue;
1574
1575 save_gr |= (1 << i);
1576 }
1577 save_gr &= ~restart_gr;
1578
1579 /* Turn the Entry_FR field into a bitmask too. */
1580 save_fr = 0;
1581 for (i = 12; i < u->Entry_FR + 12; i++)
1582 save_fr |= (1 << i);
1583 save_fr &= ~restart_fr;
1584
a71f8c30
RC
1585 final_iteration = 0;
1586
c906108c
SS
1587 /* Loop until we find everything of interest or hit a branch.
1588
1589 For unoptimized GCC code and for any HP CC code this will never ever
1590 examine any user instructions.
1591
85102364 1592 For optimized GCC code we're faced with problems. GCC will schedule
c906108c
SS
1593 its prologue and make prologue instructions available for delay slot
1594 filling. The end result is user code gets mixed in with the prologue
1595 and a prologue instruction may be in the delay slot of the first branch
1596 or call.
1597
1598 Some unexpected things are expected with debugging optimized code, so
1599 we allow this routine to walk past user instructions in optimized
1600 GCC code. */
1601 while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0
1602 || args_stored)
1603 {
1604 unsigned int reg_num;
1605 unsigned long old_stack_remaining, old_save_gr, old_save_fr;
1606 unsigned long old_save_rp, old_save_sp, next_inst;
1607
1608 /* Save copies of all the triggers so we can compare them later
dda83cd7 1609 (only for HPC). */
c906108c
SS
1610 old_save_gr = save_gr;
1611 old_save_fr = save_fr;
1612 old_save_rp = save_rp;
1613 old_save_sp = save_sp;
1614 old_stack_remaining = stack_remaining;
1615
8defab1a 1616 status = target_read_memory (pc, buf, 4);
e17a4113 1617 inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1618
c906108c
SS
1619 /* Yow! */
1620 if (status != 0)
1621 return pc;
1622
1623 /* Note the interesting effects of this instruction. */
1624 stack_remaining -= prologue_inst_adjust_sp (inst);
1625
7be570e7
JM
1626 /* There are limited ways to store the return pointer into the
1627 stack. */
c4c79048 1628 if (inst == 0x6bc23fd9 || inst == 0x0fc212c1 || inst == 0x73c23fe1)
c906108c
SS
1629 save_rp = 0;
1630
104c1213 1631 /* These are the only ways we save SP into the stack. At this time
dda83cd7 1632 the HP compilers never bother to save SP into the stack. */
104c1213
JM
1633 if ((inst & 0xffffc000) == 0x6fc10000
1634 || (inst & 0xffffc00c) == 0x73c10008)
c906108c
SS
1635 save_sp = 0;
1636
6426a772 1637 /* Are we loading some register with an offset from the argument
dda83cd7 1638 pointer? */
6426a772
JM
1639 if ((inst & 0xffe00000) == 0x37a00000
1640 || (inst & 0xffffffe0) == 0x081d0240)
1641 {
1642 pc += 4;
1643 continue;
1644 }
1645
c906108c
SS
1646 /* Account for general and floating-point register saves. */
1647 reg_num = inst_saves_gr (inst);
1648 save_gr &= ~(1 << reg_num);
1649
1650 /* Ugh. Also account for argument stores into the stack.
dda83cd7
SM
1651 Unfortunately args_stored only tells us that some arguments
1652 where stored into the stack. Not how many or what kind!
c906108c 1653
dda83cd7
SM
1654 This is a kludge as on the HP compiler sets this bit and it
1655 never does prologue scheduling. So once we see one, skip past
1656 all of them. We have similar code for the fp arg stores below.
c906108c 1657
dda83cd7
SM
1658 FIXME. Can still die if we have a mix of GR and FR argument
1659 stores! */
be8626e0 1660 if (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1661 && reg_num <= 26)
c906108c 1662 {
be8626e0 1663 while (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1664 && reg_num <= 26)
c906108c
SS
1665 {
1666 pc += 4;
8defab1a 1667 status = target_read_memory (pc, buf, 4);
e17a4113 1668 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1669 if (status != 0)
1670 return pc;
1671 reg_num = inst_saves_gr (inst);
1672 }
1673 args_stored = 0;
1674 continue;
1675 }
1676
1677 reg_num = inst_saves_fr (inst);
1678 save_fr &= ~(1 << reg_num);
1679
8defab1a 1680 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1681 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1682
c906108c
SS
1683 /* Yow! */
1684 if (status != 0)
1685 return pc;
1686
1687 /* We've got to be read to handle the ldo before the fp register
dda83cd7 1688 save. */
c906108c
SS
1689 if ((inst & 0xfc000000) == 0x34000000
1690 && inst_saves_fr (next_inst) >= 4
819844ad 1691 && inst_saves_fr (next_inst)
be8626e0 1692 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1693 {
1694 /* So we drop into the code below in a reasonable state. */
1695 reg_num = inst_saves_fr (next_inst);
1696 pc -= 4;
1697 }
1698
1699 /* Ugh. Also account for argument stores into the stack.
dda83cd7
SM
1700 This is a kludge as on the HP compiler sets this bit and it
1701 never does prologue scheduling. So once we see one, skip past
1702 all of them. */
819844ad 1703 if (reg_num >= 4
be8626e0 1704 && reg_num <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c 1705 {
819844ad
UW
1706 while (reg_num >= 4
1707 && reg_num
be8626e0 1708 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1709 {
1710 pc += 8;
8defab1a 1711 status = target_read_memory (pc, buf, 4);
e17a4113 1712 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1713 if (status != 0)
1714 return pc;
1715 if ((inst & 0xfc000000) != 0x34000000)
1716 break;
8defab1a 1717 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1718 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1719 if (status != 0)
1720 return pc;
1721 reg_num = inst_saves_fr (next_inst);
1722 }
1723 args_stored = 0;
1724 continue;
1725 }
1726
1727 /* Quit if we hit any kind of branch. This can happen if a prologue
dda83cd7 1728 instruction is in the delay slot of the first call/branch. */
a71f8c30 1729 if (is_branch (inst) && stop_before_branch)
c906108c
SS
1730 break;
1731
1732 /* What a crock. The HP compilers set args_stored even if no
dda83cd7
SM
1733 arguments were stored into the stack (boo hiss). This could
1734 cause this code to then skip a bunch of user insns (up to the
1735 first branch).
1736
1737 To combat this we try to identify when args_stored was bogusly
1738 set and clear it. We only do this when args_stored is nonzero,
1739 all other resources are accounted for, and nothing changed on
1740 this pass. */
c906108c 1741 if (args_stored
c5aa993b 1742 && !(save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
c906108c
SS
1743 && old_save_gr == save_gr && old_save_fr == save_fr
1744 && old_save_rp == save_rp && old_save_sp == save_sp
1745 && old_stack_remaining == stack_remaining)
1746 break;
c5aa993b 1747
c906108c
SS
1748 /* Bump the PC. */
1749 pc += 4;
a71f8c30
RC
1750
1751 /* !stop_before_branch, so also look at the insn in the delay slot
dda83cd7 1752 of the branch. */
a71f8c30
RC
1753 if (final_iteration)
1754 break;
1755 if (is_branch (inst))
1756 final_iteration = 1;
c906108c
SS
1757 }
1758
85102364 1759 /* We've got a tentative location for the end of the prologue. However
c906108c
SS
1760 because of limitations in the unwind descriptor mechanism we may
1761 have went too far into user code looking for the save of a register
1762 that does not exist. So, if there registers we expected to be saved
1763 but never were, mask them out and restart.
1764
1765 This should only happen in optimized code, and should be very rare. */
c5aa993b 1766 if (save_gr || (save_fr && !(restart_fr || restart_gr)))
c906108c
SS
1767 {
1768 pc = orig_pc;
1769 restart_gr = save_gr;
1770 restart_fr = save_fr;
1771 goto restart;
1772 }
1773
1774 return pc;
1775}
1776
1777
7be570e7
JM
1778/* Return the address of the PC after the last prologue instruction if
1779 we can determine it from the debug symbols. Else return zero. */
c906108c
SS
1780
1781static CORE_ADDR
fba45db2 1782after_prologue (CORE_ADDR pc)
c906108c
SS
1783{
1784 struct symtab_and_line sal;
1785 CORE_ADDR func_addr, func_end;
c906108c 1786
7be570e7
JM
1787 /* If we can not find the symbol in the partial symbol table, then
1788 there is no hope we can determine the function's start address
1789 with this code. */
c906108c 1790 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
7be570e7 1791 return 0;
c906108c 1792
7be570e7 1793 /* Get the line associated with FUNC_ADDR. */
c906108c
SS
1794 sal = find_pc_line (func_addr, 0);
1795
7be570e7
JM
1796 /* There are only two cases to consider. First, the end of the source line
1797 is within the function bounds. In that case we return the end of the
1798 source line. Second is the end of the source line extends beyond the
1799 bounds of the current function. We need to use the slow code to
1777feb0 1800 examine instructions in that case.
c906108c 1801
7be570e7
JM
1802 Anything else is simply a bug elsewhere. Fixing it here is absolutely
1803 the wrong thing to do. In fact, it should be entirely possible for this
1804 function to always return zero since the slow instruction scanning code
1805 is supposed to *always* work. If it does not, then it is a bug. */
1806 if (sal.end < func_end)
1807 return sal.end;
c5aa993b 1808 else
7be570e7 1809 return 0;
c906108c
SS
1810}
1811
1812/* To skip prologues, I use this predicate. Returns either PC itself
1813 if the code at PC does not look like a function prologue; otherwise
1777feb0 1814 returns an address that (if we're lucky) follows the prologue.
a71f8c30
RC
1815
1816 hppa_skip_prologue is called by gdb to place a breakpoint in a function.
1777feb0 1817 It doesn't necessarily skips all the insns in the prologue. In fact
a71f8c30
RC
1818 we might not want to skip all the insns because a prologue insn may
1819 appear in the delay slot of the first branch, and we don't want to
1820 skip over the branch in that case. */
c906108c 1821
8d153463 1822static CORE_ADDR
6093d2eb 1823hppa_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
c906108c 1824{
c5aa993b 1825 CORE_ADDR post_prologue_pc;
c906108c 1826
c5aa993b
JM
1827 /* See if we can determine the end of the prologue via the symbol table.
1828 If so, then return either PC, or the PC after the prologue, whichever
1829 is greater. */
c906108c 1830
c5aa993b 1831 post_prologue_pc = after_prologue (pc);
c906108c 1832
7be570e7
JM
1833 /* If after_prologue returned a useful address, then use it. Else
1834 fall back on the instruction skipping code.
1835
1836 Some folks have claimed this causes problems because the breakpoint
1837 may be the first instruction of the prologue. If that happens, then
1838 the instruction skipping code has a bug that needs to be fixed. */
c5aa993b 1839 if (post_prologue_pc != 0)
325fac50 1840 return std::max (pc, post_prologue_pc);
c5aa993b 1841 else
be8626e0 1842 return (skip_prologue_hard_way (gdbarch, pc, 1));
c906108c
SS
1843}
1844
29d375ac 1845/* Return an unwind entry that falls within the frame's code block. */
227e86ad 1846
29d375ac 1847static struct unwind_table_entry *
227e86ad 1848hppa_find_unwind_entry_in_block (struct frame_info *this_frame)
29d375ac 1849{
227e86ad 1850 CORE_ADDR pc = get_frame_address_in_block (this_frame);
93d42b30
DJ
1851
1852 /* FIXME drow/20070101: Calling gdbarch_addr_bits_remove on the
ad1193e7 1853 result of get_frame_address_in_block implies a problem.
93d42b30 1854 The bits should have been removed earlier, before the return
c7ce8faa 1855 value of gdbarch_unwind_pc. That might be happening already;
93d42b30
DJ
1856 if it isn't, it should be fixed. Then this call can be
1857 removed. */
227e86ad 1858 pc = gdbarch_addr_bits_remove (get_frame_arch (this_frame), pc);
29d375ac
RC
1859 return find_unwind_entry (pc);
1860}
1861
26d08f08
AC
1862struct hppa_frame_cache
1863{
1864 CORE_ADDR base;
098caef4 1865 trad_frame_saved_reg *saved_regs;
26d08f08
AC
1866};
1867
1868static struct hppa_frame_cache *
227e86ad 1869hppa_frame_cache (struct frame_info *this_frame, void **this_cache)
26d08f08 1870{
227e86ad 1871 struct gdbarch *gdbarch = get_frame_arch (this_frame);
e17a4113
UW
1872 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1873 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
26d08f08
AC
1874 struct hppa_frame_cache *cache;
1875 long saved_gr_mask;
1876 long saved_fr_mask;
26d08f08
AC
1877 long frame_size;
1878 struct unwind_table_entry *u;
9f7194c3 1879 CORE_ADDR prologue_end;
50b2f48a 1880 int fp_in_r1 = 0;
26d08f08
AC
1881 int i;
1882
369aa520
RC
1883 if (hppa_debug)
1884 fprintf_unfiltered (gdb_stdlog, "{ hppa_frame_cache (frame=%d) -> ",
227e86ad 1885 frame_relative_level(this_frame));
369aa520 1886
26d08f08 1887 if ((*this_cache) != NULL)
369aa520
RC
1888 {
1889 if (hppa_debug)
dda83cd7
SM
1890 fprintf_unfiltered (gdb_stdlog, "base=%s (cached) }",
1891 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
9a3c8263 1892 return (struct hppa_frame_cache *) (*this_cache);
369aa520 1893 }
26d08f08
AC
1894 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
1895 (*this_cache) = cache;
227e86ad 1896 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
26d08f08
AC
1897
1898 /* Yow! */
227e86ad 1899 u = hppa_find_unwind_entry_in_block (this_frame);
26d08f08 1900 if (!u)
369aa520
RC
1901 {
1902 if (hppa_debug)
dda83cd7 1903 fprintf_unfiltered (gdb_stdlog, "base=NULL (no unwind entry) }");
9a3c8263 1904 return (struct hppa_frame_cache *) (*this_cache);
369aa520 1905 }
26d08f08
AC
1906
1907 /* Turn the Entry_GR field into a bitmask. */
1908 saved_gr_mask = 0;
1909 for (i = 3; i < u->Entry_GR + 3; i++)
1910 {
1911 /* Frame pointer gets saved into a special location. */
eded0a31 1912 if (u->Save_SP && i == HPPA_FP_REGNUM)
26d08f08
AC
1913 continue;
1914
1915 saved_gr_mask |= (1 << i);
1916 }
1917
1918 /* Turn the Entry_FR field into a bitmask too. */
1919 saved_fr_mask = 0;
1920 for (i = 12; i < u->Entry_FR + 12; i++)
1921 saved_fr_mask |= (1 << i);
1922
1923 /* Loop until we find everything of interest or hit a branch.
1924
1925 For unoptimized GCC code and for any HP CC code this will never ever
1926 examine any user instructions.
1927
1928 For optimized GCC code we're faced with problems. GCC will schedule
1929 its prologue and make prologue instructions available for delay slot
1930 filling. The end result is user code gets mixed in with the prologue
1931 and a prologue instruction may be in the delay slot of the first branch
1932 or call.
1933
1934 Some unexpected things are expected with debugging optimized code, so
1935 we allow this routine to walk past user instructions in optimized
1936 GCC code. */
1937 {
1938 int final_iteration = 0;
46acf081 1939 CORE_ADDR pc, start_pc, end_pc;
26d08f08
AC
1940 int looking_for_sp = u->Save_SP;
1941 int looking_for_rp = u->Save_RP;
1942 int fp_loc = -1;
9f7194c3 1943
a71f8c30 1944 /* We have to use skip_prologue_hard_way instead of just
9f7194c3
RC
1945 skip_prologue_using_sal, in case we stepped into a function without
1946 symbol information. hppa_skip_prologue also bounds the returned
1947 pc by the passed in pc, so it will not return a pc in the next
1777feb0 1948 function.
a71f8c30
RC
1949
1950 We used to call hppa_skip_prologue to find the end of the prologue,
1951 but if some non-prologue instructions get scheduled into the prologue,
1952 and the program is compiled with debug information, the "easy" way
1953 in hppa_skip_prologue will return a prologue end that is too early
1954 for us to notice any potential frame adjustments. */
d5c27f81 1955
ef02daa9
DJ
1956 /* We used to use get_frame_func to locate the beginning of the
1957 function to pass to skip_prologue. However, when objects are
1958 compiled without debug symbols, get_frame_func can return the wrong
1777feb0 1959 function (or 0). We can do better than that by using unwind records.
46acf081 1960 This only works if the Region_description of the unwind record
1777feb0 1961 indicates that it includes the entry point of the function.
46acf081
RC
1962 HP compilers sometimes generate unwind records for regions that
1963 do not include the entry or exit point of a function. GNU tools
1964 do not do this. */
1965
1966 if ((u->Region_description & 0x2) == 0)
1967 start_pc = u->region_start;
1968 else
227e86ad 1969 start_pc = get_frame_func (this_frame);
d5c27f81 1970
be8626e0 1971 prologue_end = skip_prologue_hard_way (gdbarch, start_pc, 0);
227e86ad 1972 end_pc = get_frame_pc (this_frame);
9f7194c3
RC
1973
1974 if (prologue_end != 0 && end_pc > prologue_end)
1975 end_pc = prologue_end;
1976
26d08f08 1977 frame_size = 0;
9f7194c3 1978
46acf081 1979 for (pc = start_pc;
26d08f08
AC
1980 ((saved_gr_mask || saved_fr_mask
1981 || looking_for_sp || looking_for_rp
1982 || frame_size < (u->Total_frame_size << 3))
9f7194c3 1983 && pc < end_pc);
26d08f08
AC
1984 pc += 4)
1985 {
1986 int reg;
e362b510 1987 gdb_byte buf4[4];
4a302917
RC
1988 long inst;
1989
bdec2917 1990 if (!safe_frame_unwind_memory (this_frame, pc, buf4))
4a302917 1991 {
5af949e3
UW
1992 error (_("Cannot read instruction at %s."),
1993 paddress (gdbarch, pc));
9a3c8263 1994 return (struct hppa_frame_cache *) (*this_cache);
4a302917
RC
1995 }
1996
e17a4113 1997 inst = extract_unsigned_integer (buf4, sizeof buf4, byte_order);
9f7194c3 1998
26d08f08
AC
1999 /* Note the interesting effects of this instruction. */
2000 frame_size += prologue_inst_adjust_sp (inst);
2001
2002 /* There are limited ways to store the return pointer into the
2003 stack. */
2004 if (inst == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
2005 {
2006 looking_for_rp = 0;
098caef4 2007 cache->saved_regs[HPPA_RP_REGNUM].set_addr (-20);
26d08f08 2008 }
dfaf8edb
MK
2009 else if (inst == 0x6bc23fd1) /* stw rp,-0x18(sr0,sp) */
2010 {
2011 looking_for_rp = 0;
098caef4 2012 cache->saved_regs[HPPA_RP_REGNUM].set_addr (-24);
dfaf8edb 2013 }
c4c79048 2014 else if (inst == 0x0fc212c1
dda83cd7 2015 || inst == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
26d08f08
AC
2016 {
2017 looking_for_rp = 0;
098caef4 2018 cache->saved_regs[HPPA_RP_REGNUM].set_addr (-16);
26d08f08
AC
2019 }
2020
2021 /* Check to see if we saved SP into the stack. This also
2022 happens to indicate the location of the saved frame
2023 pointer. */
2024 if ((inst & 0xffffc000) == 0x6fc10000 /* stw,ma r1,N(sr0,sp) */
2025 || (inst & 0xffffc00c) == 0x73c10008) /* std,ma r1,N(sr0,sp) */
2026 {
2027 looking_for_sp = 0;
098caef4 2028 cache->saved_regs[HPPA_FP_REGNUM].set_addr (0);
26d08f08 2029 }
50b2f48a
RC
2030 else if (inst == 0x08030241) /* copy %r3, %r1 */
2031 {
2032 fp_in_r1 = 1;
2033 }
26d08f08
AC
2034
2035 /* Account for general and floating-point register saves. */
2036 reg = inst_saves_gr (inst);
2037 if (reg >= 3 && reg <= 18
eded0a31 2038 && (!u->Save_SP || reg != HPPA_FP_REGNUM))
26d08f08
AC
2039 {
2040 saved_gr_mask &= ~(1 << reg);
abc485a1 2041 if ((inst >> 26) == 0x1b && hppa_extract_14 (inst) >= 0)
26d08f08
AC
2042 /* stwm with a positive displacement is a _post_
2043 _modify_. */
098caef4 2044 cache->saved_regs[reg].set_addr (0);
26d08f08
AC
2045 else if ((inst & 0xfc00000c) == 0x70000008)
2046 /* A std has explicit post_modify forms. */
098caef4 2047 cache->saved_regs[reg].set_addr (0);
26d08f08
AC
2048 else
2049 {
2050 CORE_ADDR offset;
2051
2052 if ((inst >> 26) == 0x1c)
66c6502d 2053 offset = (inst & 0x1 ? -(1 << 13) : 0)
1777feb0 2054 | (((inst >> 4) & 0x3ff) << 3);
26d08f08 2055 else if ((inst >> 26) == 0x03)
abc485a1 2056 offset = hppa_low_hppa_sign_extend (inst & 0x1f, 5);
26d08f08 2057 else
abc485a1 2058 offset = hppa_extract_14 (inst);
26d08f08
AC
2059
2060 /* Handle code with and without frame pointers. */
2061 if (u->Save_SP)
098caef4 2062 cache->saved_regs[reg].set_addr (offset);
26d08f08 2063 else
098caef4
LM
2064 cache->saved_regs[reg].set_addr ((u->Total_frame_size << 3)
2065 + offset);
26d08f08
AC
2066 }
2067 }
2068
2069 /* GCC handles callee saved FP regs a little differently.
2070
2071 It emits an instruction to put the value of the start of
2072 the FP store area into %r1. It then uses fstds,ma with a
2073 basereg of %r1 for the stores.
2074
2075 HP CC emits them at the current stack pointer modifying the
2076 stack pointer as it stores each register. */
2077
2078 /* ldo X(%r3),%r1 or ldo X(%r30),%r1. */
2079 if ((inst & 0xffffc000) == 0x34610000
2080 || (inst & 0xffffc000) == 0x37c10000)
abc485a1 2081 fp_loc = hppa_extract_14 (inst);
26d08f08
AC
2082
2083 reg = inst_saves_fr (inst);
2084 if (reg >= 12 && reg <= 21)
2085 {
2086 /* Note +4 braindamage below is necessary because the FP
2087 status registers are internally 8 registers rather than
2088 the expected 4 registers. */
2089 saved_fr_mask &= ~(1 << reg);
2090 if (fp_loc == -1)
2091 {
2092 /* 1st HP CC FP register store. After this
2093 instruction we've set enough state that the GCC and
2094 HPCC code are both handled in the same manner. */
098caef4 2095 cache->saved_regs[reg + HPPA_FP4_REGNUM + 4].set_addr (0);
26d08f08
AC
2096 fp_loc = 8;
2097 }
2098 else
2099 {
098caef4 2100 cache->saved_regs[reg + HPPA_FP0_REGNUM + 4].set_addr (fp_loc);
26d08f08
AC
2101 fp_loc += 8;
2102 }
2103 }
2104
1777feb0 2105 /* Quit if we hit any kind of branch the previous iteration. */
26d08f08
AC
2106 if (final_iteration)
2107 break;
2108 /* We want to look precisely one instruction beyond the branch
2109 if we have not found everything yet. */
2110 if (is_branch (inst))
2111 final_iteration = 1;
2112 }
2113 }
2114
2115 {
2116 /* The frame base always represents the value of %sp at entry to
2117 the current function (and is thus equivalent to the "saved"
2118 stack pointer. */
227e86ad 2119 CORE_ADDR this_sp = get_frame_register_unsigned (this_frame,
dda83cd7 2120 HPPA_SP_REGNUM);
ed70ba00 2121 CORE_ADDR fp;
9f7194c3
RC
2122
2123 if (hppa_debug)
5af949e3 2124 fprintf_unfiltered (gdb_stdlog, " (this_sp=%s, pc=%s, "
dda83cd7
SM
2125 "prologue_end=%s) ",
2126 paddress (gdbarch, this_sp),
5af949e3
UW
2127 paddress (gdbarch, get_frame_pc (this_frame)),
2128 paddress (gdbarch, prologue_end));
9f7194c3 2129
ed70ba00 2130 /* Check to see if a frame pointer is available, and use it for
dda83cd7 2131 frame unwinding if it is.
ed70ba00 2132
dda83cd7
SM
2133 There are some situations where we need to rely on the frame
2134 pointer to do stack unwinding. For example, if a function calls
2135 alloca (), the stack pointer can get adjusted inside the body of
2136 the function. In this case, the ABI requires that the compiler
2137 maintain a frame pointer for the function.
ed70ba00 2138
dda83cd7
SM
2139 The unwind record has a flag (alloca_frame) that indicates that
2140 a function has a variable frame; unfortunately, gcc/binutils
2141 does not set this flag. Instead, whenever a frame pointer is used
2142 and saved on the stack, the Save_SP flag is set. We use this to
2143 decide whether to use the frame pointer for unwinding.
ed70ba00 2144
dda83cd7 2145 TODO: For the HP compiler, maybe we should use the alloca_frame flag
ed70ba00
RC
2146 instead of Save_SP. */
2147
227e86ad 2148 fp = get_frame_register_unsigned (this_frame, HPPA_FP_REGNUM);
46acf081 2149
6fcecea0 2150 if (u->alloca_frame)
46acf081 2151 fp -= u->Total_frame_size << 3;
ed70ba00 2152
227e86ad 2153 if (get_frame_pc (this_frame) >= prologue_end
dda83cd7 2154 && (u->Save_SP || u->alloca_frame) && fp != 0)
ed70ba00 2155 {
24b21115 2156 cache->base = fp;
ed70ba00 2157
24b21115 2158 if (hppa_debug)
5af949e3
UW
2159 fprintf_unfiltered (gdb_stdlog, " (base=%s) [frame pointer]",
2160 paddress (gdbarch, cache->base));
ed70ba00 2161 }
1658da49 2162 else if (u->Save_SP
a9a87d35 2163 && cache->saved_regs[HPPA_SP_REGNUM].is_addr ())
9f7194c3 2164 {
dda83cd7 2165 /* Both we're expecting the SP to be saved and the SP has been
9f7194c3
RC
2166 saved. The entry SP value is saved at this frame's SP
2167 address. */
dda83cd7 2168 cache->base = read_memory_integer (this_sp, word_size, byte_order);
9f7194c3
RC
2169
2170 if (hppa_debug)
5af949e3 2171 fprintf_unfiltered (gdb_stdlog, " (base=%s) [saved]",
dda83cd7 2172 paddress (gdbarch, cache->base));
9f7194c3 2173 }
26d08f08 2174 else
9f7194c3 2175 {
dda83cd7 2176 /* The prologue has been slowly allocating stack space. Adjust
1658da49 2177 the SP back. */
dda83cd7 2178 cache->base = this_sp - frame_size;
9f7194c3 2179 if (hppa_debug)
5af949e3
UW
2180 fprintf_unfiltered (gdb_stdlog, " (base=%s) [unwind adjust]",
2181 paddress (gdbarch, cache->base));
9f7194c3
RC
2182
2183 }
a9a87d35 2184 cache->saved_regs[HPPA_SP_REGNUM].set_value (cache->base);
26d08f08
AC
2185 }
2186
412275d5
AC
2187 /* The PC is found in the "return register", "Millicode" uses "r31"
2188 as the return register while normal code uses "rp". */
26d08f08 2189 if (u->Millicode)
9f7194c3 2190 {
a9a87d35 2191 if (cache->saved_regs[31].is_addr ())
dda83cd7
SM
2192 {
2193 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] = cache->saved_regs[31];
9ed5ba24
RC
2194 if (hppa_debug)
2195 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [stack] } ");
dda83cd7 2196 }
9f7194c3
RC
2197 else
2198 {
227e86ad 2199 ULONGEST r31 = get_frame_register_unsigned (this_frame, 31);
a9a87d35 2200 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM].set_value (r31);
9ed5ba24
RC
2201 if (hppa_debug)
2202 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [frame] } ");
dda83cd7 2203 }
9f7194c3 2204 }
26d08f08 2205 else
9f7194c3 2206 {
a9a87d35 2207 if (cache->saved_regs[HPPA_RP_REGNUM].is_addr ())
dda83cd7
SM
2208 {
2209 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
9ed5ba24
RC
2210 cache->saved_regs[HPPA_RP_REGNUM];
2211 if (hppa_debug)
2212 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [stack] } ");
dda83cd7 2213 }
9f7194c3
RC
2214 else
2215 {
227e86ad 2216 ULONGEST rp = get_frame_register_unsigned (this_frame,
dda83cd7 2217 HPPA_RP_REGNUM);
a9a87d35 2218 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM].set_value (rp);
9ed5ba24
RC
2219 if (hppa_debug)
2220 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [frame] } ");
9f7194c3
RC
2221 }
2222 }
26d08f08 2223
50b2f48a
RC
2224 /* If Save_SP is set, then we expect the frame pointer to be saved in the
2225 frame. However, there is a one-insn window where we haven't saved it
2226 yet, but we've already clobbered it. Detect this case and fix it up.
2227
2228 The prologue sequence for frame-pointer functions is:
2229 0: stw %rp, -20(%sp)
2230 4: copy %r3, %r1
2231 8: copy %sp, %r3
2232 c: stw,ma %r1, XX(%sp)
2233
2234 So if we are at offset c, the r3 value that we want is not yet saved
2235 on the stack, but it's been overwritten. The prologue analyzer will
2236 set fp_in_r1 when it sees the copy insn so we know to get the value
2237 from r1 instead. */
a9a87d35 2238 if (u->Save_SP && !cache->saved_regs[HPPA_FP_REGNUM].is_addr ()
50b2f48a
RC
2239 && fp_in_r1)
2240 {
227e86ad 2241 ULONGEST r1 = get_frame_register_unsigned (this_frame, 1);
a9a87d35 2242 cache->saved_regs[HPPA_FP_REGNUM].set_value (r1);
50b2f48a 2243 }
1658da49 2244
26d08f08
AC
2245 {
2246 /* Convert all the offsets into addresses. */
2247 int reg;
65c5db89 2248 for (reg = 0; reg < gdbarch_num_regs (gdbarch); reg++)
26d08f08 2249 {
a9a87d35 2250 if (cache->saved_regs[reg].is_addr ())
098caef4
LM
2251 cache->saved_regs[reg].set_addr (cache->saved_regs[reg].addr ()
2252 + cache->base);
26d08f08
AC
2253 }
2254 }
2255
f77a2124 2256 {
345bd07c 2257 hppa_gdbarch_tdep *tdep = (hppa_gdbarch_tdep *) gdbarch_tdep (gdbarch);
f77a2124
RC
2258
2259 if (tdep->unwind_adjust_stub)
227e86ad 2260 tdep->unwind_adjust_stub (this_frame, cache->base, cache->saved_regs);
f77a2124
RC
2261 }
2262
369aa520 2263 if (hppa_debug)
5af949e3
UW
2264 fprintf_unfiltered (gdb_stdlog, "base=%s }",
2265 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
9a3c8263 2266 return (struct hppa_frame_cache *) (*this_cache);
26d08f08
AC
2267}
2268
2269static void
227e86ad
JB
2270hppa_frame_this_id (struct frame_info *this_frame, void **this_cache,
2271 struct frame_id *this_id)
26d08f08 2272{
d5c27f81 2273 struct hppa_frame_cache *info;
d5c27f81
RC
2274 struct unwind_table_entry *u;
2275
227e86ad
JB
2276 info = hppa_frame_cache (this_frame, this_cache);
2277 u = hppa_find_unwind_entry_in_block (this_frame);
d5c27f81
RC
2278
2279 (*this_id) = frame_id_build (info->base, u->region_start);
26d08f08
AC
2280}
2281
227e86ad
JB
2282static struct value *
2283hppa_frame_prev_register (struct frame_info *this_frame,
2284 void **this_cache, int regnum)
26d08f08 2285{
227e86ad
JB
2286 struct hppa_frame_cache *info = hppa_frame_cache (this_frame, this_cache);
2287
1777feb0
MS
2288 return hppa_frame_prev_register_helper (this_frame,
2289 info->saved_regs, regnum);
227e86ad
JB
2290}
2291
2292static int
2293hppa_frame_unwind_sniffer (const struct frame_unwind *self,
dda83cd7 2294 struct frame_info *this_frame, void **this_cache)
227e86ad
JB
2295{
2296 if (hppa_find_unwind_entry_in_block (this_frame))
2297 return 1;
2298
2299 return 0;
0da28f8a
RC
2300}
2301
2302static const struct frame_unwind hppa_frame_unwind =
2303{
a154d838 2304 "hppa unwind table",
0da28f8a 2305 NORMAL_FRAME,
8fbca658 2306 default_frame_unwind_stop_reason,
0da28f8a 2307 hppa_frame_this_id,
227e86ad
JB
2308 hppa_frame_prev_register,
2309 NULL,
2310 hppa_frame_unwind_sniffer
0da28f8a
RC
2311};
2312
0da28f8a
RC
2313/* This is a generic fallback frame unwinder that kicks in if we fail all
2314 the other ones. Normally we would expect the stub and regular unwinder
2315 to work, but in some cases we might hit a function that just doesn't
2316 have any unwind information available. In this case we try to do
2317 unwinding solely based on code reading. This is obviously going to be
2318 slow, so only use this as a last resort. Currently this will only
2319 identify the stack and pc for the frame. */
2320
2321static struct hppa_frame_cache *
227e86ad 2322hppa_fallback_frame_cache (struct frame_info *this_frame, void **this_cache)
0da28f8a 2323{
e17a4113
UW
2324 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2325 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
0da28f8a 2326 struct hppa_frame_cache *cache;
4ba6a975
MK
2327 unsigned int frame_size = 0;
2328 int found_rp = 0;
2329 CORE_ADDR start_pc;
0da28f8a 2330
d5c27f81 2331 if (hppa_debug)
4ba6a975
MK
2332 fprintf_unfiltered (gdb_stdlog,
2333 "{ hppa_fallback_frame_cache (frame=%d) -> ",
227e86ad 2334 frame_relative_level (this_frame));
d5c27f81 2335
0da28f8a
RC
2336 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
2337 (*this_cache) = cache;
227e86ad 2338 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
0da28f8a 2339
227e86ad 2340 start_pc = get_frame_func (this_frame);
4ba6a975 2341 if (start_pc)
0da28f8a 2342 {
227e86ad 2343 CORE_ADDR cur_pc = get_frame_pc (this_frame);
4ba6a975 2344 CORE_ADDR pc;
0da28f8a 2345
4ba6a975
MK
2346 for (pc = start_pc; pc < cur_pc; pc += 4)
2347 {
2348 unsigned int insn;
0da28f8a 2349
e17a4113 2350 insn = read_memory_unsigned_integer (pc, 4, byte_order);
4ba6a975 2351 frame_size += prologue_inst_adjust_sp (insn);
6d1be3f1 2352
4ba6a975
MK
2353 /* There are limited ways to store the return pointer into the
2354 stack. */
2355 if (insn == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
2356 {
098caef4 2357 cache->saved_regs[HPPA_RP_REGNUM].set_addr (-20);
4ba6a975
MK
2358 found_rp = 1;
2359 }
c4c79048 2360 else if (insn == 0x0fc212c1
dda83cd7 2361 || insn == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
4ba6a975 2362 {
098caef4 2363 cache->saved_regs[HPPA_RP_REGNUM].set_addr (-16);
4ba6a975
MK
2364 found_rp = 1;
2365 }
2366 }
412275d5 2367 }
0da28f8a 2368
d5c27f81 2369 if (hppa_debug)
4ba6a975
MK
2370 fprintf_unfiltered (gdb_stdlog, " frame_size=%d, found_rp=%d }\n",
2371 frame_size, found_rp);
d5c27f81 2372
227e86ad 2373 cache->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
4ba6a975 2374 cache->base -= frame_size;
a9a87d35 2375 cache->saved_regs[HPPA_SP_REGNUM].set_value (cache->base);
0da28f8a 2376
a9a87d35 2377 if (cache->saved_regs[HPPA_RP_REGNUM].is_addr ())
0da28f8a 2378 {
098caef4
LM
2379 cache->saved_regs[HPPA_RP_REGNUM].set_addr (cache->saved_regs[HPPA_RP_REGNUM].addr ()
2380 + cache->base);
4ba6a975
MK
2381 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2382 cache->saved_regs[HPPA_RP_REGNUM];
0da28f8a 2383 }
412275d5
AC
2384 else
2385 {
4ba6a975 2386 ULONGEST rp;
227e86ad 2387 rp = get_frame_register_unsigned (this_frame, HPPA_RP_REGNUM);
a9a87d35 2388 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM].set_value (rp);
412275d5 2389 }
0da28f8a
RC
2390
2391 return cache;
26d08f08
AC
2392}
2393
0da28f8a 2394static void
227e86ad 2395hppa_fallback_frame_this_id (struct frame_info *this_frame, void **this_cache,
0da28f8a
RC
2396 struct frame_id *this_id)
2397{
2398 struct hppa_frame_cache *info =
227e86ad
JB
2399 hppa_fallback_frame_cache (this_frame, this_cache);
2400
2401 (*this_id) = frame_id_build (info->base, get_frame_func (this_frame));
0da28f8a
RC
2402}
2403
227e86ad
JB
2404static struct value *
2405hppa_fallback_frame_prev_register (struct frame_info *this_frame,
dda83cd7 2406 void **this_cache, int regnum)
0da28f8a 2407{
1777feb0
MS
2408 struct hppa_frame_cache *info
2409 = hppa_fallback_frame_cache (this_frame, this_cache);
227e86ad 2410
1777feb0
MS
2411 return hppa_frame_prev_register_helper (this_frame,
2412 info->saved_regs, regnum);
0da28f8a
RC
2413}
2414
2415static const struct frame_unwind hppa_fallback_frame_unwind =
26d08f08 2416{
a154d838 2417 "hppa prologue",
26d08f08 2418 NORMAL_FRAME,
8fbca658 2419 default_frame_unwind_stop_reason,
0da28f8a 2420 hppa_fallback_frame_this_id,
227e86ad
JB
2421 hppa_fallback_frame_prev_register,
2422 NULL,
2423 default_frame_sniffer
26d08f08
AC
2424};
2425
7f07c5b6
RC
2426/* Stub frames, used for all kinds of call stubs. */
2427struct hppa_stub_unwind_cache
2428{
2429 CORE_ADDR base;
098caef4 2430 trad_frame_saved_reg *saved_regs;
7f07c5b6
RC
2431};
2432
2433static struct hppa_stub_unwind_cache *
227e86ad 2434hppa_stub_frame_unwind_cache (struct frame_info *this_frame,
7f07c5b6
RC
2435 void **this_cache)
2436{
7f07c5b6
RC
2437 struct hppa_stub_unwind_cache *info;
2438
2439 if (*this_cache)
9a3c8263 2440 return (struct hppa_stub_unwind_cache *) *this_cache;
7f07c5b6
RC
2441
2442 info = FRAME_OBSTACK_ZALLOC (struct hppa_stub_unwind_cache);
2443 *this_cache = info;
227e86ad 2444 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
7f07c5b6 2445
227e86ad 2446 info->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
7f07c5b6 2447
22b0923d 2448 /* By default we assume that stubs do not change the rp. */
098caef4 2449 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].set_realreg (HPPA_RP_REGNUM);
22b0923d 2450
7f07c5b6
RC
2451 return info;
2452}
2453
2454static void
227e86ad 2455hppa_stub_frame_this_id (struct frame_info *this_frame,
7f07c5b6
RC
2456 void **this_prologue_cache,
2457 struct frame_id *this_id)
2458{
2459 struct hppa_stub_unwind_cache *info
227e86ad 2460 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57
RC
2461
2462 if (info)
227e86ad 2463 *this_id = frame_id_build (info->base, get_frame_func (this_frame));
7f07c5b6
RC
2464}
2465
227e86ad
JB
2466static struct value *
2467hppa_stub_frame_prev_register (struct frame_info *this_frame,
2468 void **this_prologue_cache, int regnum)
7f07c5b6
RC
2469{
2470 struct hppa_stub_unwind_cache *info
227e86ad 2471 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57 2472
227e86ad 2473 if (info == NULL)
8a3fe4f8 2474 error (_("Requesting registers from null frame."));
7f07c5b6 2475
1777feb0
MS
2476 return hppa_frame_prev_register_helper (this_frame,
2477 info->saved_regs, regnum);
227e86ad 2478}
7f07c5b6 2479
227e86ad
JB
2480static int
2481hppa_stub_unwind_sniffer (const struct frame_unwind *self,
dda83cd7
SM
2482 struct frame_info *this_frame,
2483 void **this_cache)
7f07c5b6 2484{
227e86ad
JB
2485 CORE_ADDR pc = get_frame_address_in_block (this_frame);
2486 struct gdbarch *gdbarch = get_frame_arch (this_frame);
345bd07c 2487 hppa_gdbarch_tdep *tdep = (hppa_gdbarch_tdep *) gdbarch_tdep (gdbarch);
7f07c5b6 2488
6d1be3f1 2489 if (pc == 0
84674fe1 2490 || (tdep->in_solib_call_trampoline != NULL
3e5d3a5a 2491 && tdep->in_solib_call_trampoline (gdbarch, pc))
464963c9 2492 || gdbarch_in_solib_return_trampoline (gdbarch, pc, NULL))
227e86ad
JB
2493 return 1;
2494 return 0;
7f07c5b6
RC
2495}
2496
227e86ad 2497static const struct frame_unwind hppa_stub_frame_unwind = {
a154d838 2498 "hppa stub",
227e86ad 2499 NORMAL_FRAME,
8fbca658 2500 default_frame_unwind_stop_reason,
227e86ad
JB
2501 hppa_stub_frame_this_id,
2502 hppa_stub_frame_prev_register,
2503 NULL,
2504 hppa_stub_unwind_sniffer
2505};
2506
cc72850f 2507CORE_ADDR
26d08f08
AC
2508hppa_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2509{
fe46cd3a
RC
2510 ULONGEST ipsw;
2511 CORE_ADDR pc;
2512
cc72850f
MK
2513 ipsw = frame_unwind_register_unsigned (next_frame, HPPA_IPSW_REGNUM);
2514 pc = frame_unwind_register_unsigned (next_frame, HPPA_PCOQ_HEAD_REGNUM);
fe46cd3a
RC
2515
2516 /* If the current instruction is nullified, then we are effectively
2517 still executing the previous instruction. Pretend we are still
cc72850f
MK
2518 there. This is needed when single stepping; if the nullified
2519 instruction is on a different line, we don't want GDB to think
2520 we've stepped onto that line. */
fe46cd3a
RC
2521 if (ipsw & 0x00200000)
2522 pc -= 4;
2523
cc72850f 2524 return pc & ~0x3;
26d08f08
AC
2525}
2526
ff644745
JB
2527/* Return the minimal symbol whose name is NAME and stub type is STUB_TYPE.
2528 Return NULL if no such symbol was found. */
2529
3b7344d5 2530struct bound_minimal_symbol
ff644745 2531hppa_lookup_stub_minimal_symbol (const char *name,
dda83cd7 2532 enum unwind_stub_types stub_type)
ff644745 2533{
3b7344d5 2534 struct bound_minimal_symbol result = { NULL, NULL };
ff644745 2535
2030c079 2536 for (objfile *objfile : current_program_space->objfiles ())
ff644745 2537 {
7932255d 2538 for (minimal_symbol *msym : objfile->msymbols ())
5325b9bf 2539 {
c9d95fa3 2540 if (strcmp (msym->linkage_name (), name) == 0)
3b7344d5 2541 {
5325b9bf
TT
2542 struct unwind_table_entry *u;
2543
2544 u = find_unwind_entry (MSYMBOL_VALUE (msym));
2545 if (u != NULL && u->stub_unwind.stub_type == stub_type)
2546 {
2547 result.objfile = objfile;
2548 result.minsym = msym;
2549 return result;
2550 }
3b7344d5 2551 }
5325b9bf 2552 }
ff644745
JB
2553 }
2554
3b7344d5 2555 return result;
ff644745
JB
2556}
2557
c906108c 2558static void
c482f52c 2559unwind_command (const char *exp, int from_tty)
c906108c
SS
2560{
2561 CORE_ADDR address;
2562 struct unwind_table_entry *u;
2563
2564 /* If we have an expression, evaluate it and use it as the address. */
2565
2566 if (exp != 0 && *exp != 0)
2567 address = parse_and_eval_address (exp);
2568 else
2569 return;
2570
2571 u = find_unwind_entry (address);
2572
2573 if (!u)
2574 {
2575 printf_unfiltered ("Can't find unwind table entry for %s\n", exp);
2576 return;
2577 }
2578
3329c4b5 2579 printf_unfiltered ("unwind_table_entry (%s):\n", host_address_to_string (u));
c906108c 2580
5af949e3 2581 printf_unfiltered ("\tregion_start = %s\n", hex_string (u->region_start));
c906108c 2582
5af949e3 2583 printf_unfiltered ("\tregion_end = %s\n", hex_string (u->region_end));
c906108c 2584
c906108c 2585#define pif(FLD) if (u->FLD) printf_unfiltered (" "#FLD);
c906108c
SS
2586
2587 printf_unfiltered ("\n\tflags =");
2588 pif (Cannot_unwind);
2589 pif (Millicode);
2590 pif (Millicode_save_sr0);
2591 pif (Entry_SR);
2592 pif (Args_stored);
2593 pif (Variable_Frame);
2594 pif (Separate_Package_Body);
2595 pif (Frame_Extension_Millicode);
2596 pif (Stack_Overflow_Check);
2597 pif (Two_Instruction_SP_Increment);
6fcecea0
RC
2598 pif (sr4export);
2599 pif (cxx_info);
2600 pif (cxx_try_catch);
2601 pif (sched_entry_seq);
c906108c
SS
2602 pif (Save_SP);
2603 pif (Save_RP);
2604 pif (Save_MRP_in_frame);
6fcecea0 2605 pif (save_r19);
c906108c
SS
2606 pif (Cleanup_defined);
2607 pif (MPE_XL_interrupt_marker);
2608 pif (HP_UX_interrupt_marker);
2609 pif (Large_frame);
6fcecea0 2610 pif (alloca_frame);
c906108c
SS
2611
2612 putchar_unfiltered ('\n');
2613
c906108c 2614#define pin(FLD) printf_unfiltered ("\t"#FLD" = 0x%x\n", u->FLD);
c906108c
SS
2615
2616 pin (Region_description);
2617 pin (Entry_FR);
2618 pin (Entry_GR);
2619 pin (Total_frame_size);
57dac9e1
RC
2620
2621 if (u->stub_unwind.stub_type)
2622 {
2623 printf_unfiltered ("\tstub type = ");
2624 switch (u->stub_unwind.stub_type)
dda83cd7 2625 {
57dac9e1
RC
2626 case LONG_BRANCH:
2627 printf_unfiltered ("long branch\n");
2628 break;
2629 case PARAMETER_RELOCATION:
2630 printf_unfiltered ("parameter relocation\n");
2631 break;
2632 case EXPORT:
2633 printf_unfiltered ("export\n");
2634 break;
2635 case IMPORT:
2636 printf_unfiltered ("import\n");
2637 break;
2638 case IMPORT_SHLIB:
2639 printf_unfiltered ("import shlib\n");
2640 break;
2641 default:
2642 printf_unfiltered ("unknown (%d)\n", u->stub_unwind.stub_type);
2643 }
2644 }
c906108c 2645}
c906108c 2646
38ca4e0c
MK
2647/* Return the GDB type object for the "standard" data type of data in
2648 register REGNUM. */
d709c020 2649
eded0a31 2650static struct type *
38ca4e0c 2651hppa32_register_type (struct gdbarch *gdbarch, int regnum)
d709c020 2652{
38ca4e0c 2653 if (regnum < HPPA_FP4_REGNUM)
df4df182 2654 return builtin_type (gdbarch)->builtin_uint32;
d709c020 2655 else
27067745 2656 return builtin_type (gdbarch)->builtin_float;
d709c020
JB
2657}
2658
eded0a31 2659static struct type *
38ca4e0c 2660hppa64_register_type (struct gdbarch *gdbarch, int regnum)
3ff7cf9e 2661{
38ca4e0c 2662 if (regnum < HPPA64_FP4_REGNUM)
df4df182 2663 return builtin_type (gdbarch)->builtin_uint64;
3ff7cf9e 2664 else
27067745 2665 return builtin_type (gdbarch)->builtin_double;
3ff7cf9e
JB
2666}
2667
38ca4e0c
MK
2668/* Return non-zero if REGNUM is not a register available to the user
2669 through ptrace/ttrace. */
d709c020 2670
8d153463 2671static int
64a3914f 2672hppa32_cannot_store_register (struct gdbarch *gdbarch, int regnum)
d709c020
JB
2673{
2674 return (regnum == 0
dda83cd7
SM
2675 || regnum == HPPA_PCSQ_HEAD_REGNUM
2676 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2677 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA_FP4_REGNUM));
38ca4e0c 2678}
d709c020 2679
d037d088 2680static int
64a3914f 2681hppa32_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2682{
2683 /* cr26 and cr27 are readable (but not writable) from userspace. */
2684 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2685 return 0;
2686 else
64a3914f 2687 return hppa32_cannot_store_register (gdbarch, regnum);
d037d088
CD
2688}
2689
38ca4e0c 2690static int
64a3914f 2691hppa64_cannot_store_register (struct gdbarch *gdbarch, int regnum)
38ca4e0c
MK
2692{
2693 return (regnum == 0
dda83cd7
SM
2694 || regnum == HPPA_PCSQ_HEAD_REGNUM
2695 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2696 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA64_FP4_REGNUM));
d709c020
JB
2697}
2698
d037d088 2699static int
64a3914f 2700hppa64_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2701{
2702 /* cr26 and cr27 are readable (but not writable) from userspace. */
2703 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2704 return 0;
2705 else
64a3914f 2706 return hppa64_cannot_store_register (gdbarch, regnum);
d037d088
CD
2707}
2708
8d153463 2709static CORE_ADDR
85ddcc70 2710hppa_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
d709c020
JB
2711{
2712 /* The low two bits of the PC on the PA contain the privilege level.
2713 Some genius implementing a (non-GCC) compiler apparently decided
2714 this means that "addresses" in a text section therefore include a
2715 privilege level, and thus symbol tables should contain these bits.
2716 This seems like a bonehead thing to do--anyway, it seems to work
2717 for our purposes to just ignore those bits. */
2718
2719 return (addr &= ~0x3);
2720}
2721
e127f0db
MK
2722/* Get the ARGIth function argument for the current function. */
2723
4a302917 2724static CORE_ADDR
143985b7
AF
2725hppa_fetch_pointer_argument (struct frame_info *frame, int argi,
2726 struct type *type)
2727{
e127f0db 2728 return get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 26 - argi);
143985b7
AF
2729}
2730
05d1431c 2731static enum register_status
849d0ba8 2732hppa_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache,
e127f0db 2733 int regnum, gdb_byte *buf)
0f8d9d59 2734{
05d1431c
PA
2735 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2736 ULONGEST tmp;
2737 enum register_status status;
0f8d9d59 2738
03f50fc8 2739 status = regcache->raw_read (regnum, &tmp);
05d1431c
PA
2740 if (status == REG_VALID)
2741 {
2742 if (regnum == HPPA_PCOQ_HEAD_REGNUM || regnum == HPPA_PCOQ_TAIL_REGNUM)
2743 tmp &= ~0x3;
2744 store_unsigned_integer (buf, sizeof tmp, byte_order, tmp);
2745 }
2746 return status;
0f8d9d59
RC
2747}
2748
d49771ef 2749static CORE_ADDR
e38c262f 2750hppa_find_global_pointer (struct gdbarch *gdbarch, struct value *function)
d49771ef
RC
2751{
2752 return 0;
2753}
2754
227e86ad
JB
2755struct value *
2756hppa_frame_prev_register_helper (struct frame_info *this_frame,
098caef4 2757 trad_frame_saved_reg saved_regs[],
227e86ad 2758 int regnum)
0da28f8a 2759{
227e86ad 2760 struct gdbarch *arch = get_frame_arch (this_frame);
e17a4113 2761 enum bfd_endian byte_order = gdbarch_byte_order (arch);
8f4e467c 2762
8693c419
MK
2763 if (regnum == HPPA_PCOQ_TAIL_REGNUM)
2764 {
227e86ad
JB
2765 int size = register_size (arch, HPPA_PCOQ_HEAD_REGNUM);
2766 CORE_ADDR pc;
2767 struct value *pcoq_val =
dda83cd7
SM
2768 trad_frame_get_prev_register (this_frame, saved_regs,
2769 HPPA_PCOQ_HEAD_REGNUM);
8693c419 2770
50888e42 2771 pc = extract_unsigned_integer (value_contents_all (pcoq_val).data (),
e17a4113 2772 size, byte_order);
227e86ad 2773 return frame_unwind_got_constant (this_frame, regnum, pc + 4);
8693c419 2774 }
0da28f8a 2775
227e86ad 2776 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
0da28f8a 2777}
8693c419 2778\f
0da28f8a 2779
34f55018
MK
2780/* An instruction to match. */
2781struct insn_pattern
2782{
2783 unsigned int data; /* See if it matches this.... */
2784 unsigned int mask; /* ... with this mask. */
2785};
2786
2787/* See bfd/elf32-hppa.c */
2788static struct insn_pattern hppa_long_branch_stub[] = {
2789 /* ldil LR'xxx,%r1 */
2790 { 0x20200000, 0xffe00000 },
2791 /* be,n RR'xxx(%sr4,%r1) */
2792 { 0xe0202002, 0xffe02002 },
2793 { 0, 0 }
2794};
2795
2796static struct insn_pattern hppa_long_branch_pic_stub[] = {
2797 /* b,l .+8, %r1 */
2798 { 0xe8200000, 0xffe00000 },
2799 /* addil LR'xxx - ($PIC_pcrel$0 - 4), %r1 */
2800 { 0x28200000, 0xffe00000 },
2801 /* be,n RR'xxxx - ($PIC_pcrel$0 - 8)(%sr4, %r1) */
2802 { 0xe0202002, 0xffe02002 },
2803 { 0, 0 }
2804};
2805
2806static struct insn_pattern hppa_import_stub[] = {
2807 /* addil LR'xxx, %dp */
2808 { 0x2b600000, 0xffe00000 },
2809 /* ldw RR'xxx(%r1), %r21 */
2810 { 0x48350000, 0xffffb000 },
2811 /* bv %r0(%r21) */
2812 { 0xeaa0c000, 0xffffffff },
2813 /* ldw RR'xxx+4(%r1), %r19 */
2814 { 0x48330000, 0xffffb000 },
2815 { 0, 0 }
2816};
2817
2818static struct insn_pattern hppa_import_pic_stub[] = {
2819 /* addil LR'xxx,%r19 */
2820 { 0x2a600000, 0xffe00000 },
2821 /* ldw RR'xxx(%r1),%r21 */
2822 { 0x48350000, 0xffffb000 },
2823 /* bv %r0(%r21) */
2824 { 0xeaa0c000, 0xffffffff },
2825 /* ldw RR'xxx+4(%r1),%r19 */
2826 { 0x48330000, 0xffffb000 },
2827 { 0, 0 },
2828};
2829
2830static struct insn_pattern hppa_plt_stub[] = {
2831 /* b,l 1b, %r20 - 1b is 3 insns before here */
2832 { 0xea9f1fdd, 0xffffffff },
2833 /* depi 0,31,2,%r20 */
2834 { 0xd6801c1e, 0xffffffff },
2835 { 0, 0 }
34f55018
MK
2836};
2837
2838/* Maximum number of instructions on the patterns above. */
2839#define HPPA_MAX_INSN_PATTERN_LEN 4
2840
2841/* Return non-zero if the instructions at PC match the series
2842 described in PATTERN, or zero otherwise. PATTERN is an array of
2843 'struct insn_pattern' objects, terminated by an entry whose mask is
2844 zero.
2845
2846 When the match is successful, fill INSN[i] with what PATTERN[i]
2847 matched. */
2848
2849static int
e17a4113
UW
2850hppa_match_insns (struct gdbarch *gdbarch, CORE_ADDR pc,
2851 struct insn_pattern *pattern, unsigned int *insn)
34f55018 2852{
e17a4113 2853 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
34f55018
MK
2854 CORE_ADDR npc = pc;
2855 int i;
2856
2857 for (i = 0; pattern[i].mask; i++)
2858 {
2859 gdb_byte buf[HPPA_INSN_SIZE];
2860
8defab1a 2861 target_read_memory (npc, buf, HPPA_INSN_SIZE);
e17a4113 2862 insn[i] = extract_unsigned_integer (buf, HPPA_INSN_SIZE, byte_order);
34f55018 2863 if ((insn[i] & pattern[i].mask) == pattern[i].data)
dda83cd7 2864 npc += 4;
34f55018 2865 else
dda83cd7 2866 return 0;
34f55018
MK
2867 }
2868
2869 return 1;
2870}
2871
85102364 2872/* This relaxed version of the instruction matcher allows us to match
34f55018
MK
2873 from somewhere inside the pattern, by looking backwards in the
2874 instruction scheme. */
2875
2876static int
e17a4113
UW
2877hppa_match_insns_relaxed (struct gdbarch *gdbarch, CORE_ADDR pc,
2878 struct insn_pattern *pattern, unsigned int *insn)
34f55018
MK
2879{
2880 int offset, len = 0;
2881
2882 while (pattern[len].mask)
2883 len++;
2884
2885 for (offset = 0; offset < len; offset++)
e17a4113
UW
2886 if (hppa_match_insns (gdbarch, pc - offset * HPPA_INSN_SIZE,
2887 pattern, insn))
34f55018
MK
2888 return 1;
2889
2890 return 0;
2891}
2892
2893static int
2894hppa_in_dyncall (CORE_ADDR pc)
2895{
2896 struct unwind_table_entry *u;
2897
2898 u = find_unwind_entry (hppa_symbol_address ("$$dyncall"));
2899 if (!u)
2900 return 0;
2901
2902 return (pc >= u->region_start && pc <= u->region_end);
2903}
2904
2905int
3e5d3a5a 2906hppa_in_solib_call_trampoline (struct gdbarch *gdbarch, CORE_ADDR pc)
34f55018
MK
2907{
2908 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2909 struct unwind_table_entry *u;
2910
3e5d3a5a 2911 if (in_plt_section (pc) || hppa_in_dyncall (pc))
34f55018
MK
2912 return 1;
2913
2914 /* The GNU toolchain produces linker stubs without unwind
2915 information. Since the pattern matching for linker stubs can be
2916 quite slow, so bail out if we do have an unwind entry. */
2917
2918 u = find_unwind_entry (pc);
806e23c0 2919 if (u != NULL)
34f55018
MK
2920 return 0;
2921
e17a4113
UW
2922 return
2923 (hppa_match_insns_relaxed (gdbarch, pc, hppa_import_stub, insn)
2924 || hppa_match_insns_relaxed (gdbarch, pc, hppa_import_pic_stub, insn)
2925 || hppa_match_insns_relaxed (gdbarch, pc, hppa_long_branch_stub, insn)
2926 || hppa_match_insns_relaxed (gdbarch, pc,
2927 hppa_long_branch_pic_stub, insn));
34f55018
MK
2928}
2929
2930/* This code skips several kind of "trampolines" used on PA-RISC
2931 systems: $$dyncall, import stubs and PLT stubs. */
2932
2933CORE_ADDR
52f729a7 2934hppa_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
34f55018 2935{
0dfff4cb
UW
2936 struct gdbarch *gdbarch = get_frame_arch (frame);
2937 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
2938
34f55018
MK
2939 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2940 int dp_rel;
2941
2942 /* $$dyncall handles both PLABELs and direct addresses. */
2943 if (hppa_in_dyncall (pc))
2944 {
52f729a7 2945 pc = get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 22);
34f55018
MK
2946
2947 /* PLABELs have bit 30 set; if it's a PLABEL, then dereference it. */
2948 if (pc & 0x2)
0dfff4cb 2949 pc = read_memory_typed_address (pc & ~0x3, func_ptr_type);
34f55018
MK
2950
2951 return pc;
2952 }
2953
e17a4113
UW
2954 dp_rel = hppa_match_insns (gdbarch, pc, hppa_import_stub, insn);
2955 if (dp_rel || hppa_match_insns (gdbarch, pc, hppa_import_pic_stub, insn))
34f55018
MK
2956 {
2957 /* Extract the target address from the addil/ldw sequence. */
2958 pc = hppa_extract_21 (insn[0]) + hppa_extract_14 (insn[1]);
2959
2960 if (dp_rel)
dda83cd7 2961 pc += get_frame_register_unsigned (frame, HPPA_DP_REGNUM);
34f55018 2962 else
dda83cd7 2963 pc += get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 19);
34f55018
MK
2964
2965 /* fallthrough */
2966 }
2967
3e5d3a5a 2968 if (in_plt_section (pc))
34f55018 2969 {
0dfff4cb 2970 pc = read_memory_typed_address (pc, func_ptr_type);
34f55018
MK
2971
2972 /* If the PLT slot has not yet been resolved, the target will be
dda83cd7 2973 the PLT stub. */
3e5d3a5a 2974 if (in_plt_section (pc))
34f55018
MK
2975 {
2976 /* Sanity check: are we pointing to the PLT stub? */
24b21115 2977 if (!hppa_match_insns (gdbarch, pc, hppa_plt_stub, insn))
34f55018 2978 {
5af949e3
UW
2979 warning (_("Cannot resolve PLT stub at %s."),
2980 paddress (gdbarch, pc));
34f55018
MK
2981 return 0;
2982 }
2983
2984 /* This should point to the fixup routine. */
0dfff4cb 2985 pc = read_memory_typed_address (pc + 8, func_ptr_type);
34f55018
MK
2986 }
2987 }
2988
2989 return pc;
2990}
2991\f
2992
8e8b2dba
MC
2993/* Here is a table of C type sizes on hppa with various compiles
2994 and options. I measured this on PA 9000/800 with HP-UX 11.11
2995 and these compilers:
2996
2997 /usr/ccs/bin/cc HP92453-01 A.11.01.21
2998 /opt/ansic/bin/cc HP92453-01 B.11.11.28706.GP
2999 /opt/aCC/bin/aCC B3910B A.03.45
3000 gcc gcc 3.3.2 native hppa2.0w-hp-hpux11.11
3001
3002 cc : 1 2 4 4 8 : 4 8 -- : 4 4
3003 ansic +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
3004 ansic +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
3005 ansic +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
3006 acc +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
3007 acc +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
3008 acc +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
3009 gcc : 1 2 4 4 8 : 4 8 16 : 4 4
3010
3011 Each line is:
3012
3013 compiler and options
3014 char, short, int, long, long long
3015 float, double, long double
3016 char *, void (*)()
3017
3018 So all these compilers use either ILP32 or LP64 model.
3019 TODO: gcc has more options so it needs more investigation.
3020
a2379359
MC
3021 For floating point types, see:
3022
3023 http://docs.hp.com/hpux/pdf/B3906-90006.pdf
3024 HP-UX floating-point guide, hpux 11.00
3025
8e8b2dba
MC
3026 -- chastain 2003-12-18 */
3027
e6e68f1f
JB
3028static struct gdbarch *
3029hppa_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
3030{
3031 struct gdbarch *gdbarch;
3032
3033 /* find a candidate among the list of pre-declared architectures. */
3034 arches = gdbarch_list_lookup_by_info (arches, &info);
3035 if (arches != NULL)
3036 return (arches->gdbarch);
3037
3038 /* If none found, then allocate and initialize one. */
345bd07c 3039 hppa_gdbarch_tdep *tdep = new hppa_gdbarch_tdep;
3ff7cf9e
JB
3040 gdbarch = gdbarch_alloc (&info, tdep);
3041
3042 /* Determine from the bfd_arch_info structure if we are dealing with
3043 a 32 or 64 bits architecture. If the bfd_arch_info is not available,
3044 then default to a 32bit machine. */
3045 if (info.bfd_arch_info != NULL)
3046 tdep->bytes_per_address =
3047 info.bfd_arch_info->bits_per_address / info.bfd_arch_info->bits_per_byte;
3048 else
3049 tdep->bytes_per_address = 4;
3050
d49771ef
RC
3051 tdep->find_global_pointer = hppa_find_global_pointer;
3052
3ff7cf9e
JB
3053 /* Some parts of the gdbarch vector depend on whether we are running
3054 on a 32 bits or 64 bits target. */
3055 switch (tdep->bytes_per_address)
3056 {
3057 case 4:
dda83cd7
SM
3058 set_gdbarch_num_regs (gdbarch, hppa32_num_regs);
3059 set_gdbarch_register_name (gdbarch, hppa32_register_name);
3060 set_gdbarch_register_type (gdbarch, hppa32_register_type);
38ca4e0c
MK
3061 set_gdbarch_cannot_store_register (gdbarch,
3062 hppa32_cannot_store_register);
3063 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3064 hppa32_cannot_fetch_register);
dda83cd7 3065 break;
3ff7cf9e 3066 case 8:
dda83cd7
SM
3067 set_gdbarch_num_regs (gdbarch, hppa64_num_regs);
3068 set_gdbarch_register_name (gdbarch, hppa64_register_name);
3069 set_gdbarch_register_type (gdbarch, hppa64_register_type);
3070 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, hppa64_dwarf_reg_to_regnum);
38ca4e0c
MK
3071 set_gdbarch_cannot_store_register (gdbarch,
3072 hppa64_cannot_store_register);
3073 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3074 hppa64_cannot_fetch_register);
dda83cd7 3075 break;
3ff7cf9e 3076 default:
dda83cd7
SM
3077 internal_error (__FILE__, __LINE__, _("Unsupported address size: %d"),
3078 tdep->bytes_per_address);
3ff7cf9e
JB
3079 }
3080
3ff7cf9e 3081 set_gdbarch_long_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
3ff7cf9e 3082 set_gdbarch_ptr_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
e6e68f1f 3083
8e8b2dba
MC
3084 /* The following gdbarch vector elements are the same in both ILP32
3085 and LP64, but might show differences some day. */
3086 set_gdbarch_long_long_bit (gdbarch, 64);
3087 set_gdbarch_long_double_bit (gdbarch, 128);
8da61cc4 3088 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
8e8b2dba 3089
3ff7cf9e
JB
3090 /* The following gdbarch vector elements do not depend on the address
3091 size, or in any other gdbarch element previously set. */
60383d10 3092 set_gdbarch_skip_prologue (gdbarch, hppa_skip_prologue);
c9cf6e20
MG
3093 set_gdbarch_stack_frame_destroyed_p (gdbarch,
3094 hppa_stack_frame_destroyed_p);
a2a84a72 3095 set_gdbarch_inner_than (gdbarch, core_addr_greaterthan);
eded0a31
AC
3096 set_gdbarch_sp_regnum (gdbarch, HPPA_SP_REGNUM);
3097 set_gdbarch_fp0_regnum (gdbarch, HPPA_FP0_REGNUM);
85ddcc70 3098 set_gdbarch_addr_bits_remove (gdbarch, hppa_addr_bits_remove);
60383d10 3099 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
cc72850f
MK
3100 set_gdbarch_read_pc (gdbarch, hppa_read_pc);
3101 set_gdbarch_write_pc (gdbarch, hppa_write_pc);
60383d10 3102
143985b7
AF
3103 /* Helper for function argument information. */
3104 set_gdbarch_fetch_pointer_argument (gdbarch, hppa_fetch_pointer_argument);
3105
3a3bc038
AC
3106 /* When a hardware watchpoint triggers, we'll move the inferior past
3107 it by removing all eventpoints; stepping past the instruction
3108 that caused the trigger; reinserting eventpoints; and checking
3109 whether any watched location changed. */
3110 set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
3111
5979bc46 3112 /* Inferior function call methods. */
fca7aa43 3113 switch (tdep->bytes_per_address)
5979bc46 3114 {
fca7aa43
AC
3115 case 4:
3116 set_gdbarch_push_dummy_call (gdbarch, hppa32_push_dummy_call);
3117 set_gdbarch_frame_align (gdbarch, hppa32_frame_align);
d49771ef 3118 set_gdbarch_convert_from_func_ptr_addr
dda83cd7 3119 (gdbarch, hppa32_convert_from_func_ptr_addr);
fca7aa43
AC
3120 break;
3121 case 8:
782eae8b
AC
3122 set_gdbarch_push_dummy_call (gdbarch, hppa64_push_dummy_call);
3123 set_gdbarch_frame_align (gdbarch, hppa64_frame_align);
fca7aa43 3124 break;
782eae8b 3125 default:
e2e0b3e5 3126 internal_error (__FILE__, __LINE__, _("bad switch"));
fad850b2
AC
3127 }
3128
3129 /* Struct return methods. */
fca7aa43 3130 switch (tdep->bytes_per_address)
fad850b2 3131 {
fca7aa43
AC
3132 case 4:
3133 set_gdbarch_return_value (gdbarch, hppa32_return_value);
3134 break;
3135 case 8:
782eae8b 3136 set_gdbarch_return_value (gdbarch, hppa64_return_value);
f5f907e2 3137 break;
fca7aa43 3138 default:
e2e0b3e5 3139 internal_error (__FILE__, __LINE__, _("bad switch"));
e963316f 3140 }
7f07c5b6 3141
04180708
YQ
3142 set_gdbarch_breakpoint_kind_from_pc (gdbarch, hppa_breakpoint::kind_from_pc);
3143 set_gdbarch_sw_breakpoint_from_kind (gdbarch, hppa_breakpoint::bp_from_kind);
7f07c5b6 3144 set_gdbarch_pseudo_register_read (gdbarch, hppa_pseudo_register_read);
85f4f2d8 3145
5979bc46 3146 /* Frame unwind methods. */
782eae8b 3147 set_gdbarch_unwind_pc (gdbarch, hppa_unwind_pc);
7f07c5b6 3148
50306a9d
RC
3149 /* Hook in ABI-specific overrides, if they have been registered. */
3150 gdbarch_init_osabi (info, gdbarch);
3151
7f07c5b6 3152 /* Hook in the default unwinders. */
227e86ad
JB
3153 frame_unwind_append_unwinder (gdbarch, &hppa_stub_frame_unwind);
3154 frame_unwind_append_unwinder (gdbarch, &hppa_frame_unwind);
3155 frame_unwind_append_unwinder (gdbarch, &hppa_fallback_frame_unwind);
5979bc46 3156
e6e68f1f
JB
3157 return gdbarch;
3158}
3159
3160static void
464963c9 3161hppa_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
e6e68f1f 3162{
345bd07c 3163 hppa_gdbarch_tdep *tdep = (hppa_gdbarch_tdep *) gdbarch_tdep (gdbarch);
fdd72f95
RC
3164
3165 fprintf_unfiltered (file, "bytes_per_address = %d\n",
dda83cd7 3166 tdep->bytes_per_address);
fdd72f95 3167 fprintf_unfiltered (file, "elf = %s\n", tdep->is_elf ? "yes" : "no");
e6e68f1f
JB
3168}
3169
6c265988 3170void _initialize_hppa_tdep ();
4facf7e8 3171void
6c265988 3172_initialize_hppa_tdep ()
4facf7e8 3173{
e6e68f1f 3174 gdbarch_register (bfd_arch_hppa, hppa_gdbarch_init, hppa_dump_tdep);
4facf7e8
JB
3175
3176 add_cmd ("unwind", class_maintenance, unwind_command,
1a966eab 3177 _("Print unwind table entry at given address."),
4facf7e8
JB
3178 &maintenanceprintlist);
3179
1777feb0 3180 /* Debug this files internals. */
7915a72c
AC
3181 add_setshow_boolean_cmd ("hppa", class_maintenance, &hppa_debug, _("\
3182Set whether hppa target specific debugging information should be displayed."),
3183 _("\
3184Show whether hppa target specific debugging information is displayed."), _("\
4a302917
RC
3185This flag controls whether hppa target specific debugging information is\n\
3186displayed. This information is particularly useful for debugging frame\n\
7915a72c 3187unwinding problems."),
2c5b56ce 3188 NULL,
7915a72c 3189 NULL, /* FIXME: i18n: hppa debug flag is %s. */
2c5b56ce 3190 &setdebuglist, &showdebuglist);
4facf7e8 3191}