]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - gdb/hppa-tdep.c
2004-04-17 Randolph Chung <tausq@debian.org>
[thirdparty/binutils-gdb.git] / gdb / hppa-tdep.c
CommitLineData
c906108c 1/* Target-dependent code for the HP PA architecture, for GDB.
cda5a58a
AC
2
3 Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1994, 1995,
adc11376
AC
4 1996, 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software
5 Foundation, Inc.
c906108c
SS
6
7 Contributed by the Center for Software Science at the
8 University of Utah (pa-gdb-bugs@cs.utah.edu).
9
c5aa993b 10 This file is part of GDB.
c906108c 11
c5aa993b
JM
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
c906108c 16
c5aa993b
JM
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
c906108c 21
c5aa993b
JM
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software
24 Foundation, Inc., 59 Temple Place - Suite 330,
25 Boston, MA 02111-1307, USA. */
c906108c
SS
26
27#include "defs.h"
28#include "frame.h"
29#include "bfd.h"
30#include "inferior.h"
31#include "value.h"
4e052eda 32#include "regcache.h"
e5d66720 33#include "completer.h"
d709c020 34#include "language.h"
59623e27 35#include "osabi.h"
a7ff40e7 36#include "gdb_assert.h"
65e82032 37#include "infttrace.h"
343af405 38#include "arch-utils.h"
c906108c
SS
39/* For argument passing to the inferior */
40#include "symtab.h"
04714b91 41#include "infcall.h"
fde2cceb 42#include "dis-asm.h"
26d08f08
AC
43#include "trad-frame.h"
44#include "frame-unwind.h"
45#include "frame-base.h"
c906108c 46
c906108c 47#include "gdb_stat.h"
03f2053f 48#include "gdb_wait.h"
c906108c
SS
49
50#include "gdbcore.h"
51#include "gdbcmd.h"
52#include "target.h"
53#include "symfile.h"
54#include "objfiles.h"
3ff7cf9e 55#include "hppa-tdep.h"
c906108c 56
60383d10 57/* Some local constants. */
3ff7cf9e
JB
58static const int hppa32_num_regs = 128;
59static const int hppa64_num_regs = 96;
60
7c46b9fb
RC
61/* hppa-specific object data -- unwind and solib info.
62 TODO/maybe: think about splitting this into two parts; the unwind data is
63 common to all hppa targets, but is only used in this file; we can register
64 that separately and make this static. The solib data is probably hpux-
65 specific, so we can create a separate extern objfile_data that is registered
66 by hppa-hpux-tdep.c and shared with pa64solib.c and somsolib.c. */
67const struct objfile_data *hppa_objfile_priv_data = NULL;
68
e2ac8128
JB
69/* Get at various relevent fields of an instruction word. */
70#define MASK_5 0x1f
71#define MASK_11 0x7ff
72#define MASK_14 0x3fff
73#define MASK_21 0x1fffff
74
e2ac8128
JB
75/* Define offsets into the call dummy for the _sr4export address.
76 See comments related to CALL_DUMMY for more info. */
7c46b9fb
RC
77#define SR4EXPORT_LDIL_OFFSET (HPPA_INSTRUCTION_SIZE * 12)
78#define SR4EXPORT_LDO_OFFSET (HPPA_INSTRUCTION_SIZE * 13)
e2ac8128 79
c906108c
SS
80/* To support detection of the pseudo-initial frame
81 that threads have. */
82#define THREAD_INITIAL_FRAME_SYMBOL "__pthread_exit"
83#define THREAD_INITIAL_FRAME_SYM_LEN sizeof(THREAD_INITIAL_FRAME_SYMBOL)
c5aa993b 84
e2ac8128
JB
85/* Sizes (in bytes) of the native unwind entries. */
86#define UNWIND_ENTRY_SIZE 16
87#define STUB_UNWIND_ENTRY_SIZE 8
88
89static int get_field (unsigned word, int from, int to);
90
a14ed312 91static int extract_5_load (unsigned int);
c906108c 92
a14ed312 93static unsigned extract_5R_store (unsigned int);
c906108c 94
a14ed312 95static unsigned extract_5r_store (unsigned int);
c906108c 96
a14ed312 97struct unwind_table_entry *find_unwind_entry (CORE_ADDR);
c906108c 98
a14ed312 99static int extract_17 (unsigned int);
c906108c 100
a14ed312 101static int extract_21 (unsigned);
c906108c 102
a14ed312 103static int extract_14 (unsigned);
c906108c 104
a14ed312 105static void unwind_command (char *, int);
c906108c 106
a14ed312 107static int low_sign_extend (unsigned int, unsigned int);
c906108c 108
a14ed312 109static int sign_extend (unsigned int, unsigned int);
c906108c 110
a14ed312 111static int hppa_alignof (struct type *);
c906108c 112
a14ed312 113static int prologue_inst_adjust_sp (unsigned long);
c906108c 114
a14ed312 115static int is_branch (unsigned long);
c906108c 116
a14ed312 117static int inst_saves_gr (unsigned long);
c906108c 118
a14ed312 119static int inst_saves_fr (unsigned long);
c906108c 120
a14ed312 121static int compare_unwind_entries (const void *, const void *);
c906108c 122
a14ed312 123static void read_unwind_info (struct objfile *);
c906108c 124
a14ed312
KB
125static void internalize_unwinds (struct objfile *,
126 struct unwind_table_entry *,
127 asection *, unsigned int,
128 unsigned int, CORE_ADDR);
a14ed312 129static void record_text_segment_lowaddr (bfd *, asection *, void *);
d709c020
JB
130/* FIXME: brobecker 2002-11-07: We will likely be able to make the
131 following functions static, once we hppa is partially multiarched. */
d709c020
JB
132int hppa_pc_requires_run_before_use (CORE_ADDR pc);
133int hppa_instruction_nullified (void);
c906108c 134
537987fc
AC
135/* Handle 32/64-bit struct return conventions. */
136
137static enum return_value_convention
138hppa32_return_value (struct gdbarch *gdbarch,
139 struct type *type, struct regcache *regcache,
140 void *readbuf, const void *writebuf)
141{
142 if (TYPE_CODE (type) == TYPE_CODE_FLT)
143 {
144 if (readbuf != NULL)
145 regcache_cooked_read_part (regcache, FP4_REGNUM, 0,
146 TYPE_LENGTH (type), readbuf);
147 if (writebuf != NULL)
148 regcache_cooked_write_part (regcache, FP4_REGNUM, 0,
149 TYPE_LENGTH (type), writebuf);
150 return RETURN_VALUE_REGISTER_CONVENTION;
151 }
152 if (TYPE_LENGTH (type) <= 2 * 4)
153 {
154 /* The value always lives in the right hand end of the register
155 (or register pair)? */
156 int b;
157 int reg = 28;
158 int part = TYPE_LENGTH (type) % 4;
159 /* The left hand register contains only part of the value,
160 transfer that first so that the rest can be xfered as entire
161 4-byte registers. */
162 if (part > 0)
163 {
164 if (readbuf != NULL)
165 regcache_cooked_read_part (regcache, reg, 4 - part,
166 part, readbuf);
167 if (writebuf != NULL)
168 regcache_cooked_write_part (regcache, reg, 4 - part,
169 part, writebuf);
170 reg++;
171 }
172 /* Now transfer the remaining register values. */
173 for (b = part; b < TYPE_LENGTH (type); b += 4)
174 {
175 if (readbuf != NULL)
176 regcache_cooked_read (regcache, reg, (char *) readbuf + b);
177 if (writebuf != NULL)
178 regcache_cooked_write (regcache, reg, (const char *) writebuf + b);
179 reg++;
180 }
181 return RETURN_VALUE_REGISTER_CONVENTION;
182 }
183 else
184 return RETURN_VALUE_STRUCT_CONVENTION;
185}
186
187static enum return_value_convention
188hppa64_return_value (struct gdbarch *gdbarch,
189 struct type *type, struct regcache *regcache,
190 void *readbuf, const void *writebuf)
191{
192 /* RM: Floats are returned in FR4R, doubles in FR4. Integral values
193 are in r28, padded on the left. Aggregates less that 65 bits are
194 in r28, right padded. Aggregates upto 128 bits are in r28 and
195 r29, right padded. */
449e1137
AC
196 if (TYPE_CODE (type) == TYPE_CODE_FLT
197 && TYPE_LENGTH (type) <= 8)
537987fc
AC
198 {
199 /* Floats are right aligned? */
200 int offset = register_size (gdbarch, FP4_REGNUM) - TYPE_LENGTH (type);
201 if (readbuf != NULL)
202 regcache_cooked_read_part (regcache, FP4_REGNUM, offset,
203 TYPE_LENGTH (type), readbuf);
204 if (writebuf != NULL)
205 regcache_cooked_write_part (regcache, FP4_REGNUM, offset,
206 TYPE_LENGTH (type), writebuf);
207 return RETURN_VALUE_REGISTER_CONVENTION;
208 }
209 else if (TYPE_LENGTH (type) <= 8 && is_integral_type (type))
210 {
211 /* Integrals are right aligned. */
212 int offset = register_size (gdbarch, FP4_REGNUM) - TYPE_LENGTH (type);
213 if (readbuf != NULL)
214 regcache_cooked_read_part (regcache, 28, offset,
215 TYPE_LENGTH (type), readbuf);
216 if (writebuf != NULL)
217 regcache_cooked_write_part (regcache, 28, offset,
218 TYPE_LENGTH (type), writebuf);
219 return RETURN_VALUE_REGISTER_CONVENTION;
220 }
221 else if (TYPE_LENGTH (type) <= 2 * 8)
222 {
223 /* Composite values are left aligned. */
224 int b;
225 for (b = 0; b < TYPE_LENGTH (type); b += 8)
226 {
449e1137 227 int part = min (8, TYPE_LENGTH (type) - b);
537987fc 228 if (readbuf != NULL)
449e1137 229 regcache_cooked_read_part (regcache, 28 + b / 8, 0, part,
537987fc
AC
230 (char *) readbuf + b);
231 if (writebuf != NULL)
449e1137 232 regcache_cooked_write_part (regcache, 28 + b / 8, 0, part,
537987fc
AC
233 (const char *) writebuf + b);
234 }
449e1137 235 return RETURN_VALUE_REGISTER_CONVENTION;
537987fc
AC
236 }
237 else
238 return RETURN_VALUE_STRUCT_CONVENTION;
239}
240
c906108c
SS
241/* Routines to extract various sized constants out of hppa
242 instructions. */
243
244/* This assumes that no garbage lies outside of the lower bits of
245 value. */
246
247static int
fba45db2 248sign_extend (unsigned val, unsigned bits)
c906108c 249{
c5aa993b 250 return (int) (val >> (bits - 1) ? (-1 << bits) | val : val);
c906108c
SS
251}
252
253/* For many immediate values the sign bit is the low bit! */
254
255static int
fba45db2 256low_sign_extend (unsigned val, unsigned bits)
c906108c 257{
c5aa993b 258 return (int) ((val & 0x1 ? (-1 << (bits - 1)) : 0) | val >> 1);
c906108c
SS
259}
260
e2ac8128
JB
261/* Extract the bits at positions between FROM and TO, using HP's numbering
262 (MSB = 0). */
263
264static int
265get_field (unsigned word, int from, int to)
266{
267 return ((word) >> (31 - (to)) & ((1 << ((to) - (from) + 1)) - 1));
268}
269
c906108c
SS
270/* extract the immediate field from a ld{bhw}s instruction */
271
c906108c 272static int
fba45db2 273extract_5_load (unsigned word)
c906108c
SS
274{
275 return low_sign_extend (word >> 16 & MASK_5, 5);
276}
277
c906108c
SS
278/* extract the immediate field from a break instruction */
279
280static unsigned
fba45db2 281extract_5r_store (unsigned word)
c906108c
SS
282{
283 return (word & MASK_5);
284}
285
286/* extract the immediate field from a {sr}sm instruction */
287
288static unsigned
fba45db2 289extract_5R_store (unsigned word)
c906108c
SS
290{
291 return (word >> 16 & MASK_5);
292}
293
c906108c
SS
294/* extract a 14 bit immediate field */
295
296static int
fba45db2 297extract_14 (unsigned word)
c906108c
SS
298{
299 return low_sign_extend (word & MASK_14, 14);
300}
301
c906108c
SS
302/* extract a 21 bit constant */
303
304static int
fba45db2 305extract_21 (unsigned word)
c906108c
SS
306{
307 int val;
308
309 word &= MASK_21;
310 word <<= 11;
e2ac8128 311 val = get_field (word, 20, 20);
c906108c 312 val <<= 11;
e2ac8128 313 val |= get_field (word, 9, 19);
c906108c 314 val <<= 2;
e2ac8128 315 val |= get_field (word, 5, 6);
c906108c 316 val <<= 5;
e2ac8128 317 val |= get_field (word, 0, 4);
c906108c 318 val <<= 2;
e2ac8128 319 val |= get_field (word, 7, 8);
c906108c
SS
320 return sign_extend (val, 21) << 11;
321}
322
c906108c
SS
323/* extract a 17 bit constant from branch instructions, returning the
324 19 bit signed value. */
325
326static int
fba45db2 327extract_17 (unsigned word)
c906108c 328{
e2ac8128
JB
329 return sign_extend (get_field (word, 19, 28) |
330 get_field (word, 29, 29) << 10 |
331 get_field (word, 11, 15) << 11 |
c906108c
SS
332 (word & 0x1) << 16, 17) << 2;
333}
334\f
335
336/* Compare the start address for two unwind entries returning 1 if
337 the first address is larger than the second, -1 if the second is
338 larger than the first, and zero if they are equal. */
339
340static int
fba45db2 341compare_unwind_entries (const void *arg1, const void *arg2)
c906108c
SS
342{
343 const struct unwind_table_entry *a = arg1;
344 const struct unwind_table_entry *b = arg2;
345
346 if (a->region_start > b->region_start)
347 return 1;
348 else if (a->region_start < b->region_start)
349 return -1;
350 else
351 return 0;
352}
353
53a5351d
JM
354static CORE_ADDR low_text_segment_address;
355
356static void
8fef05cc 357record_text_segment_lowaddr (bfd *abfd, asection *section, void *ignored)
53a5351d 358{
bf9c25dc 359 if (((section->flags & (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
53a5351d
JM
360 == (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
361 && section->vma < low_text_segment_address)
362 low_text_segment_address = section->vma;
363}
364
c906108c 365static void
fba45db2
KB
366internalize_unwinds (struct objfile *objfile, struct unwind_table_entry *table,
367 asection *section, unsigned int entries, unsigned int size,
368 CORE_ADDR text_offset)
c906108c
SS
369{
370 /* We will read the unwind entries into temporary memory, then
371 fill in the actual unwind table. */
372 if (size > 0)
373 {
374 unsigned long tmp;
375 unsigned i;
376 char *buf = alloca (size);
377
53a5351d
JM
378 low_text_segment_address = -1;
379
380 /* If addresses are 64 bits wide, then unwinds are supposed to
c2c6d25f
JM
381 be segment relative offsets instead of absolute addresses.
382
383 Note that when loading a shared library (text_offset != 0) the
384 unwinds are already relative to the text_offset that will be
385 passed in. */
386 if (TARGET_PTR_BIT == 64 && text_offset == 0)
53a5351d
JM
387 {
388 bfd_map_over_sections (objfile->obfd,
4efb68b1 389 record_text_segment_lowaddr, NULL);
53a5351d
JM
390
391 /* ?!? Mask off some low bits. Should this instead subtract
392 out the lowest section's filepos or something like that?
393 This looks very hokey to me. */
394 low_text_segment_address &= ~0xfff;
395 text_offset += low_text_segment_address;
396 }
397
c906108c
SS
398 bfd_get_section_contents (objfile->obfd, section, buf, 0, size);
399
400 /* Now internalize the information being careful to handle host/target
c5aa993b 401 endian issues. */
c906108c
SS
402 for (i = 0; i < entries; i++)
403 {
404 table[i].region_start = bfd_get_32 (objfile->obfd,
c5aa993b 405 (bfd_byte *) buf);
c906108c
SS
406 table[i].region_start += text_offset;
407 buf += 4;
c5aa993b 408 table[i].region_end = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
409 table[i].region_end += text_offset;
410 buf += 4;
c5aa993b 411 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
412 buf += 4;
413 table[i].Cannot_unwind = (tmp >> 31) & 0x1;
414 table[i].Millicode = (tmp >> 30) & 0x1;
415 table[i].Millicode_save_sr0 = (tmp >> 29) & 0x1;
416 table[i].Region_description = (tmp >> 27) & 0x3;
417 table[i].reserved1 = (tmp >> 26) & 0x1;
418 table[i].Entry_SR = (tmp >> 25) & 0x1;
419 table[i].Entry_FR = (tmp >> 21) & 0xf;
420 table[i].Entry_GR = (tmp >> 16) & 0x1f;
421 table[i].Args_stored = (tmp >> 15) & 0x1;
422 table[i].Variable_Frame = (tmp >> 14) & 0x1;
423 table[i].Separate_Package_Body = (tmp >> 13) & 0x1;
424 table[i].Frame_Extension_Millicode = (tmp >> 12) & 0x1;
425 table[i].Stack_Overflow_Check = (tmp >> 11) & 0x1;
426 table[i].Two_Instruction_SP_Increment = (tmp >> 10) & 0x1;
427 table[i].Ada_Region = (tmp >> 9) & 0x1;
428 table[i].cxx_info = (tmp >> 8) & 0x1;
429 table[i].cxx_try_catch = (tmp >> 7) & 0x1;
430 table[i].sched_entry_seq = (tmp >> 6) & 0x1;
431 table[i].reserved2 = (tmp >> 5) & 0x1;
432 table[i].Save_SP = (tmp >> 4) & 0x1;
433 table[i].Save_RP = (tmp >> 3) & 0x1;
434 table[i].Save_MRP_in_frame = (tmp >> 2) & 0x1;
435 table[i].extn_ptr_defined = (tmp >> 1) & 0x1;
436 table[i].Cleanup_defined = tmp & 0x1;
c5aa993b 437 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
438 buf += 4;
439 table[i].MPE_XL_interrupt_marker = (tmp >> 31) & 0x1;
440 table[i].HP_UX_interrupt_marker = (tmp >> 30) & 0x1;
441 table[i].Large_frame = (tmp >> 29) & 0x1;
442 table[i].Pseudo_SP_Set = (tmp >> 28) & 0x1;
443 table[i].reserved4 = (tmp >> 27) & 0x1;
444 table[i].Total_frame_size = tmp & 0x7ffffff;
445
c5aa993b 446 /* Stub unwinds are handled elsewhere. */
c906108c
SS
447 table[i].stub_unwind.stub_type = 0;
448 table[i].stub_unwind.padding = 0;
449 }
450 }
451}
452
453/* Read in the backtrace information stored in the `$UNWIND_START$' section of
454 the object file. This info is used mainly by find_unwind_entry() to find
455 out the stack frame size and frame pointer used by procedures. We put
456 everything on the psymbol obstack in the objfile so that it automatically
457 gets freed when the objfile is destroyed. */
458
459static void
fba45db2 460read_unwind_info (struct objfile *objfile)
c906108c 461{
d4f3574e
SS
462 asection *unwind_sec, *stub_unwind_sec;
463 unsigned unwind_size, stub_unwind_size, total_size;
464 unsigned index, unwind_entries;
c906108c
SS
465 unsigned stub_entries, total_entries;
466 CORE_ADDR text_offset;
7c46b9fb
RC
467 struct hppa_unwind_info *ui;
468 struct hppa_objfile_private *obj_private;
c906108c
SS
469
470 text_offset = ANOFFSET (objfile->section_offsets, 0);
7c46b9fb
RC
471 ui = (struct hppa_unwind_info *) obstack_alloc (&objfile->objfile_obstack,
472 sizeof (struct hppa_unwind_info));
c906108c
SS
473
474 ui->table = NULL;
475 ui->cache = NULL;
476 ui->last = -1;
477
d4f3574e
SS
478 /* For reasons unknown the HP PA64 tools generate multiple unwinder
479 sections in a single executable. So we just iterate over every
480 section in the BFD looking for unwinder sections intead of trying
481 to do a lookup with bfd_get_section_by_name.
c906108c 482
d4f3574e
SS
483 First determine the total size of the unwind tables so that we
484 can allocate memory in a nice big hunk. */
485 total_entries = 0;
486 for (unwind_sec = objfile->obfd->sections;
487 unwind_sec;
488 unwind_sec = unwind_sec->next)
c906108c 489 {
d4f3574e
SS
490 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
491 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
492 {
493 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
494 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
c906108c 495
d4f3574e
SS
496 total_entries += unwind_entries;
497 }
c906108c
SS
498 }
499
d4f3574e
SS
500 /* Now compute the size of the stub unwinds. Note the ELF tools do not
501 use stub unwinds at the curren time. */
502 stub_unwind_sec = bfd_get_section_by_name (objfile->obfd, "$UNWIND_END$");
503
c906108c
SS
504 if (stub_unwind_sec)
505 {
506 stub_unwind_size = bfd_section_size (objfile->obfd, stub_unwind_sec);
507 stub_entries = stub_unwind_size / STUB_UNWIND_ENTRY_SIZE;
508 }
509 else
510 {
511 stub_unwind_size = 0;
512 stub_entries = 0;
513 }
514
515 /* Compute total number of unwind entries and their total size. */
d4f3574e 516 total_entries += stub_entries;
c906108c
SS
517 total_size = total_entries * sizeof (struct unwind_table_entry);
518
519 /* Allocate memory for the unwind table. */
520 ui->table = (struct unwind_table_entry *)
8b92e4d5 521 obstack_alloc (&objfile->objfile_obstack, total_size);
c5aa993b 522 ui->last = total_entries - 1;
c906108c 523
d4f3574e
SS
524 /* Now read in each unwind section and internalize the standard unwind
525 entries. */
c906108c 526 index = 0;
d4f3574e
SS
527 for (unwind_sec = objfile->obfd->sections;
528 unwind_sec;
529 unwind_sec = unwind_sec->next)
530 {
531 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
532 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
533 {
534 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
535 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
536
537 internalize_unwinds (objfile, &ui->table[index], unwind_sec,
538 unwind_entries, unwind_size, text_offset);
539 index += unwind_entries;
540 }
541 }
542
543 /* Now read in and internalize the stub unwind entries. */
c906108c
SS
544 if (stub_unwind_size > 0)
545 {
546 unsigned int i;
547 char *buf = alloca (stub_unwind_size);
548
549 /* Read in the stub unwind entries. */
550 bfd_get_section_contents (objfile->obfd, stub_unwind_sec, buf,
551 0, stub_unwind_size);
552
553 /* Now convert them into regular unwind entries. */
554 for (i = 0; i < stub_entries; i++, index++)
555 {
556 /* Clear out the next unwind entry. */
557 memset (&ui->table[index], 0, sizeof (struct unwind_table_entry));
558
559 /* Convert offset & size into region_start and region_end.
560 Stuff away the stub type into "reserved" fields. */
561 ui->table[index].region_start = bfd_get_32 (objfile->obfd,
562 (bfd_byte *) buf);
563 ui->table[index].region_start += text_offset;
564 buf += 4;
565 ui->table[index].stub_unwind.stub_type = bfd_get_8 (objfile->obfd,
c5aa993b 566 (bfd_byte *) buf);
c906108c
SS
567 buf += 2;
568 ui->table[index].region_end
c5aa993b
JM
569 = ui->table[index].region_start + 4 *
570 (bfd_get_16 (objfile->obfd, (bfd_byte *) buf) - 1);
c906108c
SS
571 buf += 2;
572 }
573
574 }
575
576 /* Unwind table needs to be kept sorted. */
577 qsort (ui->table, total_entries, sizeof (struct unwind_table_entry),
578 compare_unwind_entries);
579
580 /* Keep a pointer to the unwind information. */
7c46b9fb
RC
581 obj_private = (struct hppa_objfile_private *)
582 objfile_data (objfile, hppa_objfile_priv_data);
583 if (obj_private == NULL)
c906108c 584 {
7c46b9fb
RC
585 obj_private = (struct hppa_objfile_private *)
586 obstack_alloc (&objfile->objfile_obstack,
587 sizeof (struct hppa_objfile_private));
588 set_objfile_data (objfile, hppa_objfile_priv_data, obj_private);
c906108c 589 obj_private->unwind_info = NULL;
c5aa993b 590 obj_private->so_info = NULL;
53a5351d 591 obj_private->dp = 0;
c906108c 592 }
c906108c
SS
593 obj_private->unwind_info = ui;
594}
595
596/* Lookup the unwind (stack backtrace) info for the given PC. We search all
597 of the objfiles seeking the unwind table entry for this PC. Each objfile
598 contains a sorted list of struct unwind_table_entry. Since we do a binary
599 search of the unwind tables, we depend upon them to be sorted. */
600
601struct unwind_table_entry *
fba45db2 602find_unwind_entry (CORE_ADDR pc)
c906108c
SS
603{
604 int first, middle, last;
605 struct objfile *objfile;
7c46b9fb 606 struct hppa_objfile_private *priv;
c906108c
SS
607
608 /* A function at address 0? Not in HP-UX! */
609 if (pc == (CORE_ADDR) 0)
610 return NULL;
611
612 ALL_OBJFILES (objfile)
c5aa993b 613 {
7c46b9fb 614 struct hppa_unwind_info *ui;
c5aa993b 615 ui = NULL;
7c46b9fb
RC
616 priv = objfile_data (objfile, hppa_objfile_priv_data);
617 if (priv)
618 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c906108c 619
c5aa993b
JM
620 if (!ui)
621 {
622 read_unwind_info (objfile);
7c46b9fb
RC
623 priv = objfile_data (objfile, hppa_objfile_priv_data);
624 if (priv == NULL)
104c1213 625 error ("Internal error reading unwind information.");
7c46b9fb 626 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c5aa993b 627 }
c906108c 628
c5aa993b 629 /* First, check the cache */
c906108c 630
c5aa993b
JM
631 if (ui->cache
632 && pc >= ui->cache->region_start
633 && pc <= ui->cache->region_end)
634 return ui->cache;
c906108c 635
c5aa993b 636 /* Not in the cache, do a binary search */
c906108c 637
c5aa993b
JM
638 first = 0;
639 last = ui->last;
c906108c 640
c5aa993b
JM
641 while (first <= last)
642 {
643 middle = (first + last) / 2;
644 if (pc >= ui->table[middle].region_start
645 && pc <= ui->table[middle].region_end)
646 {
647 ui->cache = &ui->table[middle];
648 return &ui->table[middle];
649 }
c906108c 650
c5aa993b
JM
651 if (pc < ui->table[middle].region_start)
652 last = middle - 1;
653 else
654 first = middle + 1;
655 }
656 } /* ALL_OBJFILES() */
c906108c
SS
657 return NULL;
658}
659
85f4f2d8 660static const unsigned char *
aaab4dba
AC
661hppa_breakpoint_from_pc (CORE_ADDR *pc, int *len)
662{
56132691 663 static const unsigned char breakpoint[] = {0x00, 0x01, 0x00, 0x04};
aaab4dba
AC
664 (*len) = sizeof (breakpoint);
665 return breakpoint;
666}
667
e23457df
AC
668/* Return the name of a register. */
669
670const char *
3ff7cf9e 671hppa32_register_name (int i)
e23457df
AC
672{
673 static char *names[] = {
674 "flags", "r1", "rp", "r3",
675 "r4", "r5", "r6", "r7",
676 "r8", "r9", "r10", "r11",
677 "r12", "r13", "r14", "r15",
678 "r16", "r17", "r18", "r19",
679 "r20", "r21", "r22", "r23",
680 "r24", "r25", "r26", "dp",
681 "ret0", "ret1", "sp", "r31",
682 "sar", "pcoqh", "pcsqh", "pcoqt",
683 "pcsqt", "eiem", "iir", "isr",
684 "ior", "ipsw", "goto", "sr4",
685 "sr0", "sr1", "sr2", "sr3",
686 "sr5", "sr6", "sr7", "cr0",
687 "cr8", "cr9", "ccr", "cr12",
688 "cr13", "cr24", "cr25", "cr26",
689 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
690 "fpsr", "fpe1", "fpe2", "fpe3",
691 "fpe4", "fpe5", "fpe6", "fpe7",
692 "fr4", "fr4R", "fr5", "fr5R",
693 "fr6", "fr6R", "fr7", "fr7R",
694 "fr8", "fr8R", "fr9", "fr9R",
695 "fr10", "fr10R", "fr11", "fr11R",
696 "fr12", "fr12R", "fr13", "fr13R",
697 "fr14", "fr14R", "fr15", "fr15R",
698 "fr16", "fr16R", "fr17", "fr17R",
699 "fr18", "fr18R", "fr19", "fr19R",
700 "fr20", "fr20R", "fr21", "fr21R",
701 "fr22", "fr22R", "fr23", "fr23R",
702 "fr24", "fr24R", "fr25", "fr25R",
703 "fr26", "fr26R", "fr27", "fr27R",
704 "fr28", "fr28R", "fr29", "fr29R",
705 "fr30", "fr30R", "fr31", "fr31R"
706 };
707 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
708 return NULL;
709 else
710 return names[i];
711}
712
713const char *
714hppa64_register_name (int i)
715{
716 static char *names[] = {
717 "flags", "r1", "rp", "r3",
718 "r4", "r5", "r6", "r7",
719 "r8", "r9", "r10", "r11",
720 "r12", "r13", "r14", "r15",
721 "r16", "r17", "r18", "r19",
722 "r20", "r21", "r22", "r23",
723 "r24", "r25", "r26", "dp",
724 "ret0", "ret1", "sp", "r31",
725 "sar", "pcoqh", "pcsqh", "pcoqt",
726 "pcsqt", "eiem", "iir", "isr",
727 "ior", "ipsw", "goto", "sr4",
728 "sr0", "sr1", "sr2", "sr3",
729 "sr5", "sr6", "sr7", "cr0",
730 "cr8", "cr9", "ccr", "cr12",
731 "cr13", "cr24", "cr25", "cr26",
732 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
733 "fpsr", "fpe1", "fpe2", "fpe3",
734 "fr4", "fr5", "fr6", "fr7",
735 "fr8", "fr9", "fr10", "fr11",
736 "fr12", "fr13", "fr14", "fr15",
737 "fr16", "fr17", "fr18", "fr19",
738 "fr20", "fr21", "fr22", "fr23",
739 "fr24", "fr25", "fr26", "fr27",
740 "fr28", "fr29", "fr30", "fr31"
741 };
742 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
743 return NULL;
744 else
745 return names[i];
746}
747
79508e1e
AC
748/* This function pushes a stack frame with arguments as part of the
749 inferior function calling mechanism.
750
751 This is the version of the function for the 32-bit PA machines, in
752 which later arguments appear at lower addresses. (The stack always
753 grows towards higher addresses.)
754
755 We simply allocate the appropriate amount of stack space and put
756 arguments into their proper slots. */
757
758CORE_ADDR
759hppa32_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
760 struct regcache *regcache, CORE_ADDR bp_addr,
761 int nargs, struct value **args, CORE_ADDR sp,
762 int struct_return, CORE_ADDR struct_addr)
763{
764 /* NOTE: cagney/2004-02-27: This is a guess - its implemented by
765 reverse engineering testsuite failures. */
766
767 /* Stack base address at which any pass-by-reference parameters are
768 stored. */
769 CORE_ADDR struct_end = 0;
770 /* Stack base address at which the first parameter is stored. */
771 CORE_ADDR param_end = 0;
772
773 /* The inner most end of the stack after all the parameters have
774 been pushed. */
775 CORE_ADDR new_sp = 0;
776
777 /* Two passes. First pass computes the location of everything,
778 second pass writes the bytes out. */
779 int write_pass;
780 for (write_pass = 0; write_pass < 2; write_pass++)
781 {
1797a8f6
AC
782 CORE_ADDR struct_ptr = 0;
783 CORE_ADDR param_ptr = 0;
79508e1e
AC
784 int reg = 27; /* NOTE: Registers go down. */
785 int i;
786 for (i = 0; i < nargs; i++)
787 {
788 struct value *arg = args[i];
789 struct type *type = check_typedef (VALUE_TYPE (arg));
790 /* The corresponding parameter that is pushed onto the
791 stack, and [possibly] passed in a register. */
792 char param_val[8];
793 int param_len;
794 memset (param_val, 0, sizeof param_val);
795 if (TYPE_LENGTH (type) > 8)
796 {
797 /* Large parameter, pass by reference. Store the value
798 in "struct" area and then pass its address. */
799 param_len = 4;
1797a8f6 800 struct_ptr += align_up (TYPE_LENGTH (type), 8);
79508e1e 801 if (write_pass)
1797a8f6 802 write_memory (struct_end - struct_ptr, VALUE_CONTENTS (arg),
79508e1e 803 TYPE_LENGTH (type));
1797a8f6 804 store_unsigned_integer (param_val, 4, struct_end - struct_ptr);
79508e1e
AC
805 }
806 else if (TYPE_CODE (type) == TYPE_CODE_INT
807 || TYPE_CODE (type) == TYPE_CODE_ENUM)
808 {
809 /* Integer value store, right aligned. "unpack_long"
810 takes care of any sign-extension problems. */
811 param_len = align_up (TYPE_LENGTH (type), 4);
812 store_unsigned_integer (param_val, param_len,
813 unpack_long (type,
814 VALUE_CONTENTS (arg)));
815 }
816 else
817 {
818 /* Small struct value, store right aligned? */
819 param_len = align_up (TYPE_LENGTH (type), 4);
820 memcpy (param_val + param_len - TYPE_LENGTH (type),
821 VALUE_CONTENTS (arg), TYPE_LENGTH (type));
822 }
1797a8f6 823 param_ptr += param_len;
79508e1e
AC
824 reg -= param_len / 4;
825 if (write_pass)
826 {
1797a8f6 827 write_memory (param_end - param_ptr, param_val, param_len);
79508e1e
AC
828 if (reg >= 23)
829 {
830 regcache_cooked_write (regcache, reg, param_val);
831 if (param_len > 4)
832 regcache_cooked_write (regcache, reg + 1, param_val + 4);
833 }
834 }
835 }
836
837 /* Update the various stack pointers. */
838 if (!write_pass)
839 {
840 struct_end = sp + struct_ptr;
841 /* PARAM_PTR already accounts for all the arguments passed
842 by the user. However, the ABI mandates minimum stack
843 space allocations for outgoing arguments. The ABI also
844 mandates minimum stack alignments which we must
845 preserve. */
d0bd2d18 846 param_end = struct_end + max (align_up (param_ptr, 8), 16);
79508e1e
AC
847 }
848 }
849
850 /* If a structure has to be returned, set up register 28 to hold its
851 address */
852 if (struct_return)
853 write_register (28, struct_addr);
854
855 /* Set the return address. */
856 regcache_cooked_write_unsigned (regcache, RP_REGNUM, bp_addr);
857
c4557624
JB
858 /* Update the Stack Pointer. */
859 regcache_cooked_write_unsigned (regcache, SP_REGNUM, param_end + 32);
860
79508e1e
AC
861 /* The stack will have 32 bytes of additional space for a frame marker. */
862 return param_end + 32;
863}
864
2f690297
AC
865/* This function pushes a stack frame with arguments as part of the
866 inferior function calling mechanism.
867
868 This is the version for the PA64, in which later arguments appear
869 at higher addresses. (The stack always grows towards higher
870 addresses.)
871
872 We simply allocate the appropriate amount of stack space and put
873 arguments into their proper slots.
874
875 This ABI also requires that the caller provide an argument pointer
876 to the callee, so we do that too. */
877
878CORE_ADDR
879hppa64_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
880 struct regcache *regcache, CORE_ADDR bp_addr,
881 int nargs, struct value **args, CORE_ADDR sp,
882 int struct_return, CORE_ADDR struct_addr)
883{
449e1137
AC
884 /* NOTE: cagney/2004-02-27: This is a guess - its implemented by
885 reverse engineering testsuite failures. */
2f690297 886
449e1137
AC
887 /* Stack base address at which any pass-by-reference parameters are
888 stored. */
889 CORE_ADDR struct_end = 0;
890 /* Stack base address at which the first parameter is stored. */
891 CORE_ADDR param_end = 0;
2f690297 892
449e1137
AC
893 /* The inner most end of the stack after all the parameters have
894 been pushed. */
895 CORE_ADDR new_sp = 0;
2f690297 896
449e1137
AC
897 /* Two passes. First pass computes the location of everything,
898 second pass writes the bytes out. */
899 int write_pass;
900 for (write_pass = 0; write_pass < 2; write_pass++)
2f690297 901 {
449e1137
AC
902 CORE_ADDR struct_ptr = 0;
903 CORE_ADDR param_ptr = 0;
904 int i;
905 for (i = 0; i < nargs; i++)
2f690297 906 {
449e1137
AC
907 struct value *arg = args[i];
908 struct type *type = check_typedef (VALUE_TYPE (arg));
909 if ((TYPE_CODE (type) == TYPE_CODE_INT
910 || TYPE_CODE (type) == TYPE_CODE_ENUM)
911 && TYPE_LENGTH (type) <= 8)
912 {
913 /* Integer value store, right aligned. "unpack_long"
914 takes care of any sign-extension problems. */
915 param_ptr += 8;
916 if (write_pass)
917 {
918 ULONGEST val = unpack_long (type, VALUE_CONTENTS (arg));
919 int reg = 27 - param_ptr / 8;
920 write_memory_unsigned_integer (param_end - param_ptr,
921 val, 8);
922 if (reg >= 19)
923 regcache_cooked_write_unsigned (regcache, reg, val);
924 }
925 }
926 else
927 {
928 /* Small struct value, store left aligned? */
929 int reg;
930 if (TYPE_LENGTH (type) > 8)
931 {
932 param_ptr = align_up (param_ptr, 16);
933 reg = 26 - param_ptr / 8;
934 param_ptr += align_up (TYPE_LENGTH (type), 16);
935 }
936 else
937 {
938 param_ptr = align_up (param_ptr, 8);
939 reg = 26 - param_ptr / 8;
940 param_ptr += align_up (TYPE_LENGTH (type), 8);
941 }
942 if (write_pass)
943 {
944 int byte;
945 write_memory (param_end - param_ptr, VALUE_CONTENTS (arg),
946 TYPE_LENGTH (type));
947 for (byte = 0; byte < TYPE_LENGTH (type); byte += 8)
948 {
949 if (reg >= 19)
950 {
951 int len = min (8, TYPE_LENGTH (type) - byte);
952 regcache_cooked_write_part (regcache, reg, 0, len,
953 VALUE_CONTENTS (arg) + byte);
954 }
955 reg--;
956 }
957 }
958 }
2f690297 959 }
449e1137
AC
960 /* Update the various stack pointers. */
961 if (!write_pass)
2f690297 962 {
449e1137
AC
963 struct_end = sp + struct_ptr;
964 /* PARAM_PTR already accounts for all the arguments passed
965 by the user. However, the ABI mandates minimum stack
966 space allocations for outgoing arguments. The ABI also
967 mandates minimum stack alignments which we must
968 preserve. */
d0bd2d18 969 param_end = struct_end + max (align_up (param_ptr, 16), 64);
2f690297 970 }
2f690297
AC
971 }
972
2f690297
AC
973 /* If a structure has to be returned, set up register 28 to hold its
974 address */
975 if (struct_return)
976 write_register (28, struct_addr);
977
2f690297
AC
978 /* Set the return address. */
979 regcache_cooked_write_unsigned (regcache, RP_REGNUM, bp_addr);
980
c4557624
JB
981 /* Update the Stack Pointer. */
982 regcache_cooked_write_unsigned (regcache, SP_REGNUM, param_end + 64);
983
449e1137
AC
984 /* The stack will have 32 bytes of additional space for a frame marker. */
985 return param_end + 64;
2f690297
AC
986}
987
1797a8f6
AC
988static CORE_ADDR
989hppa32_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
990{
991 /* HP frames are 64-byte (or cache line) aligned (yes that's _byte_
992 and not _bit_)! */
993 return align_up (addr, 64);
994}
995
2f690297
AC
996/* Force all frames to 16-byte alignment. Better safe than sorry. */
997
998static CORE_ADDR
1797a8f6 999hppa64_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2f690297
AC
1000{
1001 /* Just always 16-byte align. */
1002 return align_up (addr, 16);
1003}
1004
1005
c906108c
SS
1006/* Get the PC from %r31 if currently in a syscall. Also mask out privilege
1007 bits. */
1008
8d153463 1009static CORE_ADDR
60383d10 1010hppa_target_read_pc (ptid_t ptid)
c906108c 1011{
39f77062 1012 int flags = read_register_pid (FLAGS_REGNUM, ptid);
c906108c
SS
1013
1014 /* The following test does not belong here. It is OS-specific, and belongs
1015 in native code. */
1016 /* Test SS_INSYSCALL */
1017 if (flags & 2)
39f77062 1018 return read_register_pid (31, ptid) & ~0x3;
c906108c 1019
449e1137 1020 return read_register_pid (PCOQ_HEAD_REGNUM, ptid) & ~0x3;
c906108c
SS
1021}
1022
1023/* Write out the PC. If currently in a syscall, then also write the new
1024 PC value into %r31. */
1025
8d153463 1026static void
60383d10 1027hppa_target_write_pc (CORE_ADDR v, ptid_t ptid)
c906108c 1028{
39f77062 1029 int flags = read_register_pid (FLAGS_REGNUM, ptid);
c906108c
SS
1030
1031 /* The following test does not belong here. It is OS-specific, and belongs
1032 in native code. */
1033 /* If in a syscall, then set %r31. Also make sure to get the
1034 privilege bits set correctly. */
1035 /* Test SS_INSYSCALL */
1036 if (flags & 2)
39f77062 1037 write_register_pid (31, v | 0x3, ptid);
c906108c 1038
449e1137 1039 write_register_pid (PCOQ_HEAD_REGNUM, v, ptid);
adc11376 1040 write_register_pid (PCOQ_TAIL_REGNUM, v + 4, ptid);
c906108c
SS
1041}
1042
1043/* return the alignment of a type in bytes. Structures have the maximum
1044 alignment required by their fields. */
1045
1046static int
fba45db2 1047hppa_alignof (struct type *type)
c906108c
SS
1048{
1049 int max_align, align, i;
1050 CHECK_TYPEDEF (type);
1051 switch (TYPE_CODE (type))
1052 {
1053 case TYPE_CODE_PTR:
1054 case TYPE_CODE_INT:
1055 case TYPE_CODE_FLT:
1056 return TYPE_LENGTH (type);
1057 case TYPE_CODE_ARRAY:
1058 return hppa_alignof (TYPE_FIELD_TYPE (type, 0));
1059 case TYPE_CODE_STRUCT:
1060 case TYPE_CODE_UNION:
1061 max_align = 1;
1062 for (i = 0; i < TYPE_NFIELDS (type); i++)
1063 {
1064 /* Bit fields have no real alignment. */
1065 /* if (!TYPE_FIELD_BITPOS (type, i)) */
c5aa993b 1066 if (!TYPE_FIELD_BITSIZE (type, i)) /* elz: this should be bitsize */
c906108c
SS
1067 {
1068 align = hppa_alignof (TYPE_FIELD_TYPE (type, i));
1069 max_align = max (max_align, align);
1070 }
1071 }
1072 return max_align;
1073 default:
1074 return 4;
1075 }
1076}
1077
c906108c
SS
1078/* Return one if PC is in the call path of a trampoline, else return zero.
1079
1080 Note we return one for *any* call trampoline (long-call, arg-reloc), not
1081 just shared library trampolines (import, export). */
1082
8d153463 1083static int
60383d10 1084hppa_in_solib_call_trampoline (CORE_ADDR pc, char *name)
c906108c
SS
1085{
1086 struct minimal_symbol *minsym;
1087 struct unwind_table_entry *u;
1088 static CORE_ADDR dyncall = 0;
1089 static CORE_ADDR sr4export = 0;
1090
c2c6d25f
JM
1091#ifdef GDB_TARGET_IS_HPPA_20W
1092 /* PA64 has a completely different stub/trampoline scheme. Is it
1093 better? Maybe. It's certainly harder to determine with any
1094 certainty that we are in a stub because we can not refer to the
1095 unwinders to help.
1096
1097 The heuristic is simple. Try to lookup the current PC value in th
1098 minimal symbol table. If that fails, then assume we are not in a
1099 stub and return.
1100
1101 Then see if the PC value falls within the section bounds for the
1102 section containing the minimal symbol we found in the first
1103 step. If it does, then assume we are not in a stub and return.
1104
1105 Finally peek at the instructions to see if they look like a stub. */
1106 {
1107 struct minimal_symbol *minsym;
1108 asection *sec;
1109 CORE_ADDR addr;
1110 int insn, i;
1111
1112 minsym = lookup_minimal_symbol_by_pc (pc);
1113 if (! minsym)
1114 return 0;
1115
1116 sec = SYMBOL_BFD_SECTION (minsym);
1117
b98ed7be
AM
1118 if (bfd_get_section_vma (sec->owner, sec) <= pc
1119 && pc < (bfd_get_section_vma (sec->owner, sec)
1120 + bfd_section_size (sec->owner, sec)))
c2c6d25f
JM
1121 return 0;
1122
1123 /* We might be in a stub. Peek at the instructions. Stubs are 3
1124 instructions long. */
1125 insn = read_memory_integer (pc, 4);
1126
b84a8afe 1127 /* Find out where we think we are within the stub. */
c2c6d25f
JM
1128 if ((insn & 0xffffc00e) == 0x53610000)
1129 addr = pc;
1130 else if ((insn & 0xffffffff) == 0xe820d000)
1131 addr = pc - 4;
1132 else if ((insn & 0xffffc00e) == 0x537b0000)
1133 addr = pc - 8;
1134 else
1135 return 0;
1136
1137 /* Now verify each insn in the range looks like a stub instruction. */
1138 insn = read_memory_integer (addr, 4);
1139 if ((insn & 0xffffc00e) != 0x53610000)
1140 return 0;
1141
1142 /* Now verify each insn in the range looks like a stub instruction. */
1143 insn = read_memory_integer (addr + 4, 4);
1144 if ((insn & 0xffffffff) != 0xe820d000)
1145 return 0;
1146
1147 /* Now verify each insn in the range looks like a stub instruction. */
1148 insn = read_memory_integer (addr + 8, 4);
1149 if ((insn & 0xffffc00e) != 0x537b0000)
1150 return 0;
1151
1152 /* Looks like a stub. */
1153 return 1;
1154 }
1155#endif
1156
1157 /* FIXME XXX - dyncall and sr4export must be initialized whenever we get a
1158 new exec file */
c906108c
SS
1159
1160 /* First see if PC is in one of the two C-library trampolines. */
1161 if (!dyncall)
1162 {
1163 minsym = lookup_minimal_symbol ("$$dyncall", NULL, NULL);
1164 if (minsym)
1165 dyncall = SYMBOL_VALUE_ADDRESS (minsym);
1166 else
1167 dyncall = -1;
1168 }
1169
1170 if (!sr4export)
1171 {
1172 minsym = lookup_minimal_symbol ("_sr4export", NULL, NULL);
1173 if (minsym)
1174 sr4export = SYMBOL_VALUE_ADDRESS (minsym);
1175 else
1176 sr4export = -1;
1177 }
1178
1179 if (pc == dyncall || pc == sr4export)
1180 return 1;
1181
104c1213 1182 minsym = lookup_minimal_symbol_by_pc (pc);
22abf04a 1183 if (minsym && strcmp (DEPRECATED_SYMBOL_NAME (minsym), ".stub") == 0)
104c1213
JM
1184 return 1;
1185
c906108c
SS
1186 /* Get the unwind descriptor corresponding to PC, return zero
1187 if no unwind was found. */
1188 u = find_unwind_entry (pc);
1189 if (!u)
1190 return 0;
1191
1192 /* If this isn't a linker stub, then return now. */
1193 if (u->stub_unwind.stub_type == 0)
1194 return 0;
1195
1196 /* By definition a long-branch stub is a call stub. */
1197 if (u->stub_unwind.stub_type == LONG_BRANCH)
1198 return 1;
1199
1200 /* The call and return path execute the same instructions within
1201 an IMPORT stub! So an IMPORT stub is both a call and return
1202 trampoline. */
1203 if (u->stub_unwind.stub_type == IMPORT)
1204 return 1;
1205
1206 /* Parameter relocation stubs always have a call path and may have a
1207 return path. */
1208 if (u->stub_unwind.stub_type == PARAMETER_RELOCATION
1209 || u->stub_unwind.stub_type == EXPORT)
1210 {
1211 CORE_ADDR addr;
1212
1213 /* Search forward from the current PC until we hit a branch
c5aa993b 1214 or the end of the stub. */
c906108c
SS
1215 for (addr = pc; addr <= u->region_end; addr += 4)
1216 {
1217 unsigned long insn;
1218
1219 insn = read_memory_integer (addr, 4);
1220
1221 /* Does it look like a bl? If so then it's the call path, if
1222 we find a bv or be first, then we're on the return path. */
1223 if ((insn & 0xfc00e000) == 0xe8000000)
1224 return 1;
1225 else if ((insn & 0xfc00e001) == 0xe800c000
1226 || (insn & 0xfc000000) == 0xe0000000)
1227 return 0;
1228 }
1229
1230 /* Should never happen. */
104c1213
JM
1231 warning ("Unable to find branch in parameter relocation stub.\n");
1232 return 0;
c906108c
SS
1233 }
1234
1235 /* Unknown stub type. For now, just return zero. */
104c1213 1236 return 0;
c906108c
SS
1237}
1238
1239/* Return one if PC is in the return path of a trampoline, else return zero.
1240
1241 Note we return one for *any* call trampoline (long-call, arg-reloc), not
1242 just shared library trampolines (import, export). */
1243
8d153463 1244static int
60383d10 1245hppa_in_solib_return_trampoline (CORE_ADDR pc, char *name)
c906108c
SS
1246{
1247 struct unwind_table_entry *u;
1248
1249 /* Get the unwind descriptor corresponding to PC, return zero
1250 if no unwind was found. */
1251 u = find_unwind_entry (pc);
1252 if (!u)
1253 return 0;
1254
1255 /* If this isn't a linker stub or it's just a long branch stub, then
1256 return zero. */
1257 if (u->stub_unwind.stub_type == 0 || u->stub_unwind.stub_type == LONG_BRANCH)
1258 return 0;
1259
1260 /* The call and return path execute the same instructions within
1261 an IMPORT stub! So an IMPORT stub is both a call and return
1262 trampoline. */
1263 if (u->stub_unwind.stub_type == IMPORT)
1264 return 1;
1265
1266 /* Parameter relocation stubs always have a call path and may have a
1267 return path. */
1268 if (u->stub_unwind.stub_type == PARAMETER_RELOCATION
1269 || u->stub_unwind.stub_type == EXPORT)
1270 {
1271 CORE_ADDR addr;
1272
1273 /* Search forward from the current PC until we hit a branch
c5aa993b 1274 or the end of the stub. */
c906108c
SS
1275 for (addr = pc; addr <= u->region_end; addr += 4)
1276 {
1277 unsigned long insn;
1278
1279 insn = read_memory_integer (addr, 4);
1280
1281 /* Does it look like a bl? If so then it's the call path, if
1282 we find a bv or be first, then we're on the return path. */
1283 if ((insn & 0xfc00e000) == 0xe8000000)
1284 return 0;
1285 else if ((insn & 0xfc00e001) == 0xe800c000
1286 || (insn & 0xfc000000) == 0xe0000000)
1287 return 1;
1288 }
1289
1290 /* Should never happen. */
104c1213
JM
1291 warning ("Unable to find branch in parameter relocation stub.\n");
1292 return 0;
c906108c
SS
1293 }
1294
1295 /* Unknown stub type. For now, just return zero. */
104c1213 1296 return 0;
c906108c
SS
1297
1298}
1299
1300/* Figure out if PC is in a trampoline, and if so find out where
1301 the trampoline will jump to. If not in a trampoline, return zero.
1302
1303 Simple code examination probably is not a good idea since the code
1304 sequences in trampolines can also appear in user code.
1305
1306 We use unwinds and information from the minimal symbol table to
1307 determine when we're in a trampoline. This won't work for ELF
1308 (yet) since it doesn't create stub unwind entries. Whether or
1309 not ELF will create stub unwinds or normal unwinds for linker
1310 stubs is still being debated.
1311
1312 This should handle simple calls through dyncall or sr4export,
1313 long calls, argument relocation stubs, and dyncall/sr4export
1314 calling an argument relocation stub. It even handles some stubs
1315 used in dynamic executables. */
1316
8d153463 1317static CORE_ADDR
60383d10 1318hppa_skip_trampoline_code (CORE_ADDR pc)
c906108c
SS
1319{
1320 long orig_pc = pc;
1321 long prev_inst, curr_inst, loc;
1322 static CORE_ADDR dyncall = 0;
1323 static CORE_ADDR dyncall_external = 0;
1324 static CORE_ADDR sr4export = 0;
1325 struct minimal_symbol *msym;
1326 struct unwind_table_entry *u;
1327
c2c6d25f
JM
1328 /* FIXME XXX - dyncall and sr4export must be initialized whenever we get a
1329 new exec file */
c906108c
SS
1330
1331 if (!dyncall)
1332 {
1333 msym = lookup_minimal_symbol ("$$dyncall", NULL, NULL);
1334 if (msym)
1335 dyncall = SYMBOL_VALUE_ADDRESS (msym);
1336 else
1337 dyncall = -1;
1338 }
1339
1340 if (!dyncall_external)
1341 {
1342 msym = lookup_minimal_symbol ("$$dyncall_external", NULL, NULL);
1343 if (msym)
1344 dyncall_external = SYMBOL_VALUE_ADDRESS (msym);
1345 else
1346 dyncall_external = -1;
1347 }
1348
1349 if (!sr4export)
1350 {
1351 msym = lookup_minimal_symbol ("_sr4export", NULL, NULL);
1352 if (msym)
1353 sr4export = SYMBOL_VALUE_ADDRESS (msym);
1354 else
1355 sr4export = -1;
1356 }
1357
1358 /* Addresses passed to dyncall may *NOT* be the actual address
1359 of the function. So we may have to do something special. */
1360 if (pc == dyncall)
1361 {
1362 pc = (CORE_ADDR) read_register (22);
1363
1364 /* If bit 30 (counting from the left) is on, then pc is the address of
c5aa993b
JM
1365 the PLT entry for this function, not the address of the function
1366 itself. Bit 31 has meaning too, but only for MPE. */
c906108c 1367 if (pc & 0x2)
53a5351d 1368 pc = (CORE_ADDR) read_memory_integer (pc & ~0x3, TARGET_PTR_BIT / 8);
c906108c
SS
1369 }
1370 if (pc == dyncall_external)
1371 {
1372 pc = (CORE_ADDR) read_register (22);
53a5351d 1373 pc = (CORE_ADDR) read_memory_integer (pc & ~0x3, TARGET_PTR_BIT / 8);
c906108c
SS
1374 }
1375 else if (pc == sr4export)
1376 pc = (CORE_ADDR) (read_register (22));
1377
1378 /* Get the unwind descriptor corresponding to PC, return zero
1379 if no unwind was found. */
1380 u = find_unwind_entry (pc);
1381 if (!u)
1382 return 0;
1383
1384 /* If this isn't a linker stub, then return now. */
1385 /* elz: attention here! (FIXME) because of a compiler/linker
1386 error, some stubs which should have a non zero stub_unwind.stub_type
1387 have unfortunately a value of zero. So this function would return here
1388 as if we were not in a trampoline. To fix this, we go look at the partial
1389 symbol information, which reports this guy as a stub.
1390 (FIXME): Unfortunately, we are not that lucky: it turns out that the
1391 partial symbol information is also wrong sometimes. This is because
1392 when it is entered (somread.c::som_symtab_read()) it can happen that
1393 if the type of the symbol (from the som) is Entry, and the symbol is
1394 in a shared library, then it can also be a trampoline. This would
1395 be OK, except that I believe the way they decide if we are ina shared library
1396 does not work. SOOOO..., even if we have a regular function w/o trampolines
1397 its minimal symbol can be assigned type mst_solib_trampoline.
1398 Also, if we find that the symbol is a real stub, then we fix the unwind
1399 descriptor, and define the stub type to be EXPORT.
c5aa993b 1400 Hopefully this is correct most of the times. */
c906108c 1401 if (u->stub_unwind.stub_type == 0)
c5aa993b 1402 {
c906108c
SS
1403
1404/* elz: NOTE (FIXME!) once the problem with the unwind information is fixed
1405 we can delete all the code which appears between the lines */
1406/*--------------------------------------------------------------------------*/
c5aa993b 1407 msym = lookup_minimal_symbol_by_pc (pc);
c906108c 1408
c5aa993b
JM
1409 if (msym == NULL || MSYMBOL_TYPE (msym) != mst_solib_trampoline)
1410 return orig_pc == pc ? 0 : pc & ~0x3;
1411
1412 else if (msym != NULL && MSYMBOL_TYPE (msym) == mst_solib_trampoline)
1413 {
1414 struct objfile *objfile;
1415 struct minimal_symbol *msymbol;
1416 int function_found = 0;
1417
1418 /* go look if there is another minimal symbol with the same name as
1419 this one, but with type mst_text. This would happen if the msym
1420 is an actual trampoline, in which case there would be another
1421 symbol with the same name corresponding to the real function */
1422
1423 ALL_MSYMBOLS (objfile, msymbol)
1424 {
1425 if (MSYMBOL_TYPE (msymbol) == mst_text
cb137aa5 1426 && DEPRECATED_STREQ (DEPRECATED_SYMBOL_NAME (msymbol), DEPRECATED_SYMBOL_NAME (msym)))
c5aa993b
JM
1427 {
1428 function_found = 1;
1429 break;
1430 }
1431 }
1432
1433 if (function_found)
1434 /* the type of msym is correct (mst_solib_trampoline), but
1435 the unwind info is wrong, so set it to the correct value */
1436 u->stub_unwind.stub_type = EXPORT;
1437 else
1438 /* the stub type info in the unwind is correct (this is not a
1439 trampoline), but the msym type information is wrong, it
1440 should be mst_text. So we need to fix the msym, and also
1441 get out of this function */
1442 {
1443 MSYMBOL_TYPE (msym) = mst_text;
1444 return orig_pc == pc ? 0 : pc & ~0x3;
1445 }
1446 }
c906108c 1447
c906108c 1448/*--------------------------------------------------------------------------*/
c5aa993b 1449 }
c906108c
SS
1450
1451 /* It's a stub. Search for a branch and figure out where it goes.
1452 Note we have to handle multi insn branch sequences like ldil;ble.
1453 Most (all?) other branches can be determined by examining the contents
1454 of certain registers and the stack. */
1455
1456 loc = pc;
1457 curr_inst = 0;
1458 prev_inst = 0;
1459 while (1)
1460 {
1461 /* Make sure we haven't walked outside the range of this stub. */
1462 if (u != find_unwind_entry (loc))
1463 {
1464 warning ("Unable to find branch in linker stub");
1465 return orig_pc == pc ? 0 : pc & ~0x3;
1466 }
1467
1468 prev_inst = curr_inst;
1469 curr_inst = read_memory_integer (loc, 4);
1470
1471 /* Does it look like a branch external using %r1? Then it's the
c5aa993b 1472 branch from the stub to the actual function. */
c906108c
SS
1473 if ((curr_inst & 0xffe0e000) == 0xe0202000)
1474 {
1475 /* Yup. See if the previous instruction loaded
1476 a value into %r1. If so compute and return the jump address. */
1477 if ((prev_inst & 0xffe00000) == 0x20200000)
1478 return (extract_21 (prev_inst) + extract_17 (curr_inst)) & ~0x3;
1479 else
1480 {
1481 warning ("Unable to find ldil X,%%r1 before ble Y(%%sr4,%%r1).");
1482 return orig_pc == pc ? 0 : pc & ~0x3;
1483 }
1484 }
1485
1486 /* Does it look like a be 0(sr0,%r21)? OR
1487 Does it look like a be, n 0(sr0,%r21)? OR
1488 Does it look like a bve (r21)? (this is on PA2.0)
1489 Does it look like a bve, n(r21)? (this is also on PA2.0)
1490 That's the branch from an
c5aa993b 1491 import stub to an export stub.
c906108c 1492
c5aa993b
JM
1493 It is impossible to determine the target of the branch via
1494 simple examination of instructions and/or data (consider
1495 that the address in the plabel may be the address of the
1496 bind-on-reference routine in the dynamic loader).
c906108c 1497
c5aa993b 1498 So we have try an alternative approach.
c906108c 1499
c5aa993b
JM
1500 Get the name of the symbol at our current location; it should
1501 be a stub symbol with the same name as the symbol in the
1502 shared library.
c906108c 1503
c5aa993b
JM
1504 Then lookup a minimal symbol with the same name; we should
1505 get the minimal symbol for the target routine in the shared
1506 library as those take precedence of import/export stubs. */
c906108c 1507 if ((curr_inst == 0xe2a00000) ||
c5aa993b
JM
1508 (curr_inst == 0xe2a00002) ||
1509 (curr_inst == 0xeaa0d000) ||
1510 (curr_inst == 0xeaa0d002))
c906108c
SS
1511 {
1512 struct minimal_symbol *stubsym, *libsym;
1513
1514 stubsym = lookup_minimal_symbol_by_pc (loc);
1515 if (stubsym == NULL)
1516 {
ce414844 1517 warning ("Unable to find symbol for 0x%lx", loc);
c906108c
SS
1518 return orig_pc == pc ? 0 : pc & ~0x3;
1519 }
1520
22abf04a 1521 libsym = lookup_minimal_symbol (DEPRECATED_SYMBOL_NAME (stubsym), NULL, NULL);
c906108c
SS
1522 if (libsym == NULL)
1523 {
1524 warning ("Unable to find library symbol for %s\n",
22abf04a 1525 DEPRECATED_SYMBOL_NAME (stubsym));
c906108c
SS
1526 return orig_pc == pc ? 0 : pc & ~0x3;
1527 }
1528
1529 return SYMBOL_VALUE (libsym);
1530 }
1531
1532 /* Does it look like bl X,%rp or bl X,%r0? Another way to do a
c5aa993b
JM
1533 branch from the stub to the actual function. */
1534 /*elz */
c906108c
SS
1535 else if ((curr_inst & 0xffe0e000) == 0xe8400000
1536 || (curr_inst & 0xffe0e000) == 0xe8000000
c5aa993b 1537 || (curr_inst & 0xffe0e000) == 0xe800A000)
c906108c
SS
1538 return (loc + extract_17 (curr_inst) + 8) & ~0x3;
1539
1540 /* Does it look like bv (rp)? Note this depends on the
c5aa993b
JM
1541 current stack pointer being the same as the stack
1542 pointer in the stub itself! This is a branch on from the
1543 stub back to the original caller. */
1544 /*else if ((curr_inst & 0xffe0e000) == 0xe840c000) */
c906108c
SS
1545 else if ((curr_inst & 0xffe0f000) == 0xe840c000)
1546 {
1547 /* Yup. See if the previous instruction loaded
1548 rp from sp - 8. */
1549 if (prev_inst == 0x4bc23ff1)
1550 return (read_memory_integer
eded0a31 1551 (read_register (HPPA_SP_REGNUM) - 8, 4)) & ~0x3;
c906108c
SS
1552 else
1553 {
1554 warning ("Unable to find restore of %%rp before bv (%%rp).");
1555 return orig_pc == pc ? 0 : pc & ~0x3;
1556 }
1557 }
1558
1559 /* elz: added this case to capture the new instruction
1560 at the end of the return part of an export stub used by
1561 the PA2.0: BVE, n (rp) */
1562 else if ((curr_inst & 0xffe0f000) == 0xe840d000)
1563 {
c5aa993b 1564 return (read_memory_integer
eded0a31 1565 (read_register (HPPA_SP_REGNUM) - 24, TARGET_PTR_BIT / 8)) & ~0x3;
c906108c
SS
1566 }
1567
1568 /* What about be,n 0(sr0,%rp)? It's just another way we return to
c5aa993b 1569 the original caller from the stub. Used in dynamic executables. */
c906108c
SS
1570 else if (curr_inst == 0xe0400002)
1571 {
1572 /* The value we jump to is sitting in sp - 24. But that's
1573 loaded several instructions before the be instruction.
1574 I guess we could check for the previous instruction being
1575 mtsp %r1,%sr0 if we want to do sanity checking. */
c5aa993b 1576 return (read_memory_integer
eded0a31 1577 (read_register (HPPA_SP_REGNUM) - 24, TARGET_PTR_BIT / 8)) & ~0x3;
c906108c
SS
1578 }
1579
1580 /* Haven't found the branch yet, but we're still in the stub.
c5aa993b 1581 Keep looking. */
c906108c
SS
1582 loc += 4;
1583 }
1584}
1585
1586
1587/* For the given instruction (INST), return any adjustment it makes
1588 to the stack pointer or zero for no adjustment.
1589
1590 This only handles instructions commonly found in prologues. */
1591
1592static int
fba45db2 1593prologue_inst_adjust_sp (unsigned long inst)
c906108c
SS
1594{
1595 /* This must persist across calls. */
1596 static int save_high21;
1597
1598 /* The most common way to perform a stack adjustment ldo X(sp),sp */
1599 if ((inst & 0xffffc000) == 0x37de0000)
1600 return extract_14 (inst);
1601
1602 /* stwm X,D(sp) */
1603 if ((inst & 0xffe00000) == 0x6fc00000)
1604 return extract_14 (inst);
1605
104c1213
JM
1606 /* std,ma X,D(sp) */
1607 if ((inst & 0xffe00008) == 0x73c00008)
d4f3574e 1608 return (inst & 0x1 ? -1 << 13 : 0) | (((inst >> 4) & 0x3ff) << 3);
104c1213 1609
c906108c
SS
1610 /* addil high21,%r1; ldo low11,(%r1),%r30)
1611 save high bits in save_high21 for later use. */
1612 if ((inst & 0xffe00000) == 0x28200000)
1613 {
1614 save_high21 = extract_21 (inst);
1615 return 0;
1616 }
1617
1618 if ((inst & 0xffff0000) == 0x343e0000)
1619 return save_high21 + extract_14 (inst);
1620
1621 /* fstws as used by the HP compilers. */
1622 if ((inst & 0xffffffe0) == 0x2fd01220)
1623 return extract_5_load (inst);
1624
1625 /* No adjustment. */
1626 return 0;
1627}
1628
1629/* Return nonzero if INST is a branch of some kind, else return zero. */
1630
1631static int
fba45db2 1632is_branch (unsigned long inst)
c906108c
SS
1633{
1634 switch (inst >> 26)
1635 {
1636 case 0x20:
1637 case 0x21:
1638 case 0x22:
1639 case 0x23:
7be570e7 1640 case 0x27:
c906108c
SS
1641 case 0x28:
1642 case 0x29:
1643 case 0x2a:
1644 case 0x2b:
7be570e7 1645 case 0x2f:
c906108c
SS
1646 case 0x30:
1647 case 0x31:
1648 case 0x32:
1649 case 0x33:
1650 case 0x38:
1651 case 0x39:
1652 case 0x3a:
7be570e7 1653 case 0x3b:
c906108c
SS
1654 return 1;
1655
1656 default:
1657 return 0;
1658 }
1659}
1660
1661/* Return the register number for a GR which is saved by INST or
1662 zero it INST does not save a GR. */
1663
1664static int
fba45db2 1665inst_saves_gr (unsigned long inst)
c906108c
SS
1666{
1667 /* Does it look like a stw? */
7be570e7
JM
1668 if ((inst >> 26) == 0x1a || (inst >> 26) == 0x1b
1669 || (inst >> 26) == 0x1f
1670 || ((inst >> 26) == 0x1f
1671 && ((inst >> 6) == 0xa)))
1672 return extract_5R_store (inst);
1673
1674 /* Does it look like a std? */
1675 if ((inst >> 26) == 0x1c
1676 || ((inst >> 26) == 0x03
1677 && ((inst >> 6) & 0xf) == 0xb))
c906108c
SS
1678 return extract_5R_store (inst);
1679
1680 /* Does it look like a stwm? GCC & HPC may use this in prologues. */
1681 if ((inst >> 26) == 0x1b)
1682 return extract_5R_store (inst);
1683
1684 /* Does it look like sth or stb? HPC versions 9.0 and later use these
1685 too. */
7be570e7
JM
1686 if ((inst >> 26) == 0x19 || (inst >> 26) == 0x18
1687 || ((inst >> 26) == 0x3
1688 && (((inst >> 6) & 0xf) == 0x8
1689 || (inst >> 6) & 0xf) == 0x9))
c906108c 1690 return extract_5R_store (inst);
c5aa993b 1691
c906108c
SS
1692 return 0;
1693}
1694
1695/* Return the register number for a FR which is saved by INST or
1696 zero it INST does not save a FR.
1697
1698 Note we only care about full 64bit register stores (that's the only
1699 kind of stores the prologue will use).
1700
1701 FIXME: What about argument stores with the HP compiler in ANSI mode? */
1702
1703static int
fba45db2 1704inst_saves_fr (unsigned long inst)
c906108c 1705{
7be570e7 1706 /* is this an FSTD ? */
c906108c
SS
1707 if ((inst & 0xfc00dfc0) == 0x2c001200)
1708 return extract_5r_store (inst);
7be570e7
JM
1709 if ((inst & 0xfc000002) == 0x70000002)
1710 return extract_5R_store (inst);
1711 /* is this an FSTW ? */
c906108c
SS
1712 if ((inst & 0xfc00df80) == 0x24001200)
1713 return extract_5r_store (inst);
7be570e7
JM
1714 if ((inst & 0xfc000002) == 0x7c000000)
1715 return extract_5R_store (inst);
c906108c
SS
1716 return 0;
1717}
1718
1719/* Advance PC across any function entry prologue instructions
1720 to reach some "real" code.
1721
1722 Use information in the unwind table to determine what exactly should
1723 be in the prologue. */
1724
1725
1726CORE_ADDR
fba45db2 1727skip_prologue_hard_way (CORE_ADDR pc)
c906108c
SS
1728{
1729 char buf[4];
1730 CORE_ADDR orig_pc = pc;
1731 unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp;
1732 unsigned long args_stored, status, i, restart_gr, restart_fr;
1733 struct unwind_table_entry *u;
1734
1735 restart_gr = 0;
1736 restart_fr = 0;
1737
1738restart:
1739 u = find_unwind_entry (pc);
1740 if (!u)
1741 return pc;
1742
c5aa993b 1743 /* If we are not at the beginning of a function, then return now. */
c906108c
SS
1744 if ((pc & ~0x3) != u->region_start)
1745 return pc;
1746
1747 /* This is how much of a frame adjustment we need to account for. */
1748 stack_remaining = u->Total_frame_size << 3;
1749
1750 /* Magic register saves we want to know about. */
1751 save_rp = u->Save_RP;
1752 save_sp = u->Save_SP;
1753
1754 /* An indication that args may be stored into the stack. Unfortunately
1755 the HPUX compilers tend to set this in cases where no args were
1756 stored too!. */
1757 args_stored = 1;
1758
1759 /* Turn the Entry_GR field into a bitmask. */
1760 save_gr = 0;
1761 for (i = 3; i < u->Entry_GR + 3; i++)
1762 {
1763 /* Frame pointer gets saved into a special location. */
eded0a31 1764 if (u->Save_SP && i == HPPA_FP_REGNUM)
c906108c
SS
1765 continue;
1766
1767 save_gr |= (1 << i);
1768 }
1769 save_gr &= ~restart_gr;
1770
1771 /* Turn the Entry_FR field into a bitmask too. */
1772 save_fr = 0;
1773 for (i = 12; i < u->Entry_FR + 12; i++)
1774 save_fr |= (1 << i);
1775 save_fr &= ~restart_fr;
1776
1777 /* Loop until we find everything of interest or hit a branch.
1778
1779 For unoptimized GCC code and for any HP CC code this will never ever
1780 examine any user instructions.
1781
1782 For optimzied GCC code we're faced with problems. GCC will schedule
1783 its prologue and make prologue instructions available for delay slot
1784 filling. The end result is user code gets mixed in with the prologue
1785 and a prologue instruction may be in the delay slot of the first branch
1786 or call.
1787
1788 Some unexpected things are expected with debugging optimized code, so
1789 we allow this routine to walk past user instructions in optimized
1790 GCC code. */
1791 while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0
1792 || args_stored)
1793 {
1794 unsigned int reg_num;
1795 unsigned long old_stack_remaining, old_save_gr, old_save_fr;
1796 unsigned long old_save_rp, old_save_sp, next_inst;
1797
1798 /* Save copies of all the triggers so we can compare them later
c5aa993b 1799 (only for HPC). */
c906108c
SS
1800 old_save_gr = save_gr;
1801 old_save_fr = save_fr;
1802 old_save_rp = save_rp;
1803 old_save_sp = save_sp;
1804 old_stack_remaining = stack_remaining;
1805
1806 status = target_read_memory (pc, buf, 4);
1807 inst = extract_unsigned_integer (buf, 4);
c5aa993b 1808
c906108c
SS
1809 /* Yow! */
1810 if (status != 0)
1811 return pc;
1812
1813 /* Note the interesting effects of this instruction. */
1814 stack_remaining -= prologue_inst_adjust_sp (inst);
1815
7be570e7
JM
1816 /* There are limited ways to store the return pointer into the
1817 stack. */
1818 if (inst == 0x6bc23fd9 || inst == 0x0fc212c1)
c906108c
SS
1819 save_rp = 0;
1820
104c1213 1821 /* These are the only ways we save SP into the stack. At this time
c5aa993b 1822 the HP compilers never bother to save SP into the stack. */
104c1213
JM
1823 if ((inst & 0xffffc000) == 0x6fc10000
1824 || (inst & 0xffffc00c) == 0x73c10008)
c906108c
SS
1825 save_sp = 0;
1826
6426a772
JM
1827 /* Are we loading some register with an offset from the argument
1828 pointer? */
1829 if ((inst & 0xffe00000) == 0x37a00000
1830 || (inst & 0xffffffe0) == 0x081d0240)
1831 {
1832 pc += 4;
1833 continue;
1834 }
1835
c906108c
SS
1836 /* Account for general and floating-point register saves. */
1837 reg_num = inst_saves_gr (inst);
1838 save_gr &= ~(1 << reg_num);
1839
1840 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1841 Unfortunately args_stored only tells us that some arguments
1842 where stored into the stack. Not how many or what kind!
c906108c 1843
c5aa993b
JM
1844 This is a kludge as on the HP compiler sets this bit and it
1845 never does prologue scheduling. So once we see one, skip past
1846 all of them. We have similar code for the fp arg stores below.
c906108c 1847
c5aa993b
JM
1848 FIXME. Can still die if we have a mix of GR and FR argument
1849 stores! */
6426a772 1850 if (reg_num >= (TARGET_PTR_BIT == 64 ? 19 : 23) && reg_num <= 26)
c906108c 1851 {
6426a772 1852 while (reg_num >= (TARGET_PTR_BIT == 64 ? 19 : 23) && reg_num <= 26)
c906108c
SS
1853 {
1854 pc += 4;
1855 status = target_read_memory (pc, buf, 4);
1856 inst = extract_unsigned_integer (buf, 4);
1857 if (status != 0)
1858 return pc;
1859 reg_num = inst_saves_gr (inst);
1860 }
1861 args_stored = 0;
1862 continue;
1863 }
1864
1865 reg_num = inst_saves_fr (inst);
1866 save_fr &= ~(1 << reg_num);
1867
1868 status = target_read_memory (pc + 4, buf, 4);
1869 next_inst = extract_unsigned_integer (buf, 4);
c5aa993b 1870
c906108c
SS
1871 /* Yow! */
1872 if (status != 0)
1873 return pc;
1874
1875 /* We've got to be read to handle the ldo before the fp register
c5aa993b 1876 save. */
c906108c
SS
1877 if ((inst & 0xfc000000) == 0x34000000
1878 && inst_saves_fr (next_inst) >= 4
6426a772 1879 && inst_saves_fr (next_inst) <= (TARGET_PTR_BIT == 64 ? 11 : 7))
c906108c
SS
1880 {
1881 /* So we drop into the code below in a reasonable state. */
1882 reg_num = inst_saves_fr (next_inst);
1883 pc -= 4;
1884 }
1885
1886 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1887 This is a kludge as on the HP compiler sets this bit and it
1888 never does prologue scheduling. So once we see one, skip past
1889 all of them. */
6426a772 1890 if (reg_num >= 4 && reg_num <= (TARGET_PTR_BIT == 64 ? 11 : 7))
c906108c 1891 {
6426a772 1892 while (reg_num >= 4 && reg_num <= (TARGET_PTR_BIT == 64 ? 11 : 7))
c906108c
SS
1893 {
1894 pc += 8;
1895 status = target_read_memory (pc, buf, 4);
1896 inst = extract_unsigned_integer (buf, 4);
1897 if (status != 0)
1898 return pc;
1899 if ((inst & 0xfc000000) != 0x34000000)
1900 break;
1901 status = target_read_memory (pc + 4, buf, 4);
1902 next_inst = extract_unsigned_integer (buf, 4);
1903 if (status != 0)
1904 return pc;
1905 reg_num = inst_saves_fr (next_inst);
1906 }
1907 args_stored = 0;
1908 continue;
1909 }
1910
1911 /* Quit if we hit any kind of branch. This can happen if a prologue
c5aa993b 1912 instruction is in the delay slot of the first call/branch. */
c906108c
SS
1913 if (is_branch (inst))
1914 break;
1915
1916 /* What a crock. The HP compilers set args_stored even if no
c5aa993b
JM
1917 arguments were stored into the stack (boo hiss). This could
1918 cause this code to then skip a bunch of user insns (up to the
1919 first branch).
1920
1921 To combat this we try to identify when args_stored was bogusly
1922 set and clear it. We only do this when args_stored is nonzero,
1923 all other resources are accounted for, and nothing changed on
1924 this pass. */
c906108c 1925 if (args_stored
c5aa993b 1926 && !(save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
c906108c
SS
1927 && old_save_gr == save_gr && old_save_fr == save_fr
1928 && old_save_rp == save_rp && old_save_sp == save_sp
1929 && old_stack_remaining == stack_remaining)
1930 break;
c5aa993b 1931
c906108c
SS
1932 /* Bump the PC. */
1933 pc += 4;
1934 }
1935
1936 /* We've got a tenative location for the end of the prologue. However
1937 because of limitations in the unwind descriptor mechanism we may
1938 have went too far into user code looking for the save of a register
1939 that does not exist. So, if there registers we expected to be saved
1940 but never were, mask them out and restart.
1941
1942 This should only happen in optimized code, and should be very rare. */
c5aa993b 1943 if (save_gr || (save_fr && !(restart_fr || restart_gr)))
c906108c
SS
1944 {
1945 pc = orig_pc;
1946 restart_gr = save_gr;
1947 restart_fr = save_fr;
1948 goto restart;
1949 }
1950
1951 return pc;
1952}
1953
1954
7be570e7
JM
1955/* Return the address of the PC after the last prologue instruction if
1956 we can determine it from the debug symbols. Else return zero. */
c906108c
SS
1957
1958static CORE_ADDR
fba45db2 1959after_prologue (CORE_ADDR pc)
c906108c
SS
1960{
1961 struct symtab_and_line sal;
1962 CORE_ADDR func_addr, func_end;
1963 struct symbol *f;
1964
7be570e7
JM
1965 /* If we can not find the symbol in the partial symbol table, then
1966 there is no hope we can determine the function's start address
1967 with this code. */
c906108c 1968 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
7be570e7 1969 return 0;
c906108c 1970
7be570e7 1971 /* Get the line associated with FUNC_ADDR. */
c906108c
SS
1972 sal = find_pc_line (func_addr, 0);
1973
7be570e7
JM
1974 /* There are only two cases to consider. First, the end of the source line
1975 is within the function bounds. In that case we return the end of the
1976 source line. Second is the end of the source line extends beyond the
1977 bounds of the current function. We need to use the slow code to
1978 examine instructions in that case.
c906108c 1979
7be570e7
JM
1980 Anything else is simply a bug elsewhere. Fixing it here is absolutely
1981 the wrong thing to do. In fact, it should be entirely possible for this
1982 function to always return zero since the slow instruction scanning code
1983 is supposed to *always* work. If it does not, then it is a bug. */
1984 if (sal.end < func_end)
1985 return sal.end;
c5aa993b 1986 else
7be570e7 1987 return 0;
c906108c
SS
1988}
1989
1990/* To skip prologues, I use this predicate. Returns either PC itself
1991 if the code at PC does not look like a function prologue; otherwise
1992 returns an address that (if we're lucky) follows the prologue. If
1993 LENIENT, then we must skip everything which is involved in setting
1994 up the frame (it's OK to skip more, just so long as we don't skip
1995 anything which might clobber the registers which are being saved.
1996 Currently we must not skip more on the alpha, but we might the lenient
1997 stuff some day. */
1998
8d153463 1999static CORE_ADDR
fba45db2 2000hppa_skip_prologue (CORE_ADDR pc)
c906108c 2001{
c5aa993b
JM
2002 unsigned long inst;
2003 int offset;
2004 CORE_ADDR post_prologue_pc;
2005 char buf[4];
c906108c 2006
c5aa993b
JM
2007 /* See if we can determine the end of the prologue via the symbol table.
2008 If so, then return either PC, or the PC after the prologue, whichever
2009 is greater. */
c906108c 2010
c5aa993b 2011 post_prologue_pc = after_prologue (pc);
c906108c 2012
7be570e7
JM
2013 /* If after_prologue returned a useful address, then use it. Else
2014 fall back on the instruction skipping code.
2015
2016 Some folks have claimed this causes problems because the breakpoint
2017 may be the first instruction of the prologue. If that happens, then
2018 the instruction skipping code has a bug that needs to be fixed. */
c5aa993b
JM
2019 if (post_prologue_pc != 0)
2020 return max (pc, post_prologue_pc);
c5aa993b
JM
2021 else
2022 return (skip_prologue_hard_way (pc));
c906108c
SS
2023}
2024
26d08f08
AC
2025struct hppa_frame_cache
2026{
2027 CORE_ADDR base;
2028 struct trad_frame_saved_reg *saved_regs;
2029};
2030
2031static struct hppa_frame_cache *
2032hppa_frame_cache (struct frame_info *next_frame, void **this_cache)
2033{
2034 struct hppa_frame_cache *cache;
2035 long saved_gr_mask;
2036 long saved_fr_mask;
2037 CORE_ADDR this_sp;
2038 long frame_size;
2039 struct unwind_table_entry *u;
2040 int i;
2041
2042 if ((*this_cache) != NULL)
2043 return (*this_cache);
2044 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
2045 (*this_cache) = cache;
2046 cache->saved_regs = trad_frame_alloc_saved_regs (next_frame);
2047
2048 /* Yow! */
2049 u = find_unwind_entry (frame_func_unwind (next_frame));
2050 if (!u)
52b5e991 2051 return (*this_cache);
26d08f08
AC
2052
2053 /* Turn the Entry_GR field into a bitmask. */
2054 saved_gr_mask = 0;
2055 for (i = 3; i < u->Entry_GR + 3; i++)
2056 {
2057 /* Frame pointer gets saved into a special location. */
eded0a31 2058 if (u->Save_SP && i == HPPA_FP_REGNUM)
26d08f08
AC
2059 continue;
2060
2061 saved_gr_mask |= (1 << i);
2062 }
2063
2064 /* Turn the Entry_FR field into a bitmask too. */
2065 saved_fr_mask = 0;
2066 for (i = 12; i < u->Entry_FR + 12; i++)
2067 saved_fr_mask |= (1 << i);
2068
2069 /* Loop until we find everything of interest or hit a branch.
2070
2071 For unoptimized GCC code and for any HP CC code this will never ever
2072 examine any user instructions.
2073
2074 For optimized GCC code we're faced with problems. GCC will schedule
2075 its prologue and make prologue instructions available for delay slot
2076 filling. The end result is user code gets mixed in with the prologue
2077 and a prologue instruction may be in the delay slot of the first branch
2078 or call.
2079
2080 Some unexpected things are expected with debugging optimized code, so
2081 we allow this routine to walk past user instructions in optimized
2082 GCC code. */
2083 {
2084 int final_iteration = 0;
2085 CORE_ADDR pc;
3a515653 2086 CORE_ADDR end_pc;
26d08f08
AC
2087 int looking_for_sp = u->Save_SP;
2088 int looking_for_rp = u->Save_RP;
2089 int fp_loc = -1;
3a515653 2090 end_pc = skip_prologue_using_sal (frame_func_unwind (next_frame));
26d08f08
AC
2091 if (end_pc == 0)
2092 end_pc = frame_pc_unwind (next_frame);
2093 frame_size = 0;
2094 for (pc = frame_func_unwind (next_frame);
2095 ((saved_gr_mask || saved_fr_mask
2096 || looking_for_sp || looking_for_rp
2097 || frame_size < (u->Total_frame_size << 3))
2098 && pc <= end_pc);
2099 pc += 4)
2100 {
2101 int reg;
2102 char buf4[4];
2103 long status = target_read_memory (pc, buf4, sizeof buf4);
2104 long inst = extract_unsigned_integer (buf4, sizeof buf4);
2105
2106 /* Note the interesting effects of this instruction. */
2107 frame_size += prologue_inst_adjust_sp (inst);
2108
2109 /* There are limited ways to store the return pointer into the
2110 stack. */
2111 if (inst == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
2112 {
2113 looking_for_rp = 0;
2114 cache->saved_regs[RP_REGNUM].addr = -20;
2115 }
2116 else if (inst == 0x0fc212c1) /* std rp,-0x10(sr0,sp) */
2117 {
2118 looking_for_rp = 0;
2119 cache->saved_regs[RP_REGNUM].addr = -16;
2120 }
2121
2122 /* Check to see if we saved SP into the stack. This also
2123 happens to indicate the location of the saved frame
2124 pointer. */
2125 if ((inst & 0xffffc000) == 0x6fc10000 /* stw,ma r1,N(sr0,sp) */
2126 || (inst & 0xffffc00c) == 0x73c10008) /* std,ma r1,N(sr0,sp) */
2127 {
2128 looking_for_sp = 0;
eded0a31 2129 cache->saved_regs[HPPA_FP_REGNUM].addr = 0;
26d08f08
AC
2130 }
2131
2132 /* Account for general and floating-point register saves. */
2133 reg = inst_saves_gr (inst);
2134 if (reg >= 3 && reg <= 18
eded0a31 2135 && (!u->Save_SP || reg != HPPA_FP_REGNUM))
26d08f08
AC
2136 {
2137 saved_gr_mask &= ~(1 << reg);
2138 if ((inst >> 26) == 0x1b && extract_14 (inst) >= 0)
2139 /* stwm with a positive displacement is a _post_
2140 _modify_. */
2141 cache->saved_regs[reg].addr = 0;
2142 else if ((inst & 0xfc00000c) == 0x70000008)
2143 /* A std has explicit post_modify forms. */
2144 cache->saved_regs[reg].addr = 0;
2145 else
2146 {
2147 CORE_ADDR offset;
2148
2149 if ((inst >> 26) == 0x1c)
2150 offset = (inst & 0x1 ? -1 << 13 : 0) | (((inst >> 4) & 0x3ff) << 3);
2151 else if ((inst >> 26) == 0x03)
2152 offset = low_sign_extend (inst & 0x1f, 5);
2153 else
2154 offset = extract_14 (inst);
2155
2156 /* Handle code with and without frame pointers. */
2157 if (u->Save_SP)
2158 cache->saved_regs[reg].addr = offset;
2159 else
2160 cache->saved_regs[reg].addr = (u->Total_frame_size << 3) + offset;
2161 }
2162 }
2163
2164 /* GCC handles callee saved FP regs a little differently.
2165
2166 It emits an instruction to put the value of the start of
2167 the FP store area into %r1. It then uses fstds,ma with a
2168 basereg of %r1 for the stores.
2169
2170 HP CC emits them at the current stack pointer modifying the
2171 stack pointer as it stores each register. */
2172
2173 /* ldo X(%r3),%r1 or ldo X(%r30),%r1. */
2174 if ((inst & 0xffffc000) == 0x34610000
2175 || (inst & 0xffffc000) == 0x37c10000)
2176 fp_loc = extract_14 (inst);
2177
2178 reg = inst_saves_fr (inst);
2179 if (reg >= 12 && reg <= 21)
2180 {
2181 /* Note +4 braindamage below is necessary because the FP
2182 status registers are internally 8 registers rather than
2183 the expected 4 registers. */
2184 saved_fr_mask &= ~(1 << reg);
2185 if (fp_loc == -1)
2186 {
2187 /* 1st HP CC FP register store. After this
2188 instruction we've set enough state that the GCC and
2189 HPCC code are both handled in the same manner. */
2190 cache->saved_regs[reg + FP4_REGNUM + 4].addr = 0;
2191 fp_loc = 8;
2192 }
2193 else
2194 {
eded0a31 2195 cache->saved_regs[reg + HPPA_FP0_REGNUM + 4].addr = fp_loc;
26d08f08
AC
2196 fp_loc += 8;
2197 }
2198 }
2199
2200 /* Quit if we hit any kind of branch the previous iteration. */
2201 if (final_iteration)
2202 break;
2203 /* We want to look precisely one instruction beyond the branch
2204 if we have not found everything yet. */
2205 if (is_branch (inst))
2206 final_iteration = 1;
2207 }
2208 }
2209
2210 {
2211 /* The frame base always represents the value of %sp at entry to
2212 the current function (and is thus equivalent to the "saved"
2213 stack pointer. */
eded0a31 2214 CORE_ADDR this_sp = frame_unwind_register_unsigned (next_frame, HPPA_SP_REGNUM);
26d08f08
AC
2215 /* FIXME: cagney/2004-02-22: This assumes that the frame has been
2216 created. If it hasn't everything will be out-of-wack. */
eded0a31 2217 if (u->Save_SP && trad_frame_addr_p (cache->saved_regs, HPPA_SP_REGNUM))
26d08f08
AC
2218 /* Both we're expecting the SP to be saved and the SP has been
2219 saved. The entry SP value is saved at this frame's SP
2220 address. */
2221 cache->base = read_memory_integer (this_sp, TARGET_PTR_BIT / 8);
2222 else
2223 /* The prologue has been slowly allocating stack space. Adjust
2224 the SP back. */
2225 cache->base = this_sp - frame_size;
eded0a31 2226 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
26d08f08
AC
2227 }
2228
412275d5
AC
2229 /* The PC is found in the "return register", "Millicode" uses "r31"
2230 as the return register while normal code uses "rp". */
26d08f08 2231 if (u->Millicode)
412275d5 2232 cache->saved_regs[PCOQ_HEAD_REGNUM] = cache->saved_regs[31];
26d08f08 2233 else
412275d5 2234 cache->saved_regs[PCOQ_HEAD_REGNUM] = cache->saved_regs[RP_REGNUM];
26d08f08
AC
2235
2236 {
2237 /* Convert all the offsets into addresses. */
2238 int reg;
2239 for (reg = 0; reg < NUM_REGS; reg++)
2240 {
2241 if (trad_frame_addr_p (cache->saved_regs, reg))
2242 cache->saved_regs[reg].addr += cache->base;
2243 }
2244 }
2245
2246 return (*this_cache);
2247}
2248
2249static void
2250hppa_frame_this_id (struct frame_info *next_frame, void **this_cache,
2251 struct frame_id *this_id)
2252{
2253 struct hppa_frame_cache *info = hppa_frame_cache (next_frame, this_cache);
2254 (*this_id) = frame_id_build (info->base, frame_func_unwind (next_frame));
2255}
2256
2257static void
2258hppa_frame_prev_register (struct frame_info *next_frame,
2259 void **this_cache,
2260 int regnum, int *optimizedp,
2261 enum lval_type *lvalp, CORE_ADDR *addrp,
2262 int *realnump, void *valuep)
2263{
2264 struct hppa_frame_cache *info = hppa_frame_cache (next_frame, this_cache);
412275d5
AC
2265 struct gdbarch *gdbarch = get_frame_arch (next_frame);
2266 if (regnum == PCOQ_TAIL_REGNUM)
2267 {
2268 /* The PCOQ TAIL, or NPC, needs to be computed from the unwound
2269 PC register. */
2270 *optimizedp = 0;
2271 *lvalp = not_lval;
2272 *addrp = 0;
2273 *realnump = 0;
2274 if (valuep)
2275 {
2276 int regsize = register_size (gdbarch, PCOQ_HEAD_REGNUM);
2277 CORE_ADDR pc;
2278 int optimized;
2279 enum lval_type lval;
2280 CORE_ADDR addr;
2281 int realnum;
2282 bfd_byte value[MAX_REGISTER_SIZE];
2283 trad_frame_prev_register (next_frame, info->saved_regs,
2284 PCOQ_HEAD_REGNUM, &optimized, &lval, &addr,
2285 &realnum, &value);
2286 pc = extract_unsigned_integer (&value, regsize);
2287 store_unsigned_integer (valuep, regsize, pc + 4);
2288 }
2289 }
2290 else
2291 {
2292 trad_frame_prev_register (next_frame, info->saved_regs, regnum,
2293 optimizedp, lvalp, addrp, realnump, valuep);
2294 }
26d08f08
AC
2295}
2296
2297static const struct frame_unwind hppa_frame_unwind =
2298{
2299 NORMAL_FRAME,
2300 hppa_frame_this_id,
2301 hppa_frame_prev_register
2302};
2303
2304static const struct frame_unwind *
2305hppa_frame_unwind_sniffer (struct frame_info *next_frame)
2306{
2307 return &hppa_frame_unwind;
2308}
2309
2310static CORE_ADDR
2311hppa_frame_base_address (struct frame_info *next_frame,
2312 void **this_cache)
2313{
2314 struct hppa_frame_cache *info = hppa_frame_cache (next_frame,
2315 this_cache);
2316 return info->base;
2317}
2318
2319static const struct frame_base hppa_frame_base = {
2320 &hppa_frame_unwind,
2321 hppa_frame_base_address,
2322 hppa_frame_base_address,
2323 hppa_frame_base_address
2324};
2325
2326static const struct frame_base *
2327hppa_frame_base_sniffer (struct frame_info *next_frame)
2328{
2329 return &hppa_frame_base;
2330}
2331
2332static struct frame_id
2333hppa_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
2334{
2335 return frame_id_build (frame_unwind_register_unsigned (next_frame,
eded0a31 2336 HPPA_SP_REGNUM),
26d08f08
AC
2337 frame_pc_unwind (next_frame));
2338}
2339
2340static CORE_ADDR
2341hppa_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2342{
449e1137 2343 return frame_unwind_register_signed (next_frame, PCOQ_HEAD_REGNUM) & ~3;
26d08f08
AC
2344}
2345
9a043c1d
AC
2346/* Instead of this nasty cast, add a method pvoid() that prints out a
2347 host VOID data type (remember %p isn't portable). */
2348
2349static CORE_ADDR
2350hppa_pointer_to_address_hack (void *ptr)
2351{
2352 gdb_assert (sizeof (ptr) == TYPE_LENGTH (builtin_type_void_data_ptr));
2353 return POINTER_TO_ADDRESS (builtin_type_void_data_ptr, &ptr);
2354}
2355
c906108c 2356static void
fba45db2 2357unwind_command (char *exp, int from_tty)
c906108c
SS
2358{
2359 CORE_ADDR address;
2360 struct unwind_table_entry *u;
2361
2362 /* If we have an expression, evaluate it and use it as the address. */
2363
2364 if (exp != 0 && *exp != 0)
2365 address = parse_and_eval_address (exp);
2366 else
2367 return;
2368
2369 u = find_unwind_entry (address);
2370
2371 if (!u)
2372 {
2373 printf_unfiltered ("Can't find unwind table entry for %s\n", exp);
2374 return;
2375 }
2376
ce414844 2377 printf_unfiltered ("unwind_table_entry (0x%s):\n",
9a043c1d 2378 paddr_nz (hppa_pointer_to_address_hack (u)));
c906108c
SS
2379
2380 printf_unfiltered ("\tregion_start = ");
2381 print_address (u->region_start, gdb_stdout);
2382
2383 printf_unfiltered ("\n\tregion_end = ");
2384 print_address (u->region_end, gdb_stdout);
2385
c906108c 2386#define pif(FLD) if (u->FLD) printf_unfiltered (" "#FLD);
c906108c
SS
2387
2388 printf_unfiltered ("\n\tflags =");
2389 pif (Cannot_unwind);
2390 pif (Millicode);
2391 pif (Millicode_save_sr0);
2392 pif (Entry_SR);
2393 pif (Args_stored);
2394 pif (Variable_Frame);
2395 pif (Separate_Package_Body);
2396 pif (Frame_Extension_Millicode);
2397 pif (Stack_Overflow_Check);
2398 pif (Two_Instruction_SP_Increment);
2399 pif (Ada_Region);
2400 pif (Save_SP);
2401 pif (Save_RP);
2402 pif (Save_MRP_in_frame);
2403 pif (extn_ptr_defined);
2404 pif (Cleanup_defined);
2405 pif (MPE_XL_interrupt_marker);
2406 pif (HP_UX_interrupt_marker);
2407 pif (Large_frame);
2408
2409 putchar_unfiltered ('\n');
2410
c906108c 2411#define pin(FLD) printf_unfiltered ("\t"#FLD" = 0x%x\n", u->FLD);
c906108c
SS
2412
2413 pin (Region_description);
2414 pin (Entry_FR);
2415 pin (Entry_GR);
2416 pin (Total_frame_size);
2417}
c906108c 2418
c2c6d25f 2419void
fba45db2 2420hppa_skip_permanent_breakpoint (void)
c2c6d25f
JM
2421{
2422 /* To step over a breakpoint instruction on the PA takes some
2423 fiddling with the instruction address queue.
2424
2425 When we stop at a breakpoint, the IA queue front (the instruction
2426 we're executing now) points at the breakpoint instruction, and
2427 the IA queue back (the next instruction to execute) points to
2428 whatever instruction we would execute after the breakpoint, if it
2429 were an ordinary instruction. This is the case even if the
2430 breakpoint is in the delay slot of a branch instruction.
2431
2432 Clearly, to step past the breakpoint, we need to set the queue
2433 front to the back. But what do we put in the back? What
2434 instruction comes after that one? Because of the branch delay
2435 slot, the next insn is always at the back + 4. */
2436 write_register (PCOQ_HEAD_REGNUM, read_register (PCOQ_TAIL_REGNUM));
2437 write_register (PCSQ_HEAD_REGNUM, read_register (PCSQ_TAIL_REGNUM));
2438
2439 write_register (PCOQ_TAIL_REGNUM, read_register (PCOQ_TAIL_REGNUM) + 4);
2440 /* We can leave the tail's space the same, since there's no jump. */
2441}
2442
d709c020
JB
2443int
2444hppa_pc_requires_run_before_use (CORE_ADDR pc)
2445{
2446 /* Sometimes we may pluck out a minimal symbol that has a negative address.
2447
2448 An example of this occurs when an a.out is linked against a foo.sl.
2449 The foo.sl defines a global bar(), and the a.out declares a signature
2450 for bar(). However, the a.out doesn't directly call bar(), but passes
2451 its address in another call.
2452
2453 If you have this scenario and attempt to "break bar" before running,
2454 gdb will find a minimal symbol for bar() in the a.out. But that
2455 symbol's address will be negative. What this appears to denote is
2456 an index backwards from the base of the procedure linkage table (PLT)
2457 into the data linkage table (DLT), the end of which is contiguous
2458 with the start of the PLT. This is clearly not a valid address for
2459 us to set a breakpoint on.
2460
2461 Note that one must be careful in how one checks for a negative address.
2462 0xc0000000 is a legitimate address of something in a shared text
2463 segment, for example. Since I don't know what the possible range
2464 is of these "really, truly negative" addresses that come from the
2465 minimal symbols, I'm resorting to the gross hack of checking the
2466 top byte of the address for all 1's. Sigh. */
2467
2468 return (!target_has_stack && (pc & 0xFF000000));
2469}
2470
2471int
2472hppa_instruction_nullified (void)
2473{
2474 /* brobecker 2002/11/07: Couldn't we use a ULONGEST here? It would
2475 avoid the type cast. I'm leaving it as is for now as I'm doing
2476 semi-mechanical multiarching-related changes. */
2477 const int ipsw = (int) read_register (IPSW_REGNUM);
2478 const int flags = (int) read_register (FLAGS_REGNUM);
2479
2480 return ((ipsw & 0x00200000) && !(flags & 0x2));
2481}
2482
d709c020
JB
2483/* Return the GDB type object for the "standard" data type of data
2484 in register N. */
2485
eded0a31
AC
2486static struct type *
2487hppa32_register_type (struct gdbarch *gdbarch, int reg_nr)
d709c020
JB
2488{
2489 if (reg_nr < FP4_REGNUM)
eded0a31 2490 return builtin_type_uint32;
d709c020 2491 else
eded0a31 2492 return builtin_type_ieee_single_big;
d709c020
JB
2493}
2494
3ff7cf9e
JB
2495/* Return the GDB type object for the "standard" data type of data
2496 in register N. hppa64 version. */
2497
eded0a31
AC
2498static struct type *
2499hppa64_register_type (struct gdbarch *gdbarch, int reg_nr)
3ff7cf9e
JB
2500{
2501 if (reg_nr < FP4_REGNUM)
eded0a31 2502 return builtin_type_uint64;
3ff7cf9e 2503 else
eded0a31 2504 return builtin_type_ieee_double_big;
3ff7cf9e
JB
2505}
2506
d709c020
JB
2507/* Return True if REGNUM is not a register available to the user
2508 through ptrace(). */
2509
8d153463 2510static int
d709c020
JB
2511hppa_cannot_store_register (int regnum)
2512{
2513 return (regnum == 0
2514 || regnum == PCSQ_HEAD_REGNUM
2515 || (regnum >= PCSQ_TAIL_REGNUM && regnum < IPSW_REGNUM)
2516 || (regnum > IPSW_REGNUM && regnum < FP4_REGNUM));
2517
2518}
2519
8d153463 2520static CORE_ADDR
d709c020
JB
2521hppa_smash_text_address (CORE_ADDR addr)
2522{
2523 /* The low two bits of the PC on the PA contain the privilege level.
2524 Some genius implementing a (non-GCC) compiler apparently decided
2525 this means that "addresses" in a text section therefore include a
2526 privilege level, and thus symbol tables should contain these bits.
2527 This seems like a bonehead thing to do--anyway, it seems to work
2528 for our purposes to just ignore those bits. */
2529
2530 return (addr &= ~0x3);
2531}
2532
143985b7
AF
2533/* Get the ith function argument for the current function. */
2534CORE_ADDR
2535hppa_fetch_pointer_argument (struct frame_info *frame, int argi,
2536 struct type *type)
2537{
2538 CORE_ADDR addr;
7f5f525d 2539 get_frame_register (frame, R0_REGNUM + 26 - argi, &addr);
143985b7
AF
2540 return addr;
2541}
2542
8e8b2dba
MC
2543/* Here is a table of C type sizes on hppa with various compiles
2544 and options. I measured this on PA 9000/800 with HP-UX 11.11
2545 and these compilers:
2546
2547 /usr/ccs/bin/cc HP92453-01 A.11.01.21
2548 /opt/ansic/bin/cc HP92453-01 B.11.11.28706.GP
2549 /opt/aCC/bin/aCC B3910B A.03.45
2550 gcc gcc 3.3.2 native hppa2.0w-hp-hpux11.11
2551
2552 cc : 1 2 4 4 8 : 4 8 -- : 4 4
2553 ansic +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
2554 ansic +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
2555 ansic +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
2556 acc +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
2557 acc +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
2558 acc +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
2559 gcc : 1 2 4 4 8 : 4 8 16 : 4 4
2560
2561 Each line is:
2562
2563 compiler and options
2564 char, short, int, long, long long
2565 float, double, long double
2566 char *, void (*)()
2567
2568 So all these compilers use either ILP32 or LP64 model.
2569 TODO: gcc has more options so it needs more investigation.
2570
a2379359
MC
2571 For floating point types, see:
2572
2573 http://docs.hp.com/hpux/pdf/B3906-90006.pdf
2574 HP-UX floating-point guide, hpux 11.00
2575
8e8b2dba
MC
2576 -- chastain 2003-12-18 */
2577
e6e68f1f
JB
2578static struct gdbarch *
2579hppa_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2580{
3ff7cf9e 2581 struct gdbarch_tdep *tdep;
e6e68f1f 2582 struct gdbarch *gdbarch;
59623e27
JB
2583
2584 /* Try to determine the ABI of the object we are loading. */
4be87837 2585 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
59623e27 2586 {
4be87837
DJ
2587 /* If it's a SOM file, assume it's HP/UX SOM. */
2588 if (bfd_get_flavour (info.abfd) == bfd_target_som_flavour)
2589 info.osabi = GDB_OSABI_HPUX_SOM;
59623e27 2590 }
e6e68f1f
JB
2591
2592 /* find a candidate among the list of pre-declared architectures. */
2593 arches = gdbarch_list_lookup_by_info (arches, &info);
2594 if (arches != NULL)
2595 return (arches->gdbarch);
2596
2597 /* If none found, then allocate and initialize one. */
3ff7cf9e
JB
2598 tdep = XMALLOC (struct gdbarch_tdep);
2599 gdbarch = gdbarch_alloc (&info, tdep);
2600
2601 /* Determine from the bfd_arch_info structure if we are dealing with
2602 a 32 or 64 bits architecture. If the bfd_arch_info is not available,
2603 then default to a 32bit machine. */
2604 if (info.bfd_arch_info != NULL)
2605 tdep->bytes_per_address =
2606 info.bfd_arch_info->bits_per_address / info.bfd_arch_info->bits_per_byte;
2607 else
2608 tdep->bytes_per_address = 4;
2609
2610 /* Some parts of the gdbarch vector depend on whether we are running
2611 on a 32 bits or 64 bits target. */
2612 switch (tdep->bytes_per_address)
2613 {
2614 case 4:
2615 set_gdbarch_num_regs (gdbarch, hppa32_num_regs);
2616 set_gdbarch_register_name (gdbarch, hppa32_register_name);
eded0a31 2617 set_gdbarch_register_type (gdbarch, hppa32_register_type);
3ff7cf9e
JB
2618 break;
2619 case 8:
2620 set_gdbarch_num_regs (gdbarch, hppa64_num_regs);
2621 set_gdbarch_register_name (gdbarch, hppa64_register_name);
eded0a31 2622 set_gdbarch_register_type (gdbarch, hppa64_register_type);
3ff7cf9e
JB
2623 break;
2624 default:
2625 internal_error (__FILE__, __LINE__, "Unsupported address size: %d",
2626 tdep->bytes_per_address);
2627 }
2628
3ff7cf9e 2629 set_gdbarch_long_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
3ff7cf9e 2630 set_gdbarch_ptr_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
e6e68f1f 2631
8e8b2dba
MC
2632 /* The following gdbarch vector elements are the same in both ILP32
2633 and LP64, but might show differences some day. */
2634 set_gdbarch_long_long_bit (gdbarch, 64);
2635 set_gdbarch_long_double_bit (gdbarch, 128);
a2379359 2636 set_gdbarch_long_double_format (gdbarch, &floatformat_ia64_quad_big);
8e8b2dba 2637
3ff7cf9e
JB
2638 /* The following gdbarch vector elements do not depend on the address
2639 size, or in any other gdbarch element previously set. */
60383d10
JB
2640 set_gdbarch_skip_prologue (gdbarch, hppa_skip_prologue);
2641 set_gdbarch_skip_trampoline_code (gdbarch, hppa_skip_trampoline_code);
2642 set_gdbarch_in_solib_call_trampoline (gdbarch, hppa_in_solib_call_trampoline);
2643 set_gdbarch_in_solib_return_trampoline (gdbarch,
2644 hppa_in_solib_return_trampoline);
a2a84a72 2645 set_gdbarch_inner_than (gdbarch, core_addr_greaterthan);
eded0a31
AC
2646 set_gdbarch_sp_regnum (gdbarch, HPPA_SP_REGNUM);
2647 set_gdbarch_fp0_regnum (gdbarch, HPPA_FP0_REGNUM);
60383d10 2648 set_gdbarch_cannot_store_register (gdbarch, hppa_cannot_store_register);
b6fbdd1d 2649 set_gdbarch_addr_bits_remove (gdbarch, hppa_smash_text_address);
60383d10
JB
2650 set_gdbarch_smash_text_address (gdbarch, hppa_smash_text_address);
2651 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
2652 set_gdbarch_read_pc (gdbarch, hppa_target_read_pc);
2653 set_gdbarch_write_pc (gdbarch, hppa_target_write_pc);
60383d10 2654
143985b7
AF
2655 /* Helper for function argument information. */
2656 set_gdbarch_fetch_pointer_argument (gdbarch, hppa_fetch_pointer_argument);
2657
36482093
AC
2658 set_gdbarch_print_insn (gdbarch, print_insn_hppa);
2659
3a3bc038
AC
2660 /* When a hardware watchpoint triggers, we'll move the inferior past
2661 it by removing all eventpoints; stepping past the instruction
2662 that caused the trigger; reinserting eventpoints; and checking
2663 whether any watched location changed. */
2664 set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
2665
5979bc46 2666 /* Inferior function call methods. */
fca7aa43 2667 switch (tdep->bytes_per_address)
5979bc46 2668 {
fca7aa43
AC
2669 case 4:
2670 set_gdbarch_push_dummy_call (gdbarch, hppa32_push_dummy_call);
2671 set_gdbarch_frame_align (gdbarch, hppa32_frame_align);
2672 break;
2673 case 8:
782eae8b
AC
2674 set_gdbarch_push_dummy_call (gdbarch, hppa64_push_dummy_call);
2675 set_gdbarch_frame_align (gdbarch, hppa64_frame_align);
fca7aa43 2676 break;
782eae8b
AC
2677 default:
2678 internal_error (__FILE__, __LINE__, "bad switch");
fad850b2
AC
2679 }
2680
2681 /* Struct return methods. */
fca7aa43 2682 switch (tdep->bytes_per_address)
fad850b2 2683 {
fca7aa43
AC
2684 case 4:
2685 set_gdbarch_return_value (gdbarch, hppa32_return_value);
2686 break;
2687 case 8:
782eae8b 2688 set_gdbarch_return_value (gdbarch, hppa64_return_value);
f5f907e2 2689 break;
fca7aa43
AC
2690 default:
2691 internal_error (__FILE__, __LINE__, "bad switch");
e963316f 2692 }
85f4f2d8
AC
2693
2694 set_gdbarch_breakpoint_from_pc (gdbarch, hppa_breakpoint_from_pc);
2695
5979bc46 2696 /* Frame unwind methods. */
782eae8b
AC
2697 set_gdbarch_unwind_dummy_id (gdbarch, hppa_unwind_dummy_id);
2698 set_gdbarch_unwind_pc (gdbarch, hppa_unwind_pc);
2699 frame_unwind_append_sniffer (gdbarch, hppa_frame_unwind_sniffer);
2700 frame_base_append_sniffer (gdbarch, hppa_frame_base_sniffer);
5979bc46 2701
752d4ac1
JB
2702 /* Hook in ABI-specific overrides, if they have been registered. */
2703 gdbarch_init_osabi (info, gdbarch);
2704
e6e68f1f
JB
2705 return gdbarch;
2706}
2707
2708static void
2709hppa_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
2710{
2711 /* Nothing to print for the moment. */
2712}
2713
4facf7e8
JB
2714void
2715_initialize_hppa_tdep (void)
2716{
2717 struct cmd_list_element *c;
2718 void break_at_finish_command (char *arg, int from_tty);
2719 void tbreak_at_finish_command (char *arg, int from_tty);
2720 void break_at_finish_at_depth_command (char *arg, int from_tty);
2721
e6e68f1f 2722 gdbarch_register (bfd_arch_hppa, hppa_gdbarch_init, hppa_dump_tdep);
4facf7e8 2723
7c46b9fb
RC
2724 hppa_objfile_priv_data = register_objfile_data ();
2725
4facf7e8
JB
2726 add_cmd ("unwind", class_maintenance, unwind_command,
2727 "Print unwind table entry at given address.",
2728 &maintenanceprintlist);
2729
2730 deprecate_cmd (add_com ("xbreak", class_breakpoint,
2731 break_at_finish_command,
2732 concat ("Set breakpoint at procedure exit. \n\
2733Argument may be function name, or \"*\" and an address.\n\
2734If function is specified, break at end of code for that function.\n\
2735If an address is specified, break at the end of the function that contains \n\
2736that exact address.\n",
2737 "With no arg, uses current execution address of selected stack frame.\n\
2738This is useful for breaking on return to a stack frame.\n\
2739\n\
2740Multiple breakpoints at one place are permitted, and useful if conditional.\n\
2741\n\
2742Do \"help breakpoints\" for info on other commands dealing with breakpoints.", NULL)), NULL);
2743 deprecate_cmd (add_com_alias ("xb", "xbreak", class_breakpoint, 1), NULL);
2744 deprecate_cmd (add_com_alias ("xbr", "xbreak", class_breakpoint, 1), NULL);
2745 deprecate_cmd (add_com_alias ("xbre", "xbreak", class_breakpoint, 1), NULL);
2746 deprecate_cmd (add_com_alias ("xbrea", "xbreak", class_breakpoint, 1), NULL);
2747
2748 deprecate_cmd (c = add_com ("txbreak", class_breakpoint,
2749 tbreak_at_finish_command,
2750"Set temporary breakpoint at procedure exit. Either there should\n\
2751be no argument or the argument must be a depth.\n"), NULL);
2752 set_cmd_completer (c, location_completer);
2753
2754 if (xdb_commands)
2755 deprecate_cmd (add_com ("bx", class_breakpoint,
2756 break_at_finish_at_depth_command,
2757"Set breakpoint at procedure exit. Either there should\n\
2758be no argument or the argument must be a depth.\n"), NULL);
2759}
2760