]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - gdb/hppa-tdep.c
* ppc-opc.c (powerpc_opcodes): Correct fcir. From David Edelsohn
[thirdparty/binutils-gdb.git] / gdb / hppa-tdep.c
CommitLineData
66a1aa07
SG
1/* Machine-dependent code which would otherwise be in inflow.c and core.c,
2 for GDB, the GNU debugger. This code is for the HP PA-RISC cpu.
3 Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
4
5 Contributed by the Center for Software Science at the
6 University of Utah (pa-gdb-bugs@cs.utah.edu).
7
8This file is part of GDB.
9
10This program is free software; you can redistribute it and/or modify
11it under the terms of the GNU General Public License as published by
12the Free Software Foundation; either version 2 of the License, or
13(at your option) any later version.
14
15This program is distributed in the hope that it will be useful,
16but WITHOUT ANY WARRANTY; without even the implied warranty of
17MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18GNU General Public License for more details.
19
20You should have received a copy of the GNU General Public License
21along with this program; if not, write to the Free Software
22Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
23
24#include "defs.h"
25#include "frame.h"
26#include "inferior.h"
27#include "value.h"
28
29/* For argument passing to the inferior */
30#include "symtab.h"
31
32#ifdef USG
33#include <sys/types.h>
34#endif
35
36#include <sys/param.h>
37#include <sys/dir.h>
38#include <signal.h>
39#include <sys/ioctl.h>
40
41#ifdef COFF_ENCAPSULATE
42#include "a.out.encap.h"
43#else
44#include <a.out.h>
45#endif
46#ifndef N_SET_MAGIC
47#define N_SET_MAGIC(exec, val) ((exec).a_magic = (val))
48#endif
49
50/*#include <sys/user.h> After a.out.h */
51#include <sys/file.h>
52#include <sys/stat.h>
53#include <machine/psl.h>
54#include "wait.h"
55
56#include "gdbcore.h"
57#include "gdbcmd.h"
58#include "target.h"
59#include "symfile.h"
60#include "objfiles.h"
61
62static int restore_pc_queue PARAMS ((struct frame_saved_regs *fsr));
63static int hppa_alignof PARAMS ((struct type *arg));
8fa74880 64CORE_ADDR frame_saved_pc PARAMS ((FRAME frame));
c598654a
JL
65static int prologue_inst_adjust_sp PARAMS ((unsigned long));
66static int is_branch PARAMS ((unsigned long));
67static int inst_saves_gr PARAMS ((unsigned long));
68static int inst_saves_fr PARAMS ((unsigned long));
70e43abe
JL
69static int pc_in_interrupt_handler PARAMS ((CORE_ADDR));
70static int pc_in_linker_stub PARAMS ((CORE_ADDR));
66a1aa07
SG
71
72\f
73/* Routines to extract various sized constants out of hppa
74 instructions. */
75
76/* This assumes that no garbage lies outside of the lower bits of
77 value. */
78
79int
80sign_extend (val, bits)
81 unsigned val, bits;
82{
83 return (int)(val >> bits - 1 ? (-1 << bits) | val : val);
84}
85
86/* For many immediate values the sign bit is the low bit! */
87
88int
89low_sign_extend (val, bits)
90 unsigned val, bits;
91{
92 return (int)((val & 0x1 ? (-1 << (bits - 1)) : 0) | val >> 1);
93}
94/* extract the immediate field from a ld{bhw}s instruction */
95
96unsigned
97get_field (val, from, to)
98 unsigned val, from, to;
99{
100 val = val >> 31 - to;
101 return val & ((1 << 32 - from) - 1);
102}
103
104unsigned
105set_field (val, from, to, new_val)
106 unsigned *val, from, to;
107{
108 unsigned mask = ~((1 << (to - from + 1)) << (31 - from));
109 return *val = *val & mask | (new_val << (31 - from));
110}
111
112/* extract a 3-bit space register number from a be, ble, mtsp or mfsp */
113
114extract_3 (word)
115 unsigned word;
116{
117 return GET_FIELD (word, 18, 18) << 2 | GET_FIELD (word, 16, 17);
118}
119
120extract_5_load (word)
121 unsigned word;
122{
123 return low_sign_extend (word >> 16 & MASK_5, 5);
124}
125
126/* extract the immediate field from a st{bhw}s instruction */
127
128int
129extract_5_store (word)
130 unsigned word;
131{
132 return low_sign_extend (word & MASK_5, 5);
133}
134
68c8d698
SG
135/* extract the immediate field from a break instruction */
136
137unsigned
138extract_5r_store (word)
139 unsigned word;
140{
141 return (word & MASK_5);
142}
143
144/* extract the immediate field from a {sr}sm instruction */
145
146unsigned
147extract_5R_store (word)
148 unsigned word;
149{
150 return (word >> 16 & MASK_5);
151}
152
66a1aa07
SG
153/* extract an 11 bit immediate field */
154
155int
156extract_11 (word)
157 unsigned word;
158{
159 return low_sign_extend (word & MASK_11, 11);
160}
161
162/* extract a 14 bit immediate field */
163
164int
165extract_14 (word)
166 unsigned word;
167{
168 return low_sign_extend (word & MASK_14, 14);
169}
170
171/* deposit a 14 bit constant in a word */
172
173unsigned
174deposit_14 (opnd, word)
175 int opnd;
176 unsigned word;
177{
178 unsigned sign = (opnd < 0 ? 1 : 0);
179
180 return word | ((unsigned)opnd << 1 & MASK_14) | sign;
181}
182
183/* extract a 21 bit constant */
184
185int
186extract_21 (word)
187 unsigned word;
188{
189 int val;
190
191 word &= MASK_21;
192 word <<= 11;
193 val = GET_FIELD (word, 20, 20);
194 val <<= 11;
195 val |= GET_FIELD (word, 9, 19);
196 val <<= 2;
197 val |= GET_FIELD (word, 5, 6);
198 val <<= 5;
199 val |= GET_FIELD (word, 0, 4);
200 val <<= 2;
201 val |= GET_FIELD (word, 7, 8);
202 return sign_extend (val, 21) << 11;
203}
204
205/* deposit a 21 bit constant in a word. Although 21 bit constants are
206 usually the top 21 bits of a 32 bit constant, we assume that only
207 the low 21 bits of opnd are relevant */
208
209unsigned
210deposit_21 (opnd, word)
211 unsigned opnd, word;
212{
213 unsigned val = 0;
214
215 val |= GET_FIELD (opnd, 11 + 14, 11 + 18);
216 val <<= 2;
217 val |= GET_FIELD (opnd, 11 + 12, 11 + 13);
218 val <<= 2;
219 val |= GET_FIELD (opnd, 11 + 19, 11 + 20);
220 val <<= 11;
221 val |= GET_FIELD (opnd, 11 + 1, 11 + 11);
222 val <<= 1;
223 val |= GET_FIELD (opnd, 11 + 0, 11 + 0);
224 return word | val;
225}
226
227/* extract a 12 bit constant from branch instructions */
228
229int
230extract_12 (word)
231 unsigned word;
232{
233 return sign_extend (GET_FIELD (word, 19, 28) |
234 GET_FIELD (word, 29, 29) << 10 |
235 (word & 0x1) << 11, 12) << 2;
236}
237
238/* extract a 17 bit constant from branch instructions, returning the
239 19 bit signed value. */
240
241int
242extract_17 (word)
243 unsigned word;
244{
245 return sign_extend (GET_FIELD (word, 19, 28) |
246 GET_FIELD (word, 29, 29) << 10 |
247 GET_FIELD (word, 11, 15) << 11 |
248 (word & 0x1) << 16, 17) << 2;
249}
250\f
66a1aa07
SG
251/* Lookup the unwind (stack backtrace) info for the given PC. We search all
252 of the objfiles seeking the unwind table entry for this PC. Each objfile
253 contains a sorted list of struct unwind_table_entry. Since we do a binary
254 search of the unwind tables, we depend upon them to be sorted. */
255
256static struct unwind_table_entry *
257find_unwind_entry(pc)
258 CORE_ADDR pc;
259{
260 int first, middle, last;
261 struct objfile *objfile;
262
263 ALL_OBJFILES (objfile)
264 {
265 struct obj_unwind_info *ui;
266
267 ui = OBJ_UNWIND_INFO (objfile);
268
269 if (!ui)
270 continue;
271
272 /* First, check the cache */
273
274 if (ui->cache
275 && pc >= ui->cache->region_start
276 && pc <= ui->cache->region_end)
277 return ui->cache;
278
279 /* Not in the cache, do a binary search */
280
281 first = 0;
282 last = ui->last;
283
284 while (first <= last)
285 {
286 middle = (first + last) / 2;
287 if (pc >= ui->table[middle].region_start
288 && pc <= ui->table[middle].region_end)
289 {
290 ui->cache = &ui->table[middle];
291 return &ui->table[middle];
292 }
293
294 if (pc < ui->table[middle].region_start)
295 last = middle - 1;
296 else
297 first = middle + 1;
298 }
299 } /* ALL_OBJFILES() */
300 return NULL;
301}
302
70e43abe
JL
303/* Called to determine if PC is in an interrupt handler of some
304 kind. */
305
306static int
307pc_in_interrupt_handler (pc)
308 CORE_ADDR pc;
309{
310 struct unwind_table_entry *u;
311 struct minimal_symbol *msym_us;
312
313 u = find_unwind_entry (pc);
314 if (!u)
315 return 0;
316
317 /* Oh joys. HPUX sets the interrupt bit for _sigreturn even though
318 its frame isn't a pure interrupt frame. Deal with this. */
319 msym_us = lookup_minimal_symbol_by_pc (pc);
320
321 return u->HP_UX_interrupt_marker && !IN_SIGTRAMP (pc, SYMBOL_NAME (msym_us));
322}
323
5ac7f56e
JK
324/* Called when no unwind descriptor was found for PC. Returns 1 if it
325 appears that PC is in a linker stub. */
5ac7f56e
JK
326
327static int
328pc_in_linker_stub (pc)
329 CORE_ADDR pc;
330{
5ac7f56e
JK
331 int found_magic_instruction = 0;
332 int i;
08ecd8f3
JK
333 char buf[4];
334
335 /* If unable to read memory, assume pc is not in a linker stub. */
336 if (target_read_memory (pc, buf, 4) != 0)
337 return 0;
5ac7f56e 338
d08c6f4c
JK
339 /* We are looking for something like
340
341 ; $$dyncall jams RP into this special spot in the frame (RP')
342 ; before calling the "call stub"
343 ldw -18(sp),rp
344
345 ldsid (rp),r1 ; Get space associated with RP into r1
346 mtsp r1,sp ; Move it into space register 0
347 be,n 0(sr0),rp) ; back to your regularly scheduled program
348 */
349
5ac7f56e
JK
350 /* Maximum known linker stub size is 4 instructions. Search forward
351 from the given PC, then backward. */
352 for (i = 0; i < 4; i++)
353 {
6e35b037 354 /* If we hit something with an unwind, stop searching this direction. */
5ac7f56e
JK
355
356 if (find_unwind_entry (pc + i * 4) != 0)
357 break;
358
359 /* Check for ldsid (rp),r1 which is the magic instruction for a
360 return from a cross-space function call. */
361 if (read_memory_integer (pc + i * 4, 4) == 0x004010a1)
362 {
363 found_magic_instruction = 1;
364 break;
365 }
366 /* Add code to handle long call/branch and argument relocation stubs
367 here. */
368 }
369
370 if (found_magic_instruction != 0)
371 return 1;
372
373 /* Now look backward. */
374 for (i = 0; i < 4; i++)
375 {
6e35b037 376 /* If we hit something with an unwind, stop searching this direction. */
5ac7f56e
JK
377
378 if (find_unwind_entry (pc - i * 4) != 0)
379 break;
380
381 /* Check for ldsid (rp),r1 which is the magic instruction for a
382 return from a cross-space function call. */
383 if (read_memory_integer (pc - i * 4, 4) == 0x004010a1)
384 {
385 found_magic_instruction = 1;
386 break;
387 }
388 /* Add code to handle long call/branch and argument relocation stubs
389 here. */
390 }
391 return found_magic_instruction;
392}
393
66a1aa07
SG
394static int
395find_return_regnum(pc)
396 CORE_ADDR pc;
397{
398 struct unwind_table_entry *u;
399
400 u = find_unwind_entry (pc);
401
402 if (!u)
403 return RP_REGNUM;
404
405 if (u->Millicode)
406 return 31;
407
408 return RP_REGNUM;
409}
410
5ac7f56e 411/* Return size of frame, or -1 if we should use a frame pointer. */
66a1aa07 412int
70e43abe 413find_proc_framesize (pc)
66a1aa07
SG
414 CORE_ADDR pc;
415{
416 struct unwind_table_entry *u;
70e43abe 417 struct minimal_symbol *msym_us;
66a1aa07 418
66a1aa07
SG
419 u = find_unwind_entry (pc);
420
421 if (!u)
5ac7f56e
JK
422 {
423 if (pc_in_linker_stub (pc))
424 /* Linker stubs have a zero size frame. */
425 return 0;
426 else
427 return -1;
428 }
66a1aa07 429
70e43abe
JL
430 msym_us = lookup_minimal_symbol_by_pc (pc);
431
432 /* If Save_SP is set, and we're not in an interrupt or signal caller,
433 then we have a frame pointer. Use it. */
434 if (u->Save_SP && !pc_in_interrupt_handler (pc)
435 && !IN_SIGTRAMP (pc, SYMBOL_NAME (msym_us)))
eabbe766
JK
436 return -1;
437
66a1aa07
SG
438 return u->Total_frame_size << 3;
439}
440
5ac7f56e
JK
441/* Return offset from sp at which rp is saved, or 0 if not saved. */
442static int rp_saved PARAMS ((CORE_ADDR));
443
444static int
445rp_saved (pc)
446 CORE_ADDR pc;
66a1aa07
SG
447{
448 struct unwind_table_entry *u;
449
450 u = find_unwind_entry (pc);
451
452 if (!u)
5ac7f56e
JK
453 {
454 if (pc_in_linker_stub (pc))
455 /* This is the so-called RP'. */
456 return -24;
457 else
458 return 0;
459 }
66a1aa07
SG
460
461 if (u->Save_RP)
5ac7f56e 462 return -20;
c7f3b703
JL
463 else if (u->stub_type != 0)
464 {
465 switch (u->stub_type)
466 {
467 case EXPORT:
468 return -24;
469 case PARAMETER_RELOCATION:
470 return -8;
471 default:
472 return 0;
473 }
474 }
66a1aa07
SG
475 else
476 return 0;
477}
478\f
8fa74880
SG
479int
480frameless_function_invocation (frame)
481 FRAME frame;
482{
b8ec9a79 483 struct unwind_table_entry *u;
8fa74880 484
b8ec9a79 485 u = find_unwind_entry (frame->pc);
8fa74880 486
b8ec9a79 487 if (u == 0)
7f43b9b7 488 return 0;
b8ec9a79 489
c7f3b703 490 return (u->Total_frame_size == 0 && u->stub_type == 0);
8fa74880
SG
491}
492
66a1aa07
SG
493CORE_ADDR
494saved_pc_after_call (frame)
495 FRAME frame;
496{
497 int ret_regnum;
498
499 ret_regnum = find_return_regnum (get_frame_pc (frame));
500
501 return read_register (ret_regnum) & ~0x3;
502}
503\f
504CORE_ADDR
505frame_saved_pc (frame)
506 FRAME frame;
507{
508 CORE_ADDR pc = get_frame_pc (frame);
7f43b9b7 509 struct unwind_table_entry *u;
66a1aa07 510
70e43abe
JL
511 /* BSD, HPUX & OSF1 all lay out the hardware state in the same manner
512 at the base of the frame in an interrupt handler. Registers within
513 are saved in the exact same order as GDB numbers registers. How
514 convienent. */
515 if (pc_in_interrupt_handler (pc))
516 return read_memory_integer (frame->frame + PC_REGNUM * 4, 4) & ~0x3;
517
518 /* Deal with signal handler caller frames too. */
519 if (frame->signal_handler_caller)
520 {
521 CORE_ADDR rp;
522 FRAME_SAVED_PC_IN_SIGTRAMP (frame, &rp);
523 return rp;
524 }
525
7f43b9b7 526restart:
8fa74880 527 if (frameless_function_invocation (frame))
66a1aa07
SG
528 {
529 int ret_regnum;
530
531 ret_regnum = find_return_regnum (pc);
532
70e43abe
JL
533 /* If the next frame is an interrupt frame or a signal
534 handler caller, then we need to look in the saved
535 register area to get the return pointer (the values
536 in the registers may not correspond to anything useful). */
537 if (frame->next
538 && (frame->next->signal_handler_caller
539 || pc_in_interrupt_handler (frame->next->pc)))
540 {
541 struct frame_info *fi;
542 struct frame_saved_regs saved_regs;
543
544 fi = get_frame_info (frame->next);
545 get_frame_saved_regs (fi, &saved_regs);
546 if (read_memory_integer (saved_regs.regs[FLAGS_REGNUM] & 0x2, 4))
7f43b9b7 547 pc = read_memory_integer (saved_regs.regs[31], 4) & ~0x3;
70e43abe 548 else
7f43b9b7 549 pc = read_memory_integer (saved_regs.regs[RP_REGNUM], 4) & ~0x3;
70e43abe
JL
550 }
551 else
7f43b9b7 552 pc = read_register (ret_regnum) & ~0x3;
66a1aa07 553 }
66a1aa07 554 else
5ac7f56e
JK
555 {
556 int rp_offset = rp_saved (pc);
557
70e43abe
JL
558 /* Similar to code in frameless function case. If the next
559 frame is a signal or interrupt handler, then dig the right
560 information out of the saved register info. */
561 if (rp_offset == 0
562 && frame->next
563 && (frame->next->signal_handler_caller
564 || pc_in_interrupt_handler (frame->next->pc)))
565 {
566 struct frame_info *fi;
567 struct frame_saved_regs saved_regs;
568
569 fi = get_frame_info (frame->next);
570 get_frame_saved_regs (fi, &saved_regs);
571 if (read_memory_integer (saved_regs.regs[FLAGS_REGNUM] & 0x2, 4))
7f43b9b7 572 pc = read_memory_integer (saved_regs.regs[31], 4) & ~0x3;
70e43abe 573 else
7f43b9b7 574 pc = read_memory_integer (saved_regs.regs[RP_REGNUM], 4) & ~0x3;
70e43abe
JL
575 }
576 else if (rp_offset == 0)
7f43b9b7 577 pc = read_register (RP_REGNUM) & ~0x3;
5ac7f56e 578 else
7f43b9b7 579 pc = read_memory_integer (frame->frame + rp_offset, 4) & ~0x3;
5ac7f56e 580 }
7f43b9b7
JL
581
582 /* If PC is inside a linker stub, then dig out the address the stub
583 will return to. */
584 u = find_unwind_entry (pc);
585 if (u && u->stub_type != 0)
586 goto restart;
587
588 return pc;
66a1aa07
SG
589}
590\f
591/* We need to correct the PC and the FP for the outermost frame when we are
592 in a system call. */
593
594void
595init_extra_frame_info (fromleaf, frame)
596 int fromleaf;
597 struct frame_info *frame;
598{
599 int flags;
600 int framesize;
601
192c3eeb 602 if (frame->next && !fromleaf)
66a1aa07
SG
603 return;
604
192c3eeb
JL
605 /* If the next frame represents a frameless function invocation
606 then we have to do some adjustments that are normally done by
607 FRAME_CHAIN. (FRAME_CHAIN is not called in this case.) */
608 if (fromleaf)
609 {
610 /* Find the framesize of *this* frame without peeking at the PC
611 in the current frame structure (it isn't set yet). */
612 framesize = find_proc_framesize (FRAME_SAVED_PC (get_next_frame (frame)));
613
614 /* Now adjust our base frame accordingly. If we have a frame pointer
615 use it, else subtract the size of this frame from the current
616 frame. (we always want frame->frame to point at the lowest address
617 in the frame). */
618 if (framesize == -1)
619 frame->frame = read_register (FP_REGNUM);
620 else
621 frame->frame -= framesize;
622 return;
623 }
624
66a1aa07
SG
625 flags = read_register (FLAGS_REGNUM);
626 if (flags & 2) /* In system call? */
627 frame->pc = read_register (31) & ~0x3;
628
192c3eeb
JL
629 /* The outermost frame is always derived from PC-framesize
630
631 One might think frameless innermost frames should have
632 a frame->frame that is the same as the parent's frame->frame.
633 That is wrong; frame->frame in that case should be the *high*
634 address of the parent's frame. It's complicated as hell to
635 explain, but the parent *always* creates some stack space for
636 the child. So the child actually does have a frame of some
637 sorts, and its base is the high address in its parent's frame. */
66a1aa07
SG
638 framesize = find_proc_framesize(frame->pc);
639 if (framesize == -1)
640 frame->frame = read_register (FP_REGNUM);
641 else
642 frame->frame = read_register (SP_REGNUM) - framesize;
66a1aa07
SG
643}
644\f
8966221d
JK
645/* Given a GDB frame, determine the address of the calling function's frame.
646 This will be used to create a new GDB frame struct, and then
647 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
648
649 This may involve searching through prologues for several functions
650 at boundaries where GCC calls HP C code, or where code which has
651 a frame pointer calls code without a frame pointer. */
652
653
66a1aa07
SG
654FRAME_ADDR
655frame_chain (frame)
656 struct frame_info *frame;
657{
8966221d
JK
658 int my_framesize, caller_framesize;
659 struct unwind_table_entry *u;
70e43abe
JL
660 CORE_ADDR frame_base;
661
662 /* Handle HPUX, BSD, and OSF1 style interrupt frames first. These
663 are easy; at *sp we have a full save state strucutre which we can
664 pull the old stack pointer from. Also see frame_saved_pc for
665 code to dig a saved PC out of the save state structure. */
666 if (pc_in_interrupt_handler (frame->pc))
667 frame_base = read_memory_integer (frame->frame + SP_REGNUM * 4, 4);
668 else if (frame->signal_handler_caller)
669 {
670 FRAME_BASE_BEFORE_SIGTRAMP (frame, &frame_base);
671 }
672 else
673 frame_base = frame->frame;
66a1aa07 674
8966221d
JK
675 /* Get frame sizes for the current frame and the frame of the
676 caller. */
677 my_framesize = find_proc_framesize (frame->pc);
678 caller_framesize = find_proc_framesize (FRAME_SAVED_PC(frame));
66a1aa07 679
8966221d
JK
680 /* If caller does not have a frame pointer, then its frame
681 can be found at current_frame - caller_framesize. */
682 if (caller_framesize != -1)
70e43abe 683 return frame_base - caller_framesize;
8966221d
JK
684
685 /* Both caller and callee have frame pointers and are GCC compiled
686 (SAVE_SP bit in unwind descriptor is on for both functions.
687 The previous frame pointer is found at the top of the current frame. */
688 if (caller_framesize == -1 && my_framesize == -1)
70e43abe 689 return read_memory_integer (frame_base, 4);
8966221d
JK
690
691 /* Caller has a frame pointer, but callee does not. This is a little
692 more difficult as GCC and HP C lay out locals and callee register save
693 areas very differently.
694
695 The previous frame pointer could be in a register, or in one of
696 several areas on the stack.
697
698 Walk from the current frame to the innermost frame examining
2f8c3639 699 unwind descriptors to determine if %r3 ever gets saved into the
8966221d 700 stack. If so return whatever value got saved into the stack.
2f8c3639 701 If it was never saved in the stack, then the value in %r3 is still
8966221d
JK
702 valid, so use it.
703
2f8c3639 704 We use information from unwind descriptors to determine if %r3
8966221d
JK
705 is saved into the stack (Entry_GR field has this information). */
706
707 while (frame)
708 {
709 u = find_unwind_entry (frame->pc);
710
711 if (!u)
712 {
01a03545
JK
713 /* We could find this information by examining prologues. I don't
714 think anyone has actually written any tools (not even "strip")
715 which leave them out of an executable, so maybe this is a moot
716 point. */
8966221d
JK
717 warning ("Unable to find unwind for PC 0x%x -- Help!", frame->pc);
718 return 0;
719 }
720
721 /* Entry_GR specifies the number of callee-saved general registers
2f8c3639 722 saved in the stack. It starts at %r3, so %r3 would be 1. */
70e43abe
JL
723 if (u->Entry_GR >= 1 || u->Save_SP
724 || frame->signal_handler_caller
725 || pc_in_interrupt_handler (frame->pc))
8966221d
JK
726 break;
727 else
728 frame = frame->next;
729 }
730
731 if (frame)
732 {
733 /* We may have walked down the chain into a function with a frame
734 pointer. */
70e43abe
JL
735 if (u->Save_SP
736 && !frame->signal_handler_caller
737 && !pc_in_interrupt_handler (frame->pc))
8966221d 738 return read_memory_integer (frame->frame, 4);
2f8c3639 739 /* %r3 was saved somewhere in the stack. Dig it out. */
8966221d 740 else
c598654a
JL
741 {
742 struct frame_info *fi;
743 struct frame_saved_regs saved_regs;
744
745 fi = get_frame_info (frame);
746 get_frame_saved_regs (fi, &saved_regs);
747 return read_memory_integer (saved_regs.regs[FP_REGNUM], 4);
748 }
8966221d
JK
749 }
750 else
751 {
2f8c3639 752 /* The value in %r3 was never saved into the stack (thus %r3 still
8966221d 753 holds the value of the previous frame pointer). */
2f8c3639 754 return read_register (FP_REGNUM);
8966221d
JK
755 }
756}
66a1aa07 757
66a1aa07
SG
758\f
759/* To see if a frame chain is valid, see if the caller looks like it
760 was compiled with gcc. */
761
762int
763frame_chain_valid (chain, thisframe)
764 FRAME_ADDR chain;
765 FRAME thisframe;
766{
247145e6
JK
767 struct minimal_symbol *msym_us;
768 struct minimal_symbol *msym_start;
70e43abe
JL
769 struct unwind_table_entry *u, *next_u = NULL;
770 FRAME next;
66a1aa07
SG
771
772 if (!chain)
773 return 0;
774
b8ec9a79 775 u = find_unwind_entry (thisframe->pc);
4b01383b 776
70e43abe
JL
777 if (u == NULL)
778 return 1;
779
247145e6
JK
780 /* We can't just check that the same of msym_us is "_start", because
781 someone idiotically decided that they were going to make a Ltext_end
782 symbol with the same address. This Ltext_end symbol is totally
783 indistinguishable (as nearly as I can tell) from the symbol for a function
784 which is (legitimately, since it is in the user's namespace)
785 named Ltext_end, so we can't just ignore it. */
786 msym_us = lookup_minimal_symbol_by_pc (FRAME_SAVED_PC (thisframe));
787 msym_start = lookup_minimal_symbol ("_start", NULL);
788 if (msym_us
789 && msym_start
790 && SYMBOL_VALUE_ADDRESS (msym_us) == SYMBOL_VALUE_ADDRESS (msym_start))
b8ec9a79 791 return 0;
5ac7f56e 792
70e43abe
JL
793 next = get_next_frame (thisframe);
794 if (next)
795 next_u = find_unwind_entry (next->pc);
5ac7f56e 796
70e43abe
JL
797 /* If this frame does not save SP, has no stack, isn't a stub,
798 and doesn't "call" an interrupt routine or signal handler caller,
799 then its not valid. */
800 if (u->Save_SP || u->Total_frame_size || u->stub_type != 0
801 || (thisframe->next && thisframe->next->signal_handler_caller)
802 || (next_u && next_u->HP_UX_interrupt_marker))
b8ec9a79 803 return 1;
5ac7f56e 804
b8ec9a79
JK
805 if (pc_in_linker_stub (thisframe->pc))
806 return 1;
4b01383b 807
b8ec9a79 808 return 0;
66a1aa07
SG
809}
810
66a1aa07
SG
811/*
812 * These functions deal with saving and restoring register state
813 * around a function call in the inferior. They keep the stack
814 * double-word aligned; eventually, on an hp700, the stack will have
815 * to be aligned to a 64-byte boundary.
816 */
817
818int
819push_dummy_frame ()
820{
821 register CORE_ADDR sp;
822 register int regnum;
823 int int_buffer;
824 double freg_buffer;
825
826 /* Space for "arguments"; the RP goes in here. */
827 sp = read_register (SP_REGNUM) + 48;
828 int_buffer = read_register (RP_REGNUM) | 0x3;
829 write_memory (sp - 20, (char *)&int_buffer, 4);
830
831 int_buffer = read_register (FP_REGNUM);
832 write_memory (sp, (char *)&int_buffer, 4);
833
834 write_register (FP_REGNUM, sp);
835
836 sp += 8;
837
838 for (regnum = 1; regnum < 32; regnum++)
839 if (regnum != RP_REGNUM && regnum != FP_REGNUM)
840 sp = push_word (sp, read_register (regnum));
841
842 sp += 4;
843
844 for (regnum = FP0_REGNUM; regnum < NUM_REGS; regnum++)
845 {
846 read_register_bytes (REGISTER_BYTE (regnum), (char *)&freg_buffer, 8);
847 sp = push_bytes (sp, (char *)&freg_buffer, 8);
848 }
849 sp = push_word (sp, read_register (IPSW_REGNUM));
850 sp = push_word (sp, read_register (SAR_REGNUM));
851 sp = push_word (sp, read_register (PCOQ_HEAD_REGNUM));
852 sp = push_word (sp, read_register (PCSQ_HEAD_REGNUM));
853 sp = push_word (sp, read_register (PCOQ_TAIL_REGNUM));
854 sp = push_word (sp, read_register (PCSQ_TAIL_REGNUM));
855 write_register (SP_REGNUM, sp);
856}
857
858find_dummy_frame_regs (frame, frame_saved_regs)
859 struct frame_info *frame;
860 struct frame_saved_regs *frame_saved_regs;
861{
862 CORE_ADDR fp = frame->frame;
863 int i;
864
865 frame_saved_regs->regs[RP_REGNUM] = fp - 20 & ~0x3;
866 frame_saved_regs->regs[FP_REGNUM] = fp;
867 frame_saved_regs->regs[1] = fp + 8;
66a1aa07 868
b227992a
SG
869 for (fp += 12, i = 3; i < 32; i++)
870 {
871 if (i != FP_REGNUM)
872 {
873 frame_saved_regs->regs[i] = fp;
874 fp += 4;
875 }
876 }
66a1aa07
SG
877
878 fp += 4;
879 for (i = FP0_REGNUM; i < NUM_REGS; i++, fp += 8)
880 frame_saved_regs->regs[i] = fp;
881
882 frame_saved_regs->regs[IPSW_REGNUM] = fp;
b227992a
SG
883 frame_saved_regs->regs[SAR_REGNUM] = fp + 4;
884 frame_saved_regs->regs[PCOQ_HEAD_REGNUM] = fp + 8;
885 frame_saved_regs->regs[PCSQ_HEAD_REGNUM] = fp + 12;
886 frame_saved_regs->regs[PCOQ_TAIL_REGNUM] = fp + 16;
887 frame_saved_regs->regs[PCSQ_TAIL_REGNUM] = fp + 20;
66a1aa07
SG
888}
889
890int
891hppa_pop_frame ()
892{
893 register FRAME frame = get_current_frame ();
894 register CORE_ADDR fp;
895 register int regnum;
896 struct frame_saved_regs fsr;
897 struct frame_info *fi;
898 double freg_buffer;
899
900 fi = get_frame_info (frame);
901 fp = fi->frame;
902 get_frame_saved_regs (fi, &fsr);
903
0a64709e 904#ifndef NO_PC_SPACE_QUEUE_RESTORE
66a1aa07
SG
905 if (fsr.regs[IPSW_REGNUM]) /* Restoring a call dummy frame */
906 restore_pc_queue (&fsr);
0a64709e 907#endif
66a1aa07
SG
908
909 for (regnum = 31; regnum > 0; regnum--)
910 if (fsr.regs[regnum])
911 write_register (regnum, read_memory_integer (fsr.regs[regnum], 4));
912
913 for (regnum = NUM_REGS - 1; regnum >= FP0_REGNUM ; regnum--)
914 if (fsr.regs[regnum])
915 {
916 read_memory (fsr.regs[regnum], (char *)&freg_buffer, 8);
917 write_register_bytes (REGISTER_BYTE (regnum), (char *)&freg_buffer, 8);
918 }
919
920 if (fsr.regs[IPSW_REGNUM])
921 write_register (IPSW_REGNUM,
922 read_memory_integer (fsr.regs[IPSW_REGNUM], 4));
923
924 if (fsr.regs[SAR_REGNUM])
925 write_register (SAR_REGNUM,
926 read_memory_integer (fsr.regs[SAR_REGNUM], 4));
927
ed1a07ad 928 /* If the PC was explicitly saved, then just restore it. */
66a1aa07
SG
929 if (fsr.regs[PCOQ_TAIL_REGNUM])
930 write_register (PCOQ_TAIL_REGNUM,
931 read_memory_integer (fsr.regs[PCOQ_TAIL_REGNUM], 4));
932
ed1a07ad
JK
933 /* Else use the value in %rp to set the new PC. */
934 else
935 target_write_pc (read_register (RP_REGNUM));
936
66a1aa07
SG
937 write_register (FP_REGNUM, read_memory_integer (fp, 4));
938
939 if (fsr.regs[IPSW_REGNUM]) /* call dummy */
940 write_register (SP_REGNUM, fp - 48);
941 else
942 write_register (SP_REGNUM, fp);
943
944 flush_cached_frames ();
945 set_current_frame (create_new_frame (read_register (FP_REGNUM),
946 read_pc ()));
947}
948
949/*
950 * After returning to a dummy on the stack, restore the instruction
951 * queue space registers. */
952
953static int
954restore_pc_queue (fsr)
955 struct frame_saved_regs *fsr;
956{
957 CORE_ADDR pc = read_pc ();
958 CORE_ADDR new_pc = read_memory_integer (fsr->regs[PCOQ_HEAD_REGNUM], 4);
959 int pid;
67ac9759 960 struct target_waitstatus w;
66a1aa07
SG
961 int insn_count;
962
963 /* Advance past break instruction in the call dummy. */
964 write_register (PCOQ_HEAD_REGNUM, pc + 4);
965 write_register (PCOQ_TAIL_REGNUM, pc + 8);
966
967 /*
968 * HPUX doesn't let us set the space registers or the space
969 * registers of the PC queue through ptrace. Boo, hiss.
970 * Conveniently, the call dummy has this sequence of instructions
971 * after the break:
972 * mtsp r21, sr0
973 * ble,n 0(sr0, r22)
974 *
975 * So, load up the registers and single step until we are in the
976 * right place.
977 */
978
979 write_register (21, read_memory_integer (fsr->regs[PCSQ_HEAD_REGNUM], 4));
980 write_register (22, new_pc);
981
982 for (insn_count = 0; insn_count < 3; insn_count++)
983 {
8c5e0021
JK
984 /* FIXME: What if the inferior gets a signal right now? Want to
985 merge this into wait_for_inferior (as a special kind of
986 watchpoint? By setting a breakpoint at the end? Is there
987 any other choice? Is there *any* way to do this stuff with
988 ptrace() or some equivalent?). */
66a1aa07 989 resume (1, 0);
67ac9759 990 target_wait (inferior_pid, &w);
66a1aa07 991
67ac9759 992 if (w.kind == TARGET_WAITKIND_SIGNALLED)
66a1aa07 993 {
67ac9759 994 stop_signal = w.value.sig;
66a1aa07 995 terminal_ours_for_output ();
67ac9759
JK
996 printf_unfiltered ("\nProgram terminated with signal %s, %s.\n",
997 target_signal_to_name (stop_signal),
998 target_signal_to_string (stop_signal));
199b2450 999 gdb_flush (gdb_stdout);
66a1aa07
SG
1000 return 0;
1001 }
1002 }
8c5e0021 1003 target_terminal_ours ();
66a1aa07
SG
1004 fetch_inferior_registers (-1);
1005 return 1;
1006}
1007
1008CORE_ADDR
1009hppa_push_arguments (nargs, args, sp, struct_return, struct_addr)
1010 int nargs;
4fd5eed4 1011 value_ptr *args;
66a1aa07
SG
1012 CORE_ADDR sp;
1013 int struct_return;
1014 CORE_ADDR struct_addr;
1015{
1016 /* array of arguments' offsets */
1edc5cd2 1017 int *offset = (int *)alloca(nargs * sizeof (int));
66a1aa07
SG
1018 int cum = 0;
1019 int i, alignment;
1020
1021 for (i = 0; i < nargs; i++)
1022 {
1023 /* Coerce chars to int & float to double if necessary */
1024 args[i] = value_arg_coerce (args[i]);
1025
1026 cum += TYPE_LENGTH (VALUE_TYPE (args[i]));
1027
1028 /* value must go at proper alignment. Assume alignment is a
1029 power of two.*/
1030 alignment = hppa_alignof (VALUE_TYPE (args[i]));
1031 if (cum % alignment)
1032 cum = (cum + alignment) & -alignment;
1033 offset[i] = -cum;
1034 }
558f4183 1035 sp += max ((cum + 7) & -8, 16);
66a1aa07
SG
1036
1037 for (i = 0; i < nargs; i++)
1038 write_memory (sp + offset[i], VALUE_CONTENTS (args[i]),
1039 TYPE_LENGTH (VALUE_TYPE (args[i])));
1040
1041 if (struct_return)
1042 write_register (28, struct_addr);
1043 return sp + 32;
1044}
1045
1046/*
1047 * Insert the specified number of args and function address
1048 * into a call sequence of the above form stored at DUMMYNAME.
1049 *
1050 * On the hppa we need to call the stack dummy through $$dyncall.
1051 * Therefore our version of FIX_CALL_DUMMY takes an extra argument,
1052 * real_pc, which is the location where gdb should start up the
1053 * inferior to do the function call.
1054 */
1055
1056CORE_ADDR
1057hppa_fix_call_dummy (dummy, pc, fun, nargs, args, type, gcc_p)
f4f0d174 1058 char *dummy;
66a1aa07
SG
1059 CORE_ADDR pc;
1060 CORE_ADDR fun;
1061 int nargs;
4fd5eed4 1062 value_ptr *args;
66a1aa07
SG
1063 struct type *type;
1064 int gcc_p;
1065{
1066 CORE_ADDR dyncall_addr, sr4export_addr;
1067 struct minimal_symbol *msymbol;
6cfec929 1068 int flags = read_register (FLAGS_REGNUM);
19cd0c1f 1069 struct unwind_table_entry *u;
66a1aa07
SG
1070
1071 msymbol = lookup_minimal_symbol ("$$dyncall", (struct objfile *) NULL);
1072 if (msymbol == NULL)
1073 error ("Can't find an address for $$dyncall trampoline");
1074
1075 dyncall_addr = SYMBOL_VALUE_ADDRESS (msymbol);
1076
4f915914
JL
1077 /* FUN could be a procedure label, in which case we have to get
1078 its real address and the value of its GOT/DP. */
1079 if (fun & 0x2)
1080 {
1081 /* Get the GOT/DP value for the target function. It's
1082 at *(fun+4). Note the call dummy is *NOT* allowed to
1083 trash %r19 before calling the target function. */
1084 write_register (19, read_memory_integer ((fun & ~0x3) + 4, 4));
1085
1086 /* Now get the real address for the function we are calling, it's
1087 at *fun. */
1088 fun = (CORE_ADDR) read_memory_integer (fun & ~0x3, 4);
1089 }
1090
19cd0c1f
JL
1091 /* If we are calling an import stub (eg calling into a dynamic library)
1092 then have sr4export call the magic __d_plt_call routine which is linked
1093 in from end.o. (You can't use _sr4export to call the import stub as
1094 the value in sp-24 will get fried and you end up returning to the
1095 wrong location. You can't call the import stub directly as the code
1096 to bind the PLT entry to a function can't return to a stack address.) */
1097 u = find_unwind_entry (fun);
1098 if (u && u->stub_type == IMPORT)
1099 {
1100 CORE_ADDR new_fun;
1101 msymbol = lookup_minimal_symbol ("__d_plt_call", (struct objfile *) NULL);
1102 if (msymbol == NULL)
1103 error ("Can't find an address for __d_plt_call trampoline");
1104
1105 /* This is where sr4export will jump to. */
1106 new_fun = SYMBOL_VALUE_ADDRESS (msymbol);
1107
1108 /* We have to store the address of the stub in __shlib_funcptr. */
1109 msymbol = lookup_minimal_symbol ("__shlib_funcptr",
1110 (struct objfile *)NULL);
1111 if (msymbol == NULL)
1112 error ("Can't find an address for __shlib_funcptr");
1113
1114 target_write_memory (SYMBOL_VALUE_ADDRESS (msymbol), (char *)&fun, 4);
1115 fun = new_fun;
1116
1117 }
1118
1119 /* We still need sr4export's address too. */
66a1aa07
SG
1120 msymbol = lookup_minimal_symbol ("_sr4export", (struct objfile *) NULL);
1121 if (msymbol == NULL)
1122 error ("Can't find an address for _sr4export trampoline");
1123
1124 sr4export_addr = SYMBOL_VALUE_ADDRESS (msymbol);
1125
f4f0d174
JK
1126 store_unsigned_integer
1127 (&dummy[9*REGISTER_SIZE],
1128 REGISTER_SIZE,
1129 deposit_21 (fun >> 11,
1130 extract_unsigned_integer (&dummy[9*REGISTER_SIZE],
1131 REGISTER_SIZE)));
1132 store_unsigned_integer
1133 (&dummy[10*REGISTER_SIZE],
1134 REGISTER_SIZE,
1135 deposit_14 (fun & MASK_11,
1136 extract_unsigned_integer (&dummy[10*REGISTER_SIZE],
1137 REGISTER_SIZE)));
1138 store_unsigned_integer
1139 (&dummy[12*REGISTER_SIZE],
1140 REGISTER_SIZE,
1141 deposit_21 (sr4export_addr >> 11,
1142 extract_unsigned_integer (&dummy[12*REGISTER_SIZE],
1143 REGISTER_SIZE)));
1144 store_unsigned_integer
1145 (&dummy[13*REGISTER_SIZE],
1146 REGISTER_SIZE,
1147 deposit_14 (sr4export_addr & MASK_11,
1148 extract_unsigned_integer (&dummy[13*REGISTER_SIZE],
1149 REGISTER_SIZE)));
66a1aa07
SG
1150
1151 write_register (22, pc);
1152
6cfec929
JK
1153 /* If we are in a syscall, then we should call the stack dummy
1154 directly. $$dyncall is not needed as the kernel sets up the
1155 space id registers properly based on the value in %r31. In
1156 fact calling $$dyncall will not work because the value in %r22
1157 will be clobbered on the syscall exit path. */
1158 if (flags & 2)
1159 return pc;
1160 else
1161 return dyncall_addr;
1162
66a1aa07
SG
1163}
1164
d3862cae
JK
1165/* Get the PC from %r31 if currently in a syscall. Also mask out privilege
1166 bits. */
1167CORE_ADDR
1168target_read_pc ()
1169{
1170 int flags = read_register (FLAGS_REGNUM);
1171
1172 if (flags & 2)
1173 return read_register (31) & ~0x3;
1174 return read_register (PC_REGNUM) & ~0x3;
1175}
1176
6cfec929
JK
1177/* Write out the PC. If currently in a syscall, then also write the new
1178 PC value into %r31. */
1179void
1180target_write_pc (v)
1181 CORE_ADDR v;
1182{
1183 int flags = read_register (FLAGS_REGNUM);
1184
1185 /* If in a syscall, then set %r31. Also make sure to get the
1186 privilege bits set correctly. */
1187 if (flags & 2)
1188 write_register (31, (long) (v | 0x3));
1189
1190 write_register (PC_REGNUM, (long) v);
1191 write_register (NPC_REGNUM, (long) v + 4);
1192}
1193
66a1aa07
SG
1194/* return the alignment of a type in bytes. Structures have the maximum
1195 alignment required by their fields. */
1196
1197static int
1198hppa_alignof (arg)
1199 struct type *arg;
1200{
1201 int max_align, align, i;
1202 switch (TYPE_CODE (arg))
1203 {
1204 case TYPE_CODE_PTR:
1205 case TYPE_CODE_INT:
1206 case TYPE_CODE_FLT:
1207 return TYPE_LENGTH (arg);
1208 case TYPE_CODE_ARRAY:
1209 return hppa_alignof (TYPE_FIELD_TYPE (arg, 0));
1210 case TYPE_CODE_STRUCT:
1211 case TYPE_CODE_UNION:
1212 max_align = 2;
1213 for (i = 0; i < TYPE_NFIELDS (arg); i++)
1214 {
1215 /* Bit fields have no real alignment. */
1216 if (!TYPE_FIELD_BITPOS (arg, i))
1217 {
1218 align = hppa_alignof (TYPE_FIELD_TYPE (arg, i));
1219 max_align = max (max_align, align);
1220 }
1221 }
1222 return max_align;
1223 default:
1224 return 4;
1225 }
1226}
1227
1228/* Print the register regnum, or all registers if regnum is -1 */
1229
1230pa_do_registers_info (regnum, fpregs)
1231 int regnum;
1232 int fpregs;
1233{
1234 char raw_regs [REGISTER_BYTES];
1235 int i;
1236
1237 for (i = 0; i < NUM_REGS; i++)
1238 read_relative_register_raw_bytes (i, raw_regs + REGISTER_BYTE (i));
1239 if (regnum == -1)
1240 pa_print_registers (raw_regs, regnum, fpregs);
1241 else if (regnum < FP0_REGNUM)
199b2450 1242 printf_unfiltered ("%s %x\n", reg_names[regnum], *(long *)(raw_regs +
66a1aa07
SG
1243 REGISTER_BYTE (regnum)));
1244 else
1245 pa_print_fp_reg (regnum);
1246}
1247
1248pa_print_registers (raw_regs, regnum, fpregs)
1249 char *raw_regs;
1250 int regnum;
1251 int fpregs;
1252{
1253 int i;
1254
1255 for (i = 0; i < 18; i++)
199b2450 1256 printf_unfiltered ("%8.8s: %8x %8.8s: %8x %8.8s: %8x %8.8s: %8x\n",
66a1aa07
SG
1257 reg_names[i],
1258 *(int *)(raw_regs + REGISTER_BYTE (i)),
1259 reg_names[i + 18],
1260 *(int *)(raw_regs + REGISTER_BYTE (i + 18)),
1261 reg_names[i + 36],
1262 *(int *)(raw_regs + REGISTER_BYTE (i + 36)),
1263 reg_names[i + 54],
1264 *(int *)(raw_regs + REGISTER_BYTE (i + 54)));
1265
1266 if (fpregs)
1267 for (i = 72; i < NUM_REGS; i++)
1268 pa_print_fp_reg (i);
1269}
1270
1271pa_print_fp_reg (i)
1272 int i;
1273{
1274 unsigned char raw_buffer[MAX_REGISTER_RAW_SIZE];
1275 unsigned char virtual_buffer[MAX_REGISTER_VIRTUAL_SIZE];
66a1aa07 1276
eb1167c6 1277 /* Get 32bits of data. */
66a1aa07 1278 read_relative_register_raw_bytes (i, raw_buffer);
ad09cb2b 1279
eb1167c6
JL
1280 /* Put it in the buffer. No conversions are ever necessary. */
1281 memcpy (virtual_buffer, raw_buffer, REGISTER_RAW_SIZE (i));
66a1aa07 1282
199b2450 1283 fputs_filtered (reg_names[i], gdb_stdout);
eb1167c6
JL
1284 print_spaces_filtered (8 - strlen (reg_names[i]), gdb_stdout);
1285 fputs_filtered ("(single precision) ", gdb_stdout);
66a1aa07 1286
199b2450 1287 val_print (REGISTER_VIRTUAL_TYPE (i), virtual_buffer, 0, gdb_stdout, 0,
66a1aa07
SG
1288 1, 0, Val_pretty_default);
1289 printf_filtered ("\n");
eb1167c6
JL
1290
1291 /* If "i" is even, then this register can also be a double-precision
1292 FP register. Dump it out as such. */
1293 if ((i % 2) == 0)
1294 {
1295 /* Get the data in raw format for the 2nd half. */
1296 read_relative_register_raw_bytes (i + 1, raw_buffer);
1297
1298 /* Copy it into the appropriate part of the virtual buffer. */
1299 memcpy (virtual_buffer + REGISTER_RAW_SIZE (i), raw_buffer,
1300 REGISTER_RAW_SIZE (i));
1301
1302 /* Dump it as a double. */
1303 fputs_filtered (reg_names[i], gdb_stdout);
1304 print_spaces_filtered (8 - strlen (reg_names[i]), gdb_stdout);
1305 fputs_filtered ("(double precision) ", gdb_stdout);
1306
1307 val_print (builtin_type_double, virtual_buffer, 0, gdb_stdout, 0,
1308 1, 0, Val_pretty_default);
1309 printf_filtered ("\n");
1310 }
66a1aa07
SG
1311}
1312
de482138
JL
1313/* Figure out if PC is in a trampoline, and if so find out where
1314 the trampoline will jump to. If not in a trampoline, return zero.
66a1aa07 1315
de482138
JL
1316 Simple code examination probably is not a good idea since the code
1317 sequences in trampolines can also appear in user code.
1318
1319 We use unwinds and information from the minimal symbol table to
1320 determine when we're in a trampoline. This won't work for ELF
1321 (yet) since it doesn't create stub unwind entries. Whether or
1322 not ELF will create stub unwinds or normal unwinds for linker
1323 stubs is still being debated.
1324
1325 This should handle simple calls through dyncall or sr4export,
1326 long calls, argument relocation stubs, and dyncall/sr4export
1327 calling an argument relocation stub. It even handles some stubs
1328 used in dynamic executables. */
66a1aa07
SG
1329
1330CORE_ADDR
1331skip_trampoline_code (pc, name)
1332 CORE_ADDR pc;
1333 char *name;
1334{
de482138
JL
1335 long orig_pc = pc;
1336 long prev_inst, curr_inst, loc;
66a1aa07 1337 static CORE_ADDR dyncall = 0;
de482138 1338 static CORE_ADDR sr4export = 0;
66a1aa07 1339 struct minimal_symbol *msym;
de482138 1340 struct unwind_table_entry *u;
66a1aa07 1341
de482138
JL
1342/* FIXME XXX - dyncall and sr4export must be initialized whenever we get a
1343 new exec file */
66a1aa07
SG
1344
1345 if (!dyncall)
1346 {
1347 msym = lookup_minimal_symbol ("$$dyncall", NULL);
1348 if (msym)
1349 dyncall = SYMBOL_VALUE_ADDRESS (msym);
1350 else
1351 dyncall = -1;
1352 }
1353
de482138
JL
1354 if (!sr4export)
1355 {
1356 msym = lookup_minimal_symbol ("_sr4export", NULL);
1357 if (msym)
1358 sr4export = SYMBOL_VALUE_ADDRESS (msym);
1359 else
1360 sr4export = -1;
1361 }
1362
1363 /* Addresses passed to dyncall may *NOT* be the actual address
1364 of the funtion. So we may have to do something special. */
66a1aa07 1365 if (pc == dyncall)
de482138
JL
1366 {
1367 pc = (CORE_ADDR) read_register (22);
66a1aa07 1368
de482138
JL
1369 /* If bit 30 (counting from the left) is on, then pc is the address of
1370 the PLT entry for this function, not the address of the function
1371 itself. Bit 31 has meaning too, but only for MPE. */
1372 if (pc & 0x2)
1373 pc = (CORE_ADDR) read_memory_integer (pc & ~0x3, 4);
1374 }
1375 else if (pc == sr4export)
1376 pc = (CORE_ADDR) (read_register (22));
66a1aa07 1377
de482138
JL
1378 /* Get the unwind descriptor corresponding to PC, return zero
1379 if no unwind was found. */
1380 u = find_unwind_entry (pc);
1381 if (!u)
1382 return 0;
1383
1384 /* If this isn't a linker stub, then return now. */
1385 if (u->stub_type == 0)
1386 return orig_pc == pc ? 0 : pc & ~0x3;
1387
1388 /* It's a stub. Search for a branch and figure out where it goes.
1389 Note we have to handle multi insn branch sequences like ldil;ble.
1390 Most (all?) other branches can be determined by examining the contents
1391 of certain registers and the stack. */
1392 loc = pc;
1393 curr_inst = 0;
1394 prev_inst = 0;
1395 while (1)
1396 {
1397 /* Make sure we haven't walked outside the range of this stub. */
1398 if (u != find_unwind_entry (loc))
1399 {
1400 warning ("Unable to find branch in linker stub");
1401 return orig_pc == pc ? 0 : pc & ~0x3;
1402 }
1403
1404 prev_inst = curr_inst;
1405 curr_inst = read_memory_integer (loc, 4);
66a1aa07 1406
de482138
JL
1407 /* Does it look like a branch external using %r1? Then it's the
1408 branch from the stub to the actual function. */
1409 if ((curr_inst & 0xffe0e000) == 0xe0202000)
1410 {
1411 /* Yup. See if the previous instruction loaded
1412 a value into %r1. If so compute and return the jump address. */
1413 if ((prev_inst & 0xffe00000) == 0x20202000)
1414 return (extract_21 (prev_inst) + extract_17 (curr_inst)) & ~0x3;
1415 else
1416 {
1417 warning ("Unable to find ldil X,%%r1 before ble Y(%%sr4,%%r1).");
1418 return orig_pc == pc ? 0 : pc & ~0x3;
1419 }
1420 }
1421
1422 /* Does it look like bl X,rp? Another way to do a branch from the
1423 stub to the actual function. */
1424 else if ((curr_inst & 0xffe0e000) == 0xe8400000)
1425 return (loc + extract_17 (curr_inst) + 8) & ~0x3;
1426
1427 /* Does it look like bv (rp)? Note this depends on the
1428 current stack pointer being the same as the stack
1429 pointer in the stub itself! This is a branch on from the
1430 stub back to the original caller. */
1431 else if ((curr_inst & 0xffe0e000) == 0xe840c000)
1432 {
1433 /* Yup. See if the previous instruction loaded
1434 rp from sp - 8. */
1435 if (prev_inst == 0x4bc23ff1)
1436 return (read_memory_integer
1437 (read_register (SP_REGNUM) - 8, 4)) & ~0x3;
1438 else
1439 {
1440 warning ("Unable to find restore of %%rp before bv (%%rp).");
1441 return orig_pc == pc ? 0 : pc & ~0x3;
1442 }
1443 }
1444
1445 /* What about be,n 0(sr0,%rp)? It's just another way we return to
1446 the original caller from the stub. Used in dynamic executables. */
1447 else if (curr_inst == 0xe0400002)
1448 {
1449 /* The value we jump to is sitting in sp - 24. But that's
1450 loaded several instructions before the be instruction.
1451 I guess we could check for the previous instruction being
1452 mtsp %r1,%sr0 if we want to do sanity checking. */
1453 return (read_memory_integer
1454 (read_register (SP_REGNUM) - 24, 4)) & ~0x3;
1455 }
1456
1457 /* Haven't found the branch yet, but we're still in the stub.
1458 Keep looking. */
1459 loc += 4;
1460 }
66a1aa07
SG
1461}
1462
c598654a
JL
1463/* For the given instruction (INST), return any adjustment it makes
1464 to the stack pointer or zero for no adjustment.
1465
1466 This only handles instructions commonly found in prologues. */
1467
1468static int
1469prologue_inst_adjust_sp (inst)
1470 unsigned long inst;
1471{
1472 /* This must persist across calls. */
1473 static int save_high21;
1474
1475 /* The most common way to perform a stack adjustment ldo X(sp),sp */
1476 if ((inst & 0xffffc000) == 0x37de0000)
1477 return extract_14 (inst);
1478
1479 /* stwm X,D(sp) */
1480 if ((inst & 0xffe00000) == 0x6fc00000)
1481 return extract_14 (inst);
1482
1483 /* addil high21,%r1; ldo low11,(%r1),%r30)
1484 save high bits in save_high21 for later use. */
1485 if ((inst & 0xffe00000) == 0x28200000)
1486 {
1487 save_high21 = extract_21 (inst);
1488 return 0;
1489 }
1490
1491 if ((inst & 0xffff0000) == 0x343e0000)
1492 return save_high21 + extract_14 (inst);
1493
1494 /* fstws as used by the HP compilers. */
1495 if ((inst & 0xffffffe0) == 0x2fd01220)
1496 return extract_5_load (inst);
1497
1498 /* No adjustment. */
1499 return 0;
1500}
1501
1502/* Return nonzero if INST is a branch of some kind, else return zero. */
1503
1504static int
1505is_branch (inst)
1506 unsigned long inst;
1507{
1508 switch (inst >> 26)
1509 {
1510 case 0x20:
1511 case 0x21:
1512 case 0x22:
1513 case 0x23:
1514 case 0x28:
1515 case 0x29:
1516 case 0x2a:
1517 case 0x2b:
1518 case 0x30:
1519 case 0x31:
1520 case 0x32:
1521 case 0x33:
1522 case 0x38:
1523 case 0x39:
1524 case 0x3a:
1525 return 1;
1526
1527 default:
1528 return 0;
1529 }
1530}
1531
1532/* Return the register number for a GR which is saved by INST or
1533 zero it INST does not save a GR.
1534
1535 Note we only care about full 32bit register stores (that's the only
1536 kind of stores the prologue will use). */
1537
1538static int
1539inst_saves_gr (inst)
1540 unsigned long inst;
1541{
1542 /* Does it look like a stw? */
1543 if ((inst >> 26) == 0x1a)
1544 return extract_5R_store (inst);
1545
1546 /* Does it look like a stwm? */
1547 if ((inst >> 26) == 0x1b)
1548 return extract_5R_store (inst);
1549
1550 return 0;
1551}
1552
1553/* Return the register number for a FR which is saved by INST or
1554 zero it INST does not save a FR.
1555
1556 Note we only care about full 64bit register stores (that's the only
1557 kind of stores the prologue will use). */
1558
1559static int
1560inst_saves_fr (inst)
1561 unsigned long inst;
1562{
1563 if ((inst & 0xfc1fffe0) == 0x2c101220)
1564 return extract_5r_store (inst);
1565 return 0;
1566}
1567
66a1aa07 1568/* Advance PC across any function entry prologue instructions
c598654a 1569 to reach some "real" code.
66a1aa07 1570
c598654a
JL
1571 Use information in the unwind table to determine what exactly should
1572 be in the prologue. */
66a1aa07
SG
1573
1574CORE_ADDR
de482138 1575skip_prologue (pc)
66a1aa07
SG
1576 CORE_ADDR pc;
1577{
34df79fc 1578 char buf[4];
c598654a
JL
1579 unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp;
1580 int status, i;
1581 struct unwind_table_entry *u;
66a1aa07 1582
c598654a
JL
1583 u = find_unwind_entry (pc);
1584 if (!u)
fdafbfad 1585 return pc;
c598654a 1586
de482138
JL
1587 /* If we are not at the beginning of a function, then return now. */
1588 if ((pc & ~0x3) != u->region_start)
1589 return pc;
1590
c598654a
JL
1591 /* This is how much of a frame adjustment we need to account for. */
1592 stack_remaining = u->Total_frame_size << 3;
66a1aa07 1593
c598654a
JL
1594 /* Magic register saves we want to know about. */
1595 save_rp = u->Save_RP;
1596 save_sp = u->Save_SP;
1597
1598 /* Turn the Entry_GR field into a bitmask. */
1599 save_gr = 0;
1600 for (i = 3; i < u->Entry_GR + 3; i++)
66a1aa07 1601 {
c598654a
JL
1602 /* Frame pointer gets saved into a special location. */
1603 if (u->Save_SP && i == FP_REGNUM)
1604 continue;
1605
1606 save_gr |= (1 << i);
1607 }
1608
1609 /* Turn the Entry_FR field into a bitmask too. */
1610 save_fr = 0;
1611 for (i = 12; i < u->Entry_FR + 12; i++)
1612 save_fr |= (1 << i);
1613
1614 /* Loop until we find everything of interest or hit a branch.
1615
1616 For unoptimized GCC code and for any HP CC code this will never ever
1617 examine any user instructions.
1618
1619 For optimzied GCC code we're faced with problems. GCC will schedule
1620 its prologue and make prologue instructions available for delay slot
1621 filling. The end result is user code gets mixed in with the prologue
1622 and a prologue instruction may be in the delay slot of the first branch
1623 or call.
1624
1625 Some unexpected things are expected with debugging optimized code, so
1626 we allow this routine to walk past user instructions in optimized
1627 GCC code. */
1628 while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
1629 {
1630 status = target_read_memory (pc, buf, 4);
1631 inst = extract_unsigned_integer (buf, 4);
1632
1633 /* Yow! */
1634 if (status != 0)
1635 return pc;
1636
1637 /* Note the interesting effects of this instruction. */
1638 stack_remaining -= prologue_inst_adjust_sp (inst);
1639
1640 /* There is only one instruction used for saving RP into the stack. */
1641 if (inst == 0x6bc23fd9)
1642 save_rp = 0;
1643
1644 /* This is the only way we save SP into the stack. At this time
1645 the HP compilers never bother to save SP into the stack. */
1646 if ((inst & 0xffffc000) == 0x6fc10000)
1647 save_sp = 0;
1648
1649 /* Account for general and floating-point register saves. */
1650 save_gr &= ~(1 << inst_saves_gr (inst));
1651 save_fr &= ~(1 << inst_saves_fr (inst));
1652
1653 /* Quit if we hit any kind of branch. This can happen if a prologue
1654 instruction is in the delay slot of the first call/branch. */
1655 if (is_branch (inst))
1656 break;
1657
1658 /* Bump the PC. */
1659 pc += 4;
66a1aa07 1660 }
66a1aa07
SG
1661
1662 return pc;
1663}
1664
c598654a
JL
1665/* Put here the code to store, into a struct frame_saved_regs,
1666 the addresses of the saved registers of frame described by FRAME_INFO.
1667 This includes special registers such as pc and fp saved in special
1668 ways in the stack frame. sp is even more special:
1669 the address we return for it IS the sp for the next frame. */
1670
1671void
1672hppa_frame_find_saved_regs (frame_info, frame_saved_regs)
1673 struct frame_info *frame_info;
1674 struct frame_saved_regs *frame_saved_regs;
1675{
1676 CORE_ADDR pc;
1677 struct unwind_table_entry *u;
1678 unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp;
1679 int status, i, reg;
1680 char buf[4];
1681 int fp_loc = -1;
1682
1683 /* Zero out everything. */
1684 memset (frame_saved_regs, '\0', sizeof (struct frame_saved_regs));
1685
1686 /* Call dummy frames always look the same, so there's no need to
1687 examine the dummy code to determine locations of saved registers;
1688 instead, let find_dummy_frame_regs fill in the correct offsets
1689 for the saved registers. */
1690 if ((frame_info->pc >= frame_info->frame
1691 && frame_info->pc <= (frame_info->frame + CALL_DUMMY_LENGTH
1692 + 32 * 4 + (NUM_REGS - FP0_REGNUM) * 8
1693 + 6 * 4)))
1694 find_dummy_frame_regs (frame_info, frame_saved_regs);
1695
70e43abe
JL
1696 /* Interrupt handlers are special too. They lay out the register
1697 state in the exact same order as the register numbers in GDB. */
1698 if (pc_in_interrupt_handler (frame_info->pc))
1699 {
1700 for (i = 0; i < NUM_REGS; i++)
1701 {
1702 /* SP is a little special. */
1703 if (i == SP_REGNUM)
1704 frame_saved_regs->regs[SP_REGNUM]
1705 = read_memory_integer (frame_info->frame + SP_REGNUM * 4, 4);
1706 else
1707 frame_saved_regs->regs[i] = frame_info->frame + i * 4;
1708 }
1709 return;
1710 }
1711
1712 /* Handle signal handler callers. */
1713 if (frame_info->signal_handler_caller)
1714 {
1715 FRAME_FIND_SAVED_REGS_IN_SIGTRAMP (frame_info, frame_saved_regs);
1716 return;
1717 }
1718
c598654a
JL
1719 /* Get the starting address of the function referred to by the PC
1720 saved in frame_info. */
1721 pc = get_pc_function_start (frame_info->pc);
1722
1723 /* Yow! */
1724 u = find_unwind_entry (pc);
1725 if (!u)
1726 return;
1727
1728 /* This is how much of a frame adjustment we need to account for. */
1729 stack_remaining = u->Total_frame_size << 3;
1730
1731 /* Magic register saves we want to know about. */
1732 save_rp = u->Save_RP;
1733 save_sp = u->Save_SP;
1734
1735 /* Turn the Entry_GR field into a bitmask. */
1736 save_gr = 0;
1737 for (i = 3; i < u->Entry_GR + 3; i++)
1738 {
1739 /* Frame pointer gets saved into a special location. */
1740 if (u->Save_SP && i == FP_REGNUM)
1741 continue;
1742
1743 save_gr |= (1 << i);
1744 }
1745
1746 /* Turn the Entry_FR field into a bitmask too. */
1747 save_fr = 0;
1748 for (i = 12; i < u->Entry_FR + 12; i++)
1749 save_fr |= (1 << i);
1750
70e43abe
JL
1751 /* The frame always represents the value of %sp at entry to the
1752 current function (and is thus equivalent to the "saved" stack
1753 pointer. */
1754 frame_saved_regs->regs[SP_REGNUM] = frame_info->frame;
1755
c598654a
JL
1756 /* Loop until we find everything of interest or hit a branch.
1757
1758 For unoptimized GCC code and for any HP CC code this will never ever
1759 examine any user instructions.
1760
1761 For optimzied GCC code we're faced with problems. GCC will schedule
1762 its prologue and make prologue instructions available for delay slot
1763 filling. The end result is user code gets mixed in with the prologue
1764 and a prologue instruction may be in the delay slot of the first branch
1765 or call.
1766
1767 Some unexpected things are expected with debugging optimized code, so
1768 we allow this routine to walk past user instructions in optimized
1769 GCC code. */
1770 while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
1771 {
1772 status = target_read_memory (pc, buf, 4);
1773 inst = extract_unsigned_integer (buf, 4);
1774
1775 /* Yow! */
1776 if (status != 0)
1777 return;
1778
1779 /* Note the interesting effects of this instruction. */
1780 stack_remaining -= prologue_inst_adjust_sp (inst);
1781
1782 /* There is only one instruction used for saving RP into the stack. */
1783 if (inst == 0x6bc23fd9)
1784 {
1785 save_rp = 0;
1786 frame_saved_regs->regs[RP_REGNUM] = frame_info->frame - 20;
1787 }
1788
70e43abe
JL
1789 /* Just note that we found the save of SP into the stack. The
1790 value for frame_saved_regs was computed above. */
c598654a 1791 if ((inst & 0xffffc000) == 0x6fc10000)
70e43abe 1792 save_sp = 0;
c598654a
JL
1793
1794 /* Account for general and floating-point register saves. */
1795 reg = inst_saves_gr (inst);
1796 if (reg >= 3 && reg <= 18
1797 && (!u->Save_SP || reg != FP_REGNUM))
1798 {
1799 save_gr &= ~(1 << reg);
1800
1801 /* stwm with a positive displacement is a *post modify*. */
1802 if ((inst >> 26) == 0x1b
1803 && extract_14 (inst) >= 0)
1804 frame_saved_regs->regs[reg] = frame_info->frame;
1805 else
1806 {
1807 /* Handle code with and without frame pointers. */
1808 if (u->Save_SP)
1809 frame_saved_regs->regs[reg]
1810 = frame_info->frame + extract_14 (inst);
1811 else
1812 frame_saved_regs->regs[reg]
1813 = frame_info->frame + (u->Total_frame_size << 3)
1814 + extract_14 (inst);
1815 }
1816 }
1817
1818
1819 /* GCC handles callee saved FP regs a little differently.
1820
1821 It emits an instruction to put the value of the start of
1822 the FP store area into %r1. It then uses fstds,ma with
1823 a basereg of %r1 for the stores.
1824
1825 HP CC emits them at the current stack pointer modifying
1826 the stack pointer as it stores each register. */
1827
1828 /* ldo X(%r3),%r1 or ldo X(%r30),%r1. */
1829 if ((inst & 0xffffc000) == 0x34610000
1830 || (inst & 0xffffc000) == 0x37c10000)
1831 fp_loc = extract_14 (inst);
1832
1833 reg = inst_saves_fr (inst);
1834 if (reg >= 12 && reg <= 21)
1835 {
1836 /* Note +4 braindamage below is necessary because the FP status
1837 registers are internally 8 registers rather than the expected
1838 4 registers. */
1839 save_fr &= ~(1 << reg);
1840 if (fp_loc == -1)
1841 {
1842 /* 1st HP CC FP register store. After this instruction
1843 we've set enough state that the GCC and HPCC code are
1844 both handled in the same manner. */
1845 frame_saved_regs->regs[reg + FP4_REGNUM + 4] = frame_info->frame;
1846 fp_loc = 8;
1847 }
1848 else
1849 {
1850 frame_saved_regs->regs[reg + FP0_REGNUM + 4]
1851 = frame_info->frame + fp_loc;
1852 fp_loc += 8;
1853 }
1854 }
1855
1856 /* Quit if we hit any kind of branch. This can happen if a prologue
1857 instruction is in the delay slot of the first call/branch. */
1858 if (is_branch (inst))
1859 break;
1860
1861 /* Bump the PC. */
1862 pc += 4;
1863 }
1864}
1865
63757ecd
JK
1866#ifdef MAINTENANCE_CMDS
1867
66a1aa07
SG
1868static void
1869unwind_command (exp, from_tty)
1870 char *exp;
1871 int from_tty;
1872{
1873 CORE_ADDR address;
1874 union
1875 {
1876 int *foo;
1877 struct unwind_table_entry *u;
1878 } xxx;
1879
1880 /* If we have an expression, evaluate it and use it as the address. */
1881
1882 if (exp != 0 && *exp != 0)
1883 address = parse_and_eval_address (exp);
1884 else
1885 return;
1886
1887 xxx.u = find_unwind_entry (address);
1888
1889 if (!xxx.u)
1890 {
199b2450 1891 printf_unfiltered ("Can't find unwind table entry for PC 0x%x\n", address);
66a1aa07
SG
1892 return;
1893 }
1894
199b2450 1895 printf_unfiltered ("%08x\n%08X\n%08X\n%08X\n", xxx.foo[0], xxx.foo[1], xxx.foo[2],
66a1aa07
SG
1896 xxx.foo[3]);
1897}
976bb0be 1898#endif /* MAINTENANCE_CMDS */
63757ecd
JK
1899
1900void
1901_initialize_hppa_tdep ()
1902{
976bb0be 1903#ifdef MAINTENANCE_CMDS
63757ecd
JK
1904 add_cmd ("unwind", class_maintenance, unwind_command,
1905 "Print unwind table entry at given address.",
1906 &maintenanceprintlist);
63757ecd 1907#endif /* MAINTENANCE_CMDS */
976bb0be 1908}