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a7aad9aa 1/* Target-dependent code for the HP PA-RISC architecture.
cda5a58a 2
42a4f53d 3 Copyright (C) 1986-2019 Free Software Foundation, Inc.
c906108c
SS
4
5 Contributed by the Center for Software Science at the
6 University of Utah (pa-gdb-bugs@cs.utah.edu).
7
c5aa993b 8 This file is part of GDB.
c906108c 9
c5aa993b
JM
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
c5aa993b 13 (at your option) any later version.
c906108c 14
c5aa993b
JM
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
c906108c 19
c5aa993b 20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c906108c
SS
22
23#include "defs.h"
c906108c
SS
24#include "bfd.h"
25#include "inferior.h"
4e052eda 26#include "regcache.h"
e5d66720 27#include "completer.h"
59623e27 28#include "osabi.h"
343af405 29#include "arch-utils.h"
1777feb0 30/* For argument passing to the inferior. */
c906108c 31#include "symtab.h"
fde2cceb 32#include "dis-asm.h"
26d08f08
AC
33#include "trad-frame.h"
34#include "frame-unwind.h"
35#include "frame-base.h"
c906108c 36
c906108c
SS
37#include "gdbcore.h"
38#include "gdbcmd.h"
e6bb342a 39#include "gdbtypes.h"
c906108c 40#include "objfiles.h"
3ff7cf9e 41#include "hppa-tdep.h"
325fac50 42#include <algorithm>
c906108c 43
369aa520
RC
44static int hppa_debug = 0;
45
60383d10 46/* Some local constants. */
3ff7cf9e
JB
47static const int hppa32_num_regs = 128;
48static const int hppa64_num_regs = 96;
49
61a12cfa
JK
50/* We use the objfile->obj_private pointer for two things:
51 * 1. An unwind table;
52 *
53 * 2. A pointer to any associated shared library object.
54 *
55 * #defines are used to help refer to these objects.
56 */
57
58/* Info about the unwind table associated with an object file.
59 * This is hung off of the "objfile->obj_private" pointer, and
60 * is allocated in the objfile's psymbol obstack. This allows
61 * us to have unique unwind info for each executable and shared
62 * library that we are debugging.
63 */
64struct hppa_unwind_info
65 {
66 struct unwind_table_entry *table; /* Pointer to unwind info */
67 struct unwind_table_entry *cache; /* Pointer to last entry we found */
68 int last; /* Index of last entry */
69 };
70
71struct hppa_objfile_private
72 {
73 struct hppa_unwind_info *unwind_info; /* a pointer */
74 struct so_list *so_info; /* a pointer */
75 CORE_ADDR dp;
76
77 int dummy_call_sequence_reg;
78 CORE_ADDR dummy_call_sequence_addr;
79 };
80
7c46b9fb
RC
81/* hppa-specific object data -- unwind and solib info.
82 TODO/maybe: think about splitting this into two parts; the unwind data is
83 common to all hppa targets, but is only used in this file; we can register
84 that separately and make this static. The solib data is probably hpux-
85 specific, so we can create a separate extern objfile_data that is registered
86 by hppa-hpux-tdep.c and shared with pa64solib.c and somsolib.c. */
61a12cfa 87static const struct objfile_data *hppa_objfile_priv_data = NULL;
7c46b9fb 88
1777feb0 89/* Get at various relevent fields of an instruction word. */
e2ac8128
JB
90#define MASK_5 0x1f
91#define MASK_11 0x7ff
92#define MASK_14 0x3fff
93#define MASK_21 0x1fffff
94
e2ac8128
JB
95/* Sizes (in bytes) of the native unwind entries. */
96#define UNWIND_ENTRY_SIZE 16
97#define STUB_UNWIND_ENTRY_SIZE 8
98
c906108c 99/* Routines to extract various sized constants out of hppa
1777feb0 100 instructions. */
c906108c
SS
101
102/* This assumes that no garbage lies outside of the lower bits of
1777feb0 103 value. */
c906108c 104
63807e1d 105static int
abc485a1 106hppa_sign_extend (unsigned val, unsigned bits)
c906108c 107{
66c6502d 108 return (int) (val >> (bits - 1) ? (-(1 << bits)) | val : val);
c906108c
SS
109}
110
1777feb0 111/* For many immediate values the sign bit is the low bit! */
c906108c 112
63807e1d 113static int
abc485a1 114hppa_low_hppa_sign_extend (unsigned val, unsigned bits)
c906108c 115{
66c6502d 116 return (int) ((val & 0x1 ? (-(1 << (bits - 1))) : 0) | val >> 1);
c906108c
SS
117}
118
e2ac8128 119/* Extract the bits at positions between FROM and TO, using HP's numbering
1777feb0 120 (MSB = 0). */
e2ac8128 121
abc485a1
RC
122int
123hppa_get_field (unsigned word, int from, int to)
e2ac8128
JB
124{
125 return ((word) >> (31 - (to)) & ((1 << ((to) - (from) + 1)) - 1));
126}
127
1777feb0 128/* Extract the immediate field from a ld{bhw}s instruction. */
c906108c 129
abc485a1
RC
130int
131hppa_extract_5_load (unsigned word)
c906108c 132{
abc485a1 133 return hppa_low_hppa_sign_extend (word >> 16 & MASK_5, 5);
c906108c
SS
134}
135
1777feb0 136/* Extract the immediate field from a break instruction. */
c906108c 137
abc485a1
RC
138unsigned
139hppa_extract_5r_store (unsigned word)
c906108c
SS
140{
141 return (word & MASK_5);
142}
143
1777feb0 144/* Extract the immediate field from a {sr}sm instruction. */
c906108c 145
abc485a1
RC
146unsigned
147hppa_extract_5R_store (unsigned word)
c906108c
SS
148{
149 return (word >> 16 & MASK_5);
150}
151
1777feb0 152/* Extract a 14 bit immediate field. */
c906108c 153
abc485a1
RC
154int
155hppa_extract_14 (unsigned word)
c906108c 156{
abc485a1 157 return hppa_low_hppa_sign_extend (word & MASK_14, 14);
c906108c
SS
158}
159
1777feb0 160/* Extract a 21 bit constant. */
c906108c 161
abc485a1
RC
162int
163hppa_extract_21 (unsigned word)
c906108c
SS
164{
165 int val;
166
167 word &= MASK_21;
168 word <<= 11;
abc485a1 169 val = hppa_get_field (word, 20, 20);
c906108c 170 val <<= 11;
abc485a1 171 val |= hppa_get_field (word, 9, 19);
c906108c 172 val <<= 2;
abc485a1 173 val |= hppa_get_field (word, 5, 6);
c906108c 174 val <<= 5;
abc485a1 175 val |= hppa_get_field (word, 0, 4);
c906108c 176 val <<= 2;
abc485a1
RC
177 val |= hppa_get_field (word, 7, 8);
178 return hppa_sign_extend (val, 21) << 11;
c906108c
SS
179}
180
c906108c 181/* extract a 17 bit constant from branch instructions, returning the
1777feb0 182 19 bit signed value. */
c906108c 183
abc485a1
RC
184int
185hppa_extract_17 (unsigned word)
c906108c 186{
abc485a1
RC
187 return hppa_sign_extend (hppa_get_field (word, 19, 28) |
188 hppa_get_field (word, 29, 29) << 10 |
189 hppa_get_field (word, 11, 15) << 11 |
c906108c
SS
190 (word & 0x1) << 16, 17) << 2;
191}
3388d7ff
RC
192
193CORE_ADDR
194hppa_symbol_address(const char *sym)
195{
3b7344d5 196 struct bound_minimal_symbol minsym;
3388d7ff
RC
197
198 minsym = lookup_minimal_symbol (sym, NULL, NULL);
3b7344d5 199 if (minsym.minsym)
77e371c0 200 return BMSYMBOL_VALUE_ADDRESS (minsym);
3388d7ff
RC
201 else
202 return (CORE_ADDR)-1;
203}
77d18ded 204
61a12cfa 205static struct hppa_objfile_private *
77d18ded
RC
206hppa_init_objfile_priv_data (struct objfile *objfile)
207{
e39db4db
SM
208 hppa_objfile_private *priv
209 = OBSTACK_ZALLOC (&objfile->objfile_obstack, hppa_objfile_private);
77d18ded 210
77d18ded 211 set_objfile_data (objfile, hppa_objfile_priv_data, priv);
77d18ded
RC
212
213 return priv;
214}
c906108c
SS
215\f
216
217/* Compare the start address for two unwind entries returning 1 if
218 the first address is larger than the second, -1 if the second is
219 larger than the first, and zero if they are equal. */
220
221static int
fba45db2 222compare_unwind_entries (const void *arg1, const void *arg2)
c906108c 223{
9a3c8263
SM
224 const struct unwind_table_entry *a = (const struct unwind_table_entry *) arg1;
225 const struct unwind_table_entry *b = (const struct unwind_table_entry *) arg2;
c906108c
SS
226
227 if (a->region_start > b->region_start)
228 return 1;
229 else if (a->region_start < b->region_start)
230 return -1;
231 else
232 return 0;
233}
234
53a5351d 235static void
fdd72f95 236record_text_segment_lowaddr (bfd *abfd, asection *section, void *data)
53a5351d 237{
fdd72f95 238 if ((section->flags & (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
53a5351d 239 == (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
fdd72f95
RC
240 {
241 bfd_vma value = section->vma - section->filepos;
242 CORE_ADDR *low_text_segment_address = (CORE_ADDR *)data;
243
244 if (value < *low_text_segment_address)
245 *low_text_segment_address = value;
246 }
53a5351d
JM
247}
248
c906108c 249static void
fba45db2 250internalize_unwinds (struct objfile *objfile, struct unwind_table_entry *table,
1777feb0 251 asection *section, unsigned int entries,
241fd515 252 size_t size, CORE_ADDR text_offset)
c906108c
SS
253{
254 /* We will read the unwind entries into temporary memory, then
255 fill in the actual unwind table. */
fdd72f95 256
c906108c
SS
257 if (size > 0)
258 {
5db8bbe5 259 struct gdbarch *gdbarch = get_objfile_arch (objfile);
c906108c
SS
260 unsigned long tmp;
261 unsigned i;
224c3ddb 262 char *buf = (char *) alloca (size);
fdd72f95 263 CORE_ADDR low_text_segment_address;
c906108c 264
fdd72f95 265 /* For ELF targets, then unwinds are supposed to
1777feb0 266 be segment relative offsets instead of absolute addresses.
c2c6d25f
JM
267
268 Note that when loading a shared library (text_offset != 0) the
269 unwinds are already relative to the text_offset that will be
270 passed in. */
5db8bbe5 271 if (gdbarch_tdep (gdbarch)->is_elf && text_offset == 0)
53a5351d 272 {
fdd72f95
RC
273 low_text_segment_address = -1;
274
53a5351d 275 bfd_map_over_sections (objfile->obfd,
fdd72f95
RC
276 record_text_segment_lowaddr,
277 &low_text_segment_address);
53a5351d 278
fdd72f95 279 text_offset = low_text_segment_address;
53a5351d 280 }
5db8bbe5 281 else if (gdbarch_tdep (gdbarch)->solib_get_text_base)
acf86d54 282 {
5db8bbe5 283 text_offset = gdbarch_tdep (gdbarch)->solib_get_text_base (objfile);
acf86d54 284 }
53a5351d 285
c906108c
SS
286 bfd_get_section_contents (objfile->obfd, section, buf, 0, size);
287
288 /* Now internalize the information being careful to handle host/target
c5aa993b 289 endian issues. */
c906108c
SS
290 for (i = 0; i < entries; i++)
291 {
292 table[i].region_start = bfd_get_32 (objfile->obfd,
c5aa993b 293 (bfd_byte *) buf);
c906108c
SS
294 table[i].region_start += text_offset;
295 buf += 4;
c5aa993b 296 table[i].region_end = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
297 table[i].region_end += text_offset;
298 buf += 4;
c5aa993b 299 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
300 buf += 4;
301 table[i].Cannot_unwind = (tmp >> 31) & 0x1;
302 table[i].Millicode = (tmp >> 30) & 0x1;
303 table[i].Millicode_save_sr0 = (tmp >> 29) & 0x1;
304 table[i].Region_description = (tmp >> 27) & 0x3;
6fcecea0 305 table[i].reserved = (tmp >> 26) & 0x1;
c906108c
SS
306 table[i].Entry_SR = (tmp >> 25) & 0x1;
307 table[i].Entry_FR = (tmp >> 21) & 0xf;
308 table[i].Entry_GR = (tmp >> 16) & 0x1f;
309 table[i].Args_stored = (tmp >> 15) & 0x1;
310 table[i].Variable_Frame = (tmp >> 14) & 0x1;
311 table[i].Separate_Package_Body = (tmp >> 13) & 0x1;
312 table[i].Frame_Extension_Millicode = (tmp >> 12) & 0x1;
313 table[i].Stack_Overflow_Check = (tmp >> 11) & 0x1;
314 table[i].Two_Instruction_SP_Increment = (tmp >> 10) & 0x1;
6fcecea0 315 table[i].sr4export = (tmp >> 9) & 0x1;
c906108c
SS
316 table[i].cxx_info = (tmp >> 8) & 0x1;
317 table[i].cxx_try_catch = (tmp >> 7) & 0x1;
318 table[i].sched_entry_seq = (tmp >> 6) & 0x1;
6fcecea0 319 table[i].reserved1 = (tmp >> 5) & 0x1;
c906108c
SS
320 table[i].Save_SP = (tmp >> 4) & 0x1;
321 table[i].Save_RP = (tmp >> 3) & 0x1;
322 table[i].Save_MRP_in_frame = (tmp >> 2) & 0x1;
6fcecea0 323 table[i].save_r19 = (tmp >> 1) & 0x1;
c906108c 324 table[i].Cleanup_defined = tmp & 0x1;
c5aa993b 325 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
326 buf += 4;
327 table[i].MPE_XL_interrupt_marker = (tmp >> 31) & 0x1;
328 table[i].HP_UX_interrupt_marker = (tmp >> 30) & 0x1;
329 table[i].Large_frame = (tmp >> 29) & 0x1;
6fcecea0
RC
330 table[i].alloca_frame = (tmp >> 28) & 0x1;
331 table[i].reserved2 = (tmp >> 27) & 0x1;
c906108c
SS
332 table[i].Total_frame_size = tmp & 0x7ffffff;
333
1777feb0 334 /* Stub unwinds are handled elsewhere. */
c906108c
SS
335 table[i].stub_unwind.stub_type = 0;
336 table[i].stub_unwind.padding = 0;
337 }
338 }
339}
340
341/* Read in the backtrace information stored in the `$UNWIND_START$' section of
342 the object file. This info is used mainly by find_unwind_entry() to find
343 out the stack frame size and frame pointer used by procedures. We put
344 everything on the psymbol obstack in the objfile so that it automatically
345 gets freed when the objfile is destroyed. */
346
347static void
fba45db2 348read_unwind_info (struct objfile *objfile)
c906108c 349{
d4f3574e 350 asection *unwind_sec, *stub_unwind_sec;
241fd515 351 size_t unwind_size, stub_unwind_size, total_size;
d4f3574e 352 unsigned index, unwind_entries;
c906108c
SS
353 unsigned stub_entries, total_entries;
354 CORE_ADDR text_offset;
7c46b9fb
RC
355 struct hppa_unwind_info *ui;
356 struct hppa_objfile_private *obj_private;
c906108c 357
a99dad3d 358 text_offset = ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT (objfile));
7c46b9fb
RC
359 ui = (struct hppa_unwind_info *) obstack_alloc (&objfile->objfile_obstack,
360 sizeof (struct hppa_unwind_info));
c906108c
SS
361
362 ui->table = NULL;
363 ui->cache = NULL;
364 ui->last = -1;
365
d4f3574e
SS
366 /* For reasons unknown the HP PA64 tools generate multiple unwinder
367 sections in a single executable. So we just iterate over every
368 section in the BFD looking for unwinder sections intead of trying
1777feb0 369 to do a lookup with bfd_get_section_by_name.
c906108c 370
d4f3574e
SS
371 First determine the total size of the unwind tables so that we
372 can allocate memory in a nice big hunk. */
373 total_entries = 0;
374 for (unwind_sec = objfile->obfd->sections;
375 unwind_sec;
376 unwind_sec = unwind_sec->next)
c906108c 377 {
d4f3574e
SS
378 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
379 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
380 {
381 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
382 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
c906108c 383
d4f3574e
SS
384 total_entries += unwind_entries;
385 }
c906108c
SS
386 }
387
d4f3574e 388 /* Now compute the size of the stub unwinds. Note the ELF tools do not
043f5962 389 use stub unwinds at the current time. */
d4f3574e
SS
390 stub_unwind_sec = bfd_get_section_by_name (objfile->obfd, "$UNWIND_END$");
391
c906108c
SS
392 if (stub_unwind_sec)
393 {
394 stub_unwind_size = bfd_section_size (objfile->obfd, stub_unwind_sec);
395 stub_entries = stub_unwind_size / STUB_UNWIND_ENTRY_SIZE;
396 }
397 else
398 {
399 stub_unwind_size = 0;
400 stub_entries = 0;
401 }
402
403 /* Compute total number of unwind entries and their total size. */
d4f3574e 404 total_entries += stub_entries;
c906108c
SS
405 total_size = total_entries * sizeof (struct unwind_table_entry);
406
407 /* Allocate memory for the unwind table. */
408 ui->table = (struct unwind_table_entry *)
8b92e4d5 409 obstack_alloc (&objfile->objfile_obstack, total_size);
c5aa993b 410 ui->last = total_entries - 1;
c906108c 411
d4f3574e
SS
412 /* Now read in each unwind section and internalize the standard unwind
413 entries. */
c906108c 414 index = 0;
d4f3574e
SS
415 for (unwind_sec = objfile->obfd->sections;
416 unwind_sec;
417 unwind_sec = unwind_sec->next)
418 {
419 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
420 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
421 {
422 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
423 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
424
425 internalize_unwinds (objfile, &ui->table[index], unwind_sec,
426 unwind_entries, unwind_size, text_offset);
427 index += unwind_entries;
428 }
429 }
430
431 /* Now read in and internalize the stub unwind entries. */
c906108c
SS
432 if (stub_unwind_size > 0)
433 {
434 unsigned int i;
224c3ddb 435 char *buf = (char *) alloca (stub_unwind_size);
c906108c
SS
436
437 /* Read in the stub unwind entries. */
438 bfd_get_section_contents (objfile->obfd, stub_unwind_sec, buf,
439 0, stub_unwind_size);
440
441 /* Now convert them into regular unwind entries. */
442 for (i = 0; i < stub_entries; i++, index++)
443 {
444 /* Clear out the next unwind entry. */
445 memset (&ui->table[index], 0, sizeof (struct unwind_table_entry));
446
1777feb0 447 /* Convert offset & size into region_start and region_end.
c906108c
SS
448 Stuff away the stub type into "reserved" fields. */
449 ui->table[index].region_start = bfd_get_32 (objfile->obfd,
450 (bfd_byte *) buf);
451 ui->table[index].region_start += text_offset;
452 buf += 4;
453 ui->table[index].stub_unwind.stub_type = bfd_get_8 (objfile->obfd,
c5aa993b 454 (bfd_byte *) buf);
c906108c
SS
455 buf += 2;
456 ui->table[index].region_end
c5aa993b
JM
457 = ui->table[index].region_start + 4 *
458 (bfd_get_16 (objfile->obfd, (bfd_byte *) buf) - 1);
c906108c
SS
459 buf += 2;
460 }
461
462 }
463
464 /* Unwind table needs to be kept sorted. */
465 qsort (ui->table, total_entries, sizeof (struct unwind_table_entry),
466 compare_unwind_entries);
467
468 /* Keep a pointer to the unwind information. */
7c46b9fb
RC
469 obj_private = (struct hppa_objfile_private *)
470 objfile_data (objfile, hppa_objfile_priv_data);
471 if (obj_private == NULL)
77d18ded
RC
472 obj_private = hppa_init_objfile_priv_data (objfile);
473
c906108c
SS
474 obj_private->unwind_info = ui;
475}
476
477/* Lookup the unwind (stack backtrace) info for the given PC. We search all
478 of the objfiles seeking the unwind table entry for this PC. Each objfile
479 contains a sorted list of struct unwind_table_entry. Since we do a binary
480 search of the unwind tables, we depend upon them to be sorted. */
481
482struct unwind_table_entry *
fba45db2 483find_unwind_entry (CORE_ADDR pc)
c906108c
SS
484{
485 int first, middle, last;
486 struct objfile *objfile;
7c46b9fb 487 struct hppa_objfile_private *priv;
c906108c 488
369aa520 489 if (hppa_debug)
5af949e3
UW
490 fprintf_unfiltered (gdb_stdlog, "{ find_unwind_entry %s -> ",
491 hex_string (pc));
369aa520 492
1777feb0 493 /* A function at address 0? Not in HP-UX! */
c906108c 494 if (pc == (CORE_ADDR) 0)
369aa520
RC
495 {
496 if (hppa_debug)
497 fprintf_unfiltered (gdb_stdlog, "NULL }\n");
498 return NULL;
499 }
c906108c
SS
500
501 ALL_OBJFILES (objfile)
c5aa993b 502 {
7c46b9fb 503 struct hppa_unwind_info *ui;
c5aa993b 504 ui = NULL;
9a3c8263
SM
505 priv = ((struct hppa_objfile_private *)
506 objfile_data (objfile, hppa_objfile_priv_data));
7c46b9fb
RC
507 if (priv)
508 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c906108c 509
c5aa993b
JM
510 if (!ui)
511 {
512 read_unwind_info (objfile);
9a3c8263
SM
513 priv = ((struct hppa_objfile_private *)
514 objfile_data (objfile, hppa_objfile_priv_data));
7c46b9fb 515 if (priv == NULL)
8a3fe4f8 516 error (_("Internal error reading unwind information."));
7c46b9fb 517 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c5aa993b 518 }
c906108c 519
1777feb0 520 /* First, check the cache. */
c906108c 521
c5aa993b
JM
522 if (ui->cache
523 && pc >= ui->cache->region_start
524 && pc <= ui->cache->region_end)
369aa520
RC
525 {
526 if (hppa_debug)
5af949e3
UW
527 fprintf_unfiltered (gdb_stdlog, "%s (cached) }\n",
528 hex_string ((uintptr_t) ui->cache));
369aa520
RC
529 return ui->cache;
530 }
c906108c 531
1777feb0 532 /* Not in the cache, do a binary search. */
c906108c 533
c5aa993b
JM
534 first = 0;
535 last = ui->last;
c906108c 536
c5aa993b
JM
537 while (first <= last)
538 {
539 middle = (first + last) / 2;
540 if (pc >= ui->table[middle].region_start
541 && pc <= ui->table[middle].region_end)
542 {
543 ui->cache = &ui->table[middle];
369aa520 544 if (hppa_debug)
5af949e3
UW
545 fprintf_unfiltered (gdb_stdlog, "%s }\n",
546 hex_string ((uintptr_t) ui->cache));
c5aa993b
JM
547 return &ui->table[middle];
548 }
c906108c 549
c5aa993b
JM
550 if (pc < ui->table[middle].region_start)
551 last = middle - 1;
552 else
553 first = middle + 1;
554 }
555 } /* ALL_OBJFILES() */
369aa520
RC
556
557 if (hppa_debug)
558 fprintf_unfiltered (gdb_stdlog, "NULL (not found) }\n");
559
c906108c
SS
560 return NULL;
561}
562
c9cf6e20
MG
563/* Implement the stack_frame_destroyed_p gdbarch method.
564
565 The epilogue is defined here as the area either on the `bv' instruction
1777feb0 566 itself or an instruction which destroys the function's stack frame.
1fb24930
RC
567
568 We do not assume that the epilogue is at the end of a function as we can
569 also have return sequences in the middle of a function. */
c9cf6e20 570
1fb24930 571static int
c9cf6e20 572hppa_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1fb24930 573{
e17a4113 574 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1fb24930
RC
575 unsigned long status;
576 unsigned int inst;
e362b510 577 gdb_byte buf[4];
1fb24930 578
8defab1a 579 status = target_read_memory (pc, buf, 4);
1fb24930
RC
580 if (status != 0)
581 return 0;
582
e17a4113 583 inst = extract_unsigned_integer (buf, 4, byte_order);
1fb24930
RC
584
585 /* The most common way to perform a stack adjustment ldo X(sp),sp
586 We are destroying a stack frame if the offset is negative. */
587 if ((inst & 0xffffc000) == 0x37de0000
588 && hppa_extract_14 (inst) < 0)
589 return 1;
590
591 /* ldw,mb D(sp),X or ldd,mb D(sp),X */
592 if (((inst & 0x0fc010e0) == 0x0fc010e0
593 || (inst & 0x0fc010e0) == 0x0fc010e0)
594 && hppa_extract_14 (inst) < 0)
595 return 1;
596
597 /* bv %r0(%rp) or bv,n %r0(%rp) */
598 if (inst == 0xe840c000 || inst == 0xe840c002)
599 return 1;
600
601 return 0;
602}
603
04180708 604constexpr gdb_byte hppa_break_insn[] = {0x00, 0x01, 0x00, 0x04};
598cc9dc 605
04180708 606typedef BP_MANIPULATION (hppa_break_insn) hppa_breakpoint;
aaab4dba 607
e23457df
AC
608/* Return the name of a register. */
609
4a302917 610static const char *
d93859e2 611hppa32_register_name (struct gdbarch *gdbarch, int i)
e23457df 612{
a121b7c1 613 static const char *names[] = {
e23457df
AC
614 "flags", "r1", "rp", "r3",
615 "r4", "r5", "r6", "r7",
616 "r8", "r9", "r10", "r11",
617 "r12", "r13", "r14", "r15",
618 "r16", "r17", "r18", "r19",
619 "r20", "r21", "r22", "r23",
620 "r24", "r25", "r26", "dp",
621 "ret0", "ret1", "sp", "r31",
622 "sar", "pcoqh", "pcsqh", "pcoqt",
623 "pcsqt", "eiem", "iir", "isr",
624 "ior", "ipsw", "goto", "sr4",
625 "sr0", "sr1", "sr2", "sr3",
626 "sr5", "sr6", "sr7", "cr0",
627 "cr8", "cr9", "ccr", "cr12",
628 "cr13", "cr24", "cr25", "cr26",
629 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
630 "fpsr", "fpe1", "fpe2", "fpe3",
631 "fpe4", "fpe5", "fpe6", "fpe7",
632 "fr4", "fr4R", "fr5", "fr5R",
633 "fr6", "fr6R", "fr7", "fr7R",
634 "fr8", "fr8R", "fr9", "fr9R",
635 "fr10", "fr10R", "fr11", "fr11R",
636 "fr12", "fr12R", "fr13", "fr13R",
637 "fr14", "fr14R", "fr15", "fr15R",
638 "fr16", "fr16R", "fr17", "fr17R",
639 "fr18", "fr18R", "fr19", "fr19R",
640 "fr20", "fr20R", "fr21", "fr21R",
641 "fr22", "fr22R", "fr23", "fr23R",
642 "fr24", "fr24R", "fr25", "fr25R",
643 "fr26", "fr26R", "fr27", "fr27R",
644 "fr28", "fr28R", "fr29", "fr29R",
645 "fr30", "fr30R", "fr31", "fr31R"
646 };
647 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
648 return NULL;
649 else
650 return names[i];
651}
652
4a302917 653static const char *
d93859e2 654hppa64_register_name (struct gdbarch *gdbarch, int i)
e23457df 655{
a121b7c1 656 static const char *names[] = {
e23457df
AC
657 "flags", "r1", "rp", "r3",
658 "r4", "r5", "r6", "r7",
659 "r8", "r9", "r10", "r11",
660 "r12", "r13", "r14", "r15",
661 "r16", "r17", "r18", "r19",
662 "r20", "r21", "r22", "r23",
663 "r24", "r25", "r26", "dp",
664 "ret0", "ret1", "sp", "r31",
665 "sar", "pcoqh", "pcsqh", "pcoqt",
666 "pcsqt", "eiem", "iir", "isr",
667 "ior", "ipsw", "goto", "sr4",
668 "sr0", "sr1", "sr2", "sr3",
669 "sr5", "sr6", "sr7", "cr0",
670 "cr8", "cr9", "ccr", "cr12",
671 "cr13", "cr24", "cr25", "cr26",
672 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
673 "fpsr", "fpe1", "fpe2", "fpe3",
674 "fr4", "fr5", "fr6", "fr7",
675 "fr8", "fr9", "fr10", "fr11",
676 "fr12", "fr13", "fr14", "fr15",
677 "fr16", "fr17", "fr18", "fr19",
678 "fr20", "fr21", "fr22", "fr23",
679 "fr24", "fr25", "fr26", "fr27",
680 "fr28", "fr29", "fr30", "fr31"
681 };
682 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
683 return NULL;
684 else
685 return names[i];
686}
687
85c83e99 688/* Map dwarf DBX register numbers to GDB register numbers. */
1ef7fcb5 689static int
d3f73121 690hppa64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1ef7fcb5 691{
85c83e99 692 /* The general registers and the sar are the same in both sets. */
0fde2c53 693 if (reg >= 0 && reg <= 32)
1ef7fcb5
RC
694 return reg;
695
696 /* fr4-fr31 are mapped from 72 in steps of 2. */
85c83e99 697 if (reg >= 72 && reg < 72 + 28 * 2 && !(reg & 1))
1ef7fcb5
RC
698 return HPPA64_FP4_REGNUM + (reg - 72) / 2;
699
1ef7fcb5
RC
700 return -1;
701}
702
79508e1e
AC
703/* This function pushes a stack frame with arguments as part of the
704 inferior function calling mechanism.
705
706 This is the version of the function for the 32-bit PA machines, in
707 which later arguments appear at lower addresses. (The stack always
708 grows towards higher addresses.)
709
710 We simply allocate the appropriate amount of stack space and put
711 arguments into their proper slots. */
712
4a302917 713static CORE_ADDR
7d9b040b 714hppa32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
79508e1e
AC
715 struct regcache *regcache, CORE_ADDR bp_addr,
716 int nargs, struct value **args, CORE_ADDR sp,
cf84fa6b
AH
717 function_call_return_method return_method,
718 CORE_ADDR struct_addr)
79508e1e 719{
e17a4113
UW
720 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
721
79508e1e
AC
722 /* Stack base address at which any pass-by-reference parameters are
723 stored. */
724 CORE_ADDR struct_end = 0;
725 /* Stack base address at which the first parameter is stored. */
726 CORE_ADDR param_end = 0;
727
79508e1e
AC
728 /* Two passes. First pass computes the location of everything,
729 second pass writes the bytes out. */
730 int write_pass;
d49771ef
RC
731
732 /* Global pointer (r19) of the function we are trying to call. */
733 CORE_ADDR gp;
734
735 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
736
79508e1e
AC
737 for (write_pass = 0; write_pass < 2; write_pass++)
738 {
1797a8f6 739 CORE_ADDR struct_ptr = 0;
1777feb0 740 /* The first parameter goes into sp-36, each stack slot is 4-bytes.
2a6228ef
RC
741 struct_ptr is adjusted for each argument below, so the first
742 argument will end up at sp-36. */
743 CORE_ADDR param_ptr = 32;
79508e1e 744 int i;
2a6228ef
RC
745 int small_struct = 0;
746
79508e1e
AC
747 for (i = 0; i < nargs; i++)
748 {
749 struct value *arg = args[i];
4991999e 750 struct type *type = check_typedef (value_type (arg));
79508e1e
AC
751 /* The corresponding parameter that is pushed onto the
752 stack, and [possibly] passed in a register. */
948f8e3d 753 gdb_byte param_val[8];
79508e1e
AC
754 int param_len;
755 memset (param_val, 0, sizeof param_val);
756 if (TYPE_LENGTH (type) > 8)
757 {
758 /* Large parameter, pass by reference. Store the value
759 in "struct" area and then pass its address. */
760 param_len = 4;
1797a8f6 761 struct_ptr += align_up (TYPE_LENGTH (type), 8);
79508e1e 762 if (write_pass)
0fd88904 763 write_memory (struct_end - struct_ptr, value_contents (arg),
79508e1e 764 TYPE_LENGTH (type));
e17a4113
UW
765 store_unsigned_integer (param_val, 4, byte_order,
766 struct_end - struct_ptr);
79508e1e
AC
767 }
768 else if (TYPE_CODE (type) == TYPE_CODE_INT
769 || TYPE_CODE (type) == TYPE_CODE_ENUM)
770 {
771 /* Integer value store, right aligned. "unpack_long"
772 takes care of any sign-extension problems. */
773 param_len = align_up (TYPE_LENGTH (type), 4);
e17a4113 774 store_unsigned_integer (param_val, param_len, byte_order,
79508e1e 775 unpack_long (type,
0fd88904 776 value_contents (arg)));
79508e1e 777 }
2a6228ef
RC
778 else if (TYPE_CODE (type) == TYPE_CODE_FLT)
779 {
780 /* Floating point value store, right aligned. */
781 param_len = align_up (TYPE_LENGTH (type), 4);
0fd88904 782 memcpy (param_val, value_contents (arg), param_len);
2a6228ef 783 }
79508e1e
AC
784 else
785 {
79508e1e 786 param_len = align_up (TYPE_LENGTH (type), 4);
2a6228ef
RC
787
788 /* Small struct value are stored right-aligned. */
79508e1e 789 memcpy (param_val + param_len - TYPE_LENGTH (type),
0fd88904 790 value_contents (arg), TYPE_LENGTH (type));
2a6228ef
RC
791
792 /* Structures of size 5, 6 and 7 bytes are special in that
793 the higher-ordered word is stored in the lower-ordered
794 argument, and even though it is a 8-byte quantity the
795 registers need not be 8-byte aligned. */
1b07b470 796 if (param_len > 4 && param_len < 8)
2a6228ef 797 small_struct = 1;
79508e1e 798 }
2a6228ef 799
1797a8f6 800 param_ptr += param_len;
2a6228ef
RC
801 if (param_len == 8 && !small_struct)
802 param_ptr = align_up (param_ptr, 8);
803
804 /* First 4 non-FP arguments are passed in gr26-gr23.
805 First 4 32-bit FP arguments are passed in fr4L-fr7L.
806 First 2 64-bit FP arguments are passed in fr5 and fr7.
807
808 The rest go on the stack, starting at sp-36, towards lower
809 addresses. 8-byte arguments must be aligned to a 8-byte
810 stack boundary. */
79508e1e
AC
811 if (write_pass)
812 {
1797a8f6 813 write_memory (param_end - param_ptr, param_val, param_len);
2a6228ef
RC
814
815 /* There are some cases when we don't know the type
816 expected by the callee (e.g. for variadic functions), so
817 pass the parameters in both general and fp regs. */
818 if (param_ptr <= 48)
79508e1e 819 {
2a6228ef
RC
820 int grreg = 26 - (param_ptr - 36) / 4;
821 int fpLreg = 72 + (param_ptr - 36) / 4 * 2;
822 int fpreg = 74 + (param_ptr - 32) / 8 * 4;
823
b66f5587
SM
824 regcache->cooked_write (grreg, param_val);
825 regcache->cooked_write (fpLreg, param_val);
2a6228ef 826
79508e1e 827 if (param_len > 4)
2a6228ef 828 {
b66f5587 829 regcache->cooked_write (grreg + 1, param_val + 4);
2a6228ef 830
b66f5587
SM
831 regcache->cooked_write (fpreg, param_val);
832 regcache->cooked_write (fpreg + 1, param_val + 4);
2a6228ef 833 }
79508e1e
AC
834 }
835 }
836 }
837
838 /* Update the various stack pointers. */
839 if (!write_pass)
840 {
2a6228ef 841 struct_end = sp + align_up (struct_ptr, 64);
79508e1e
AC
842 /* PARAM_PTR already accounts for all the arguments passed
843 by the user. However, the ABI mandates minimum stack
844 space allocations for outgoing arguments. The ABI also
845 mandates minimum stack alignments which we must
846 preserve. */
2a6228ef 847 param_end = struct_end + align_up (param_ptr, 64);
79508e1e
AC
848 }
849 }
850
851 /* If a structure has to be returned, set up register 28 to hold its
1777feb0 852 address. */
cf84fa6b 853 if (return_method == return_method_struct)
9c9acae0 854 regcache_cooked_write_unsigned (regcache, 28, struct_addr);
79508e1e 855
e38c262f 856 gp = tdep->find_global_pointer (gdbarch, function);
d49771ef
RC
857
858 if (gp != 0)
9c9acae0 859 regcache_cooked_write_unsigned (regcache, 19, gp);
d49771ef 860
79508e1e 861 /* Set the return address. */
77d18ded
RC
862 if (!gdbarch_push_dummy_code_p (gdbarch))
863 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
79508e1e 864
c4557624 865 /* Update the Stack Pointer. */
34f75cc1 866 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, param_end);
c4557624 867
2a6228ef 868 return param_end;
79508e1e
AC
869}
870
38ca4e0c
MK
871/* The 64-bit PA-RISC calling conventions are documented in "64-Bit
872 Runtime Architecture for PA-RISC 2.0", which is distributed as part
873 as of the HP-UX Software Transition Kit (STK). This implementation
874 is based on version 3.3, dated October 6, 1997. */
2f690297 875
38ca4e0c 876/* Check whether TYPE is an "Integral or Pointer Scalar Type". */
2f690297 877
38ca4e0c
MK
878static int
879hppa64_integral_or_pointer_p (const struct type *type)
880{
881 switch (TYPE_CODE (type))
882 {
883 case TYPE_CODE_INT:
884 case TYPE_CODE_BOOL:
885 case TYPE_CODE_CHAR:
886 case TYPE_CODE_ENUM:
887 case TYPE_CODE_RANGE:
888 {
889 int len = TYPE_LENGTH (type);
890 return (len == 1 || len == 2 || len == 4 || len == 8);
891 }
892 case TYPE_CODE_PTR:
893 case TYPE_CODE_REF:
aa006118 894 case TYPE_CODE_RVALUE_REF:
38ca4e0c
MK
895 return (TYPE_LENGTH (type) == 8);
896 default:
897 break;
898 }
899
900 return 0;
901}
902
903/* Check whether TYPE is a "Floating Scalar Type". */
904
905static int
906hppa64_floating_p (const struct type *type)
907{
908 switch (TYPE_CODE (type))
909 {
910 case TYPE_CODE_FLT:
911 {
912 int len = TYPE_LENGTH (type);
913 return (len == 4 || len == 8 || len == 16);
914 }
915 default:
916 break;
917 }
918
919 return 0;
920}
2f690297 921
1218e655
RC
922/* If CODE points to a function entry address, try to look up the corresponding
923 function descriptor and return its address instead. If CODE is not a
924 function entry address, then just return it unchanged. */
925static CORE_ADDR
e17a4113 926hppa64_convert_code_addr_to_fptr (struct gdbarch *gdbarch, CORE_ADDR code)
1218e655 927{
e17a4113 928 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1218e655
RC
929 struct obj_section *sec, *opd;
930
931 sec = find_pc_section (code);
932
933 if (!sec)
934 return code;
935
936 /* If CODE is in a data section, assume it's already a fptr. */
937 if (!(sec->the_bfd_section->flags & SEC_CODE))
938 return code;
939
940 ALL_OBJFILE_OSECTIONS (sec->objfile, opd)
941 {
942 if (strcmp (opd->the_bfd_section->name, ".opd") == 0)
aded6f54 943 break;
1218e655
RC
944 }
945
946 if (opd < sec->objfile->sections_end)
947 {
948 CORE_ADDR addr;
949
aded6f54
PA
950 for (addr = obj_section_addr (opd);
951 addr < obj_section_endaddr (opd);
952 addr += 2 * 8)
953 {
1218e655 954 ULONGEST opdaddr;
948f8e3d 955 gdb_byte tmp[8];
1218e655
RC
956
957 if (target_read_memory (addr, tmp, sizeof (tmp)))
958 break;
e17a4113 959 opdaddr = extract_unsigned_integer (tmp, sizeof (tmp), byte_order);
1218e655 960
aded6f54 961 if (opdaddr == code)
1218e655
RC
962 return addr - 16;
963 }
964 }
965
966 return code;
967}
968
4a302917 969static CORE_ADDR
7d9b040b 970hppa64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
2f690297
AC
971 struct regcache *regcache, CORE_ADDR bp_addr,
972 int nargs, struct value **args, CORE_ADDR sp,
cf84fa6b
AH
973 function_call_return_method return_method,
974 CORE_ADDR struct_addr)
2f690297 975{
38ca4e0c 976 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 977 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
38ca4e0c
MK
978 int i, offset = 0;
979 CORE_ADDR gp;
2f690297 980
38ca4e0c
MK
981 /* "The outgoing parameter area [...] must be aligned at a 16-byte
982 boundary." */
983 sp = align_up (sp, 16);
2f690297 984
38ca4e0c
MK
985 for (i = 0; i < nargs; i++)
986 {
987 struct value *arg = args[i];
988 struct type *type = value_type (arg);
989 int len = TYPE_LENGTH (type);
0fd88904 990 const bfd_byte *valbuf;
1218e655 991 bfd_byte fptrbuf[8];
38ca4e0c 992 int regnum;
2f690297 993
38ca4e0c
MK
994 /* "Each parameter begins on a 64-bit (8-byte) boundary." */
995 offset = align_up (offset, 8);
77d18ded 996
38ca4e0c 997 if (hppa64_integral_or_pointer_p (type))
2f690297 998 {
38ca4e0c
MK
999 /* "Integral scalar parameters smaller than 64 bits are
1000 padded on the left (i.e., the value is in the
1001 least-significant bits of the 64-bit storage unit, and
1002 the high-order bits are undefined)." Therefore we can
1003 safely sign-extend them. */
1004 if (len < 8)
449e1137 1005 {
df4df182 1006 arg = value_cast (builtin_type (gdbarch)->builtin_int64, arg);
38ca4e0c
MK
1007 len = 8;
1008 }
1009 }
1010 else if (hppa64_floating_p (type))
1011 {
1012 if (len > 8)
1013 {
1014 /* "Quad-precision (128-bit) floating-point scalar
1015 parameters are aligned on a 16-byte boundary." */
1016 offset = align_up (offset, 16);
1017
1018 /* "Double-extended- and quad-precision floating-point
1019 parameters within the first 64 bytes of the parameter
1020 list are always passed in general registers." */
449e1137
AC
1021 }
1022 else
1023 {
38ca4e0c 1024 if (len == 4)
449e1137 1025 {
38ca4e0c
MK
1026 /* "Single-precision (32-bit) floating-point scalar
1027 parameters are padded on the left with 32 bits of
1028 garbage (i.e., the floating-point value is in the
1029 least-significant 32 bits of a 64-bit storage
1030 unit)." */
1031 offset += 4;
449e1137 1032 }
38ca4e0c
MK
1033
1034 /* "Single- and double-precision floating-point
1035 parameters in this area are passed according to the
1036 available formal parameter information in a function
1037 prototype. [...] If no prototype is in scope,
1038 floating-point parameters must be passed both in the
1039 corresponding general registers and in the
1040 corresponding floating-point registers." */
1041 regnum = HPPA64_FP4_REGNUM + offset / 8;
1042
1043 if (regnum < HPPA64_FP4_REGNUM + 8)
449e1137 1044 {
38ca4e0c
MK
1045 /* "Single-precision floating-point parameters, when
1046 passed in floating-point registers, are passed in
1047 the right halves of the floating point registers;
1048 the left halves are unused." */
e4c4a59b
SM
1049 regcache->cooked_write_part (regnum, offset % 8, len,
1050 value_contents (arg));
449e1137
AC
1051 }
1052 }
2f690297 1053 }
38ca4e0c 1054 else
2f690297 1055 {
38ca4e0c
MK
1056 if (len > 8)
1057 {
1058 /* "Aggregates larger than 8 bytes are aligned on a
1059 16-byte boundary, possibly leaving an unused argument
1777feb0 1060 slot, which is filled with garbage. If necessary,
38ca4e0c
MK
1061 they are padded on the right (with garbage), to a
1062 multiple of 8 bytes." */
1063 offset = align_up (offset, 16);
1064 }
1065 }
1066
1218e655
RC
1067 /* If we are passing a function pointer, make sure we pass a function
1068 descriptor instead of the function entry address. */
1069 if (TYPE_CODE (type) == TYPE_CODE_PTR
1070 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1071 {
1072 ULONGEST codeptr, fptr;
1073
1074 codeptr = unpack_long (type, value_contents (arg));
e17a4113
UW
1075 fptr = hppa64_convert_code_addr_to_fptr (gdbarch, codeptr);
1076 store_unsigned_integer (fptrbuf, TYPE_LENGTH (type), byte_order,
1077 fptr);
1218e655
RC
1078 valbuf = fptrbuf;
1079 }
1080 else
1081 {
1082 valbuf = value_contents (arg);
1083 }
1084
38ca4e0c 1085 /* Always store the argument in memory. */
1218e655 1086 write_memory (sp + offset, valbuf, len);
38ca4e0c 1087
38ca4e0c
MK
1088 regnum = HPPA_ARG0_REGNUM - offset / 8;
1089 while (regnum > HPPA_ARG0_REGNUM - 8 && len > 0)
1090 {
e4c4a59b
SM
1091 regcache->cooked_write_part (regnum, offset % 8, std::min (len, 8),
1092 valbuf);
325fac50
PA
1093 offset += std::min (len, 8);
1094 valbuf += std::min (len, 8);
1095 len -= std::min (len, 8);
38ca4e0c 1096 regnum--;
2f690297 1097 }
38ca4e0c
MK
1098
1099 offset += len;
2f690297
AC
1100 }
1101
38ca4e0c
MK
1102 /* Set up GR29 (%ret1) to hold the argument pointer (ap). */
1103 regcache_cooked_write_unsigned (regcache, HPPA_RET1_REGNUM, sp + 64);
1104
1105 /* Allocate the outgoing parameter area. Make sure the outgoing
1106 parameter area is multiple of 16 bytes in length. */
325fac50 1107 sp += std::max (align_up (offset, 16), (ULONGEST) 64);
38ca4e0c
MK
1108
1109 /* Allocate 32-bytes of scratch space. The documentation doesn't
1110 mention this, but it seems to be needed. */
1111 sp += 32;
1112
1113 /* Allocate the frame marker area. */
1114 sp += 16;
1115
1116 /* If a structure has to be returned, set up GR 28 (%ret0) to hold
1117 its address. */
cf84fa6b 1118 if (return_method == return_method_struct)
38ca4e0c 1119 regcache_cooked_write_unsigned (regcache, HPPA_RET0_REGNUM, struct_addr);
2f690297 1120
38ca4e0c 1121 /* Set up GR27 (%dp) to hold the global pointer (gp). */
e38c262f 1122 gp = tdep->find_global_pointer (gdbarch, function);
77d18ded 1123 if (gp != 0)
38ca4e0c 1124 regcache_cooked_write_unsigned (regcache, HPPA_DP_REGNUM, gp);
77d18ded 1125
38ca4e0c 1126 /* Set up GR2 (%rp) to hold the return pointer (rp). */
77d18ded
RC
1127 if (!gdbarch_push_dummy_code_p (gdbarch))
1128 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
2f690297 1129
38ca4e0c
MK
1130 /* Set up GR30 to hold the stack pointer (sp). */
1131 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, sp);
c4557624 1132
38ca4e0c 1133 return sp;
2f690297 1134}
38ca4e0c 1135\f
2f690297 1136
08a27113
MK
1137/* Handle 32/64-bit struct return conventions. */
1138
1139static enum return_value_convention
6a3a010b 1140hppa32_return_value (struct gdbarch *gdbarch, struct value *function,
08a27113 1141 struct type *type, struct regcache *regcache,
e127f0db 1142 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1143{
1144 if (TYPE_LENGTH (type) <= 2 * 4)
1145 {
1146 /* The value always lives in the right hand end of the register
1147 (or register pair)? */
1148 int b;
1149 int reg = TYPE_CODE (type) == TYPE_CODE_FLT ? HPPA_FP4_REGNUM : 28;
1150 int part = TYPE_LENGTH (type) % 4;
1151 /* The left hand register contains only part of the value,
1152 transfer that first so that the rest can be xfered as entire
1153 4-byte registers. */
1154 if (part > 0)
1155 {
1156 if (readbuf != NULL)
73bb0000 1157 regcache->cooked_read_part (reg, 4 - part, part, readbuf);
08a27113 1158 if (writebuf != NULL)
e4c4a59b 1159 regcache->cooked_write_part (reg, 4 - part, part, writebuf);
08a27113
MK
1160 reg++;
1161 }
1162 /* Now transfer the remaining register values. */
1163 for (b = part; b < TYPE_LENGTH (type); b += 4)
1164 {
1165 if (readbuf != NULL)
dca08e1f 1166 regcache->cooked_read (reg, readbuf + b);
08a27113 1167 if (writebuf != NULL)
b66f5587 1168 regcache->cooked_write (reg, writebuf + b);
08a27113
MK
1169 reg++;
1170 }
1171 return RETURN_VALUE_REGISTER_CONVENTION;
1172 }
1173 else
1174 return RETURN_VALUE_STRUCT_CONVENTION;
1175}
1176
1177static enum return_value_convention
6a3a010b 1178hppa64_return_value (struct gdbarch *gdbarch, struct value *function,
08a27113 1179 struct type *type, struct regcache *regcache,
e127f0db 1180 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1181{
1182 int len = TYPE_LENGTH (type);
1183 int regnum, offset;
1184
bad43aa5 1185 if (len > 16)
08a27113
MK
1186 {
1187 /* All return values larget than 128 bits must be aggregate
1188 return values. */
9738b034
MK
1189 gdb_assert (!hppa64_integral_or_pointer_p (type));
1190 gdb_assert (!hppa64_floating_p (type));
08a27113
MK
1191
1192 /* "Aggregate return values larger than 128 bits are returned in
1193 a buffer allocated by the caller. The address of the buffer
1194 must be passed in GR 28." */
1195 return RETURN_VALUE_STRUCT_CONVENTION;
1196 }
1197
1198 if (hppa64_integral_or_pointer_p (type))
1199 {
1200 /* "Integral return values are returned in GR 28. Values
1201 smaller than 64 bits are padded on the left (with garbage)." */
1202 regnum = HPPA_RET0_REGNUM;
1203 offset = 8 - len;
1204 }
1205 else if (hppa64_floating_p (type))
1206 {
1207 if (len > 8)
1208 {
1209 /* "Double-extended- and quad-precision floating-point
1210 values are returned in GRs 28 and 29. The sign,
1211 exponent, and most-significant bits of the mantissa are
1212 returned in GR 28; the least-significant bits of the
1213 mantissa are passed in GR 29. For double-extended
1214 precision values, GR 29 is padded on the right with 48
1215 bits of garbage." */
1216 regnum = HPPA_RET0_REGNUM;
1217 offset = 0;
1218 }
1219 else
1220 {
1221 /* "Single-precision and double-precision floating-point
1222 return values are returned in FR 4R (single precision) or
1223 FR 4 (double-precision)." */
1224 regnum = HPPA64_FP4_REGNUM;
1225 offset = 8 - len;
1226 }
1227 }
1228 else
1229 {
1230 /* "Aggregate return values up to 64 bits in size are returned
1231 in GR 28. Aggregates smaller than 64 bits are left aligned
1232 in the register; the pad bits on the right are undefined."
1233
1234 "Aggregate return values between 65 and 128 bits are returned
1235 in GRs 28 and 29. The first 64 bits are placed in GR 28, and
1236 the remaining bits are placed, left aligned, in GR 29. The
1237 pad bits on the right of GR 29 (if any) are undefined." */
1238 regnum = HPPA_RET0_REGNUM;
1239 offset = 0;
1240 }
1241
1242 if (readbuf)
1243 {
08a27113
MK
1244 while (len > 0)
1245 {
73bb0000
SM
1246 regcache->cooked_read_part (regnum, offset, std::min (len, 8),
1247 readbuf);
325fac50
PA
1248 readbuf += std::min (len, 8);
1249 len -= std::min (len, 8);
08a27113
MK
1250 regnum++;
1251 }
1252 }
1253
1254 if (writebuf)
1255 {
08a27113
MK
1256 while (len > 0)
1257 {
e4c4a59b
SM
1258 regcache->cooked_write_part (regnum, offset, std::min (len, 8),
1259 writebuf);
325fac50
PA
1260 writebuf += std::min (len, 8);
1261 len -= std::min (len, 8);
08a27113
MK
1262 regnum++;
1263 }
1264 }
1265
1266 return RETURN_VALUE_REGISTER_CONVENTION;
1267}
1268\f
1269
d49771ef 1270static CORE_ADDR
a7aad9aa 1271hppa32_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr,
d49771ef
RC
1272 struct target_ops *targ)
1273{
1274 if (addr & 2)
1275 {
0dfff4cb 1276 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
a7aad9aa 1277 CORE_ADDR plabel = addr & ~3;
0dfff4cb 1278 return read_memory_typed_address (plabel, func_ptr_type);
d49771ef
RC
1279 }
1280
1281 return addr;
1282}
1283
1797a8f6
AC
1284static CORE_ADDR
1285hppa32_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1286{
1287 /* HP frames are 64-byte (or cache line) aligned (yes that's _byte_
1288 and not _bit_)! */
1289 return align_up (addr, 64);
1290}
1291
2f690297
AC
1292/* Force all frames to 16-byte alignment. Better safe than sorry. */
1293
1294static CORE_ADDR
1797a8f6 1295hppa64_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2f690297
AC
1296{
1297 /* Just always 16-byte align. */
1298 return align_up (addr, 16);
1299}
1300
cc72850f 1301CORE_ADDR
c113ed0c 1302hppa_read_pc (readable_regcache *regcache)
c906108c 1303{
cc72850f 1304 ULONGEST ipsw;
61a1198a 1305 ULONGEST pc;
c906108c 1306
c113ed0c
YQ
1307 regcache->cooked_read (HPPA_IPSW_REGNUM, &ipsw);
1308 regcache->cooked_read (HPPA_PCOQ_HEAD_REGNUM, &pc);
fe46cd3a
RC
1309
1310 /* If the current instruction is nullified, then we are effectively
1311 still executing the previous instruction. Pretend we are still
cc72850f
MK
1312 there. This is needed when single stepping; if the nullified
1313 instruction is on a different line, we don't want GDB to think
1314 we've stepped onto that line. */
fe46cd3a
RC
1315 if (ipsw & 0x00200000)
1316 pc -= 4;
1317
cc72850f 1318 return pc & ~0x3;
c906108c
SS
1319}
1320
cc72850f 1321void
61a1198a 1322hppa_write_pc (struct regcache *regcache, CORE_ADDR pc)
c906108c 1323{
61a1198a
UW
1324 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, pc);
1325 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_TAIL_REGNUM, pc + 4);
c906108c
SS
1326}
1327
c906108c 1328/* For the given instruction (INST), return any adjustment it makes
1777feb0 1329 to the stack pointer or zero for no adjustment.
c906108c
SS
1330
1331 This only handles instructions commonly found in prologues. */
1332
1333static int
fba45db2 1334prologue_inst_adjust_sp (unsigned long inst)
c906108c
SS
1335{
1336 /* This must persist across calls. */
1337 static int save_high21;
1338
1339 /* The most common way to perform a stack adjustment ldo X(sp),sp */
1340 if ((inst & 0xffffc000) == 0x37de0000)
abc485a1 1341 return hppa_extract_14 (inst);
c906108c
SS
1342
1343 /* stwm X,D(sp) */
1344 if ((inst & 0xffe00000) == 0x6fc00000)
abc485a1 1345 return hppa_extract_14 (inst);
c906108c 1346
104c1213
JM
1347 /* std,ma X,D(sp) */
1348 if ((inst & 0xffe00008) == 0x73c00008)
66c6502d 1349 return (inst & 0x1 ? -(1 << 13) : 0) | (((inst >> 4) & 0x3ff) << 3);
104c1213 1350
e22b26cb 1351 /* addil high21,%r30; ldo low11,(%r1),%r30)
c906108c 1352 save high bits in save_high21 for later use. */
e22b26cb 1353 if ((inst & 0xffe00000) == 0x2bc00000)
c906108c 1354 {
abc485a1 1355 save_high21 = hppa_extract_21 (inst);
c906108c
SS
1356 return 0;
1357 }
1358
1359 if ((inst & 0xffff0000) == 0x343e0000)
abc485a1 1360 return save_high21 + hppa_extract_14 (inst);
c906108c
SS
1361
1362 /* fstws as used by the HP compilers. */
1363 if ((inst & 0xffffffe0) == 0x2fd01220)
abc485a1 1364 return hppa_extract_5_load (inst);
c906108c
SS
1365
1366 /* No adjustment. */
1367 return 0;
1368}
1369
1370/* Return nonzero if INST is a branch of some kind, else return zero. */
1371
1372static int
fba45db2 1373is_branch (unsigned long inst)
c906108c
SS
1374{
1375 switch (inst >> 26)
1376 {
1377 case 0x20:
1378 case 0x21:
1379 case 0x22:
1380 case 0x23:
7be570e7 1381 case 0x27:
c906108c
SS
1382 case 0x28:
1383 case 0x29:
1384 case 0x2a:
1385 case 0x2b:
7be570e7 1386 case 0x2f:
c906108c
SS
1387 case 0x30:
1388 case 0x31:
1389 case 0x32:
1390 case 0x33:
1391 case 0x38:
1392 case 0x39:
1393 case 0x3a:
7be570e7 1394 case 0x3b:
c906108c
SS
1395 return 1;
1396
1397 default:
1398 return 0;
1399 }
1400}
1401
1402/* Return the register number for a GR which is saved by INST or
b35018fd 1403 zero if INST does not save a GR.
c906108c 1404
b35018fd 1405 Referenced from:
7be570e7 1406
b35018fd
CG
1407 parisc 1.1:
1408 https://parisc.wiki.kernel.org/images-parisc/6/68/Pa11_acd.pdf
c906108c 1409
b35018fd
CG
1410 parisc 2.0:
1411 https://parisc.wiki.kernel.org/images-parisc/7/73/Parisc2.0.pdf
c906108c 1412
b35018fd
CG
1413 According to Table 6-5 of Chapter 6 (Memory Reference Instructions)
1414 on page 106 in parisc 2.0, all instructions for storing values from
1415 the general registers are:
c5aa993b 1416
b35018fd
CG
1417 Store: stb, sth, stw, std (according to Chapter 7, they
1418 are only in both "inst >> 26" and "inst >> 6".
1419 Store Absolute: stwa, stda (according to Chapter 7, they are only
1420 in "inst >> 6".
1421 Store Bytes: stby, stdby (according to Chapter 7, they are
1422 only in "inst >> 6").
1423
1424 For (inst >> 26), according to Chapter 7:
1425
1426 The effective memory reference address is formed by the addition
1427 of an immediate displacement to a base value.
1428
1429 - stb: 0x18, store a byte from a general register.
1430
1431 - sth: 0x19, store a halfword from a general register.
1432
1433 - stw: 0x1a, store a word from a general register.
1434
1435 - stwm: 0x1b, store a word from a general register and perform base
1436 register modification (2.0 will still treate it as stw).
1437
1438 - std: 0x1c, store a doubleword from a general register (2.0 only).
1439
1440 - stw: 0x1f, store a word from a general register (2.0 only).
1441
1442 For (inst >> 6) when ((inst >> 26) == 0x03), according to Chapter 7:
1443
1444 The effective memory reference address is formed by the addition
1445 of an index value to a base value specified in the instruction.
1446
1447 - stb: 0x08, store a byte from a general register (1.1 calls stbs).
1448
1449 - sth: 0x09, store a halfword from a general register (1.1 calls
1450 sths).
1451
1452 - stw: 0x0a, store a word from a general register (1.1 calls stws).
1453
1454 - std: 0x0b: store a doubleword from a general register (2.0 only)
1455
1456 Implement fast byte moves (stores) to unaligned word or doubleword
1457 destination.
1458
1459 - stby: 0x0c, for unaligned word (1.1 calls stbys).
1460
1461 - stdby: 0x0d for unaligned doubleword (2.0 only).
1462
1463 Store a word or doubleword using an absolute memory address formed
1464 using short or long displacement or indexed
1465
1466 - stwa: 0x0e, store a word from a general register to an absolute
1467 address (1.0 calls stwas).
1468
1469 - stda: 0x0f, store a doubleword from a general register to an
1470 absolute address (2.0 only). */
1471
1472static int
1473inst_saves_gr (unsigned long inst)
1474{
1475 switch ((inst >> 26) & 0x0f)
1476 {
1477 case 0x03:
1478 switch ((inst >> 6) & 0x0f)
1479 {
1480 case 0x08:
1481 case 0x09:
1482 case 0x0a:
1483 case 0x0b:
1484 case 0x0c:
1485 case 0x0d:
1486 case 0x0e:
1487 case 0x0f:
1488 return hppa_extract_5R_store (inst);
1489 default:
1490 return 0;
1491 }
1492 case 0x18:
1493 case 0x19:
1494 case 0x1a:
1495 case 0x1b:
1496 case 0x1c:
1497 /* no 0x1d or 0x1e -- according to parisc 2.0 document */
1498 case 0x1f:
1499 return hppa_extract_5R_store (inst);
1500 default:
1501 return 0;
1502 }
c906108c
SS
1503}
1504
1505/* Return the register number for a FR which is saved by INST or
1506 zero it INST does not save a FR.
1507
1508 Note we only care about full 64bit register stores (that's the only
1509 kind of stores the prologue will use).
1510
1511 FIXME: What about argument stores with the HP compiler in ANSI mode? */
1512
1513static int
fba45db2 1514inst_saves_fr (unsigned long inst)
c906108c 1515{
1777feb0 1516 /* Is this an FSTD? */
c906108c 1517 if ((inst & 0xfc00dfc0) == 0x2c001200)
abc485a1 1518 return hppa_extract_5r_store (inst);
7be570e7 1519 if ((inst & 0xfc000002) == 0x70000002)
abc485a1 1520 return hppa_extract_5R_store (inst);
1777feb0 1521 /* Is this an FSTW? */
c906108c 1522 if ((inst & 0xfc00df80) == 0x24001200)
abc485a1 1523 return hppa_extract_5r_store (inst);
7be570e7 1524 if ((inst & 0xfc000002) == 0x7c000000)
abc485a1 1525 return hppa_extract_5R_store (inst);
c906108c
SS
1526 return 0;
1527}
1528
1529/* Advance PC across any function entry prologue instructions
1777feb0 1530 to reach some "real" code.
c906108c
SS
1531
1532 Use information in the unwind table to determine what exactly should
1533 be in the prologue. */
1534
1535
a71f8c30 1536static CORE_ADDR
be8626e0
MD
1537skip_prologue_hard_way (struct gdbarch *gdbarch, CORE_ADDR pc,
1538 int stop_before_branch)
c906108c 1539{
e17a4113 1540 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
e362b510 1541 gdb_byte buf[4];
c906108c
SS
1542 CORE_ADDR orig_pc = pc;
1543 unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp;
1544 unsigned long args_stored, status, i, restart_gr, restart_fr;
1545 struct unwind_table_entry *u;
a71f8c30 1546 int final_iteration;
c906108c
SS
1547
1548 restart_gr = 0;
1549 restart_fr = 0;
1550
1551restart:
1552 u = find_unwind_entry (pc);
1553 if (!u)
1554 return pc;
1555
1777feb0 1556 /* If we are not at the beginning of a function, then return now. */
c906108c
SS
1557 if ((pc & ~0x3) != u->region_start)
1558 return pc;
1559
1560 /* This is how much of a frame adjustment we need to account for. */
1561 stack_remaining = u->Total_frame_size << 3;
1562
1563 /* Magic register saves we want to know about. */
1564 save_rp = u->Save_RP;
1565 save_sp = u->Save_SP;
1566
1567 /* An indication that args may be stored into the stack. Unfortunately
1568 the HPUX compilers tend to set this in cases where no args were
1569 stored too!. */
1570 args_stored = 1;
1571
1572 /* Turn the Entry_GR field into a bitmask. */
1573 save_gr = 0;
1574 for (i = 3; i < u->Entry_GR + 3; i++)
1575 {
1576 /* Frame pointer gets saved into a special location. */
eded0a31 1577 if (u->Save_SP && i == HPPA_FP_REGNUM)
c906108c
SS
1578 continue;
1579
1580 save_gr |= (1 << i);
1581 }
1582 save_gr &= ~restart_gr;
1583
1584 /* Turn the Entry_FR field into a bitmask too. */
1585 save_fr = 0;
1586 for (i = 12; i < u->Entry_FR + 12; i++)
1587 save_fr |= (1 << i);
1588 save_fr &= ~restart_fr;
1589
a71f8c30
RC
1590 final_iteration = 0;
1591
c906108c
SS
1592 /* Loop until we find everything of interest or hit a branch.
1593
1594 For unoptimized GCC code and for any HP CC code this will never ever
1595 examine any user instructions.
1596
1597 For optimzied GCC code we're faced with problems. GCC will schedule
1598 its prologue and make prologue instructions available for delay slot
1599 filling. The end result is user code gets mixed in with the prologue
1600 and a prologue instruction may be in the delay slot of the first branch
1601 or call.
1602
1603 Some unexpected things are expected with debugging optimized code, so
1604 we allow this routine to walk past user instructions in optimized
1605 GCC code. */
1606 while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0
1607 || args_stored)
1608 {
1609 unsigned int reg_num;
1610 unsigned long old_stack_remaining, old_save_gr, old_save_fr;
1611 unsigned long old_save_rp, old_save_sp, next_inst;
1612
1613 /* Save copies of all the triggers so we can compare them later
c5aa993b 1614 (only for HPC). */
c906108c
SS
1615 old_save_gr = save_gr;
1616 old_save_fr = save_fr;
1617 old_save_rp = save_rp;
1618 old_save_sp = save_sp;
1619 old_stack_remaining = stack_remaining;
1620
8defab1a 1621 status = target_read_memory (pc, buf, 4);
e17a4113 1622 inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1623
c906108c
SS
1624 /* Yow! */
1625 if (status != 0)
1626 return pc;
1627
1628 /* Note the interesting effects of this instruction. */
1629 stack_remaining -= prologue_inst_adjust_sp (inst);
1630
7be570e7
JM
1631 /* There are limited ways to store the return pointer into the
1632 stack. */
c4c79048 1633 if (inst == 0x6bc23fd9 || inst == 0x0fc212c1 || inst == 0x73c23fe1)
c906108c
SS
1634 save_rp = 0;
1635
104c1213 1636 /* These are the only ways we save SP into the stack. At this time
c5aa993b 1637 the HP compilers never bother to save SP into the stack. */
104c1213
JM
1638 if ((inst & 0xffffc000) == 0x6fc10000
1639 || (inst & 0xffffc00c) == 0x73c10008)
c906108c
SS
1640 save_sp = 0;
1641
6426a772
JM
1642 /* Are we loading some register with an offset from the argument
1643 pointer? */
1644 if ((inst & 0xffe00000) == 0x37a00000
1645 || (inst & 0xffffffe0) == 0x081d0240)
1646 {
1647 pc += 4;
1648 continue;
1649 }
1650
c906108c
SS
1651 /* Account for general and floating-point register saves. */
1652 reg_num = inst_saves_gr (inst);
1653 save_gr &= ~(1 << reg_num);
1654
1655 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1656 Unfortunately args_stored only tells us that some arguments
1657 where stored into the stack. Not how many or what kind!
c906108c 1658
c5aa993b
JM
1659 This is a kludge as on the HP compiler sets this bit and it
1660 never does prologue scheduling. So once we see one, skip past
1661 all of them. We have similar code for the fp arg stores below.
c906108c 1662
c5aa993b
JM
1663 FIXME. Can still die if we have a mix of GR and FR argument
1664 stores! */
be8626e0 1665 if (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1666 && reg_num <= 26)
c906108c 1667 {
be8626e0 1668 while (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1669 && reg_num <= 26)
c906108c
SS
1670 {
1671 pc += 4;
8defab1a 1672 status = target_read_memory (pc, buf, 4);
e17a4113 1673 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1674 if (status != 0)
1675 return pc;
1676 reg_num = inst_saves_gr (inst);
1677 }
1678 args_stored = 0;
1679 continue;
1680 }
1681
1682 reg_num = inst_saves_fr (inst);
1683 save_fr &= ~(1 << reg_num);
1684
8defab1a 1685 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1686 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1687
c906108c
SS
1688 /* Yow! */
1689 if (status != 0)
1690 return pc;
1691
1692 /* We've got to be read to handle the ldo before the fp register
c5aa993b 1693 save. */
c906108c
SS
1694 if ((inst & 0xfc000000) == 0x34000000
1695 && inst_saves_fr (next_inst) >= 4
819844ad 1696 && inst_saves_fr (next_inst)
be8626e0 1697 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1698 {
1699 /* So we drop into the code below in a reasonable state. */
1700 reg_num = inst_saves_fr (next_inst);
1701 pc -= 4;
1702 }
1703
1704 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1705 This is a kludge as on the HP compiler sets this bit and it
1706 never does prologue scheduling. So once we see one, skip past
1707 all of them. */
819844ad 1708 if (reg_num >= 4
be8626e0 1709 && reg_num <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c 1710 {
819844ad
UW
1711 while (reg_num >= 4
1712 && reg_num
be8626e0 1713 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1714 {
1715 pc += 8;
8defab1a 1716 status = target_read_memory (pc, buf, 4);
e17a4113 1717 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1718 if (status != 0)
1719 return pc;
1720 if ((inst & 0xfc000000) != 0x34000000)
1721 break;
8defab1a 1722 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1723 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1724 if (status != 0)
1725 return pc;
1726 reg_num = inst_saves_fr (next_inst);
1727 }
1728 args_stored = 0;
1729 continue;
1730 }
1731
1732 /* Quit if we hit any kind of branch. This can happen if a prologue
c5aa993b 1733 instruction is in the delay slot of the first call/branch. */
a71f8c30 1734 if (is_branch (inst) && stop_before_branch)
c906108c
SS
1735 break;
1736
1737 /* What a crock. The HP compilers set args_stored even if no
c5aa993b
JM
1738 arguments were stored into the stack (boo hiss). This could
1739 cause this code to then skip a bunch of user insns (up to the
1740 first branch).
1741
1742 To combat this we try to identify when args_stored was bogusly
1743 set and clear it. We only do this when args_stored is nonzero,
1744 all other resources are accounted for, and nothing changed on
1745 this pass. */
c906108c 1746 if (args_stored
c5aa993b 1747 && !(save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
c906108c
SS
1748 && old_save_gr == save_gr && old_save_fr == save_fr
1749 && old_save_rp == save_rp && old_save_sp == save_sp
1750 && old_stack_remaining == stack_remaining)
1751 break;
c5aa993b 1752
c906108c
SS
1753 /* Bump the PC. */
1754 pc += 4;
a71f8c30
RC
1755
1756 /* !stop_before_branch, so also look at the insn in the delay slot
1757 of the branch. */
1758 if (final_iteration)
1759 break;
1760 if (is_branch (inst))
1761 final_iteration = 1;
c906108c
SS
1762 }
1763
1764 /* We've got a tenative location for the end of the prologue. However
1765 because of limitations in the unwind descriptor mechanism we may
1766 have went too far into user code looking for the save of a register
1767 that does not exist. So, if there registers we expected to be saved
1768 but never were, mask them out and restart.
1769
1770 This should only happen in optimized code, and should be very rare. */
c5aa993b 1771 if (save_gr || (save_fr && !(restart_fr || restart_gr)))
c906108c
SS
1772 {
1773 pc = orig_pc;
1774 restart_gr = save_gr;
1775 restart_fr = save_fr;
1776 goto restart;
1777 }
1778
1779 return pc;
1780}
1781
1782
7be570e7
JM
1783/* Return the address of the PC after the last prologue instruction if
1784 we can determine it from the debug symbols. Else return zero. */
c906108c
SS
1785
1786static CORE_ADDR
fba45db2 1787after_prologue (CORE_ADDR pc)
c906108c
SS
1788{
1789 struct symtab_and_line sal;
1790 CORE_ADDR func_addr, func_end;
c906108c 1791
7be570e7
JM
1792 /* If we can not find the symbol in the partial symbol table, then
1793 there is no hope we can determine the function's start address
1794 with this code. */
c906108c 1795 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
7be570e7 1796 return 0;
c906108c 1797
7be570e7 1798 /* Get the line associated with FUNC_ADDR. */
c906108c
SS
1799 sal = find_pc_line (func_addr, 0);
1800
7be570e7
JM
1801 /* There are only two cases to consider. First, the end of the source line
1802 is within the function bounds. In that case we return the end of the
1803 source line. Second is the end of the source line extends beyond the
1804 bounds of the current function. We need to use the slow code to
1777feb0 1805 examine instructions in that case.
c906108c 1806
7be570e7
JM
1807 Anything else is simply a bug elsewhere. Fixing it here is absolutely
1808 the wrong thing to do. In fact, it should be entirely possible for this
1809 function to always return zero since the slow instruction scanning code
1810 is supposed to *always* work. If it does not, then it is a bug. */
1811 if (sal.end < func_end)
1812 return sal.end;
c5aa993b 1813 else
7be570e7 1814 return 0;
c906108c
SS
1815}
1816
1817/* To skip prologues, I use this predicate. Returns either PC itself
1818 if the code at PC does not look like a function prologue; otherwise
1777feb0 1819 returns an address that (if we're lucky) follows the prologue.
a71f8c30
RC
1820
1821 hppa_skip_prologue is called by gdb to place a breakpoint in a function.
1777feb0 1822 It doesn't necessarily skips all the insns in the prologue. In fact
a71f8c30
RC
1823 we might not want to skip all the insns because a prologue insn may
1824 appear in the delay slot of the first branch, and we don't want to
1825 skip over the branch in that case. */
c906108c 1826
8d153463 1827static CORE_ADDR
6093d2eb 1828hppa_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
c906108c 1829{
c5aa993b 1830 CORE_ADDR post_prologue_pc;
c906108c 1831
c5aa993b
JM
1832 /* See if we can determine the end of the prologue via the symbol table.
1833 If so, then return either PC, or the PC after the prologue, whichever
1834 is greater. */
c906108c 1835
c5aa993b 1836 post_prologue_pc = after_prologue (pc);
c906108c 1837
7be570e7
JM
1838 /* If after_prologue returned a useful address, then use it. Else
1839 fall back on the instruction skipping code.
1840
1841 Some folks have claimed this causes problems because the breakpoint
1842 may be the first instruction of the prologue. If that happens, then
1843 the instruction skipping code has a bug that needs to be fixed. */
c5aa993b 1844 if (post_prologue_pc != 0)
325fac50 1845 return std::max (pc, post_prologue_pc);
c5aa993b 1846 else
be8626e0 1847 return (skip_prologue_hard_way (gdbarch, pc, 1));
c906108c
SS
1848}
1849
29d375ac 1850/* Return an unwind entry that falls within the frame's code block. */
227e86ad 1851
29d375ac 1852static struct unwind_table_entry *
227e86ad 1853hppa_find_unwind_entry_in_block (struct frame_info *this_frame)
29d375ac 1854{
227e86ad 1855 CORE_ADDR pc = get_frame_address_in_block (this_frame);
93d42b30
DJ
1856
1857 /* FIXME drow/20070101: Calling gdbarch_addr_bits_remove on the
ad1193e7 1858 result of get_frame_address_in_block implies a problem.
93d42b30 1859 The bits should have been removed earlier, before the return
c7ce8faa 1860 value of gdbarch_unwind_pc. That might be happening already;
93d42b30
DJ
1861 if it isn't, it should be fixed. Then this call can be
1862 removed. */
227e86ad 1863 pc = gdbarch_addr_bits_remove (get_frame_arch (this_frame), pc);
29d375ac
RC
1864 return find_unwind_entry (pc);
1865}
1866
26d08f08
AC
1867struct hppa_frame_cache
1868{
1869 CORE_ADDR base;
1870 struct trad_frame_saved_reg *saved_regs;
1871};
1872
1873static struct hppa_frame_cache *
227e86ad 1874hppa_frame_cache (struct frame_info *this_frame, void **this_cache)
26d08f08 1875{
227e86ad 1876 struct gdbarch *gdbarch = get_frame_arch (this_frame);
e17a4113
UW
1877 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1878 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
26d08f08
AC
1879 struct hppa_frame_cache *cache;
1880 long saved_gr_mask;
1881 long saved_fr_mask;
26d08f08
AC
1882 long frame_size;
1883 struct unwind_table_entry *u;
9f7194c3 1884 CORE_ADDR prologue_end;
50b2f48a 1885 int fp_in_r1 = 0;
26d08f08
AC
1886 int i;
1887
369aa520
RC
1888 if (hppa_debug)
1889 fprintf_unfiltered (gdb_stdlog, "{ hppa_frame_cache (frame=%d) -> ",
227e86ad 1890 frame_relative_level(this_frame));
369aa520 1891
26d08f08 1892 if ((*this_cache) != NULL)
369aa520
RC
1893 {
1894 if (hppa_debug)
5af949e3
UW
1895 fprintf_unfiltered (gdb_stdlog, "base=%s (cached) }",
1896 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
9a3c8263 1897 return (struct hppa_frame_cache *) (*this_cache);
369aa520 1898 }
26d08f08
AC
1899 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
1900 (*this_cache) = cache;
227e86ad 1901 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
26d08f08
AC
1902
1903 /* Yow! */
227e86ad 1904 u = hppa_find_unwind_entry_in_block (this_frame);
26d08f08 1905 if (!u)
369aa520
RC
1906 {
1907 if (hppa_debug)
1908 fprintf_unfiltered (gdb_stdlog, "base=NULL (no unwind entry) }");
9a3c8263 1909 return (struct hppa_frame_cache *) (*this_cache);
369aa520 1910 }
26d08f08
AC
1911
1912 /* Turn the Entry_GR field into a bitmask. */
1913 saved_gr_mask = 0;
1914 for (i = 3; i < u->Entry_GR + 3; i++)
1915 {
1916 /* Frame pointer gets saved into a special location. */
eded0a31 1917 if (u->Save_SP && i == HPPA_FP_REGNUM)
26d08f08
AC
1918 continue;
1919
1920 saved_gr_mask |= (1 << i);
1921 }
1922
1923 /* Turn the Entry_FR field into a bitmask too. */
1924 saved_fr_mask = 0;
1925 for (i = 12; i < u->Entry_FR + 12; i++)
1926 saved_fr_mask |= (1 << i);
1927
1928 /* Loop until we find everything of interest or hit a branch.
1929
1930 For unoptimized GCC code and for any HP CC code this will never ever
1931 examine any user instructions.
1932
1933 For optimized GCC code we're faced with problems. GCC will schedule
1934 its prologue and make prologue instructions available for delay slot
1935 filling. The end result is user code gets mixed in with the prologue
1936 and a prologue instruction may be in the delay slot of the first branch
1937 or call.
1938
1939 Some unexpected things are expected with debugging optimized code, so
1940 we allow this routine to walk past user instructions in optimized
1941 GCC code. */
1942 {
1943 int final_iteration = 0;
46acf081 1944 CORE_ADDR pc, start_pc, end_pc;
26d08f08
AC
1945 int looking_for_sp = u->Save_SP;
1946 int looking_for_rp = u->Save_RP;
1947 int fp_loc = -1;
9f7194c3 1948
a71f8c30 1949 /* We have to use skip_prologue_hard_way instead of just
9f7194c3
RC
1950 skip_prologue_using_sal, in case we stepped into a function without
1951 symbol information. hppa_skip_prologue also bounds the returned
1952 pc by the passed in pc, so it will not return a pc in the next
1777feb0 1953 function.
a71f8c30
RC
1954
1955 We used to call hppa_skip_prologue to find the end of the prologue,
1956 but if some non-prologue instructions get scheduled into the prologue,
1957 and the program is compiled with debug information, the "easy" way
1958 in hppa_skip_prologue will return a prologue end that is too early
1959 for us to notice any potential frame adjustments. */
d5c27f81 1960
ef02daa9
DJ
1961 /* We used to use get_frame_func to locate the beginning of the
1962 function to pass to skip_prologue. However, when objects are
1963 compiled without debug symbols, get_frame_func can return the wrong
1777feb0 1964 function (or 0). We can do better than that by using unwind records.
46acf081 1965 This only works if the Region_description of the unwind record
1777feb0 1966 indicates that it includes the entry point of the function.
46acf081
RC
1967 HP compilers sometimes generate unwind records for regions that
1968 do not include the entry or exit point of a function. GNU tools
1969 do not do this. */
1970
1971 if ((u->Region_description & 0x2) == 0)
1972 start_pc = u->region_start;
1973 else
227e86ad 1974 start_pc = get_frame_func (this_frame);
d5c27f81 1975
be8626e0 1976 prologue_end = skip_prologue_hard_way (gdbarch, start_pc, 0);
227e86ad 1977 end_pc = get_frame_pc (this_frame);
9f7194c3
RC
1978
1979 if (prologue_end != 0 && end_pc > prologue_end)
1980 end_pc = prologue_end;
1981
26d08f08 1982 frame_size = 0;
9f7194c3 1983
46acf081 1984 for (pc = start_pc;
26d08f08
AC
1985 ((saved_gr_mask || saved_fr_mask
1986 || looking_for_sp || looking_for_rp
1987 || frame_size < (u->Total_frame_size << 3))
9f7194c3 1988 && pc < end_pc);
26d08f08
AC
1989 pc += 4)
1990 {
1991 int reg;
e362b510 1992 gdb_byte buf4[4];
4a302917
RC
1993 long inst;
1994
227e86ad 1995 if (!safe_frame_unwind_memory (this_frame, pc, buf4, sizeof buf4))
4a302917 1996 {
5af949e3
UW
1997 error (_("Cannot read instruction at %s."),
1998 paddress (gdbarch, pc));
9a3c8263 1999 return (struct hppa_frame_cache *) (*this_cache);
4a302917
RC
2000 }
2001
e17a4113 2002 inst = extract_unsigned_integer (buf4, sizeof buf4, byte_order);
9f7194c3 2003
26d08f08
AC
2004 /* Note the interesting effects of this instruction. */
2005 frame_size += prologue_inst_adjust_sp (inst);
2006
2007 /* There are limited ways to store the return pointer into the
2008 stack. */
2009 if (inst == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
2010 {
2011 looking_for_rp = 0;
34f75cc1 2012 cache->saved_regs[HPPA_RP_REGNUM].addr = -20;
26d08f08 2013 }
dfaf8edb
MK
2014 else if (inst == 0x6bc23fd1) /* stw rp,-0x18(sr0,sp) */
2015 {
2016 looking_for_rp = 0;
2017 cache->saved_regs[HPPA_RP_REGNUM].addr = -24;
2018 }
c4c79048
RC
2019 else if (inst == 0x0fc212c1
2020 || inst == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
26d08f08
AC
2021 {
2022 looking_for_rp = 0;
34f75cc1 2023 cache->saved_regs[HPPA_RP_REGNUM].addr = -16;
26d08f08
AC
2024 }
2025
2026 /* Check to see if we saved SP into the stack. This also
2027 happens to indicate the location of the saved frame
2028 pointer. */
2029 if ((inst & 0xffffc000) == 0x6fc10000 /* stw,ma r1,N(sr0,sp) */
2030 || (inst & 0xffffc00c) == 0x73c10008) /* std,ma r1,N(sr0,sp) */
2031 {
2032 looking_for_sp = 0;
eded0a31 2033 cache->saved_regs[HPPA_FP_REGNUM].addr = 0;
26d08f08 2034 }
50b2f48a
RC
2035 else if (inst == 0x08030241) /* copy %r3, %r1 */
2036 {
2037 fp_in_r1 = 1;
2038 }
26d08f08
AC
2039
2040 /* Account for general and floating-point register saves. */
2041 reg = inst_saves_gr (inst);
2042 if (reg >= 3 && reg <= 18
eded0a31 2043 && (!u->Save_SP || reg != HPPA_FP_REGNUM))
26d08f08
AC
2044 {
2045 saved_gr_mask &= ~(1 << reg);
abc485a1 2046 if ((inst >> 26) == 0x1b && hppa_extract_14 (inst) >= 0)
26d08f08
AC
2047 /* stwm with a positive displacement is a _post_
2048 _modify_. */
2049 cache->saved_regs[reg].addr = 0;
2050 else if ((inst & 0xfc00000c) == 0x70000008)
2051 /* A std has explicit post_modify forms. */
2052 cache->saved_regs[reg].addr = 0;
2053 else
2054 {
2055 CORE_ADDR offset;
2056
2057 if ((inst >> 26) == 0x1c)
66c6502d 2058 offset = (inst & 0x1 ? -(1 << 13) : 0)
1777feb0 2059 | (((inst >> 4) & 0x3ff) << 3);
26d08f08 2060 else if ((inst >> 26) == 0x03)
abc485a1 2061 offset = hppa_low_hppa_sign_extend (inst & 0x1f, 5);
26d08f08 2062 else
abc485a1 2063 offset = hppa_extract_14 (inst);
26d08f08
AC
2064
2065 /* Handle code with and without frame pointers. */
2066 if (u->Save_SP)
2067 cache->saved_regs[reg].addr = offset;
2068 else
1777feb0
MS
2069 cache->saved_regs[reg].addr
2070 = (u->Total_frame_size << 3) + offset;
26d08f08
AC
2071 }
2072 }
2073
2074 /* GCC handles callee saved FP regs a little differently.
2075
2076 It emits an instruction to put the value of the start of
2077 the FP store area into %r1. It then uses fstds,ma with a
2078 basereg of %r1 for the stores.
2079
2080 HP CC emits them at the current stack pointer modifying the
2081 stack pointer as it stores each register. */
2082
2083 /* ldo X(%r3),%r1 or ldo X(%r30),%r1. */
2084 if ((inst & 0xffffc000) == 0x34610000
2085 || (inst & 0xffffc000) == 0x37c10000)
abc485a1 2086 fp_loc = hppa_extract_14 (inst);
26d08f08
AC
2087
2088 reg = inst_saves_fr (inst);
2089 if (reg >= 12 && reg <= 21)
2090 {
2091 /* Note +4 braindamage below is necessary because the FP
2092 status registers are internally 8 registers rather than
2093 the expected 4 registers. */
2094 saved_fr_mask &= ~(1 << reg);
2095 if (fp_loc == -1)
2096 {
2097 /* 1st HP CC FP register store. After this
2098 instruction we've set enough state that the GCC and
2099 HPCC code are both handled in the same manner. */
34f75cc1 2100 cache->saved_regs[reg + HPPA_FP4_REGNUM + 4].addr = 0;
26d08f08
AC
2101 fp_loc = 8;
2102 }
2103 else
2104 {
eded0a31 2105 cache->saved_regs[reg + HPPA_FP0_REGNUM + 4].addr = fp_loc;
26d08f08
AC
2106 fp_loc += 8;
2107 }
2108 }
2109
1777feb0 2110 /* Quit if we hit any kind of branch the previous iteration. */
26d08f08
AC
2111 if (final_iteration)
2112 break;
2113 /* We want to look precisely one instruction beyond the branch
2114 if we have not found everything yet. */
2115 if (is_branch (inst))
2116 final_iteration = 1;
2117 }
2118 }
2119
2120 {
2121 /* The frame base always represents the value of %sp at entry to
2122 the current function (and is thus equivalent to the "saved"
2123 stack pointer. */
227e86ad
JB
2124 CORE_ADDR this_sp = get_frame_register_unsigned (this_frame,
2125 HPPA_SP_REGNUM);
ed70ba00 2126 CORE_ADDR fp;
9f7194c3
RC
2127
2128 if (hppa_debug)
5af949e3
UW
2129 fprintf_unfiltered (gdb_stdlog, " (this_sp=%s, pc=%s, "
2130 "prologue_end=%s) ",
2131 paddress (gdbarch, this_sp),
2132 paddress (gdbarch, get_frame_pc (this_frame)),
2133 paddress (gdbarch, prologue_end));
9f7194c3 2134
ed70ba00
RC
2135 /* Check to see if a frame pointer is available, and use it for
2136 frame unwinding if it is.
2137
2138 There are some situations where we need to rely on the frame
2139 pointer to do stack unwinding. For example, if a function calls
2140 alloca (), the stack pointer can get adjusted inside the body of
2141 the function. In this case, the ABI requires that the compiler
2142 maintain a frame pointer for the function.
2143
2144 The unwind record has a flag (alloca_frame) that indicates that
2145 a function has a variable frame; unfortunately, gcc/binutils
2146 does not set this flag. Instead, whenever a frame pointer is used
2147 and saved on the stack, the Save_SP flag is set. We use this to
2148 decide whether to use the frame pointer for unwinding.
2149
ed70ba00
RC
2150 TODO: For the HP compiler, maybe we should use the alloca_frame flag
2151 instead of Save_SP. */
2152
227e86ad 2153 fp = get_frame_register_unsigned (this_frame, HPPA_FP_REGNUM);
46acf081 2154
6fcecea0 2155 if (u->alloca_frame)
46acf081 2156 fp -= u->Total_frame_size << 3;
ed70ba00 2157
227e86ad 2158 if (get_frame_pc (this_frame) >= prologue_end
6fcecea0 2159 && (u->Save_SP || u->alloca_frame) && fp != 0)
ed70ba00
RC
2160 {
2161 cache->base = fp;
2162
2163 if (hppa_debug)
5af949e3
UW
2164 fprintf_unfiltered (gdb_stdlog, " (base=%s) [frame pointer]",
2165 paddress (gdbarch, cache->base));
ed70ba00 2166 }
1658da49
RC
2167 else if (u->Save_SP
2168 && trad_frame_addr_p (cache->saved_regs, HPPA_SP_REGNUM))
9f7194c3 2169 {
9f7194c3
RC
2170 /* Both we're expecting the SP to be saved and the SP has been
2171 saved. The entry SP value is saved at this frame's SP
2172 address. */
e17a4113 2173 cache->base = read_memory_integer (this_sp, word_size, byte_order);
9f7194c3
RC
2174
2175 if (hppa_debug)
5af949e3
UW
2176 fprintf_unfiltered (gdb_stdlog, " (base=%s) [saved]",
2177 paddress (gdbarch, cache->base));
9f7194c3 2178 }
26d08f08 2179 else
9f7194c3 2180 {
1658da49
RC
2181 /* The prologue has been slowly allocating stack space. Adjust
2182 the SP back. */
2183 cache->base = this_sp - frame_size;
9f7194c3 2184 if (hppa_debug)
5af949e3
UW
2185 fprintf_unfiltered (gdb_stdlog, " (base=%s) [unwind adjust]",
2186 paddress (gdbarch, cache->base));
9f7194c3
RC
2187
2188 }
eded0a31 2189 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
26d08f08
AC
2190 }
2191
412275d5
AC
2192 /* The PC is found in the "return register", "Millicode" uses "r31"
2193 as the return register while normal code uses "rp". */
26d08f08 2194 if (u->Millicode)
9f7194c3 2195 {
5859efe5 2196 if (trad_frame_addr_p (cache->saved_regs, 31))
9ed5ba24
RC
2197 {
2198 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] = cache->saved_regs[31];
2199 if (hppa_debug)
2200 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [stack] } ");
2201 }
9f7194c3
RC
2202 else
2203 {
227e86ad 2204 ULONGEST r31 = get_frame_register_unsigned (this_frame, 31);
34f75cc1 2205 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, r31);
9ed5ba24
RC
2206 if (hppa_debug)
2207 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [frame] } ");
9f7194c3
RC
2208 }
2209 }
26d08f08 2210 else
9f7194c3 2211 {
34f75cc1 2212 if (trad_frame_addr_p (cache->saved_regs, HPPA_RP_REGNUM))
9ed5ba24
RC
2213 {
2214 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2215 cache->saved_regs[HPPA_RP_REGNUM];
2216 if (hppa_debug)
2217 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [stack] } ");
2218 }
9f7194c3
RC
2219 else
2220 {
227e86ad
JB
2221 ULONGEST rp = get_frame_register_unsigned (this_frame,
2222 HPPA_RP_REGNUM);
34f75cc1 2223 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, rp);
9ed5ba24
RC
2224 if (hppa_debug)
2225 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [frame] } ");
9f7194c3
RC
2226 }
2227 }
26d08f08 2228
50b2f48a
RC
2229 /* If Save_SP is set, then we expect the frame pointer to be saved in the
2230 frame. However, there is a one-insn window where we haven't saved it
2231 yet, but we've already clobbered it. Detect this case and fix it up.
2232
2233 The prologue sequence for frame-pointer functions is:
2234 0: stw %rp, -20(%sp)
2235 4: copy %r3, %r1
2236 8: copy %sp, %r3
2237 c: stw,ma %r1, XX(%sp)
2238
2239 So if we are at offset c, the r3 value that we want is not yet saved
2240 on the stack, but it's been overwritten. The prologue analyzer will
2241 set fp_in_r1 when it sees the copy insn so we know to get the value
2242 from r1 instead. */
2243 if (u->Save_SP && !trad_frame_addr_p (cache->saved_regs, HPPA_FP_REGNUM)
2244 && fp_in_r1)
2245 {
227e86ad 2246 ULONGEST r1 = get_frame_register_unsigned (this_frame, 1);
50b2f48a
RC
2247 trad_frame_set_value (cache->saved_regs, HPPA_FP_REGNUM, r1);
2248 }
1658da49 2249
26d08f08
AC
2250 {
2251 /* Convert all the offsets into addresses. */
2252 int reg;
65c5db89 2253 for (reg = 0; reg < gdbarch_num_regs (gdbarch); reg++)
26d08f08
AC
2254 {
2255 if (trad_frame_addr_p (cache->saved_regs, reg))
2256 cache->saved_regs[reg].addr += cache->base;
2257 }
2258 }
2259
f77a2124 2260 {
f77a2124
RC
2261 struct gdbarch_tdep *tdep;
2262
f77a2124
RC
2263 tdep = gdbarch_tdep (gdbarch);
2264
2265 if (tdep->unwind_adjust_stub)
227e86ad 2266 tdep->unwind_adjust_stub (this_frame, cache->base, cache->saved_regs);
f77a2124
RC
2267 }
2268
369aa520 2269 if (hppa_debug)
5af949e3
UW
2270 fprintf_unfiltered (gdb_stdlog, "base=%s }",
2271 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
9a3c8263 2272 return (struct hppa_frame_cache *) (*this_cache);
26d08f08
AC
2273}
2274
2275static void
227e86ad
JB
2276hppa_frame_this_id (struct frame_info *this_frame, void **this_cache,
2277 struct frame_id *this_id)
26d08f08 2278{
d5c27f81 2279 struct hppa_frame_cache *info;
d5c27f81
RC
2280 struct unwind_table_entry *u;
2281
227e86ad
JB
2282 info = hppa_frame_cache (this_frame, this_cache);
2283 u = hppa_find_unwind_entry_in_block (this_frame);
d5c27f81
RC
2284
2285 (*this_id) = frame_id_build (info->base, u->region_start);
26d08f08
AC
2286}
2287
227e86ad
JB
2288static struct value *
2289hppa_frame_prev_register (struct frame_info *this_frame,
2290 void **this_cache, int regnum)
26d08f08 2291{
227e86ad
JB
2292 struct hppa_frame_cache *info = hppa_frame_cache (this_frame, this_cache);
2293
1777feb0
MS
2294 return hppa_frame_prev_register_helper (this_frame,
2295 info->saved_regs, regnum);
227e86ad
JB
2296}
2297
2298static int
2299hppa_frame_unwind_sniffer (const struct frame_unwind *self,
2300 struct frame_info *this_frame, void **this_cache)
2301{
2302 if (hppa_find_unwind_entry_in_block (this_frame))
2303 return 1;
2304
2305 return 0;
0da28f8a
RC
2306}
2307
2308static const struct frame_unwind hppa_frame_unwind =
2309{
2310 NORMAL_FRAME,
8fbca658 2311 default_frame_unwind_stop_reason,
0da28f8a 2312 hppa_frame_this_id,
227e86ad
JB
2313 hppa_frame_prev_register,
2314 NULL,
2315 hppa_frame_unwind_sniffer
0da28f8a
RC
2316};
2317
0da28f8a
RC
2318/* This is a generic fallback frame unwinder that kicks in if we fail all
2319 the other ones. Normally we would expect the stub and regular unwinder
2320 to work, but in some cases we might hit a function that just doesn't
2321 have any unwind information available. In this case we try to do
2322 unwinding solely based on code reading. This is obviously going to be
2323 slow, so only use this as a last resort. Currently this will only
2324 identify the stack and pc for the frame. */
2325
2326static struct hppa_frame_cache *
227e86ad 2327hppa_fallback_frame_cache (struct frame_info *this_frame, void **this_cache)
0da28f8a 2328{
e17a4113
UW
2329 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2330 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
0da28f8a 2331 struct hppa_frame_cache *cache;
4ba6a975
MK
2332 unsigned int frame_size = 0;
2333 int found_rp = 0;
2334 CORE_ADDR start_pc;
0da28f8a 2335
d5c27f81 2336 if (hppa_debug)
4ba6a975
MK
2337 fprintf_unfiltered (gdb_stdlog,
2338 "{ hppa_fallback_frame_cache (frame=%d) -> ",
227e86ad 2339 frame_relative_level (this_frame));
d5c27f81 2340
0da28f8a
RC
2341 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
2342 (*this_cache) = cache;
227e86ad 2343 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
0da28f8a 2344
227e86ad 2345 start_pc = get_frame_func (this_frame);
4ba6a975 2346 if (start_pc)
0da28f8a 2347 {
227e86ad 2348 CORE_ADDR cur_pc = get_frame_pc (this_frame);
4ba6a975 2349 CORE_ADDR pc;
0da28f8a 2350
4ba6a975
MK
2351 for (pc = start_pc; pc < cur_pc; pc += 4)
2352 {
2353 unsigned int insn;
0da28f8a 2354
e17a4113 2355 insn = read_memory_unsigned_integer (pc, 4, byte_order);
4ba6a975 2356 frame_size += prologue_inst_adjust_sp (insn);
6d1be3f1 2357
4ba6a975
MK
2358 /* There are limited ways to store the return pointer into the
2359 stack. */
2360 if (insn == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
2361 {
2362 cache->saved_regs[HPPA_RP_REGNUM].addr = -20;
2363 found_rp = 1;
2364 }
c4c79048
RC
2365 else if (insn == 0x0fc212c1
2366 || insn == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
4ba6a975
MK
2367 {
2368 cache->saved_regs[HPPA_RP_REGNUM].addr = -16;
2369 found_rp = 1;
2370 }
2371 }
412275d5 2372 }
0da28f8a 2373
d5c27f81 2374 if (hppa_debug)
4ba6a975
MK
2375 fprintf_unfiltered (gdb_stdlog, " frame_size=%d, found_rp=%d }\n",
2376 frame_size, found_rp);
d5c27f81 2377
227e86ad 2378 cache->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
4ba6a975 2379 cache->base -= frame_size;
6d1be3f1 2380 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
0da28f8a
RC
2381
2382 if (trad_frame_addr_p (cache->saved_regs, HPPA_RP_REGNUM))
2383 {
2384 cache->saved_regs[HPPA_RP_REGNUM].addr += cache->base;
4ba6a975
MK
2385 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2386 cache->saved_regs[HPPA_RP_REGNUM];
0da28f8a 2387 }
412275d5
AC
2388 else
2389 {
4ba6a975 2390 ULONGEST rp;
227e86ad 2391 rp = get_frame_register_unsigned (this_frame, HPPA_RP_REGNUM);
0da28f8a 2392 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, rp);
412275d5 2393 }
0da28f8a
RC
2394
2395 return cache;
26d08f08
AC
2396}
2397
0da28f8a 2398static void
227e86ad 2399hppa_fallback_frame_this_id (struct frame_info *this_frame, void **this_cache,
0da28f8a
RC
2400 struct frame_id *this_id)
2401{
2402 struct hppa_frame_cache *info =
227e86ad
JB
2403 hppa_fallback_frame_cache (this_frame, this_cache);
2404
2405 (*this_id) = frame_id_build (info->base, get_frame_func (this_frame));
0da28f8a
RC
2406}
2407
227e86ad
JB
2408static struct value *
2409hppa_fallback_frame_prev_register (struct frame_info *this_frame,
2410 void **this_cache, int regnum)
0da28f8a 2411{
1777feb0
MS
2412 struct hppa_frame_cache *info
2413 = hppa_fallback_frame_cache (this_frame, this_cache);
227e86ad 2414
1777feb0
MS
2415 return hppa_frame_prev_register_helper (this_frame,
2416 info->saved_regs, regnum);
0da28f8a
RC
2417}
2418
2419static const struct frame_unwind hppa_fallback_frame_unwind =
26d08f08
AC
2420{
2421 NORMAL_FRAME,
8fbca658 2422 default_frame_unwind_stop_reason,
0da28f8a 2423 hppa_fallback_frame_this_id,
227e86ad
JB
2424 hppa_fallback_frame_prev_register,
2425 NULL,
2426 default_frame_sniffer
26d08f08
AC
2427};
2428
7f07c5b6
RC
2429/* Stub frames, used for all kinds of call stubs. */
2430struct hppa_stub_unwind_cache
2431{
2432 CORE_ADDR base;
2433 struct trad_frame_saved_reg *saved_regs;
2434};
2435
2436static struct hppa_stub_unwind_cache *
227e86ad 2437hppa_stub_frame_unwind_cache (struct frame_info *this_frame,
7f07c5b6
RC
2438 void **this_cache)
2439{
7f07c5b6
RC
2440 struct hppa_stub_unwind_cache *info;
2441
2442 if (*this_cache)
9a3c8263 2443 return (struct hppa_stub_unwind_cache *) *this_cache;
7f07c5b6
RC
2444
2445 info = FRAME_OBSTACK_ZALLOC (struct hppa_stub_unwind_cache);
2446 *this_cache = info;
227e86ad 2447 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
7f07c5b6 2448
227e86ad 2449 info->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
7f07c5b6 2450
22b0923d
RC
2451 /* By default we assume that stubs do not change the rp. */
2452 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].realreg = HPPA_RP_REGNUM;
2453
7f07c5b6
RC
2454 return info;
2455}
2456
2457static void
227e86ad 2458hppa_stub_frame_this_id (struct frame_info *this_frame,
7f07c5b6
RC
2459 void **this_prologue_cache,
2460 struct frame_id *this_id)
2461{
2462 struct hppa_stub_unwind_cache *info
227e86ad 2463 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57
RC
2464
2465 if (info)
227e86ad 2466 *this_id = frame_id_build (info->base, get_frame_func (this_frame));
7f07c5b6
RC
2467}
2468
227e86ad
JB
2469static struct value *
2470hppa_stub_frame_prev_register (struct frame_info *this_frame,
2471 void **this_prologue_cache, int regnum)
7f07c5b6
RC
2472{
2473 struct hppa_stub_unwind_cache *info
227e86ad 2474 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57 2475
227e86ad 2476 if (info == NULL)
8a3fe4f8 2477 error (_("Requesting registers from null frame."));
7f07c5b6 2478
1777feb0
MS
2479 return hppa_frame_prev_register_helper (this_frame,
2480 info->saved_regs, regnum);
227e86ad 2481}
7f07c5b6 2482
227e86ad
JB
2483static int
2484hppa_stub_unwind_sniffer (const struct frame_unwind *self,
2485 struct frame_info *this_frame,
2486 void **this_cache)
7f07c5b6 2487{
227e86ad
JB
2488 CORE_ADDR pc = get_frame_address_in_block (this_frame);
2489 struct gdbarch *gdbarch = get_frame_arch (this_frame);
84674fe1 2490 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
7f07c5b6 2491
6d1be3f1 2492 if (pc == 0
84674fe1 2493 || (tdep->in_solib_call_trampoline != NULL
3e5d3a5a 2494 && tdep->in_solib_call_trampoline (gdbarch, pc))
464963c9 2495 || gdbarch_in_solib_return_trampoline (gdbarch, pc, NULL))
227e86ad
JB
2496 return 1;
2497 return 0;
7f07c5b6
RC
2498}
2499
227e86ad
JB
2500static const struct frame_unwind hppa_stub_frame_unwind = {
2501 NORMAL_FRAME,
8fbca658 2502 default_frame_unwind_stop_reason,
227e86ad
JB
2503 hppa_stub_frame_this_id,
2504 hppa_stub_frame_prev_register,
2505 NULL,
2506 hppa_stub_unwind_sniffer
2507};
2508
26d08f08 2509static struct frame_id
227e86ad 2510hppa_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
26d08f08 2511{
227e86ad
JB
2512 return frame_id_build (get_frame_register_unsigned (this_frame,
2513 HPPA_SP_REGNUM),
2514 get_frame_pc (this_frame));
26d08f08
AC
2515}
2516
cc72850f 2517CORE_ADDR
26d08f08
AC
2518hppa_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2519{
fe46cd3a
RC
2520 ULONGEST ipsw;
2521 CORE_ADDR pc;
2522
cc72850f
MK
2523 ipsw = frame_unwind_register_unsigned (next_frame, HPPA_IPSW_REGNUM);
2524 pc = frame_unwind_register_unsigned (next_frame, HPPA_PCOQ_HEAD_REGNUM);
fe46cd3a
RC
2525
2526 /* If the current instruction is nullified, then we are effectively
2527 still executing the previous instruction. Pretend we are still
cc72850f
MK
2528 there. This is needed when single stepping; if the nullified
2529 instruction is on a different line, we don't want GDB to think
2530 we've stepped onto that line. */
fe46cd3a
RC
2531 if (ipsw & 0x00200000)
2532 pc -= 4;
2533
cc72850f 2534 return pc & ~0x3;
26d08f08
AC
2535}
2536
ff644745
JB
2537/* Return the minimal symbol whose name is NAME and stub type is STUB_TYPE.
2538 Return NULL if no such symbol was found. */
2539
3b7344d5 2540struct bound_minimal_symbol
ff644745
JB
2541hppa_lookup_stub_minimal_symbol (const char *name,
2542 enum unwind_stub_types stub_type)
2543{
2544 struct objfile *objfile;
2545 struct minimal_symbol *msym;
3b7344d5 2546 struct bound_minimal_symbol result = { NULL, NULL };
ff644745
JB
2547
2548 ALL_MSYMBOLS (objfile, msym)
2549 {
efd66ac6 2550 if (strcmp (MSYMBOL_LINKAGE_NAME (msym), name) == 0)
ff644745
JB
2551 {
2552 struct unwind_table_entry *u;
2553
efd66ac6 2554 u = find_unwind_entry (MSYMBOL_VALUE (msym));
ff644745 2555 if (u != NULL && u->stub_unwind.stub_type == stub_type)
3b7344d5
TT
2556 {
2557 result.objfile = objfile;
2558 result.minsym = msym;
2559 return result;
2560 }
ff644745
JB
2561 }
2562 }
2563
3b7344d5 2564 return result;
ff644745
JB
2565}
2566
c906108c 2567static void
c482f52c 2568unwind_command (const char *exp, int from_tty)
c906108c
SS
2569{
2570 CORE_ADDR address;
2571 struct unwind_table_entry *u;
2572
2573 /* If we have an expression, evaluate it and use it as the address. */
2574
2575 if (exp != 0 && *exp != 0)
2576 address = parse_and_eval_address (exp);
2577 else
2578 return;
2579
2580 u = find_unwind_entry (address);
2581
2582 if (!u)
2583 {
2584 printf_unfiltered ("Can't find unwind table entry for %s\n", exp);
2585 return;
2586 }
2587
3329c4b5 2588 printf_unfiltered ("unwind_table_entry (%s):\n", host_address_to_string (u));
c906108c 2589
5af949e3 2590 printf_unfiltered ("\tregion_start = %s\n", hex_string (u->region_start));
d5c27f81 2591 gdb_flush (gdb_stdout);
c906108c 2592
5af949e3 2593 printf_unfiltered ("\tregion_end = %s\n", hex_string (u->region_end));
d5c27f81 2594 gdb_flush (gdb_stdout);
c906108c 2595
c906108c 2596#define pif(FLD) if (u->FLD) printf_unfiltered (" "#FLD);
c906108c
SS
2597
2598 printf_unfiltered ("\n\tflags =");
2599 pif (Cannot_unwind);
2600 pif (Millicode);
2601 pif (Millicode_save_sr0);
2602 pif (Entry_SR);
2603 pif (Args_stored);
2604 pif (Variable_Frame);
2605 pif (Separate_Package_Body);
2606 pif (Frame_Extension_Millicode);
2607 pif (Stack_Overflow_Check);
2608 pif (Two_Instruction_SP_Increment);
6fcecea0
RC
2609 pif (sr4export);
2610 pif (cxx_info);
2611 pif (cxx_try_catch);
2612 pif (sched_entry_seq);
c906108c
SS
2613 pif (Save_SP);
2614 pif (Save_RP);
2615 pif (Save_MRP_in_frame);
6fcecea0 2616 pif (save_r19);
c906108c
SS
2617 pif (Cleanup_defined);
2618 pif (MPE_XL_interrupt_marker);
2619 pif (HP_UX_interrupt_marker);
2620 pif (Large_frame);
6fcecea0 2621 pif (alloca_frame);
c906108c
SS
2622
2623 putchar_unfiltered ('\n');
2624
c906108c 2625#define pin(FLD) printf_unfiltered ("\t"#FLD" = 0x%x\n", u->FLD);
c906108c
SS
2626
2627 pin (Region_description);
2628 pin (Entry_FR);
2629 pin (Entry_GR);
2630 pin (Total_frame_size);
57dac9e1
RC
2631
2632 if (u->stub_unwind.stub_type)
2633 {
2634 printf_unfiltered ("\tstub type = ");
2635 switch (u->stub_unwind.stub_type)
2636 {
2637 case LONG_BRANCH:
2638 printf_unfiltered ("long branch\n");
2639 break;
2640 case PARAMETER_RELOCATION:
2641 printf_unfiltered ("parameter relocation\n");
2642 break;
2643 case EXPORT:
2644 printf_unfiltered ("export\n");
2645 break;
2646 case IMPORT:
2647 printf_unfiltered ("import\n");
2648 break;
2649 case IMPORT_SHLIB:
2650 printf_unfiltered ("import shlib\n");
2651 break;
2652 default:
2653 printf_unfiltered ("unknown (%d)\n", u->stub_unwind.stub_type);
2654 }
2655 }
c906108c 2656}
c906108c 2657
38ca4e0c
MK
2658/* Return the GDB type object for the "standard" data type of data in
2659 register REGNUM. */
d709c020 2660
eded0a31 2661static struct type *
38ca4e0c 2662hppa32_register_type (struct gdbarch *gdbarch, int regnum)
d709c020 2663{
38ca4e0c 2664 if (regnum < HPPA_FP4_REGNUM)
df4df182 2665 return builtin_type (gdbarch)->builtin_uint32;
d709c020 2666 else
27067745 2667 return builtin_type (gdbarch)->builtin_float;
d709c020
JB
2668}
2669
eded0a31 2670static struct type *
38ca4e0c 2671hppa64_register_type (struct gdbarch *gdbarch, int regnum)
3ff7cf9e 2672{
38ca4e0c 2673 if (regnum < HPPA64_FP4_REGNUM)
df4df182 2674 return builtin_type (gdbarch)->builtin_uint64;
3ff7cf9e 2675 else
27067745 2676 return builtin_type (gdbarch)->builtin_double;
3ff7cf9e
JB
2677}
2678
38ca4e0c
MK
2679/* Return non-zero if REGNUM is not a register available to the user
2680 through ptrace/ttrace. */
d709c020 2681
8d153463 2682static int
64a3914f 2683hppa32_cannot_store_register (struct gdbarch *gdbarch, int regnum)
d709c020
JB
2684{
2685 return (regnum == 0
34f75cc1
RC
2686 || regnum == HPPA_PCSQ_HEAD_REGNUM
2687 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2688 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA_FP4_REGNUM));
38ca4e0c 2689}
d709c020 2690
d037d088 2691static int
64a3914f 2692hppa32_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2693{
2694 /* cr26 and cr27 are readable (but not writable) from userspace. */
2695 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2696 return 0;
2697 else
64a3914f 2698 return hppa32_cannot_store_register (gdbarch, regnum);
d037d088
CD
2699}
2700
38ca4e0c 2701static int
64a3914f 2702hppa64_cannot_store_register (struct gdbarch *gdbarch, int regnum)
38ca4e0c
MK
2703{
2704 return (regnum == 0
2705 || regnum == HPPA_PCSQ_HEAD_REGNUM
2706 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2707 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA64_FP4_REGNUM));
d709c020
JB
2708}
2709
d037d088 2710static int
64a3914f 2711hppa64_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2712{
2713 /* cr26 and cr27 are readable (but not writable) from userspace. */
2714 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2715 return 0;
2716 else
64a3914f 2717 return hppa64_cannot_store_register (gdbarch, regnum);
d037d088
CD
2718}
2719
8d153463 2720static CORE_ADDR
85ddcc70 2721hppa_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
d709c020
JB
2722{
2723 /* The low two bits of the PC on the PA contain the privilege level.
2724 Some genius implementing a (non-GCC) compiler apparently decided
2725 this means that "addresses" in a text section therefore include a
2726 privilege level, and thus symbol tables should contain these bits.
2727 This seems like a bonehead thing to do--anyway, it seems to work
2728 for our purposes to just ignore those bits. */
2729
2730 return (addr &= ~0x3);
2731}
2732
e127f0db
MK
2733/* Get the ARGIth function argument for the current function. */
2734
4a302917 2735static CORE_ADDR
143985b7
AF
2736hppa_fetch_pointer_argument (struct frame_info *frame, int argi,
2737 struct type *type)
2738{
e127f0db 2739 return get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 26 - argi);
143985b7
AF
2740}
2741
05d1431c 2742static enum register_status
849d0ba8 2743hppa_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache,
e127f0db 2744 int regnum, gdb_byte *buf)
0f8d9d59 2745{
05d1431c
PA
2746 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2747 ULONGEST tmp;
2748 enum register_status status;
0f8d9d59 2749
03f50fc8 2750 status = regcache->raw_read (regnum, &tmp);
05d1431c
PA
2751 if (status == REG_VALID)
2752 {
2753 if (regnum == HPPA_PCOQ_HEAD_REGNUM || regnum == HPPA_PCOQ_TAIL_REGNUM)
2754 tmp &= ~0x3;
2755 store_unsigned_integer (buf, sizeof tmp, byte_order, tmp);
2756 }
2757 return status;
0f8d9d59
RC
2758}
2759
d49771ef 2760static CORE_ADDR
e38c262f 2761hppa_find_global_pointer (struct gdbarch *gdbarch, struct value *function)
d49771ef
RC
2762{
2763 return 0;
2764}
2765
227e86ad
JB
2766struct value *
2767hppa_frame_prev_register_helper (struct frame_info *this_frame,
0da28f8a 2768 struct trad_frame_saved_reg saved_regs[],
227e86ad 2769 int regnum)
0da28f8a 2770{
227e86ad 2771 struct gdbarch *arch = get_frame_arch (this_frame);
e17a4113 2772 enum bfd_endian byte_order = gdbarch_byte_order (arch);
8f4e467c 2773
8693c419
MK
2774 if (regnum == HPPA_PCOQ_TAIL_REGNUM)
2775 {
227e86ad
JB
2776 int size = register_size (arch, HPPA_PCOQ_HEAD_REGNUM);
2777 CORE_ADDR pc;
2778 struct value *pcoq_val =
2779 trad_frame_get_prev_register (this_frame, saved_regs,
2780 HPPA_PCOQ_HEAD_REGNUM);
8693c419 2781
e17a4113
UW
2782 pc = extract_unsigned_integer (value_contents_all (pcoq_val),
2783 size, byte_order);
227e86ad 2784 return frame_unwind_got_constant (this_frame, regnum, pc + 4);
8693c419 2785 }
0da28f8a 2786
227e86ad 2787 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
0da28f8a 2788}
8693c419 2789\f
0da28f8a 2790
34f55018
MK
2791/* An instruction to match. */
2792struct insn_pattern
2793{
2794 unsigned int data; /* See if it matches this.... */
2795 unsigned int mask; /* ... with this mask. */
2796};
2797
2798/* See bfd/elf32-hppa.c */
2799static struct insn_pattern hppa_long_branch_stub[] = {
2800 /* ldil LR'xxx,%r1 */
2801 { 0x20200000, 0xffe00000 },
2802 /* be,n RR'xxx(%sr4,%r1) */
2803 { 0xe0202002, 0xffe02002 },
2804 { 0, 0 }
2805};
2806
2807static struct insn_pattern hppa_long_branch_pic_stub[] = {
2808 /* b,l .+8, %r1 */
2809 { 0xe8200000, 0xffe00000 },
2810 /* addil LR'xxx - ($PIC_pcrel$0 - 4), %r1 */
2811 { 0x28200000, 0xffe00000 },
2812 /* be,n RR'xxxx - ($PIC_pcrel$0 - 8)(%sr4, %r1) */
2813 { 0xe0202002, 0xffe02002 },
2814 { 0, 0 }
2815};
2816
2817static struct insn_pattern hppa_import_stub[] = {
2818 /* addil LR'xxx, %dp */
2819 { 0x2b600000, 0xffe00000 },
2820 /* ldw RR'xxx(%r1), %r21 */
2821 { 0x48350000, 0xffffb000 },
2822 /* bv %r0(%r21) */
2823 { 0xeaa0c000, 0xffffffff },
2824 /* ldw RR'xxx+4(%r1), %r19 */
2825 { 0x48330000, 0xffffb000 },
2826 { 0, 0 }
2827};
2828
2829static struct insn_pattern hppa_import_pic_stub[] = {
2830 /* addil LR'xxx,%r19 */
2831 { 0x2a600000, 0xffe00000 },
2832 /* ldw RR'xxx(%r1),%r21 */
2833 { 0x48350000, 0xffffb000 },
2834 /* bv %r0(%r21) */
2835 { 0xeaa0c000, 0xffffffff },
2836 /* ldw RR'xxx+4(%r1),%r19 */
2837 { 0x48330000, 0xffffb000 },
2838 { 0, 0 },
2839};
2840
2841static struct insn_pattern hppa_plt_stub[] = {
2842 /* b,l 1b, %r20 - 1b is 3 insns before here */
2843 { 0xea9f1fdd, 0xffffffff },
2844 /* depi 0,31,2,%r20 */
2845 { 0xd6801c1e, 0xffffffff },
2846 { 0, 0 }
34f55018
MK
2847};
2848
2849/* Maximum number of instructions on the patterns above. */
2850#define HPPA_MAX_INSN_PATTERN_LEN 4
2851
2852/* Return non-zero if the instructions at PC match the series
2853 described in PATTERN, or zero otherwise. PATTERN is an array of
2854 'struct insn_pattern' objects, terminated by an entry whose mask is
2855 zero.
2856
2857 When the match is successful, fill INSN[i] with what PATTERN[i]
2858 matched. */
2859
2860static int
e17a4113
UW
2861hppa_match_insns (struct gdbarch *gdbarch, CORE_ADDR pc,
2862 struct insn_pattern *pattern, unsigned int *insn)
34f55018 2863{
e17a4113 2864 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
34f55018
MK
2865 CORE_ADDR npc = pc;
2866 int i;
2867
2868 for (i = 0; pattern[i].mask; i++)
2869 {
2870 gdb_byte buf[HPPA_INSN_SIZE];
2871
8defab1a 2872 target_read_memory (npc, buf, HPPA_INSN_SIZE);
e17a4113 2873 insn[i] = extract_unsigned_integer (buf, HPPA_INSN_SIZE, byte_order);
34f55018
MK
2874 if ((insn[i] & pattern[i].mask) == pattern[i].data)
2875 npc += 4;
2876 else
2877 return 0;
2878 }
2879
2880 return 1;
2881}
2882
2883/* This relaxed version of the insstruction matcher allows us to match
2884 from somewhere inside the pattern, by looking backwards in the
2885 instruction scheme. */
2886
2887static int
e17a4113
UW
2888hppa_match_insns_relaxed (struct gdbarch *gdbarch, CORE_ADDR pc,
2889 struct insn_pattern *pattern, unsigned int *insn)
34f55018
MK
2890{
2891 int offset, len = 0;
2892
2893 while (pattern[len].mask)
2894 len++;
2895
2896 for (offset = 0; offset < len; offset++)
e17a4113
UW
2897 if (hppa_match_insns (gdbarch, pc - offset * HPPA_INSN_SIZE,
2898 pattern, insn))
34f55018
MK
2899 return 1;
2900
2901 return 0;
2902}
2903
2904static int
2905hppa_in_dyncall (CORE_ADDR pc)
2906{
2907 struct unwind_table_entry *u;
2908
2909 u = find_unwind_entry (hppa_symbol_address ("$$dyncall"));
2910 if (!u)
2911 return 0;
2912
2913 return (pc >= u->region_start && pc <= u->region_end);
2914}
2915
2916int
3e5d3a5a 2917hppa_in_solib_call_trampoline (struct gdbarch *gdbarch, CORE_ADDR pc)
34f55018
MK
2918{
2919 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2920 struct unwind_table_entry *u;
2921
3e5d3a5a 2922 if (in_plt_section (pc) || hppa_in_dyncall (pc))
34f55018
MK
2923 return 1;
2924
2925 /* The GNU toolchain produces linker stubs without unwind
2926 information. Since the pattern matching for linker stubs can be
2927 quite slow, so bail out if we do have an unwind entry. */
2928
2929 u = find_unwind_entry (pc);
806e23c0 2930 if (u != NULL)
34f55018
MK
2931 return 0;
2932
e17a4113
UW
2933 return
2934 (hppa_match_insns_relaxed (gdbarch, pc, hppa_import_stub, insn)
2935 || hppa_match_insns_relaxed (gdbarch, pc, hppa_import_pic_stub, insn)
2936 || hppa_match_insns_relaxed (gdbarch, pc, hppa_long_branch_stub, insn)
2937 || hppa_match_insns_relaxed (gdbarch, pc,
2938 hppa_long_branch_pic_stub, insn));
34f55018
MK
2939}
2940
2941/* This code skips several kind of "trampolines" used on PA-RISC
2942 systems: $$dyncall, import stubs and PLT stubs. */
2943
2944CORE_ADDR
52f729a7 2945hppa_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
34f55018 2946{
0dfff4cb
UW
2947 struct gdbarch *gdbarch = get_frame_arch (frame);
2948 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
2949
34f55018
MK
2950 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2951 int dp_rel;
2952
2953 /* $$dyncall handles both PLABELs and direct addresses. */
2954 if (hppa_in_dyncall (pc))
2955 {
52f729a7 2956 pc = get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 22);
34f55018
MK
2957
2958 /* PLABELs have bit 30 set; if it's a PLABEL, then dereference it. */
2959 if (pc & 0x2)
0dfff4cb 2960 pc = read_memory_typed_address (pc & ~0x3, func_ptr_type);
34f55018
MK
2961
2962 return pc;
2963 }
2964
e17a4113
UW
2965 dp_rel = hppa_match_insns (gdbarch, pc, hppa_import_stub, insn);
2966 if (dp_rel || hppa_match_insns (gdbarch, pc, hppa_import_pic_stub, insn))
34f55018
MK
2967 {
2968 /* Extract the target address from the addil/ldw sequence. */
2969 pc = hppa_extract_21 (insn[0]) + hppa_extract_14 (insn[1]);
2970
2971 if (dp_rel)
52f729a7 2972 pc += get_frame_register_unsigned (frame, HPPA_DP_REGNUM);
34f55018 2973 else
52f729a7 2974 pc += get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 19);
34f55018
MK
2975
2976 /* fallthrough */
2977 }
2978
3e5d3a5a 2979 if (in_plt_section (pc))
34f55018 2980 {
0dfff4cb 2981 pc = read_memory_typed_address (pc, func_ptr_type);
34f55018
MK
2982
2983 /* If the PLT slot has not yet been resolved, the target will be
2984 the PLT stub. */
3e5d3a5a 2985 if (in_plt_section (pc))
34f55018
MK
2986 {
2987 /* Sanity check: are we pointing to the PLT stub? */
e17a4113 2988 if (!hppa_match_insns (gdbarch, pc, hppa_plt_stub, insn))
34f55018 2989 {
5af949e3
UW
2990 warning (_("Cannot resolve PLT stub at %s."),
2991 paddress (gdbarch, pc));
34f55018
MK
2992 return 0;
2993 }
2994
2995 /* This should point to the fixup routine. */
0dfff4cb 2996 pc = read_memory_typed_address (pc + 8, func_ptr_type);
34f55018
MK
2997 }
2998 }
2999
3000 return pc;
3001}
3002\f
3003
8e8b2dba
MC
3004/* Here is a table of C type sizes on hppa with various compiles
3005 and options. I measured this on PA 9000/800 with HP-UX 11.11
3006 and these compilers:
3007
3008 /usr/ccs/bin/cc HP92453-01 A.11.01.21
3009 /opt/ansic/bin/cc HP92453-01 B.11.11.28706.GP
3010 /opt/aCC/bin/aCC B3910B A.03.45
3011 gcc gcc 3.3.2 native hppa2.0w-hp-hpux11.11
3012
3013 cc : 1 2 4 4 8 : 4 8 -- : 4 4
3014 ansic +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
3015 ansic +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
3016 ansic +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
3017 acc +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
3018 acc +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
3019 acc +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
3020 gcc : 1 2 4 4 8 : 4 8 16 : 4 4
3021
3022 Each line is:
3023
3024 compiler and options
3025 char, short, int, long, long long
3026 float, double, long double
3027 char *, void (*)()
3028
3029 So all these compilers use either ILP32 or LP64 model.
3030 TODO: gcc has more options so it needs more investigation.
3031
a2379359
MC
3032 For floating point types, see:
3033
3034 http://docs.hp.com/hpux/pdf/B3906-90006.pdf
3035 HP-UX floating-point guide, hpux 11.00
3036
8e8b2dba
MC
3037 -- chastain 2003-12-18 */
3038
e6e68f1f
JB
3039static struct gdbarch *
3040hppa_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
3041{
3ff7cf9e 3042 struct gdbarch_tdep *tdep;
e6e68f1f
JB
3043 struct gdbarch *gdbarch;
3044
3045 /* find a candidate among the list of pre-declared architectures. */
3046 arches = gdbarch_list_lookup_by_info (arches, &info);
3047 if (arches != NULL)
3048 return (arches->gdbarch);
3049
3050 /* If none found, then allocate and initialize one. */
41bf6aca 3051 tdep = XCNEW (struct gdbarch_tdep);
3ff7cf9e
JB
3052 gdbarch = gdbarch_alloc (&info, tdep);
3053
3054 /* Determine from the bfd_arch_info structure if we are dealing with
3055 a 32 or 64 bits architecture. If the bfd_arch_info is not available,
3056 then default to a 32bit machine. */
3057 if (info.bfd_arch_info != NULL)
3058 tdep->bytes_per_address =
3059 info.bfd_arch_info->bits_per_address / info.bfd_arch_info->bits_per_byte;
3060 else
3061 tdep->bytes_per_address = 4;
3062
d49771ef
RC
3063 tdep->find_global_pointer = hppa_find_global_pointer;
3064
3ff7cf9e
JB
3065 /* Some parts of the gdbarch vector depend on whether we are running
3066 on a 32 bits or 64 bits target. */
3067 switch (tdep->bytes_per_address)
3068 {
3069 case 4:
3070 set_gdbarch_num_regs (gdbarch, hppa32_num_regs);
3071 set_gdbarch_register_name (gdbarch, hppa32_register_name);
eded0a31 3072 set_gdbarch_register_type (gdbarch, hppa32_register_type);
38ca4e0c
MK
3073 set_gdbarch_cannot_store_register (gdbarch,
3074 hppa32_cannot_store_register);
3075 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3076 hppa32_cannot_fetch_register);
3ff7cf9e
JB
3077 break;
3078 case 8:
3079 set_gdbarch_num_regs (gdbarch, hppa64_num_regs);
3080 set_gdbarch_register_name (gdbarch, hppa64_register_name);
eded0a31 3081 set_gdbarch_register_type (gdbarch, hppa64_register_type);
1ef7fcb5 3082 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, hppa64_dwarf_reg_to_regnum);
38ca4e0c
MK
3083 set_gdbarch_cannot_store_register (gdbarch,
3084 hppa64_cannot_store_register);
3085 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3086 hppa64_cannot_fetch_register);
3ff7cf9e
JB
3087 break;
3088 default:
e2e0b3e5 3089 internal_error (__FILE__, __LINE__, _("Unsupported address size: %d"),
3ff7cf9e
JB
3090 tdep->bytes_per_address);
3091 }
3092
3ff7cf9e 3093 set_gdbarch_long_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
3ff7cf9e 3094 set_gdbarch_ptr_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
e6e68f1f 3095
8e8b2dba
MC
3096 /* The following gdbarch vector elements are the same in both ILP32
3097 and LP64, but might show differences some day. */
3098 set_gdbarch_long_long_bit (gdbarch, 64);
3099 set_gdbarch_long_double_bit (gdbarch, 128);
8da61cc4 3100 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
8e8b2dba 3101
3ff7cf9e
JB
3102 /* The following gdbarch vector elements do not depend on the address
3103 size, or in any other gdbarch element previously set. */
60383d10 3104 set_gdbarch_skip_prologue (gdbarch, hppa_skip_prologue);
c9cf6e20
MG
3105 set_gdbarch_stack_frame_destroyed_p (gdbarch,
3106 hppa_stack_frame_destroyed_p);
a2a84a72 3107 set_gdbarch_inner_than (gdbarch, core_addr_greaterthan);
eded0a31
AC
3108 set_gdbarch_sp_regnum (gdbarch, HPPA_SP_REGNUM);
3109 set_gdbarch_fp0_regnum (gdbarch, HPPA_FP0_REGNUM);
85ddcc70 3110 set_gdbarch_addr_bits_remove (gdbarch, hppa_addr_bits_remove);
60383d10 3111 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
cc72850f
MK
3112 set_gdbarch_read_pc (gdbarch, hppa_read_pc);
3113 set_gdbarch_write_pc (gdbarch, hppa_write_pc);
60383d10 3114
143985b7
AF
3115 /* Helper for function argument information. */
3116 set_gdbarch_fetch_pointer_argument (gdbarch, hppa_fetch_pointer_argument);
3117
3a3bc038
AC
3118 /* When a hardware watchpoint triggers, we'll move the inferior past
3119 it by removing all eventpoints; stepping past the instruction
3120 that caused the trigger; reinserting eventpoints; and checking
3121 whether any watched location changed. */
3122 set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
3123
5979bc46 3124 /* Inferior function call methods. */
fca7aa43 3125 switch (tdep->bytes_per_address)
5979bc46 3126 {
fca7aa43
AC
3127 case 4:
3128 set_gdbarch_push_dummy_call (gdbarch, hppa32_push_dummy_call);
3129 set_gdbarch_frame_align (gdbarch, hppa32_frame_align);
d49771ef
RC
3130 set_gdbarch_convert_from_func_ptr_addr
3131 (gdbarch, hppa32_convert_from_func_ptr_addr);
fca7aa43
AC
3132 break;
3133 case 8:
782eae8b
AC
3134 set_gdbarch_push_dummy_call (gdbarch, hppa64_push_dummy_call);
3135 set_gdbarch_frame_align (gdbarch, hppa64_frame_align);
fca7aa43 3136 break;
782eae8b 3137 default:
e2e0b3e5 3138 internal_error (__FILE__, __LINE__, _("bad switch"));
fad850b2
AC
3139 }
3140
3141 /* Struct return methods. */
fca7aa43 3142 switch (tdep->bytes_per_address)
fad850b2 3143 {
fca7aa43
AC
3144 case 4:
3145 set_gdbarch_return_value (gdbarch, hppa32_return_value);
3146 break;
3147 case 8:
782eae8b 3148 set_gdbarch_return_value (gdbarch, hppa64_return_value);
f5f907e2 3149 break;
fca7aa43 3150 default:
e2e0b3e5 3151 internal_error (__FILE__, __LINE__, _("bad switch"));
e963316f 3152 }
7f07c5b6 3153
04180708
YQ
3154 set_gdbarch_breakpoint_kind_from_pc (gdbarch, hppa_breakpoint::kind_from_pc);
3155 set_gdbarch_sw_breakpoint_from_kind (gdbarch, hppa_breakpoint::bp_from_kind);
7f07c5b6 3156 set_gdbarch_pseudo_register_read (gdbarch, hppa_pseudo_register_read);
85f4f2d8 3157
5979bc46 3158 /* Frame unwind methods. */
227e86ad 3159 set_gdbarch_dummy_id (gdbarch, hppa_dummy_id);
782eae8b 3160 set_gdbarch_unwind_pc (gdbarch, hppa_unwind_pc);
7f07c5b6 3161
50306a9d
RC
3162 /* Hook in ABI-specific overrides, if they have been registered. */
3163 gdbarch_init_osabi (info, gdbarch);
3164
7f07c5b6 3165 /* Hook in the default unwinders. */
227e86ad
JB
3166 frame_unwind_append_unwinder (gdbarch, &hppa_stub_frame_unwind);
3167 frame_unwind_append_unwinder (gdbarch, &hppa_frame_unwind);
3168 frame_unwind_append_unwinder (gdbarch, &hppa_fallback_frame_unwind);
5979bc46 3169
e6e68f1f
JB
3170 return gdbarch;
3171}
3172
3173static void
464963c9 3174hppa_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
e6e68f1f 3175{
464963c9 3176 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
fdd72f95
RC
3177
3178 fprintf_unfiltered (file, "bytes_per_address = %d\n",
3179 tdep->bytes_per_address);
3180 fprintf_unfiltered (file, "elf = %s\n", tdep->is_elf ? "yes" : "no");
e6e68f1f
JB
3181}
3182
4facf7e8
JB
3183void
3184_initialize_hppa_tdep (void)
3185{
e6e68f1f 3186 gdbarch_register (bfd_arch_hppa, hppa_gdbarch_init, hppa_dump_tdep);
4facf7e8 3187
7c46b9fb
RC
3188 hppa_objfile_priv_data = register_objfile_data ();
3189
4facf7e8 3190 add_cmd ("unwind", class_maintenance, unwind_command,
1a966eab 3191 _("Print unwind table entry at given address."),
4facf7e8
JB
3192 &maintenanceprintlist);
3193
1777feb0 3194 /* Debug this files internals. */
7915a72c
AC
3195 add_setshow_boolean_cmd ("hppa", class_maintenance, &hppa_debug, _("\
3196Set whether hppa target specific debugging information should be displayed."),
3197 _("\
3198Show whether hppa target specific debugging information is displayed."), _("\
4a302917
RC
3199This flag controls whether hppa target specific debugging information is\n\
3200displayed. This information is particularly useful for debugging frame\n\
7915a72c 3201unwinding problems."),
2c5b56ce 3202 NULL,
7915a72c 3203 NULL, /* FIXME: i18n: hppa debug flag is %s. */
2c5b56ce 3204 &setdebuglist, &showdebuglist);
4facf7e8 3205}