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a7aad9aa 1/* Target-dependent code for the HP PA-RISC architecture.
cda5a58a 2
4a94e368 3 Copyright (C) 1986-2022 Free Software Foundation, Inc.
c906108c
SS
4
5 Contributed by the Center for Software Science at the
6 University of Utah (pa-gdb-bugs@cs.utah.edu).
7
c5aa993b 8 This file is part of GDB.
c906108c 9
c5aa993b
JM
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
c5aa993b 13 (at your option) any later version.
c906108c 14
c5aa993b
JM
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
c906108c 19
c5aa993b 20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c906108c
SS
22
23#include "defs.h"
c906108c
SS
24#include "bfd.h"
25#include "inferior.h"
4e052eda 26#include "regcache.h"
e5d66720 27#include "completer.h"
59623e27 28#include "osabi.h"
343af405 29#include "arch-utils.h"
1777feb0 30/* For argument passing to the inferior. */
c906108c 31#include "symtab.h"
fde2cceb 32#include "dis-asm.h"
26d08f08
AC
33#include "trad-frame.h"
34#include "frame-unwind.h"
35#include "frame-base.h"
c906108c 36
c906108c
SS
37#include "gdbcore.h"
38#include "gdbcmd.h"
e6bb342a 39#include "gdbtypes.h"
c906108c 40#include "objfiles.h"
3ff7cf9e 41#include "hppa-tdep.h"
325fac50 42#include <algorithm>
c906108c 43
491144b5 44static bool hppa_debug = false;
369aa520 45
60383d10 46/* Some local constants. */
3ff7cf9e
JB
47static const int hppa32_num_regs = 128;
48static const int hppa64_num_regs = 96;
49
61a12cfa
JK
50/* We use the objfile->obj_private pointer for two things:
51 * 1. An unwind table;
52 *
53 * 2. A pointer to any associated shared library object.
54 *
55 * #defines are used to help refer to these objects.
56 */
57
58/* Info about the unwind table associated with an object file.
59 * This is hung off of the "objfile->obj_private" pointer, and
60 * is allocated in the objfile's psymbol obstack. This allows
61 * us to have unique unwind info for each executable and shared
62 * library that we are debugging.
63 */
64struct hppa_unwind_info
65 {
66 struct unwind_table_entry *table; /* Pointer to unwind info */
67 struct unwind_table_entry *cache; /* Pointer to last entry we found */
68 int last; /* Index of last entry */
69 };
70
71struct hppa_objfile_private
72 {
abed5aa8
TT
73 struct hppa_unwind_info *unwind_info = nullptr; /* a pointer */
74 struct so_list *so_info = nullptr; /* a pointer */
75 CORE_ADDR dp = 0;
61a12cfa 76
abed5aa8
TT
77 int dummy_call_sequence_reg = 0;
78 CORE_ADDR dummy_call_sequence_addr = 0;
61a12cfa
JK
79 };
80
7c46b9fb
RC
81/* hppa-specific object data -- unwind and solib info.
82 TODO/maybe: think about splitting this into two parts; the unwind data is
83 common to all hppa targets, but is only used in this file; we can register
84 that separately and make this static. The solib data is probably hpux-
85 specific, so we can create a separate extern objfile_data that is registered
86 by hppa-hpux-tdep.c and shared with pa64solib.c and somsolib.c. */
08b8a139
TT
87static const registry<objfile>::key<hppa_objfile_private>
88 hppa_objfile_priv_data;
7c46b9fb 89
405feb71 90/* Get at various relevant fields of an instruction word. */
e2ac8128
JB
91#define MASK_5 0x1f
92#define MASK_11 0x7ff
93#define MASK_14 0x3fff
94#define MASK_21 0x1fffff
95
e2ac8128
JB
96/* Sizes (in bytes) of the native unwind entries. */
97#define UNWIND_ENTRY_SIZE 16
98#define STUB_UNWIND_ENTRY_SIZE 8
99
c906108c 100/* Routines to extract various sized constants out of hppa
1777feb0 101 instructions. */
c906108c
SS
102
103/* This assumes that no garbage lies outside of the lower bits of
1777feb0 104 value. */
c906108c 105
63807e1d 106static int
abc485a1 107hppa_sign_extend (unsigned val, unsigned bits)
c906108c 108{
66c6502d 109 return (int) (val >> (bits - 1) ? (-(1 << bits)) | val : val);
c906108c
SS
110}
111
1777feb0 112/* For many immediate values the sign bit is the low bit! */
c906108c 113
63807e1d 114static int
abc485a1 115hppa_low_hppa_sign_extend (unsigned val, unsigned bits)
c906108c 116{
66c6502d 117 return (int) ((val & 0x1 ? (-(1 << (bits - 1))) : 0) | val >> 1);
c906108c
SS
118}
119
e2ac8128 120/* Extract the bits at positions between FROM and TO, using HP's numbering
1777feb0 121 (MSB = 0). */
e2ac8128 122
abc485a1
RC
123int
124hppa_get_field (unsigned word, int from, int to)
e2ac8128
JB
125{
126 return ((word) >> (31 - (to)) & ((1 << ((to) - (from) + 1)) - 1));
127}
128
1777feb0 129/* Extract the immediate field from a ld{bhw}s instruction. */
c906108c 130
abc485a1
RC
131int
132hppa_extract_5_load (unsigned word)
c906108c 133{
abc485a1 134 return hppa_low_hppa_sign_extend (word >> 16 & MASK_5, 5);
c906108c
SS
135}
136
1777feb0 137/* Extract the immediate field from a break instruction. */
c906108c 138
abc485a1
RC
139unsigned
140hppa_extract_5r_store (unsigned word)
c906108c
SS
141{
142 return (word & MASK_5);
143}
144
1777feb0 145/* Extract the immediate field from a {sr}sm instruction. */
c906108c 146
abc485a1
RC
147unsigned
148hppa_extract_5R_store (unsigned word)
c906108c
SS
149{
150 return (word >> 16 & MASK_5);
151}
152
1777feb0 153/* Extract a 14 bit immediate field. */
c906108c 154
abc485a1
RC
155int
156hppa_extract_14 (unsigned word)
c906108c 157{
abc485a1 158 return hppa_low_hppa_sign_extend (word & MASK_14, 14);
c906108c
SS
159}
160
1777feb0 161/* Extract a 21 bit constant. */
c906108c 162
abc485a1
RC
163int
164hppa_extract_21 (unsigned word)
c906108c
SS
165{
166 int val;
167
168 word &= MASK_21;
169 word <<= 11;
abc485a1 170 val = hppa_get_field (word, 20, 20);
c906108c 171 val <<= 11;
abc485a1 172 val |= hppa_get_field (word, 9, 19);
c906108c 173 val <<= 2;
abc485a1 174 val |= hppa_get_field (word, 5, 6);
c906108c 175 val <<= 5;
abc485a1 176 val |= hppa_get_field (word, 0, 4);
c906108c 177 val <<= 2;
abc485a1
RC
178 val |= hppa_get_field (word, 7, 8);
179 return hppa_sign_extend (val, 21) << 11;
c906108c
SS
180}
181
c906108c 182/* extract a 17 bit constant from branch instructions, returning the
1777feb0 183 19 bit signed value. */
c906108c 184
abc485a1
RC
185int
186hppa_extract_17 (unsigned word)
c906108c 187{
abc485a1
RC
188 return hppa_sign_extend (hppa_get_field (word, 19, 28) |
189 hppa_get_field (word, 29, 29) << 10 |
190 hppa_get_field (word, 11, 15) << 11 |
c906108c
SS
191 (word & 0x1) << 16, 17) << 2;
192}
3388d7ff
RC
193
194CORE_ADDR
195hppa_symbol_address(const char *sym)
196{
3b7344d5 197 struct bound_minimal_symbol minsym;
3388d7ff
RC
198
199 minsym = lookup_minimal_symbol (sym, NULL, NULL);
3b7344d5 200 if (minsym.minsym)
4aeddc50 201 return minsym.value_address ();
3388d7ff
RC
202 else
203 return (CORE_ADDR)-1;
204}
77d18ded 205
c906108c
SS
206\f
207
208/* Compare the start address for two unwind entries returning 1 if
209 the first address is larger than the second, -1 if the second is
210 larger than the first, and zero if they are equal. */
211
212static int
fba45db2 213compare_unwind_entries (const void *arg1, const void *arg2)
c906108c 214{
9a3c8263
SM
215 const struct unwind_table_entry *a = (const struct unwind_table_entry *) arg1;
216 const struct unwind_table_entry *b = (const struct unwind_table_entry *) arg2;
c906108c
SS
217
218 if (a->region_start > b->region_start)
219 return 1;
220 else if (a->region_start < b->region_start)
221 return -1;
222 else
223 return 0;
224}
225
53a5351d 226static void
fdd72f95 227record_text_segment_lowaddr (bfd *abfd, asection *section, void *data)
53a5351d 228{
fdd72f95 229 if ((section->flags & (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
53a5351d 230 == (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
fdd72f95
RC
231 {
232 bfd_vma value = section->vma - section->filepos;
233 CORE_ADDR *low_text_segment_address = (CORE_ADDR *)data;
234
235 if (value < *low_text_segment_address)
dda83cd7 236 *low_text_segment_address = value;
fdd72f95 237 }
53a5351d
JM
238}
239
c906108c 240static void
fba45db2 241internalize_unwinds (struct objfile *objfile, struct unwind_table_entry *table,
1777feb0 242 asection *section, unsigned int entries,
241fd515 243 size_t size, CORE_ADDR text_offset)
c906108c
SS
244{
245 /* We will read the unwind entries into temporary memory, then
246 fill in the actual unwind table. */
fdd72f95 247
c906108c
SS
248 if (size > 0)
249 {
08feed99 250 struct gdbarch *gdbarch = objfile->arch ();
08106042 251 hppa_gdbarch_tdep *tdep = gdbarch_tdep<hppa_gdbarch_tdep> (gdbarch);
c906108c
SS
252 unsigned long tmp;
253 unsigned i;
224c3ddb 254 char *buf = (char *) alloca (size);
fdd72f95 255 CORE_ADDR low_text_segment_address;
c906108c 256
fdd72f95 257 /* For ELF targets, then unwinds are supposed to
1777feb0 258 be segment relative offsets instead of absolute addresses.
c2c6d25f
JM
259
260 Note that when loading a shared library (text_offset != 0) the
261 unwinds are already relative to the text_offset that will be
262 passed in. */
345bd07c 263 if (tdep->is_elf && text_offset == 0)
53a5351d 264 {
dda83cd7 265 low_text_segment_address = -1;
fdd72f95 266
98badbfd 267 bfd_map_over_sections (objfile->obfd.get (),
fdd72f95
RC
268 record_text_segment_lowaddr,
269 &low_text_segment_address);
53a5351d 270
fdd72f95 271 text_offset = low_text_segment_address;
53a5351d 272 }
345bd07c 273 else if (tdep->solib_get_text_base)
dda83cd7 274 {
345bd07c 275 text_offset = tdep->solib_get_text_base (objfile);
acf86d54 276 }
53a5351d 277
98badbfd 278 bfd_get_section_contents (objfile->obfd.get (), section, buf, 0, size);
c906108c
SS
279
280 /* Now internalize the information being careful to handle host/target
dda83cd7 281 endian issues. */
c906108c
SS
282 for (i = 0; i < entries; i++)
283 {
284 table[i].region_start = bfd_get_32 (objfile->obfd,
c5aa993b 285 (bfd_byte *) buf);
c906108c
SS
286 table[i].region_start += text_offset;
287 buf += 4;
c5aa993b 288 table[i].region_end = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
289 table[i].region_end += text_offset;
290 buf += 4;
c5aa993b 291 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
292 buf += 4;
293 table[i].Cannot_unwind = (tmp >> 31) & 0x1;
294 table[i].Millicode = (tmp >> 30) & 0x1;
295 table[i].Millicode_save_sr0 = (tmp >> 29) & 0x1;
296 table[i].Region_description = (tmp >> 27) & 0x3;
6fcecea0 297 table[i].reserved = (tmp >> 26) & 0x1;
c906108c
SS
298 table[i].Entry_SR = (tmp >> 25) & 0x1;
299 table[i].Entry_FR = (tmp >> 21) & 0xf;
300 table[i].Entry_GR = (tmp >> 16) & 0x1f;
301 table[i].Args_stored = (tmp >> 15) & 0x1;
302 table[i].Variable_Frame = (tmp >> 14) & 0x1;
303 table[i].Separate_Package_Body = (tmp >> 13) & 0x1;
304 table[i].Frame_Extension_Millicode = (tmp >> 12) & 0x1;
305 table[i].Stack_Overflow_Check = (tmp >> 11) & 0x1;
306 table[i].Two_Instruction_SP_Increment = (tmp >> 10) & 0x1;
6fcecea0 307 table[i].sr4export = (tmp >> 9) & 0x1;
c906108c
SS
308 table[i].cxx_info = (tmp >> 8) & 0x1;
309 table[i].cxx_try_catch = (tmp >> 7) & 0x1;
310 table[i].sched_entry_seq = (tmp >> 6) & 0x1;
6fcecea0 311 table[i].reserved1 = (tmp >> 5) & 0x1;
c906108c
SS
312 table[i].Save_SP = (tmp >> 4) & 0x1;
313 table[i].Save_RP = (tmp >> 3) & 0x1;
314 table[i].Save_MRP_in_frame = (tmp >> 2) & 0x1;
6fcecea0 315 table[i].save_r19 = (tmp >> 1) & 0x1;
c906108c 316 table[i].Cleanup_defined = tmp & 0x1;
c5aa993b 317 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
318 buf += 4;
319 table[i].MPE_XL_interrupt_marker = (tmp >> 31) & 0x1;
320 table[i].HP_UX_interrupt_marker = (tmp >> 30) & 0x1;
321 table[i].Large_frame = (tmp >> 29) & 0x1;
6fcecea0
RC
322 table[i].alloca_frame = (tmp >> 28) & 0x1;
323 table[i].reserved2 = (tmp >> 27) & 0x1;
c906108c
SS
324 table[i].Total_frame_size = tmp & 0x7ffffff;
325
1777feb0 326 /* Stub unwinds are handled elsewhere. */
c906108c
SS
327 table[i].stub_unwind.stub_type = 0;
328 table[i].stub_unwind.padding = 0;
329 }
330 }
331}
332
333/* Read in the backtrace information stored in the `$UNWIND_START$' section of
334 the object file. This info is used mainly by find_unwind_entry() to find
335 out the stack frame size and frame pointer used by procedures. We put
336 everything on the psymbol obstack in the objfile so that it automatically
337 gets freed when the objfile is destroyed. */
338
339static void
fba45db2 340read_unwind_info (struct objfile *objfile)
c906108c 341{
d4f3574e 342 asection *unwind_sec, *stub_unwind_sec;
241fd515 343 size_t unwind_size, stub_unwind_size, total_size;
d4f3574e 344 unsigned index, unwind_entries;
c906108c
SS
345 unsigned stub_entries, total_entries;
346 CORE_ADDR text_offset;
7c46b9fb
RC
347 struct hppa_unwind_info *ui;
348 struct hppa_objfile_private *obj_private;
c906108c 349
b3b3bada 350 text_offset = objfile->text_section_offset ();
7c46b9fb
RC
351 ui = (struct hppa_unwind_info *) obstack_alloc (&objfile->objfile_obstack,
352 sizeof (struct hppa_unwind_info));
c906108c
SS
353
354 ui->table = NULL;
355 ui->cache = NULL;
356 ui->last = -1;
357
d4f3574e
SS
358 /* For reasons unknown the HP PA64 tools generate multiple unwinder
359 sections in a single executable. So we just iterate over every
85102364 360 section in the BFD looking for unwinder sections instead of trying
1777feb0 361 to do a lookup with bfd_get_section_by_name.
c906108c 362
d4f3574e
SS
363 First determine the total size of the unwind tables so that we
364 can allocate memory in a nice big hunk. */
365 total_entries = 0;
366 for (unwind_sec = objfile->obfd->sections;
367 unwind_sec;
368 unwind_sec = unwind_sec->next)
c906108c 369 {
d4f3574e
SS
370 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
371 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
372 {
fd361982 373 unwind_size = bfd_section_size (unwind_sec);
d4f3574e 374 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
c906108c 375
d4f3574e
SS
376 total_entries += unwind_entries;
377 }
c906108c
SS
378 }
379
d4f3574e 380 /* Now compute the size of the stub unwinds. Note the ELF tools do not
043f5962 381 use stub unwinds at the current time. */
98badbfd
TT
382 stub_unwind_sec = bfd_get_section_by_name (objfile->obfd.get (),
383 "$UNWIND_END$");
d4f3574e 384
c906108c
SS
385 if (stub_unwind_sec)
386 {
fd361982 387 stub_unwind_size = bfd_section_size (stub_unwind_sec);
c906108c
SS
388 stub_entries = stub_unwind_size / STUB_UNWIND_ENTRY_SIZE;
389 }
390 else
391 {
392 stub_unwind_size = 0;
393 stub_entries = 0;
394 }
395
396 /* Compute total number of unwind entries and their total size. */
d4f3574e 397 total_entries += stub_entries;
c906108c
SS
398 total_size = total_entries * sizeof (struct unwind_table_entry);
399
400 /* Allocate memory for the unwind table. */
401 ui->table = (struct unwind_table_entry *)
8b92e4d5 402 obstack_alloc (&objfile->objfile_obstack, total_size);
c5aa993b 403 ui->last = total_entries - 1;
c906108c 404
d4f3574e
SS
405 /* Now read in each unwind section and internalize the standard unwind
406 entries. */
c906108c 407 index = 0;
d4f3574e
SS
408 for (unwind_sec = objfile->obfd->sections;
409 unwind_sec;
410 unwind_sec = unwind_sec->next)
411 {
412 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
413 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
414 {
fd361982 415 unwind_size = bfd_section_size (unwind_sec);
d4f3574e
SS
416 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
417
418 internalize_unwinds (objfile, &ui->table[index], unwind_sec,
419 unwind_entries, unwind_size, text_offset);
420 index += unwind_entries;
421 }
422 }
423
424 /* Now read in and internalize the stub unwind entries. */
c906108c
SS
425 if (stub_unwind_size > 0)
426 {
427 unsigned int i;
224c3ddb 428 char *buf = (char *) alloca (stub_unwind_size);
c906108c
SS
429
430 /* Read in the stub unwind entries. */
98badbfd 431 bfd_get_section_contents (objfile->obfd.get (), stub_unwind_sec, buf,
c906108c
SS
432 0, stub_unwind_size);
433
434 /* Now convert them into regular unwind entries. */
435 for (i = 0; i < stub_entries; i++, index++)
436 {
437 /* Clear out the next unwind entry. */
438 memset (&ui->table[index], 0, sizeof (struct unwind_table_entry));
439
1777feb0 440 /* Convert offset & size into region_start and region_end.
c906108c
SS
441 Stuff away the stub type into "reserved" fields. */
442 ui->table[index].region_start = bfd_get_32 (objfile->obfd,
443 (bfd_byte *) buf);
444 ui->table[index].region_start += text_offset;
445 buf += 4;
446 ui->table[index].stub_unwind.stub_type = bfd_get_8 (objfile->obfd,
c5aa993b 447 (bfd_byte *) buf);
c906108c
SS
448 buf += 2;
449 ui->table[index].region_end
c5aa993b
JM
450 = ui->table[index].region_start + 4 *
451 (bfd_get_16 (objfile->obfd, (bfd_byte *) buf) - 1);
c906108c
SS
452 buf += 2;
453 }
454
455 }
456
457 /* Unwind table needs to be kept sorted. */
458 qsort (ui->table, total_entries, sizeof (struct unwind_table_entry),
459 compare_unwind_entries);
460
461 /* Keep a pointer to the unwind information. */
9a73f0ad 462 obj_private = hppa_objfile_priv_data.get (objfile);
7c46b9fb 463 if (obj_private == NULL)
abed5aa8 464 obj_private = hppa_objfile_priv_data.emplace (objfile);
77d18ded 465
c906108c
SS
466 obj_private->unwind_info = ui;
467}
468
469/* Lookup the unwind (stack backtrace) info for the given PC. We search all
470 of the objfiles seeking the unwind table entry for this PC. Each objfile
471 contains a sorted list of struct unwind_table_entry. Since we do a binary
472 search of the unwind tables, we depend upon them to be sorted. */
473
474struct unwind_table_entry *
fba45db2 475find_unwind_entry (CORE_ADDR pc)
c906108c
SS
476{
477 int first, middle, last;
c906108c 478
369aa520 479 if (hppa_debug)
6cb06a8c
TT
480 gdb_printf (gdb_stdlog, "{ find_unwind_entry %s -> ",
481 hex_string (pc));
369aa520 482
1777feb0 483 /* A function at address 0? Not in HP-UX! */
c906108c 484 if (pc == (CORE_ADDR) 0)
369aa520
RC
485 {
486 if (hppa_debug)
6cb06a8c 487 gdb_printf (gdb_stdlog, "NULL }\n");
369aa520
RC
488 return NULL;
489 }
c906108c 490
2030c079 491 for (objfile *objfile : current_program_space->objfiles ())
aed57c53
TT
492 {
493 struct hppa_unwind_info *ui;
494 ui = NULL;
abed5aa8 495 struct hppa_objfile_private *priv = hppa_objfile_priv_data.get (objfile);
aed57c53 496 if (priv)
abed5aa8 497 ui = priv->unwind_info;
aed57c53
TT
498
499 if (!ui)
500 {
501 read_unwind_info (objfile);
9a73f0ad 502 priv = hppa_objfile_priv_data.get (objfile);
aed57c53
TT
503 if (priv == NULL)
504 error (_("Internal error reading unwind information."));
abed5aa8 505 ui = priv->unwind_info;
aed57c53
TT
506 }
507
508 /* First, check the cache. */
509
510 if (ui->cache
511 && pc >= ui->cache->region_start
512 && pc <= ui->cache->region_end)
513 {
514 if (hppa_debug)
6cb06a8c
TT
515 gdb_printf (gdb_stdlog, "%s (cached) }\n",
516 hex_string ((uintptr_t) ui->cache));
aed57c53
TT
517 return ui->cache;
518 }
519
520 /* Not in the cache, do a binary search. */
521
522 first = 0;
523 last = ui->last;
524
525 while (first <= last)
526 {
527 middle = (first + last) / 2;
528 if (pc >= ui->table[middle].region_start
529 && pc <= ui->table[middle].region_end)
530 {
531 ui->cache = &ui->table[middle];
532 if (hppa_debug)
6cb06a8c
TT
533 gdb_printf (gdb_stdlog, "%s }\n",
534 hex_string ((uintptr_t) ui->cache));
aed57c53
TT
535 return &ui->table[middle];
536 }
537
538 if (pc < ui->table[middle].region_start)
539 last = middle - 1;
540 else
541 first = middle + 1;
542 }
543 }
369aa520
RC
544
545 if (hppa_debug)
6cb06a8c 546 gdb_printf (gdb_stdlog, "NULL (not found) }\n");
369aa520 547
c906108c
SS
548 return NULL;
549}
550
c9cf6e20
MG
551/* Implement the stack_frame_destroyed_p gdbarch method.
552
553 The epilogue is defined here as the area either on the `bv' instruction
1777feb0 554 itself or an instruction which destroys the function's stack frame.
1fb24930
RC
555
556 We do not assume that the epilogue is at the end of a function as we can
557 also have return sequences in the middle of a function. */
c9cf6e20 558
1fb24930 559static int
c9cf6e20 560hppa_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1fb24930 561{
e17a4113 562 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1fb24930
RC
563 unsigned long status;
564 unsigned int inst;
e362b510 565 gdb_byte buf[4];
1fb24930 566
8defab1a 567 status = target_read_memory (pc, buf, 4);
1fb24930
RC
568 if (status != 0)
569 return 0;
570
e17a4113 571 inst = extract_unsigned_integer (buf, 4, byte_order);
1fb24930
RC
572
573 /* The most common way to perform a stack adjustment ldo X(sp),sp
574 We are destroying a stack frame if the offset is negative. */
575 if ((inst & 0xffffc000) == 0x37de0000
576 && hppa_extract_14 (inst) < 0)
577 return 1;
578
579 /* ldw,mb D(sp),X or ldd,mb D(sp),X */
580 if (((inst & 0x0fc010e0) == 0x0fc010e0
581 || (inst & 0x0fc010e0) == 0x0fc010e0)
582 && hppa_extract_14 (inst) < 0)
583 return 1;
584
585 /* bv %r0(%rp) or bv,n %r0(%rp) */
586 if (inst == 0xe840c000 || inst == 0xe840c002)
587 return 1;
588
589 return 0;
590}
591
04180708 592constexpr gdb_byte hppa_break_insn[] = {0x00, 0x01, 0x00, 0x04};
598cc9dc 593
04180708 594typedef BP_MANIPULATION (hppa_break_insn) hppa_breakpoint;
aaab4dba 595
e23457df
AC
596/* Return the name of a register. */
597
4a302917 598static const char *
d93859e2 599hppa32_register_name (struct gdbarch *gdbarch, int i)
e23457df 600{
a121b7c1 601 static const char *names[] = {
e23457df
AC
602 "flags", "r1", "rp", "r3",
603 "r4", "r5", "r6", "r7",
604 "r8", "r9", "r10", "r11",
605 "r12", "r13", "r14", "r15",
606 "r16", "r17", "r18", "r19",
607 "r20", "r21", "r22", "r23",
608 "r24", "r25", "r26", "dp",
609 "ret0", "ret1", "sp", "r31",
610 "sar", "pcoqh", "pcsqh", "pcoqt",
611 "pcsqt", "eiem", "iir", "isr",
612 "ior", "ipsw", "goto", "sr4",
613 "sr0", "sr1", "sr2", "sr3",
614 "sr5", "sr6", "sr7", "cr0",
615 "cr8", "cr9", "ccr", "cr12",
616 "cr13", "cr24", "cr25", "cr26",
617 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
618 "fpsr", "fpe1", "fpe2", "fpe3",
619 "fpe4", "fpe5", "fpe6", "fpe7",
620 "fr4", "fr4R", "fr5", "fr5R",
621 "fr6", "fr6R", "fr7", "fr7R",
622 "fr8", "fr8R", "fr9", "fr9R",
623 "fr10", "fr10R", "fr11", "fr11R",
624 "fr12", "fr12R", "fr13", "fr13R",
625 "fr14", "fr14R", "fr15", "fr15R",
626 "fr16", "fr16R", "fr17", "fr17R",
627 "fr18", "fr18R", "fr19", "fr19R",
628 "fr20", "fr20R", "fr21", "fr21R",
629 "fr22", "fr22R", "fr23", "fr23R",
630 "fr24", "fr24R", "fr25", "fr25R",
631 "fr26", "fr26R", "fr27", "fr27R",
632 "fr28", "fr28R", "fr29", "fr29R",
633 "fr30", "fr30R", "fr31", "fr31R"
634 };
635 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
636 return NULL;
637 else
638 return names[i];
639}
640
4a302917 641static const char *
d93859e2 642hppa64_register_name (struct gdbarch *gdbarch, int i)
e23457df 643{
a121b7c1 644 static const char *names[] = {
e23457df
AC
645 "flags", "r1", "rp", "r3",
646 "r4", "r5", "r6", "r7",
647 "r8", "r9", "r10", "r11",
648 "r12", "r13", "r14", "r15",
649 "r16", "r17", "r18", "r19",
650 "r20", "r21", "r22", "r23",
651 "r24", "r25", "r26", "dp",
652 "ret0", "ret1", "sp", "r31",
653 "sar", "pcoqh", "pcsqh", "pcoqt",
654 "pcsqt", "eiem", "iir", "isr",
655 "ior", "ipsw", "goto", "sr4",
656 "sr0", "sr1", "sr2", "sr3",
657 "sr5", "sr6", "sr7", "cr0",
658 "cr8", "cr9", "ccr", "cr12",
659 "cr13", "cr24", "cr25", "cr26",
660 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
661 "fpsr", "fpe1", "fpe2", "fpe3",
662 "fr4", "fr5", "fr6", "fr7",
663 "fr8", "fr9", "fr10", "fr11",
664 "fr12", "fr13", "fr14", "fr15",
665 "fr16", "fr17", "fr18", "fr19",
666 "fr20", "fr21", "fr22", "fr23",
667 "fr24", "fr25", "fr26", "fr27",
668 "fr28", "fr29", "fr30", "fr31"
669 };
670 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
671 return NULL;
672 else
673 return names[i];
674}
675
85c83e99 676/* Map dwarf DBX register numbers to GDB register numbers. */
1ef7fcb5 677static int
d3f73121 678hppa64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1ef7fcb5 679{
85c83e99 680 /* The general registers and the sar are the same in both sets. */
0fde2c53 681 if (reg >= 0 && reg <= 32)
1ef7fcb5
RC
682 return reg;
683
684 /* fr4-fr31 are mapped from 72 in steps of 2. */
85c83e99 685 if (reg >= 72 && reg < 72 + 28 * 2 && !(reg & 1))
1ef7fcb5
RC
686 return HPPA64_FP4_REGNUM + (reg - 72) / 2;
687
1ef7fcb5
RC
688 return -1;
689}
690
79508e1e
AC
691/* This function pushes a stack frame with arguments as part of the
692 inferior function calling mechanism.
693
694 This is the version of the function for the 32-bit PA machines, in
695 which later arguments appear at lower addresses. (The stack always
696 grows towards higher addresses.)
697
698 We simply allocate the appropriate amount of stack space and put
699 arguments into their proper slots. */
700
4a302917 701static CORE_ADDR
7d9b040b 702hppa32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
79508e1e
AC
703 struct regcache *regcache, CORE_ADDR bp_addr,
704 int nargs, struct value **args, CORE_ADDR sp,
cf84fa6b
AH
705 function_call_return_method return_method,
706 CORE_ADDR struct_addr)
79508e1e 707{
e17a4113
UW
708 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
709
79508e1e
AC
710 /* Stack base address at which any pass-by-reference parameters are
711 stored. */
712 CORE_ADDR struct_end = 0;
713 /* Stack base address at which the first parameter is stored. */
714 CORE_ADDR param_end = 0;
715
79508e1e
AC
716 /* Two passes. First pass computes the location of everything,
717 second pass writes the bytes out. */
718 int write_pass;
d49771ef
RC
719
720 /* Global pointer (r19) of the function we are trying to call. */
721 CORE_ADDR gp;
722
08106042 723 hppa_gdbarch_tdep *tdep = gdbarch_tdep<hppa_gdbarch_tdep> (gdbarch);
d49771ef 724
79508e1e
AC
725 for (write_pass = 0; write_pass < 2; write_pass++)
726 {
1797a8f6 727 CORE_ADDR struct_ptr = 0;
1777feb0 728 /* The first parameter goes into sp-36, each stack slot is 4-bytes.
dda83cd7 729 struct_ptr is adjusted for each argument below, so the first
2a6228ef
RC
730 argument will end up at sp-36. */
731 CORE_ADDR param_ptr = 32;
79508e1e 732 int i;
2a6228ef
RC
733 int small_struct = 0;
734
79508e1e
AC
735 for (i = 0; i < nargs; i++)
736 {
737 struct value *arg = args[i];
4991999e 738 struct type *type = check_typedef (value_type (arg));
79508e1e
AC
739 /* The corresponding parameter that is pushed onto the
740 stack, and [possibly] passed in a register. */
948f8e3d 741 gdb_byte param_val[8];
79508e1e
AC
742 int param_len;
743 memset (param_val, 0, sizeof param_val);
df86565b 744 if (type->length () > 8)
79508e1e
AC
745 {
746 /* Large parameter, pass by reference. Store the value
747 in "struct" area and then pass its address. */
748 param_len = 4;
df86565b 749 struct_ptr += align_up (type->length (), 8);
79508e1e 750 if (write_pass)
50888e42 751 write_memory (struct_end - struct_ptr,
df86565b 752 value_contents (arg).data (), type->length ());
e17a4113
UW
753 store_unsigned_integer (param_val, 4, byte_order,
754 struct_end - struct_ptr);
79508e1e 755 }
78134374
SM
756 else if (type->code () == TYPE_CODE_INT
757 || type->code () == TYPE_CODE_ENUM)
79508e1e
AC
758 {
759 /* Integer value store, right aligned. "unpack_long"
760 takes care of any sign-extension problems. */
df86565b 761 param_len = align_up (type->length (), 4);
50888e42
SM
762 store_unsigned_integer
763 (param_val, param_len, byte_order,
764 unpack_long (type, value_contents (arg).data ()));
79508e1e 765 }
78134374 766 else if (type->code () == TYPE_CODE_FLT)
dda83cd7 767 {
2a6228ef 768 /* Floating point value store, right aligned. */
df86565b 769 param_len = align_up (type->length (), 4);
50888e42 770 memcpy (param_val, value_contents (arg).data (), param_len);
dda83cd7 771 }
79508e1e
AC
772 else
773 {
df86565b 774 param_len = align_up (type->length (), 4);
2a6228ef
RC
775
776 /* Small struct value are stored right-aligned. */
df86565b
SM
777 memcpy (param_val + param_len - type->length (),
778 value_contents (arg).data (), type->length ());
2a6228ef
RC
779
780 /* Structures of size 5, 6 and 7 bytes are special in that
dda83cd7 781 the higher-ordered word is stored in the lower-ordered
2a6228ef
RC
782 argument, and even though it is a 8-byte quantity the
783 registers need not be 8-byte aligned. */
1b07b470 784 if (param_len > 4 && param_len < 8)
2a6228ef 785 small_struct = 1;
79508e1e 786 }
2a6228ef 787
1797a8f6 788 param_ptr += param_len;
2a6228ef 789 if (param_len == 8 && !small_struct)
dda83cd7 790 param_ptr = align_up (param_ptr, 8);
2a6228ef
RC
791
792 /* First 4 non-FP arguments are passed in gr26-gr23.
793 First 4 32-bit FP arguments are passed in fr4L-fr7L.
794 First 2 64-bit FP arguments are passed in fr5 and fr7.
795
796 The rest go on the stack, starting at sp-36, towards lower
797 addresses. 8-byte arguments must be aligned to a 8-byte
798 stack boundary. */
79508e1e
AC
799 if (write_pass)
800 {
1797a8f6 801 write_memory (param_end - param_ptr, param_val, param_len);
2a6228ef
RC
802
803 /* There are some cases when we don't know the type
804 expected by the callee (e.g. for variadic functions), so
805 pass the parameters in both general and fp regs. */
806 if (param_ptr <= 48)
79508e1e 807 {
2a6228ef
RC
808 int grreg = 26 - (param_ptr - 36) / 4;
809 int fpLreg = 72 + (param_ptr - 36) / 4 * 2;
810 int fpreg = 74 + (param_ptr - 32) / 8 * 4;
811
b66f5587
SM
812 regcache->cooked_write (grreg, param_val);
813 regcache->cooked_write (fpLreg, param_val);
2a6228ef 814
79508e1e 815 if (param_len > 4)
2a6228ef 816 {
b66f5587 817 regcache->cooked_write (grreg + 1, param_val + 4);
2a6228ef 818
b66f5587
SM
819 regcache->cooked_write (fpreg, param_val);
820 regcache->cooked_write (fpreg + 1, param_val + 4);
2a6228ef 821 }
79508e1e
AC
822 }
823 }
824 }
825
826 /* Update the various stack pointers. */
827 if (!write_pass)
828 {
2a6228ef 829 struct_end = sp + align_up (struct_ptr, 64);
79508e1e
AC
830 /* PARAM_PTR already accounts for all the arguments passed
831 by the user. However, the ABI mandates minimum stack
832 space allocations for outgoing arguments. The ABI also
833 mandates minimum stack alignments which we must
834 preserve. */
2a6228ef 835 param_end = struct_end + align_up (param_ptr, 64);
79508e1e
AC
836 }
837 }
838
839 /* If a structure has to be returned, set up register 28 to hold its
1777feb0 840 address. */
cf84fa6b 841 if (return_method == return_method_struct)
9c9acae0 842 regcache_cooked_write_unsigned (regcache, 28, struct_addr);
79508e1e 843
e38c262f 844 gp = tdep->find_global_pointer (gdbarch, function);
d49771ef
RC
845
846 if (gp != 0)
9c9acae0 847 regcache_cooked_write_unsigned (regcache, 19, gp);
d49771ef 848
79508e1e 849 /* Set the return address. */
77d18ded
RC
850 if (!gdbarch_push_dummy_code_p (gdbarch))
851 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
79508e1e 852
c4557624 853 /* Update the Stack Pointer. */
34f75cc1 854 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, param_end);
c4557624 855
2a6228ef 856 return param_end;
79508e1e
AC
857}
858
38ca4e0c
MK
859/* The 64-bit PA-RISC calling conventions are documented in "64-Bit
860 Runtime Architecture for PA-RISC 2.0", which is distributed as part
861 as of the HP-UX Software Transition Kit (STK). This implementation
862 is based on version 3.3, dated October 6, 1997. */
2f690297 863
38ca4e0c 864/* Check whether TYPE is an "Integral or Pointer Scalar Type". */
2f690297 865
38ca4e0c
MK
866static int
867hppa64_integral_or_pointer_p (const struct type *type)
868{
78134374 869 switch (type->code ())
38ca4e0c
MK
870 {
871 case TYPE_CODE_INT:
872 case TYPE_CODE_BOOL:
873 case TYPE_CODE_CHAR:
874 case TYPE_CODE_ENUM:
875 case TYPE_CODE_RANGE:
876 {
df86565b 877 int len = type->length ();
38ca4e0c
MK
878 return (len == 1 || len == 2 || len == 4 || len == 8);
879 }
880 case TYPE_CODE_PTR:
881 case TYPE_CODE_REF:
aa006118 882 case TYPE_CODE_RVALUE_REF:
df86565b 883 return (type->length () == 8);
38ca4e0c
MK
884 default:
885 break;
886 }
887
888 return 0;
889}
890
891/* Check whether TYPE is a "Floating Scalar Type". */
892
893static int
894hppa64_floating_p (const struct type *type)
895{
78134374 896 switch (type->code ())
38ca4e0c
MK
897 {
898 case TYPE_CODE_FLT:
899 {
df86565b 900 int len = type->length ();
38ca4e0c
MK
901 return (len == 4 || len == 8 || len == 16);
902 }
903 default:
904 break;
905 }
906
907 return 0;
908}
2f690297 909
1218e655
RC
910/* If CODE points to a function entry address, try to look up the corresponding
911 function descriptor and return its address instead. If CODE is not a
912 function entry address, then just return it unchanged. */
913static CORE_ADDR
e17a4113 914hppa64_convert_code_addr_to_fptr (struct gdbarch *gdbarch, CORE_ADDR code)
1218e655 915{
e17a4113 916 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1218e655
RC
917 struct obj_section *sec, *opd;
918
919 sec = find_pc_section (code);
920
921 if (!sec)
922 return code;
923
924 /* If CODE is in a data section, assume it's already a fptr. */
925 if (!(sec->the_bfd_section->flags & SEC_CODE))
926 return code;
927
928 ALL_OBJFILE_OSECTIONS (sec->objfile, opd)
929 {
930 if (strcmp (opd->the_bfd_section->name, ".opd") == 0)
aded6f54 931 break;
1218e655
RC
932 }
933
934 if (opd < sec->objfile->sections_end)
935 {
0c1bcd23 936 for (CORE_ADDR addr = opd->addr (); addr < opd->endaddr (); addr += 2 * 8)
aded6f54 937 {
1218e655 938 ULONGEST opdaddr;
948f8e3d 939 gdb_byte tmp[8];
1218e655
RC
940
941 if (target_read_memory (addr, tmp, sizeof (tmp)))
942 break;
e17a4113 943 opdaddr = extract_unsigned_integer (tmp, sizeof (tmp), byte_order);
1218e655 944
aded6f54 945 if (opdaddr == code)
1218e655
RC
946 return addr - 16;
947 }
948 }
949
950 return code;
951}
952
4a302917 953static CORE_ADDR
7d9b040b 954hppa64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
2f690297
AC
955 struct regcache *regcache, CORE_ADDR bp_addr,
956 int nargs, struct value **args, CORE_ADDR sp,
cf84fa6b
AH
957 function_call_return_method return_method,
958 CORE_ADDR struct_addr)
2f690297 959{
08106042 960 hppa_gdbarch_tdep *tdep = gdbarch_tdep<hppa_gdbarch_tdep> (gdbarch);
e17a4113 961 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
38ca4e0c
MK
962 int i, offset = 0;
963 CORE_ADDR gp;
2f690297 964
38ca4e0c
MK
965 /* "The outgoing parameter area [...] must be aligned at a 16-byte
966 boundary." */
967 sp = align_up (sp, 16);
2f690297 968
38ca4e0c
MK
969 for (i = 0; i < nargs; i++)
970 {
971 struct value *arg = args[i];
972 struct type *type = value_type (arg);
df86565b 973 int len = type->length ();
0fd88904 974 const bfd_byte *valbuf;
1218e655 975 bfd_byte fptrbuf[8];
38ca4e0c 976 int regnum;
2f690297 977
38ca4e0c
MK
978 /* "Each parameter begins on a 64-bit (8-byte) boundary." */
979 offset = align_up (offset, 8);
77d18ded 980
38ca4e0c 981 if (hppa64_integral_or_pointer_p (type))
2f690297 982 {
38ca4e0c 983 /* "Integral scalar parameters smaller than 64 bits are
dda83cd7
SM
984 padded on the left (i.e., the value is in the
985 least-significant bits of the 64-bit storage unit, and
986 the high-order bits are undefined)." Therefore we can
987 safely sign-extend them. */
38ca4e0c 988 if (len < 8)
449e1137 989 {
df4df182 990 arg = value_cast (builtin_type (gdbarch)->builtin_int64, arg);
38ca4e0c
MK
991 len = 8;
992 }
993 }
994 else if (hppa64_floating_p (type))
995 {
996 if (len > 8)
997 {
998 /* "Quad-precision (128-bit) floating-point scalar
999 parameters are aligned on a 16-byte boundary." */
1000 offset = align_up (offset, 16);
1001
1002 /* "Double-extended- and quad-precision floating-point
dda83cd7
SM
1003 parameters within the first 64 bytes of the parameter
1004 list are always passed in general registers." */
449e1137
AC
1005 }
1006 else
1007 {
38ca4e0c 1008 if (len == 4)
449e1137 1009 {
38ca4e0c
MK
1010 /* "Single-precision (32-bit) floating-point scalar
1011 parameters are padded on the left with 32 bits of
1012 garbage (i.e., the floating-point value is in the
1013 least-significant 32 bits of a 64-bit storage
1014 unit)." */
1015 offset += 4;
449e1137 1016 }
38ca4e0c
MK
1017
1018 /* "Single- and double-precision floating-point
dda83cd7
SM
1019 parameters in this area are passed according to the
1020 available formal parameter information in a function
1021 prototype. [...] If no prototype is in scope,
1022 floating-point parameters must be passed both in the
1023 corresponding general registers and in the
1024 corresponding floating-point registers." */
38ca4e0c
MK
1025 regnum = HPPA64_FP4_REGNUM + offset / 8;
1026
1027 if (regnum < HPPA64_FP4_REGNUM + 8)
449e1137 1028 {
38ca4e0c
MK
1029 /* "Single-precision floating-point parameters, when
1030 passed in floating-point registers, are passed in
1031 the right halves of the floating point registers;
1032 the left halves are unused." */
e4c4a59b 1033 regcache->cooked_write_part (regnum, offset % 8, len,
50888e42 1034 value_contents (arg).data ());
449e1137
AC
1035 }
1036 }
2f690297 1037 }
38ca4e0c 1038 else
2f690297 1039 {
38ca4e0c
MK
1040 if (len > 8)
1041 {
1042 /* "Aggregates larger than 8 bytes are aligned on a
1043 16-byte boundary, possibly leaving an unused argument
1777feb0 1044 slot, which is filled with garbage. If necessary,
38ca4e0c
MK
1045 they are padded on the right (with garbage), to a
1046 multiple of 8 bytes." */
1047 offset = align_up (offset, 16);
1048 }
1049 }
1050
1218e655 1051 /* If we are passing a function pointer, make sure we pass a function
dda83cd7 1052 descriptor instead of the function entry address. */
78134374 1053 if (type->code () == TYPE_CODE_PTR
27710edb 1054 && type->target_type ()->code () == TYPE_CODE_FUNC)
dda83cd7 1055 {
1218e655
RC
1056 ULONGEST codeptr, fptr;
1057
50888e42 1058 codeptr = unpack_long (type, value_contents (arg).data ());
e17a4113 1059 fptr = hppa64_convert_code_addr_to_fptr (gdbarch, codeptr);
df86565b 1060 store_unsigned_integer (fptrbuf, type->length (), byte_order,
e17a4113 1061 fptr);
1218e655
RC
1062 valbuf = fptrbuf;
1063 }
1064 else
dda83cd7 1065 {
50888e42 1066 valbuf = value_contents (arg).data ();
1218e655
RC
1067 }
1068
38ca4e0c 1069 /* Always store the argument in memory. */
1218e655 1070 write_memory (sp + offset, valbuf, len);
38ca4e0c 1071
38ca4e0c
MK
1072 regnum = HPPA_ARG0_REGNUM - offset / 8;
1073 while (regnum > HPPA_ARG0_REGNUM - 8 && len > 0)
1074 {
e4c4a59b
SM
1075 regcache->cooked_write_part (regnum, offset % 8, std::min (len, 8),
1076 valbuf);
325fac50
PA
1077 offset += std::min (len, 8);
1078 valbuf += std::min (len, 8);
1079 len -= std::min (len, 8);
38ca4e0c 1080 regnum--;
2f690297 1081 }
38ca4e0c
MK
1082
1083 offset += len;
2f690297
AC
1084 }
1085
38ca4e0c
MK
1086 /* Set up GR29 (%ret1) to hold the argument pointer (ap). */
1087 regcache_cooked_write_unsigned (regcache, HPPA_RET1_REGNUM, sp + 64);
1088
1089 /* Allocate the outgoing parameter area. Make sure the outgoing
1090 parameter area is multiple of 16 bytes in length. */
325fac50 1091 sp += std::max (align_up (offset, 16), (ULONGEST) 64);
38ca4e0c
MK
1092
1093 /* Allocate 32-bytes of scratch space. The documentation doesn't
1094 mention this, but it seems to be needed. */
1095 sp += 32;
1096
1097 /* Allocate the frame marker area. */
1098 sp += 16;
1099
1100 /* If a structure has to be returned, set up GR 28 (%ret0) to hold
1101 its address. */
cf84fa6b 1102 if (return_method == return_method_struct)
38ca4e0c 1103 regcache_cooked_write_unsigned (regcache, HPPA_RET0_REGNUM, struct_addr);
2f690297 1104
38ca4e0c 1105 /* Set up GR27 (%dp) to hold the global pointer (gp). */
e38c262f 1106 gp = tdep->find_global_pointer (gdbarch, function);
77d18ded 1107 if (gp != 0)
38ca4e0c 1108 regcache_cooked_write_unsigned (regcache, HPPA_DP_REGNUM, gp);
77d18ded 1109
38ca4e0c 1110 /* Set up GR2 (%rp) to hold the return pointer (rp). */
77d18ded
RC
1111 if (!gdbarch_push_dummy_code_p (gdbarch))
1112 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
2f690297 1113
38ca4e0c
MK
1114 /* Set up GR30 to hold the stack pointer (sp). */
1115 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, sp);
c4557624 1116
38ca4e0c 1117 return sp;
2f690297 1118}
38ca4e0c 1119\f
2f690297 1120
08a27113
MK
1121/* Handle 32/64-bit struct return conventions. */
1122
1123static enum return_value_convention
6a3a010b 1124hppa32_return_value (struct gdbarch *gdbarch, struct value *function,
08a27113 1125 struct type *type, struct regcache *regcache,
e127f0db 1126 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113 1127{
df86565b 1128 if (type->length () <= 2 * 4)
08a27113
MK
1129 {
1130 /* The value always lives in the right hand end of the register
1131 (or register pair)? */
1132 int b;
78134374 1133 int reg = type->code () == TYPE_CODE_FLT ? HPPA_FP4_REGNUM : 28;
df86565b 1134 int part = type->length () % 4;
08a27113
MK
1135 /* The left hand register contains only part of the value,
1136 transfer that first so that the rest can be xfered as entire
1137 4-byte registers. */
1138 if (part > 0)
1139 {
1140 if (readbuf != NULL)
73bb0000 1141 regcache->cooked_read_part (reg, 4 - part, part, readbuf);
08a27113 1142 if (writebuf != NULL)
e4c4a59b 1143 regcache->cooked_write_part (reg, 4 - part, part, writebuf);
08a27113
MK
1144 reg++;
1145 }
1146 /* Now transfer the remaining register values. */
df86565b 1147 for (b = part; b < type->length (); b += 4)
08a27113
MK
1148 {
1149 if (readbuf != NULL)
dca08e1f 1150 regcache->cooked_read (reg, readbuf + b);
08a27113 1151 if (writebuf != NULL)
b66f5587 1152 regcache->cooked_write (reg, writebuf + b);
08a27113
MK
1153 reg++;
1154 }
1155 return RETURN_VALUE_REGISTER_CONVENTION;
1156 }
1157 else
1158 return RETURN_VALUE_STRUCT_CONVENTION;
1159}
1160
1161static enum return_value_convention
6a3a010b 1162hppa64_return_value (struct gdbarch *gdbarch, struct value *function,
08a27113 1163 struct type *type, struct regcache *regcache,
e127f0db 1164 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113 1165{
df86565b 1166 int len = type->length ();
08a27113
MK
1167 int regnum, offset;
1168
bad43aa5 1169 if (len > 16)
08a27113 1170 {
85102364 1171 /* All return values larger than 128 bits must be aggregate
dda83cd7 1172 return values. */
9738b034
MK
1173 gdb_assert (!hppa64_integral_or_pointer_p (type));
1174 gdb_assert (!hppa64_floating_p (type));
08a27113
MK
1175
1176 /* "Aggregate return values larger than 128 bits are returned in
1177 a buffer allocated by the caller. The address of the buffer
1178 must be passed in GR 28." */
1179 return RETURN_VALUE_STRUCT_CONVENTION;
1180 }
1181
1182 if (hppa64_integral_or_pointer_p (type))
1183 {
1184 /* "Integral return values are returned in GR 28. Values
dda83cd7 1185 smaller than 64 bits are padded on the left (with garbage)." */
08a27113
MK
1186 regnum = HPPA_RET0_REGNUM;
1187 offset = 8 - len;
1188 }
1189 else if (hppa64_floating_p (type))
1190 {
1191 if (len > 8)
1192 {
1193 /* "Double-extended- and quad-precision floating-point
1194 values are returned in GRs 28 and 29. The sign,
1195 exponent, and most-significant bits of the mantissa are
1196 returned in GR 28; the least-significant bits of the
1197 mantissa are passed in GR 29. For double-extended
1198 precision values, GR 29 is padded on the right with 48
1199 bits of garbage." */
1200 regnum = HPPA_RET0_REGNUM;
1201 offset = 0;
1202 }
1203 else
1204 {
1205 /* "Single-precision and double-precision floating-point
1206 return values are returned in FR 4R (single precision) or
1207 FR 4 (double-precision)." */
1208 regnum = HPPA64_FP4_REGNUM;
1209 offset = 8 - len;
1210 }
1211 }
1212 else
1213 {
1214 /* "Aggregate return values up to 64 bits in size are returned
dda83cd7
SM
1215 in GR 28. Aggregates smaller than 64 bits are left aligned
1216 in the register; the pad bits on the right are undefined."
08a27113
MK
1217
1218 "Aggregate return values between 65 and 128 bits are returned
1219 in GRs 28 and 29. The first 64 bits are placed in GR 28, and
1220 the remaining bits are placed, left aligned, in GR 29. The
1221 pad bits on the right of GR 29 (if any) are undefined." */
1222 regnum = HPPA_RET0_REGNUM;
1223 offset = 0;
1224 }
1225
1226 if (readbuf)
1227 {
08a27113
MK
1228 while (len > 0)
1229 {
73bb0000
SM
1230 regcache->cooked_read_part (regnum, offset, std::min (len, 8),
1231 readbuf);
325fac50
PA
1232 readbuf += std::min (len, 8);
1233 len -= std::min (len, 8);
08a27113
MK
1234 regnum++;
1235 }
1236 }
1237
1238 if (writebuf)
1239 {
08a27113
MK
1240 while (len > 0)
1241 {
e4c4a59b
SM
1242 regcache->cooked_write_part (regnum, offset, std::min (len, 8),
1243 writebuf);
325fac50
PA
1244 writebuf += std::min (len, 8);
1245 len -= std::min (len, 8);
08a27113
MK
1246 regnum++;
1247 }
1248 }
1249
1250 return RETURN_VALUE_REGISTER_CONVENTION;
1251}
1252\f
1253
d49771ef 1254static CORE_ADDR
a7aad9aa 1255hppa32_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr,
d49771ef
RC
1256 struct target_ops *targ)
1257{
1258 if (addr & 2)
1259 {
0dfff4cb 1260 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
a7aad9aa 1261 CORE_ADDR plabel = addr & ~3;
0dfff4cb 1262 return read_memory_typed_address (plabel, func_ptr_type);
d49771ef
RC
1263 }
1264
1265 return addr;
1266}
1267
1797a8f6
AC
1268static CORE_ADDR
1269hppa32_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1270{
1271 /* HP frames are 64-byte (or cache line) aligned (yes that's _byte_
1272 and not _bit_)! */
1273 return align_up (addr, 64);
1274}
1275
2f690297
AC
1276/* Force all frames to 16-byte alignment. Better safe than sorry. */
1277
1278static CORE_ADDR
1797a8f6 1279hppa64_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2f690297
AC
1280{
1281 /* Just always 16-byte align. */
1282 return align_up (addr, 16);
1283}
1284
cb8c24b6 1285static CORE_ADDR
c113ed0c 1286hppa_read_pc (readable_regcache *regcache)
c906108c 1287{
cc72850f 1288 ULONGEST ipsw;
61a1198a 1289 ULONGEST pc;
c906108c 1290
c113ed0c
YQ
1291 regcache->cooked_read (HPPA_IPSW_REGNUM, &ipsw);
1292 regcache->cooked_read (HPPA_PCOQ_HEAD_REGNUM, &pc);
fe46cd3a
RC
1293
1294 /* If the current instruction is nullified, then we are effectively
1295 still executing the previous instruction. Pretend we are still
cc72850f
MK
1296 there. This is needed when single stepping; if the nullified
1297 instruction is on a different line, we don't want GDB to think
1298 we've stepped onto that line. */
fe46cd3a
RC
1299 if (ipsw & 0x00200000)
1300 pc -= 4;
1301
cc72850f 1302 return pc & ~0x3;
c906108c
SS
1303}
1304
cc72850f 1305void
61a1198a 1306hppa_write_pc (struct regcache *regcache, CORE_ADDR pc)
c906108c 1307{
61a1198a
UW
1308 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, pc);
1309 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_TAIL_REGNUM, pc + 4);
c906108c
SS
1310}
1311
c906108c 1312/* For the given instruction (INST), return any adjustment it makes
1777feb0 1313 to the stack pointer or zero for no adjustment.
c906108c
SS
1314
1315 This only handles instructions commonly found in prologues. */
1316
1317static int
fba45db2 1318prologue_inst_adjust_sp (unsigned long inst)
c906108c
SS
1319{
1320 /* This must persist across calls. */
1321 static int save_high21;
1322
1323 /* The most common way to perform a stack adjustment ldo X(sp),sp */
1324 if ((inst & 0xffffc000) == 0x37de0000)
abc485a1 1325 return hppa_extract_14 (inst);
c906108c
SS
1326
1327 /* stwm X,D(sp) */
1328 if ((inst & 0xffe00000) == 0x6fc00000)
abc485a1 1329 return hppa_extract_14 (inst);
c906108c 1330
104c1213
JM
1331 /* std,ma X,D(sp) */
1332 if ((inst & 0xffe00008) == 0x73c00008)
66c6502d 1333 return (inst & 0x1 ? -(1 << 13) : 0) | (((inst >> 4) & 0x3ff) << 3);
104c1213 1334
e22b26cb 1335 /* addil high21,%r30; ldo low11,(%r1),%r30)
c906108c 1336 save high bits in save_high21 for later use. */
e22b26cb 1337 if ((inst & 0xffe00000) == 0x2bc00000)
c906108c 1338 {
abc485a1 1339 save_high21 = hppa_extract_21 (inst);
c906108c
SS
1340 return 0;
1341 }
1342
1343 if ((inst & 0xffff0000) == 0x343e0000)
abc485a1 1344 return save_high21 + hppa_extract_14 (inst);
c906108c
SS
1345
1346 /* fstws as used by the HP compilers. */
1347 if ((inst & 0xffffffe0) == 0x2fd01220)
abc485a1 1348 return hppa_extract_5_load (inst);
c906108c
SS
1349
1350 /* No adjustment. */
1351 return 0;
1352}
1353
1354/* Return nonzero if INST is a branch of some kind, else return zero. */
1355
1356static int
fba45db2 1357is_branch (unsigned long inst)
c906108c
SS
1358{
1359 switch (inst >> 26)
1360 {
1361 case 0x20:
1362 case 0x21:
1363 case 0x22:
1364 case 0x23:
7be570e7 1365 case 0x27:
c906108c
SS
1366 case 0x28:
1367 case 0x29:
1368 case 0x2a:
1369 case 0x2b:
7be570e7 1370 case 0x2f:
c906108c
SS
1371 case 0x30:
1372 case 0x31:
1373 case 0x32:
1374 case 0x33:
1375 case 0x38:
1376 case 0x39:
1377 case 0x3a:
7be570e7 1378 case 0x3b:
c906108c
SS
1379 return 1;
1380
1381 default:
1382 return 0;
1383 }
1384}
1385
1386/* Return the register number for a GR which is saved by INST or
b35018fd 1387 zero if INST does not save a GR.
c906108c 1388
b35018fd 1389 Referenced from:
7be570e7 1390
b35018fd
CG
1391 parisc 1.1:
1392 https://parisc.wiki.kernel.org/images-parisc/6/68/Pa11_acd.pdf
c906108c 1393
b35018fd
CG
1394 parisc 2.0:
1395 https://parisc.wiki.kernel.org/images-parisc/7/73/Parisc2.0.pdf
c906108c 1396
b35018fd
CG
1397 According to Table 6-5 of Chapter 6 (Memory Reference Instructions)
1398 on page 106 in parisc 2.0, all instructions for storing values from
1399 the general registers are:
c5aa993b 1400
b35018fd 1401 Store: stb, sth, stw, std (according to Chapter 7, they
dda83cd7 1402 are only in both "inst >> 26" and "inst >> 6".
b35018fd 1403 Store Absolute: stwa, stda (according to Chapter 7, they are only
dda83cd7 1404 in "inst >> 6".
b35018fd 1405 Store Bytes: stby, stdby (according to Chapter 7, they are
dda83cd7 1406 only in "inst >> 6").
b35018fd
CG
1407
1408 For (inst >> 26), according to Chapter 7:
1409
1410 The effective memory reference address is formed by the addition
1411 of an immediate displacement to a base value.
1412
1413 - stb: 0x18, store a byte from a general register.
1414
1415 - sth: 0x19, store a halfword from a general register.
1416
1417 - stw: 0x1a, store a word from a general register.
1418
1419 - stwm: 0x1b, store a word from a general register and perform base
85102364 1420 register modification (2.0 will still treat it as stw).
b35018fd
CG
1421
1422 - std: 0x1c, store a doubleword from a general register (2.0 only).
1423
1424 - stw: 0x1f, store a word from a general register (2.0 only).
1425
1426 For (inst >> 6) when ((inst >> 26) == 0x03), according to Chapter 7:
1427
1428 The effective memory reference address is formed by the addition
1429 of an index value to a base value specified in the instruction.
1430
1431 - stb: 0x08, store a byte from a general register (1.1 calls stbs).
1432
1433 - sth: 0x09, store a halfword from a general register (1.1 calls
1434 sths).
1435
1436 - stw: 0x0a, store a word from a general register (1.1 calls stws).
1437
1438 - std: 0x0b: store a doubleword from a general register (2.0 only)
1439
1440 Implement fast byte moves (stores) to unaligned word or doubleword
1441 destination.
1442
1443 - stby: 0x0c, for unaligned word (1.1 calls stbys).
1444
1445 - stdby: 0x0d for unaligned doubleword (2.0 only).
1446
1447 Store a word or doubleword using an absolute memory address formed
1448 using short or long displacement or indexed
1449
1450 - stwa: 0x0e, store a word from a general register to an absolute
1451 address (1.0 calls stwas).
1452
1453 - stda: 0x0f, store a doubleword from a general register to an
1454 absolute address (2.0 only). */
1455
1456static int
1457inst_saves_gr (unsigned long inst)
1458{
1459 switch ((inst >> 26) & 0x0f)
1460 {
1461 case 0x03:
1462 switch ((inst >> 6) & 0x0f)
1463 {
1464 case 0x08:
1465 case 0x09:
1466 case 0x0a:
1467 case 0x0b:
1468 case 0x0c:
1469 case 0x0d:
1470 case 0x0e:
1471 case 0x0f:
1472 return hppa_extract_5R_store (inst);
1473 default:
1474 return 0;
1475 }
1476 case 0x18:
1477 case 0x19:
1478 case 0x1a:
1479 case 0x1b:
1480 case 0x1c:
1481 /* no 0x1d or 0x1e -- according to parisc 2.0 document */
1482 case 0x1f:
1483 return hppa_extract_5R_store (inst);
1484 default:
1485 return 0;
1486 }
c906108c
SS
1487}
1488
1489/* Return the register number for a FR which is saved by INST or
1490 zero it INST does not save a FR.
1491
1492 Note we only care about full 64bit register stores (that's the only
1493 kind of stores the prologue will use).
1494
1495 FIXME: What about argument stores with the HP compiler in ANSI mode? */
1496
1497static int
fba45db2 1498inst_saves_fr (unsigned long inst)
c906108c 1499{
1777feb0 1500 /* Is this an FSTD? */
c906108c 1501 if ((inst & 0xfc00dfc0) == 0x2c001200)
abc485a1 1502 return hppa_extract_5r_store (inst);
7be570e7 1503 if ((inst & 0xfc000002) == 0x70000002)
abc485a1 1504 return hppa_extract_5R_store (inst);
1777feb0 1505 /* Is this an FSTW? */
c906108c 1506 if ((inst & 0xfc00df80) == 0x24001200)
abc485a1 1507 return hppa_extract_5r_store (inst);
7be570e7 1508 if ((inst & 0xfc000002) == 0x7c000000)
abc485a1 1509 return hppa_extract_5R_store (inst);
c906108c
SS
1510 return 0;
1511}
1512
1513/* Advance PC across any function entry prologue instructions
1777feb0 1514 to reach some "real" code.
c906108c
SS
1515
1516 Use information in the unwind table to determine what exactly should
1517 be in the prologue. */
1518
1519
a71f8c30 1520static CORE_ADDR
be8626e0
MD
1521skip_prologue_hard_way (struct gdbarch *gdbarch, CORE_ADDR pc,
1522 int stop_before_branch)
c906108c 1523{
e17a4113 1524 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
e362b510 1525 gdb_byte buf[4];
c906108c
SS
1526 CORE_ADDR orig_pc = pc;
1527 unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp;
1528 unsigned long args_stored, status, i, restart_gr, restart_fr;
1529 struct unwind_table_entry *u;
a71f8c30 1530 int final_iteration;
c906108c
SS
1531
1532 restart_gr = 0;
1533 restart_fr = 0;
1534
1535restart:
1536 u = find_unwind_entry (pc);
1537 if (!u)
1538 return pc;
1539
1777feb0 1540 /* If we are not at the beginning of a function, then return now. */
c906108c
SS
1541 if ((pc & ~0x3) != u->region_start)
1542 return pc;
1543
1544 /* This is how much of a frame adjustment we need to account for. */
1545 stack_remaining = u->Total_frame_size << 3;
1546
1547 /* Magic register saves we want to know about. */
1548 save_rp = u->Save_RP;
1549 save_sp = u->Save_SP;
1550
1551 /* An indication that args may be stored into the stack. Unfortunately
1552 the HPUX compilers tend to set this in cases where no args were
1553 stored too!. */
1554 args_stored = 1;
1555
1556 /* Turn the Entry_GR field into a bitmask. */
1557 save_gr = 0;
1558 for (i = 3; i < u->Entry_GR + 3; i++)
1559 {
1560 /* Frame pointer gets saved into a special location. */
eded0a31 1561 if (u->Save_SP && i == HPPA_FP_REGNUM)
c906108c
SS
1562 continue;
1563
1564 save_gr |= (1 << i);
1565 }
1566 save_gr &= ~restart_gr;
1567
1568 /* Turn the Entry_FR field into a bitmask too. */
1569 save_fr = 0;
1570 for (i = 12; i < u->Entry_FR + 12; i++)
1571 save_fr |= (1 << i);
1572 save_fr &= ~restart_fr;
1573
a71f8c30
RC
1574 final_iteration = 0;
1575
c906108c
SS
1576 /* Loop until we find everything of interest or hit a branch.
1577
1578 For unoptimized GCC code and for any HP CC code this will never ever
1579 examine any user instructions.
1580
85102364 1581 For optimized GCC code we're faced with problems. GCC will schedule
c906108c
SS
1582 its prologue and make prologue instructions available for delay slot
1583 filling. The end result is user code gets mixed in with the prologue
1584 and a prologue instruction may be in the delay slot of the first branch
1585 or call.
1586
1587 Some unexpected things are expected with debugging optimized code, so
1588 we allow this routine to walk past user instructions in optimized
1589 GCC code. */
1590 while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0
1591 || args_stored)
1592 {
1593 unsigned int reg_num;
1594 unsigned long old_stack_remaining, old_save_gr, old_save_fr;
1595 unsigned long old_save_rp, old_save_sp, next_inst;
1596
1597 /* Save copies of all the triggers so we can compare them later
dda83cd7 1598 (only for HPC). */
c906108c
SS
1599 old_save_gr = save_gr;
1600 old_save_fr = save_fr;
1601 old_save_rp = save_rp;
1602 old_save_sp = save_sp;
1603 old_stack_remaining = stack_remaining;
1604
8defab1a 1605 status = target_read_memory (pc, buf, 4);
e17a4113 1606 inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1607
c906108c
SS
1608 /* Yow! */
1609 if (status != 0)
1610 return pc;
1611
1612 /* Note the interesting effects of this instruction. */
1613 stack_remaining -= prologue_inst_adjust_sp (inst);
1614
7be570e7
JM
1615 /* There are limited ways to store the return pointer into the
1616 stack. */
c4c79048 1617 if (inst == 0x6bc23fd9 || inst == 0x0fc212c1 || inst == 0x73c23fe1)
c906108c
SS
1618 save_rp = 0;
1619
104c1213 1620 /* These are the only ways we save SP into the stack. At this time
dda83cd7 1621 the HP compilers never bother to save SP into the stack. */
104c1213
JM
1622 if ((inst & 0xffffc000) == 0x6fc10000
1623 || (inst & 0xffffc00c) == 0x73c10008)
c906108c
SS
1624 save_sp = 0;
1625
6426a772 1626 /* Are we loading some register with an offset from the argument
dda83cd7 1627 pointer? */
6426a772
JM
1628 if ((inst & 0xffe00000) == 0x37a00000
1629 || (inst & 0xffffffe0) == 0x081d0240)
1630 {
1631 pc += 4;
1632 continue;
1633 }
1634
c906108c
SS
1635 /* Account for general and floating-point register saves. */
1636 reg_num = inst_saves_gr (inst);
1637 save_gr &= ~(1 << reg_num);
1638
1639 /* Ugh. Also account for argument stores into the stack.
dda83cd7
SM
1640 Unfortunately args_stored only tells us that some arguments
1641 where stored into the stack. Not how many or what kind!
c906108c 1642
dda83cd7
SM
1643 This is a kludge as on the HP compiler sets this bit and it
1644 never does prologue scheduling. So once we see one, skip past
1645 all of them. We have similar code for the fp arg stores below.
c906108c 1646
dda83cd7
SM
1647 FIXME. Can still die if we have a mix of GR and FR argument
1648 stores! */
be8626e0 1649 if (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1650 && reg_num <= 26)
c906108c 1651 {
be8626e0 1652 while (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1653 && reg_num <= 26)
c906108c
SS
1654 {
1655 pc += 4;
8defab1a 1656 status = target_read_memory (pc, buf, 4);
e17a4113 1657 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1658 if (status != 0)
1659 return pc;
1660 reg_num = inst_saves_gr (inst);
1661 }
1662 args_stored = 0;
1663 continue;
1664 }
1665
1666 reg_num = inst_saves_fr (inst);
1667 save_fr &= ~(1 << reg_num);
1668
8defab1a 1669 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1670 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1671
c906108c
SS
1672 /* Yow! */
1673 if (status != 0)
1674 return pc;
1675
1676 /* We've got to be read to handle the ldo before the fp register
dda83cd7 1677 save. */
c906108c
SS
1678 if ((inst & 0xfc000000) == 0x34000000
1679 && inst_saves_fr (next_inst) >= 4
819844ad 1680 && inst_saves_fr (next_inst)
be8626e0 1681 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1682 {
1683 /* So we drop into the code below in a reasonable state. */
1684 reg_num = inst_saves_fr (next_inst);
1685 pc -= 4;
1686 }
1687
1688 /* Ugh. Also account for argument stores into the stack.
dda83cd7
SM
1689 This is a kludge as on the HP compiler sets this bit and it
1690 never does prologue scheduling. So once we see one, skip past
1691 all of them. */
819844ad 1692 if (reg_num >= 4
be8626e0 1693 && reg_num <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c 1694 {
819844ad
UW
1695 while (reg_num >= 4
1696 && reg_num
be8626e0 1697 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1698 {
1699 pc += 8;
8defab1a 1700 status = target_read_memory (pc, buf, 4);
e17a4113 1701 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1702 if (status != 0)
1703 return pc;
1704 if ((inst & 0xfc000000) != 0x34000000)
1705 break;
8defab1a 1706 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1707 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1708 if (status != 0)
1709 return pc;
1710 reg_num = inst_saves_fr (next_inst);
1711 }
1712 args_stored = 0;
1713 continue;
1714 }
1715
1716 /* Quit if we hit any kind of branch. This can happen if a prologue
dda83cd7 1717 instruction is in the delay slot of the first call/branch. */
a71f8c30 1718 if (is_branch (inst) && stop_before_branch)
c906108c
SS
1719 break;
1720
1721 /* What a crock. The HP compilers set args_stored even if no
dda83cd7
SM
1722 arguments were stored into the stack (boo hiss). This could
1723 cause this code to then skip a bunch of user insns (up to the
1724 first branch).
1725
1726 To combat this we try to identify when args_stored was bogusly
1727 set and clear it. We only do this when args_stored is nonzero,
1728 all other resources are accounted for, and nothing changed on
1729 this pass. */
c906108c 1730 if (args_stored
c5aa993b 1731 && !(save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
c906108c
SS
1732 && old_save_gr == save_gr && old_save_fr == save_fr
1733 && old_save_rp == save_rp && old_save_sp == save_sp
1734 && old_stack_remaining == stack_remaining)
1735 break;
c5aa993b 1736
c906108c
SS
1737 /* Bump the PC. */
1738 pc += 4;
a71f8c30
RC
1739
1740 /* !stop_before_branch, so also look at the insn in the delay slot
dda83cd7 1741 of the branch. */
a71f8c30
RC
1742 if (final_iteration)
1743 break;
1744 if (is_branch (inst))
1745 final_iteration = 1;
c906108c
SS
1746 }
1747
85102364 1748 /* We've got a tentative location for the end of the prologue. However
c906108c
SS
1749 because of limitations in the unwind descriptor mechanism we may
1750 have went too far into user code looking for the save of a register
1751 that does not exist. So, if there registers we expected to be saved
1752 but never were, mask them out and restart.
1753
1754 This should only happen in optimized code, and should be very rare. */
c5aa993b 1755 if (save_gr || (save_fr && !(restart_fr || restart_gr)))
c906108c
SS
1756 {
1757 pc = orig_pc;
1758 restart_gr = save_gr;
1759 restart_fr = save_fr;
1760 goto restart;
1761 }
1762
1763 return pc;
1764}
1765
1766
7be570e7
JM
1767/* Return the address of the PC after the last prologue instruction if
1768 we can determine it from the debug symbols. Else return zero. */
c906108c
SS
1769
1770static CORE_ADDR
fba45db2 1771after_prologue (CORE_ADDR pc)
c906108c
SS
1772{
1773 struct symtab_and_line sal;
1774 CORE_ADDR func_addr, func_end;
c906108c 1775
7be570e7
JM
1776 /* If we can not find the symbol in the partial symbol table, then
1777 there is no hope we can determine the function's start address
1778 with this code. */
c906108c 1779 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
7be570e7 1780 return 0;
c906108c 1781
7be570e7 1782 /* Get the line associated with FUNC_ADDR. */
c906108c
SS
1783 sal = find_pc_line (func_addr, 0);
1784
7be570e7
JM
1785 /* There are only two cases to consider. First, the end of the source line
1786 is within the function bounds. In that case we return the end of the
1787 source line. Second is the end of the source line extends beyond the
1788 bounds of the current function. We need to use the slow code to
1777feb0 1789 examine instructions in that case.
c906108c 1790
7be570e7
JM
1791 Anything else is simply a bug elsewhere. Fixing it here is absolutely
1792 the wrong thing to do. In fact, it should be entirely possible for this
1793 function to always return zero since the slow instruction scanning code
1794 is supposed to *always* work. If it does not, then it is a bug. */
1795 if (sal.end < func_end)
1796 return sal.end;
c5aa993b 1797 else
7be570e7 1798 return 0;
c906108c
SS
1799}
1800
1801/* To skip prologues, I use this predicate. Returns either PC itself
1802 if the code at PC does not look like a function prologue; otherwise
1777feb0 1803 returns an address that (if we're lucky) follows the prologue.
a71f8c30
RC
1804
1805 hppa_skip_prologue is called by gdb to place a breakpoint in a function.
1777feb0 1806 It doesn't necessarily skips all the insns in the prologue. In fact
a71f8c30
RC
1807 we might not want to skip all the insns because a prologue insn may
1808 appear in the delay slot of the first branch, and we don't want to
1809 skip over the branch in that case. */
c906108c 1810
8d153463 1811static CORE_ADDR
6093d2eb 1812hppa_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
c906108c 1813{
c5aa993b 1814 CORE_ADDR post_prologue_pc;
c906108c 1815
c5aa993b
JM
1816 /* See if we can determine the end of the prologue via the symbol table.
1817 If so, then return either PC, or the PC after the prologue, whichever
1818 is greater. */
c906108c 1819
c5aa993b 1820 post_prologue_pc = after_prologue (pc);
c906108c 1821
7be570e7
JM
1822 /* If after_prologue returned a useful address, then use it. Else
1823 fall back on the instruction skipping code.
1824
1825 Some folks have claimed this causes problems because the breakpoint
1826 may be the first instruction of the prologue. If that happens, then
1827 the instruction skipping code has a bug that needs to be fixed. */
c5aa993b 1828 if (post_prologue_pc != 0)
325fac50 1829 return std::max (pc, post_prologue_pc);
c5aa993b 1830 else
be8626e0 1831 return (skip_prologue_hard_way (gdbarch, pc, 1));
c906108c
SS
1832}
1833
29d375ac 1834/* Return an unwind entry that falls within the frame's code block. */
227e86ad 1835
29d375ac 1836static struct unwind_table_entry *
227e86ad 1837hppa_find_unwind_entry_in_block (struct frame_info *this_frame)
29d375ac 1838{
227e86ad 1839 CORE_ADDR pc = get_frame_address_in_block (this_frame);
93d42b30
DJ
1840
1841 /* FIXME drow/20070101: Calling gdbarch_addr_bits_remove on the
ad1193e7 1842 result of get_frame_address_in_block implies a problem.
93d42b30 1843 The bits should have been removed earlier, before the return
c7ce8faa 1844 value of gdbarch_unwind_pc. That might be happening already;
93d42b30
DJ
1845 if it isn't, it should be fixed. Then this call can be
1846 removed. */
227e86ad 1847 pc = gdbarch_addr_bits_remove (get_frame_arch (this_frame), pc);
29d375ac
RC
1848 return find_unwind_entry (pc);
1849}
1850
26d08f08
AC
1851struct hppa_frame_cache
1852{
1853 CORE_ADDR base;
098caef4 1854 trad_frame_saved_reg *saved_regs;
26d08f08
AC
1855};
1856
1857static struct hppa_frame_cache *
227e86ad 1858hppa_frame_cache (struct frame_info *this_frame, void **this_cache)
26d08f08 1859{
227e86ad 1860 struct gdbarch *gdbarch = get_frame_arch (this_frame);
e17a4113
UW
1861 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1862 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
26d08f08
AC
1863 struct hppa_frame_cache *cache;
1864 long saved_gr_mask;
1865 long saved_fr_mask;
26d08f08
AC
1866 long frame_size;
1867 struct unwind_table_entry *u;
9f7194c3 1868 CORE_ADDR prologue_end;
50b2f48a 1869 int fp_in_r1 = 0;
26d08f08
AC
1870 int i;
1871
369aa520 1872 if (hppa_debug)
6cb06a8c
TT
1873 gdb_printf (gdb_stdlog, "{ hppa_frame_cache (frame=%d) -> ",
1874 frame_relative_level(this_frame));
369aa520 1875
26d08f08 1876 if ((*this_cache) != NULL)
369aa520
RC
1877 {
1878 if (hppa_debug)
6cb06a8c
TT
1879 gdb_printf (gdb_stdlog, "base=%s (cached) }",
1880 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
9a3c8263 1881 return (struct hppa_frame_cache *) (*this_cache);
369aa520 1882 }
26d08f08
AC
1883 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
1884 (*this_cache) = cache;
227e86ad 1885 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
26d08f08
AC
1886
1887 /* Yow! */
227e86ad 1888 u = hppa_find_unwind_entry_in_block (this_frame);
26d08f08 1889 if (!u)
369aa520
RC
1890 {
1891 if (hppa_debug)
6cb06a8c 1892 gdb_printf (gdb_stdlog, "base=NULL (no unwind entry) }");
9a3c8263 1893 return (struct hppa_frame_cache *) (*this_cache);
369aa520 1894 }
26d08f08
AC
1895
1896 /* Turn the Entry_GR field into a bitmask. */
1897 saved_gr_mask = 0;
1898 for (i = 3; i < u->Entry_GR + 3; i++)
1899 {
1900 /* Frame pointer gets saved into a special location. */
eded0a31 1901 if (u->Save_SP && i == HPPA_FP_REGNUM)
26d08f08
AC
1902 continue;
1903
1904 saved_gr_mask |= (1 << i);
1905 }
1906
1907 /* Turn the Entry_FR field into a bitmask too. */
1908 saved_fr_mask = 0;
1909 for (i = 12; i < u->Entry_FR + 12; i++)
1910 saved_fr_mask |= (1 << i);
1911
1912 /* Loop until we find everything of interest or hit a branch.
1913
1914 For unoptimized GCC code and for any HP CC code this will never ever
1915 examine any user instructions.
1916
1917 For optimized GCC code we're faced with problems. GCC will schedule
1918 its prologue and make prologue instructions available for delay slot
1919 filling. The end result is user code gets mixed in with the prologue
1920 and a prologue instruction may be in the delay slot of the first branch
1921 or call.
1922
1923 Some unexpected things are expected with debugging optimized code, so
1924 we allow this routine to walk past user instructions in optimized
1925 GCC code. */
1926 {
1927 int final_iteration = 0;
46acf081 1928 CORE_ADDR pc, start_pc, end_pc;
26d08f08
AC
1929 int looking_for_sp = u->Save_SP;
1930 int looking_for_rp = u->Save_RP;
1931 int fp_loc = -1;
9f7194c3 1932
a71f8c30 1933 /* We have to use skip_prologue_hard_way instead of just
9f7194c3
RC
1934 skip_prologue_using_sal, in case we stepped into a function without
1935 symbol information. hppa_skip_prologue also bounds the returned
1936 pc by the passed in pc, so it will not return a pc in the next
1777feb0 1937 function.
a71f8c30
RC
1938
1939 We used to call hppa_skip_prologue to find the end of the prologue,
1940 but if some non-prologue instructions get scheduled into the prologue,
1941 and the program is compiled with debug information, the "easy" way
1942 in hppa_skip_prologue will return a prologue end that is too early
1943 for us to notice any potential frame adjustments. */
d5c27f81 1944
ef02daa9
DJ
1945 /* We used to use get_frame_func to locate the beginning of the
1946 function to pass to skip_prologue. However, when objects are
1947 compiled without debug symbols, get_frame_func can return the wrong
1777feb0 1948 function (or 0). We can do better than that by using unwind records.
46acf081 1949 This only works if the Region_description of the unwind record
1777feb0 1950 indicates that it includes the entry point of the function.
46acf081
RC
1951 HP compilers sometimes generate unwind records for regions that
1952 do not include the entry or exit point of a function. GNU tools
1953 do not do this. */
1954
1955 if ((u->Region_description & 0x2) == 0)
1956 start_pc = u->region_start;
1957 else
227e86ad 1958 start_pc = get_frame_func (this_frame);
d5c27f81 1959
be8626e0 1960 prologue_end = skip_prologue_hard_way (gdbarch, start_pc, 0);
227e86ad 1961 end_pc = get_frame_pc (this_frame);
9f7194c3
RC
1962
1963 if (prologue_end != 0 && end_pc > prologue_end)
1964 end_pc = prologue_end;
1965
26d08f08 1966 frame_size = 0;
9f7194c3 1967
46acf081 1968 for (pc = start_pc;
26d08f08
AC
1969 ((saved_gr_mask || saved_fr_mask
1970 || looking_for_sp || looking_for_rp
1971 || frame_size < (u->Total_frame_size << 3))
9f7194c3 1972 && pc < end_pc);
26d08f08
AC
1973 pc += 4)
1974 {
1975 int reg;
e362b510 1976 gdb_byte buf4[4];
4a302917
RC
1977 long inst;
1978
bdec2917 1979 if (!safe_frame_unwind_memory (this_frame, pc, buf4))
4a302917 1980 {
5af949e3
UW
1981 error (_("Cannot read instruction at %s."),
1982 paddress (gdbarch, pc));
9a3c8263 1983 return (struct hppa_frame_cache *) (*this_cache);
4a302917
RC
1984 }
1985
e17a4113 1986 inst = extract_unsigned_integer (buf4, sizeof buf4, byte_order);
9f7194c3 1987
26d08f08
AC
1988 /* Note the interesting effects of this instruction. */
1989 frame_size += prologue_inst_adjust_sp (inst);
1990
1991 /* There are limited ways to store the return pointer into the
1992 stack. */
1993 if (inst == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
1994 {
1995 looking_for_rp = 0;
098caef4 1996 cache->saved_regs[HPPA_RP_REGNUM].set_addr (-20);
26d08f08 1997 }
dfaf8edb
MK
1998 else if (inst == 0x6bc23fd1) /* stw rp,-0x18(sr0,sp) */
1999 {
2000 looking_for_rp = 0;
098caef4 2001 cache->saved_regs[HPPA_RP_REGNUM].set_addr (-24);
dfaf8edb 2002 }
c4c79048 2003 else if (inst == 0x0fc212c1
dda83cd7 2004 || inst == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
26d08f08
AC
2005 {
2006 looking_for_rp = 0;
098caef4 2007 cache->saved_regs[HPPA_RP_REGNUM].set_addr (-16);
26d08f08
AC
2008 }
2009
2010 /* Check to see if we saved SP into the stack. This also
2011 happens to indicate the location of the saved frame
2012 pointer. */
2013 if ((inst & 0xffffc000) == 0x6fc10000 /* stw,ma r1,N(sr0,sp) */
2014 || (inst & 0xffffc00c) == 0x73c10008) /* std,ma r1,N(sr0,sp) */
2015 {
2016 looking_for_sp = 0;
098caef4 2017 cache->saved_regs[HPPA_FP_REGNUM].set_addr (0);
26d08f08 2018 }
50b2f48a
RC
2019 else if (inst == 0x08030241) /* copy %r3, %r1 */
2020 {
2021 fp_in_r1 = 1;
2022 }
26d08f08
AC
2023
2024 /* Account for general and floating-point register saves. */
2025 reg = inst_saves_gr (inst);
2026 if (reg >= 3 && reg <= 18
eded0a31 2027 && (!u->Save_SP || reg != HPPA_FP_REGNUM))
26d08f08
AC
2028 {
2029 saved_gr_mask &= ~(1 << reg);
abc485a1 2030 if ((inst >> 26) == 0x1b && hppa_extract_14 (inst) >= 0)
26d08f08
AC
2031 /* stwm with a positive displacement is a _post_
2032 _modify_. */
098caef4 2033 cache->saved_regs[reg].set_addr (0);
26d08f08
AC
2034 else if ((inst & 0xfc00000c) == 0x70000008)
2035 /* A std has explicit post_modify forms. */
098caef4 2036 cache->saved_regs[reg].set_addr (0);
26d08f08
AC
2037 else
2038 {
2039 CORE_ADDR offset;
2040
2041 if ((inst >> 26) == 0x1c)
66c6502d 2042 offset = (inst & 0x1 ? -(1 << 13) : 0)
1777feb0 2043 | (((inst >> 4) & 0x3ff) << 3);
26d08f08 2044 else if ((inst >> 26) == 0x03)
abc485a1 2045 offset = hppa_low_hppa_sign_extend (inst & 0x1f, 5);
26d08f08 2046 else
abc485a1 2047 offset = hppa_extract_14 (inst);
26d08f08
AC
2048
2049 /* Handle code with and without frame pointers. */
2050 if (u->Save_SP)
098caef4 2051 cache->saved_regs[reg].set_addr (offset);
26d08f08 2052 else
098caef4
LM
2053 cache->saved_regs[reg].set_addr ((u->Total_frame_size << 3)
2054 + offset);
26d08f08
AC
2055 }
2056 }
2057
2058 /* GCC handles callee saved FP regs a little differently.
2059
2060 It emits an instruction to put the value of the start of
2061 the FP store area into %r1. It then uses fstds,ma with a
2062 basereg of %r1 for the stores.
2063
2064 HP CC emits them at the current stack pointer modifying the
2065 stack pointer as it stores each register. */
2066
2067 /* ldo X(%r3),%r1 or ldo X(%r30),%r1. */
2068 if ((inst & 0xffffc000) == 0x34610000
2069 || (inst & 0xffffc000) == 0x37c10000)
abc485a1 2070 fp_loc = hppa_extract_14 (inst);
26d08f08
AC
2071
2072 reg = inst_saves_fr (inst);
2073 if (reg >= 12 && reg <= 21)
2074 {
2075 /* Note +4 braindamage below is necessary because the FP
2076 status registers are internally 8 registers rather than
2077 the expected 4 registers. */
2078 saved_fr_mask &= ~(1 << reg);
2079 if (fp_loc == -1)
2080 {
2081 /* 1st HP CC FP register store. After this
2082 instruction we've set enough state that the GCC and
2083 HPCC code are both handled in the same manner. */
098caef4 2084 cache->saved_regs[reg + HPPA_FP4_REGNUM + 4].set_addr (0);
26d08f08
AC
2085 fp_loc = 8;
2086 }
2087 else
2088 {
098caef4 2089 cache->saved_regs[reg + HPPA_FP0_REGNUM + 4].set_addr (fp_loc);
26d08f08
AC
2090 fp_loc += 8;
2091 }
2092 }
2093
1777feb0 2094 /* Quit if we hit any kind of branch the previous iteration. */
26d08f08
AC
2095 if (final_iteration)
2096 break;
2097 /* We want to look precisely one instruction beyond the branch
2098 if we have not found everything yet. */
2099 if (is_branch (inst))
2100 final_iteration = 1;
2101 }
2102 }
2103
2104 {
2105 /* The frame base always represents the value of %sp at entry to
2106 the current function (and is thus equivalent to the "saved"
2107 stack pointer. */
227e86ad 2108 CORE_ADDR this_sp = get_frame_register_unsigned (this_frame,
dda83cd7 2109 HPPA_SP_REGNUM);
ed70ba00 2110 CORE_ADDR fp;
9f7194c3
RC
2111
2112 if (hppa_debug)
6cb06a8c
TT
2113 gdb_printf (gdb_stdlog, " (this_sp=%s, pc=%s, "
2114 "prologue_end=%s) ",
2115 paddress (gdbarch, this_sp),
2116 paddress (gdbarch, get_frame_pc (this_frame)),
2117 paddress (gdbarch, prologue_end));
9f7194c3 2118
ed70ba00 2119 /* Check to see if a frame pointer is available, and use it for
dda83cd7 2120 frame unwinding if it is.
ed70ba00 2121
dda83cd7
SM
2122 There are some situations where we need to rely on the frame
2123 pointer to do stack unwinding. For example, if a function calls
2124 alloca (), the stack pointer can get adjusted inside the body of
2125 the function. In this case, the ABI requires that the compiler
2126 maintain a frame pointer for the function.
ed70ba00 2127
dda83cd7
SM
2128 The unwind record has a flag (alloca_frame) that indicates that
2129 a function has a variable frame; unfortunately, gcc/binutils
2130 does not set this flag. Instead, whenever a frame pointer is used
2131 and saved on the stack, the Save_SP flag is set. We use this to
2132 decide whether to use the frame pointer for unwinding.
ed70ba00 2133
dda83cd7 2134 TODO: For the HP compiler, maybe we should use the alloca_frame flag
ed70ba00
RC
2135 instead of Save_SP. */
2136
227e86ad 2137 fp = get_frame_register_unsigned (this_frame, HPPA_FP_REGNUM);
46acf081 2138
6fcecea0 2139 if (u->alloca_frame)
46acf081 2140 fp -= u->Total_frame_size << 3;
ed70ba00 2141
227e86ad 2142 if (get_frame_pc (this_frame) >= prologue_end
dda83cd7 2143 && (u->Save_SP || u->alloca_frame) && fp != 0)
ed70ba00 2144 {
24b21115 2145 cache->base = fp;
ed70ba00 2146
24b21115 2147 if (hppa_debug)
6cb06a8c
TT
2148 gdb_printf (gdb_stdlog, " (base=%s) [frame pointer]",
2149 paddress (gdbarch, cache->base));
ed70ba00 2150 }
1658da49 2151 else if (u->Save_SP
a9a87d35 2152 && cache->saved_regs[HPPA_SP_REGNUM].is_addr ())
9f7194c3 2153 {
dda83cd7 2154 /* Both we're expecting the SP to be saved and the SP has been
9f7194c3
RC
2155 saved. The entry SP value is saved at this frame's SP
2156 address. */
dda83cd7 2157 cache->base = read_memory_integer (this_sp, word_size, byte_order);
9f7194c3
RC
2158
2159 if (hppa_debug)
6cb06a8c
TT
2160 gdb_printf (gdb_stdlog, " (base=%s) [saved]",
2161 paddress (gdbarch, cache->base));
9f7194c3 2162 }
492325c4 2163 else
9f7194c3 2164 {
dda83cd7 2165 /* The prologue has been slowly allocating stack space. Adjust
1658da49 2166 the SP back. */
dda83cd7 2167 cache->base = this_sp - frame_size;
9f7194c3 2168 if (hppa_debug)
6cb06a8c
TT
2169 gdb_printf (gdb_stdlog, " (base=%s) [unwind adjust]",
2170 paddress (gdbarch, cache->base));
9f7194c3
RC
2171
2172 }
a9a87d35 2173 cache->saved_regs[HPPA_SP_REGNUM].set_value (cache->base);
26d08f08
AC
2174 }
2175
412275d5
AC
2176 /* The PC is found in the "return register", "Millicode" uses "r31"
2177 as the return register while normal code uses "rp". */
26d08f08 2178 if (u->Millicode)
9f7194c3 2179 {
a9a87d35 2180 if (cache->saved_regs[31].is_addr ())
dda83cd7
SM
2181 {
2182 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] = cache->saved_regs[31];
9ed5ba24 2183 if (hppa_debug)
6cb06a8c 2184 gdb_printf (gdb_stdlog, " (pc=r31) [stack] } ");
dda83cd7 2185 }
9f7194c3
RC
2186 else
2187 {
227e86ad 2188 ULONGEST r31 = get_frame_register_unsigned (this_frame, 31);
a9a87d35 2189 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM].set_value (r31);
9ed5ba24 2190 if (hppa_debug)
6cb06a8c 2191 gdb_printf (gdb_stdlog, " (pc=r31) [frame] } ");
dda83cd7 2192 }
9f7194c3 2193 }
26d08f08 2194 else
9f7194c3 2195 {
a9a87d35 2196 if (cache->saved_regs[HPPA_RP_REGNUM].is_addr ())
dda83cd7
SM
2197 {
2198 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
9ed5ba24
RC
2199 cache->saved_regs[HPPA_RP_REGNUM];
2200 if (hppa_debug)
6cb06a8c 2201 gdb_printf (gdb_stdlog, " (pc=rp) [stack] } ");
dda83cd7 2202 }
9f7194c3
RC
2203 else
2204 {
227e86ad 2205 ULONGEST rp = get_frame_register_unsigned (this_frame,
dda83cd7 2206 HPPA_RP_REGNUM);
a9a87d35 2207 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM].set_value (rp);
9ed5ba24 2208 if (hppa_debug)
6cb06a8c 2209 gdb_printf (gdb_stdlog, " (pc=rp) [frame] } ");
9f7194c3
RC
2210 }
2211 }
26d08f08 2212
50b2f48a
RC
2213 /* If Save_SP is set, then we expect the frame pointer to be saved in the
2214 frame. However, there is a one-insn window where we haven't saved it
2215 yet, but we've already clobbered it. Detect this case and fix it up.
2216
2217 The prologue sequence for frame-pointer functions is:
2218 0: stw %rp, -20(%sp)
2219 4: copy %r3, %r1
2220 8: copy %sp, %r3
2221 c: stw,ma %r1, XX(%sp)
2222
2223 So if we are at offset c, the r3 value that we want is not yet saved
2224 on the stack, but it's been overwritten. The prologue analyzer will
2225 set fp_in_r1 when it sees the copy insn so we know to get the value
2226 from r1 instead. */
a9a87d35 2227 if (u->Save_SP && !cache->saved_regs[HPPA_FP_REGNUM].is_addr ()
50b2f48a
RC
2228 && fp_in_r1)
2229 {
227e86ad 2230 ULONGEST r1 = get_frame_register_unsigned (this_frame, 1);
a9a87d35 2231 cache->saved_regs[HPPA_FP_REGNUM].set_value (r1);
50b2f48a 2232 }
1658da49 2233
26d08f08
AC
2234 {
2235 /* Convert all the offsets into addresses. */
2236 int reg;
65c5db89 2237 for (reg = 0; reg < gdbarch_num_regs (gdbarch); reg++)
26d08f08 2238 {
a9a87d35 2239 if (cache->saved_regs[reg].is_addr ())
098caef4
LM
2240 cache->saved_regs[reg].set_addr (cache->saved_regs[reg].addr ()
2241 + cache->base);
26d08f08
AC
2242 }
2243 }
2244
f77a2124 2245 {
08106042 2246 hppa_gdbarch_tdep *tdep = gdbarch_tdep<hppa_gdbarch_tdep> (gdbarch);
f77a2124
RC
2247
2248 if (tdep->unwind_adjust_stub)
227e86ad 2249 tdep->unwind_adjust_stub (this_frame, cache->base, cache->saved_regs);
f77a2124
RC
2250 }
2251
369aa520 2252 if (hppa_debug)
6cb06a8c
TT
2253 gdb_printf (gdb_stdlog, "base=%s }",
2254 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
9a3c8263 2255 return (struct hppa_frame_cache *) (*this_cache);
26d08f08
AC
2256}
2257
2258static void
227e86ad
JB
2259hppa_frame_this_id (struct frame_info *this_frame, void **this_cache,
2260 struct frame_id *this_id)
26d08f08 2261{
d5c27f81 2262 struct hppa_frame_cache *info;
d5c27f81
RC
2263 struct unwind_table_entry *u;
2264
227e86ad
JB
2265 info = hppa_frame_cache (this_frame, this_cache);
2266 u = hppa_find_unwind_entry_in_block (this_frame);
d5c27f81
RC
2267
2268 (*this_id) = frame_id_build (info->base, u->region_start);
26d08f08
AC
2269}
2270
227e86ad
JB
2271static struct value *
2272hppa_frame_prev_register (struct frame_info *this_frame,
2273 void **this_cache, int regnum)
26d08f08 2274{
227e86ad
JB
2275 struct hppa_frame_cache *info = hppa_frame_cache (this_frame, this_cache);
2276
1777feb0
MS
2277 return hppa_frame_prev_register_helper (this_frame,
2278 info->saved_regs, regnum);
227e86ad
JB
2279}
2280
2281static int
2282hppa_frame_unwind_sniffer (const struct frame_unwind *self,
dda83cd7 2283 struct frame_info *this_frame, void **this_cache)
227e86ad
JB
2284{
2285 if (hppa_find_unwind_entry_in_block (this_frame))
2286 return 1;
2287
2288 return 0;
0da28f8a
RC
2289}
2290
2291static const struct frame_unwind hppa_frame_unwind =
2292{
a154d838 2293 "hppa unwind table",
0da28f8a 2294 NORMAL_FRAME,
8fbca658 2295 default_frame_unwind_stop_reason,
0da28f8a 2296 hppa_frame_this_id,
227e86ad
JB
2297 hppa_frame_prev_register,
2298 NULL,
2299 hppa_frame_unwind_sniffer
0da28f8a
RC
2300};
2301
0da28f8a
RC
2302/* This is a generic fallback frame unwinder that kicks in if we fail all
2303 the other ones. Normally we would expect the stub and regular unwinder
2304 to work, but in some cases we might hit a function that just doesn't
2305 have any unwind information available. In this case we try to do
2306 unwinding solely based on code reading. This is obviously going to be
2307 slow, so only use this as a last resort. Currently this will only
2308 identify the stack and pc for the frame. */
2309
2310static struct hppa_frame_cache *
227e86ad 2311hppa_fallback_frame_cache (struct frame_info *this_frame, void **this_cache)
0da28f8a 2312{
e17a4113
UW
2313 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2314 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
0da28f8a 2315 struct hppa_frame_cache *cache;
4ba6a975
MK
2316 unsigned int frame_size = 0;
2317 int found_rp = 0;
2318 CORE_ADDR start_pc;
0da28f8a 2319
d5c27f81 2320 if (hppa_debug)
6cb06a8c
TT
2321 gdb_printf (gdb_stdlog,
2322 "{ hppa_fallback_frame_cache (frame=%d) -> ",
2323 frame_relative_level (this_frame));
d5c27f81 2324
0da28f8a
RC
2325 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
2326 (*this_cache) = cache;
227e86ad 2327 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
0da28f8a 2328
227e86ad 2329 start_pc = get_frame_func (this_frame);
4ba6a975 2330 if (start_pc)
0da28f8a 2331 {
227e86ad 2332 CORE_ADDR cur_pc = get_frame_pc (this_frame);
4ba6a975 2333 CORE_ADDR pc;
0da28f8a 2334
4ba6a975
MK
2335 for (pc = start_pc; pc < cur_pc; pc += 4)
2336 {
2337 unsigned int insn;
0da28f8a 2338
e17a4113 2339 insn = read_memory_unsigned_integer (pc, 4, byte_order);
4ba6a975 2340 frame_size += prologue_inst_adjust_sp (insn);
6d1be3f1 2341
4ba6a975
MK
2342 /* There are limited ways to store the return pointer into the
2343 stack. */
2344 if (insn == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
2345 {
098caef4 2346 cache->saved_regs[HPPA_RP_REGNUM].set_addr (-20);
4ba6a975
MK
2347 found_rp = 1;
2348 }
c4c79048 2349 else if (insn == 0x0fc212c1
dda83cd7 2350 || insn == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
4ba6a975 2351 {
098caef4 2352 cache->saved_regs[HPPA_RP_REGNUM].set_addr (-16);
4ba6a975
MK
2353 found_rp = 1;
2354 }
2355 }
412275d5 2356 }
0da28f8a 2357
d5c27f81 2358 if (hppa_debug)
6cb06a8c
TT
2359 gdb_printf (gdb_stdlog, " frame_size=%d, found_rp=%d }\n",
2360 frame_size, found_rp);
d5c27f81 2361
227e86ad 2362 cache->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
4ba6a975 2363 cache->base -= frame_size;
a9a87d35 2364 cache->saved_regs[HPPA_SP_REGNUM].set_value (cache->base);
0da28f8a 2365
a9a87d35 2366 if (cache->saved_regs[HPPA_RP_REGNUM].is_addr ())
0da28f8a 2367 {
098caef4
LM
2368 cache->saved_regs[HPPA_RP_REGNUM].set_addr (cache->saved_regs[HPPA_RP_REGNUM].addr ()
2369 + cache->base);
4ba6a975
MK
2370 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2371 cache->saved_regs[HPPA_RP_REGNUM];
0da28f8a 2372 }
412275d5
AC
2373 else
2374 {
4ba6a975 2375 ULONGEST rp;
227e86ad 2376 rp = get_frame_register_unsigned (this_frame, HPPA_RP_REGNUM);
a9a87d35 2377 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM].set_value (rp);
412275d5 2378 }
0da28f8a
RC
2379
2380 return cache;
26d08f08
AC
2381}
2382
0da28f8a 2383static void
227e86ad 2384hppa_fallback_frame_this_id (struct frame_info *this_frame, void **this_cache,
0da28f8a
RC
2385 struct frame_id *this_id)
2386{
2387 struct hppa_frame_cache *info =
227e86ad
JB
2388 hppa_fallback_frame_cache (this_frame, this_cache);
2389
2390 (*this_id) = frame_id_build (info->base, get_frame_func (this_frame));
0da28f8a
RC
2391}
2392
227e86ad
JB
2393static struct value *
2394hppa_fallback_frame_prev_register (struct frame_info *this_frame,
dda83cd7 2395 void **this_cache, int regnum)
0da28f8a 2396{
1777feb0
MS
2397 struct hppa_frame_cache *info
2398 = hppa_fallback_frame_cache (this_frame, this_cache);
227e86ad 2399
1777feb0
MS
2400 return hppa_frame_prev_register_helper (this_frame,
2401 info->saved_regs, regnum);
0da28f8a
RC
2402}
2403
2404static const struct frame_unwind hppa_fallback_frame_unwind =
26d08f08 2405{
a154d838 2406 "hppa prologue",
26d08f08 2407 NORMAL_FRAME,
8fbca658 2408 default_frame_unwind_stop_reason,
0da28f8a 2409 hppa_fallback_frame_this_id,
227e86ad
JB
2410 hppa_fallback_frame_prev_register,
2411 NULL,
2412 default_frame_sniffer
26d08f08
AC
2413};
2414
7f07c5b6
RC
2415/* Stub frames, used for all kinds of call stubs. */
2416struct hppa_stub_unwind_cache
2417{
2418 CORE_ADDR base;
098caef4 2419 trad_frame_saved_reg *saved_regs;
7f07c5b6
RC
2420};
2421
2422static struct hppa_stub_unwind_cache *
227e86ad 2423hppa_stub_frame_unwind_cache (struct frame_info *this_frame,
7f07c5b6
RC
2424 void **this_cache)
2425{
7f07c5b6
RC
2426 struct hppa_stub_unwind_cache *info;
2427
2428 if (*this_cache)
9a3c8263 2429 return (struct hppa_stub_unwind_cache *) *this_cache;
7f07c5b6
RC
2430
2431 info = FRAME_OBSTACK_ZALLOC (struct hppa_stub_unwind_cache);
2432 *this_cache = info;
227e86ad 2433 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
7f07c5b6 2434
227e86ad 2435 info->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
7f07c5b6 2436
22b0923d 2437 /* By default we assume that stubs do not change the rp. */
098caef4 2438 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].set_realreg (HPPA_RP_REGNUM);
22b0923d 2439
7f07c5b6
RC
2440 return info;
2441}
2442
2443static void
227e86ad 2444hppa_stub_frame_this_id (struct frame_info *this_frame,
7f07c5b6
RC
2445 void **this_prologue_cache,
2446 struct frame_id *this_id)
2447{
2448 struct hppa_stub_unwind_cache *info
227e86ad 2449 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57
RC
2450
2451 if (info)
227e86ad 2452 *this_id = frame_id_build (info->base, get_frame_func (this_frame));
7f07c5b6
RC
2453}
2454
227e86ad
JB
2455static struct value *
2456hppa_stub_frame_prev_register (struct frame_info *this_frame,
2457 void **this_prologue_cache, int regnum)
7f07c5b6
RC
2458{
2459 struct hppa_stub_unwind_cache *info
227e86ad 2460 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57 2461
227e86ad 2462 if (info == NULL)
8a3fe4f8 2463 error (_("Requesting registers from null frame."));
7f07c5b6 2464
1777feb0
MS
2465 return hppa_frame_prev_register_helper (this_frame,
2466 info->saved_regs, regnum);
227e86ad 2467}
7f07c5b6 2468
227e86ad
JB
2469static int
2470hppa_stub_unwind_sniffer (const struct frame_unwind *self,
dda83cd7
SM
2471 struct frame_info *this_frame,
2472 void **this_cache)
7f07c5b6 2473{
227e86ad
JB
2474 CORE_ADDR pc = get_frame_address_in_block (this_frame);
2475 struct gdbarch *gdbarch = get_frame_arch (this_frame);
08106042 2476 hppa_gdbarch_tdep *tdep = gdbarch_tdep<hppa_gdbarch_tdep> (gdbarch);
7f07c5b6 2477
6d1be3f1 2478 if (pc == 0
84674fe1 2479 || (tdep->in_solib_call_trampoline != NULL
3e5d3a5a 2480 && tdep->in_solib_call_trampoline (gdbarch, pc))
464963c9 2481 || gdbarch_in_solib_return_trampoline (gdbarch, pc, NULL))
227e86ad
JB
2482 return 1;
2483 return 0;
7f07c5b6
RC
2484}
2485
227e86ad 2486static const struct frame_unwind hppa_stub_frame_unwind = {
a154d838 2487 "hppa stub",
227e86ad 2488 NORMAL_FRAME,
8fbca658 2489 default_frame_unwind_stop_reason,
227e86ad
JB
2490 hppa_stub_frame_this_id,
2491 hppa_stub_frame_prev_register,
2492 NULL,
2493 hppa_stub_unwind_sniffer
2494};
2495
cc72850f 2496CORE_ADDR
26d08f08
AC
2497hppa_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2498{
fe46cd3a
RC
2499 ULONGEST ipsw;
2500 CORE_ADDR pc;
2501
cc72850f
MK
2502 ipsw = frame_unwind_register_unsigned (next_frame, HPPA_IPSW_REGNUM);
2503 pc = frame_unwind_register_unsigned (next_frame, HPPA_PCOQ_HEAD_REGNUM);
fe46cd3a
RC
2504
2505 /* If the current instruction is nullified, then we are effectively
2506 still executing the previous instruction. Pretend we are still
cc72850f
MK
2507 there. This is needed when single stepping; if the nullified
2508 instruction is on a different line, we don't want GDB to think
2509 we've stepped onto that line. */
fe46cd3a
RC
2510 if (ipsw & 0x00200000)
2511 pc -= 4;
2512
cc72850f 2513 return pc & ~0x3;
26d08f08
AC
2514}
2515
ff644745
JB
2516/* Return the minimal symbol whose name is NAME and stub type is STUB_TYPE.
2517 Return NULL if no such symbol was found. */
2518
3b7344d5 2519struct bound_minimal_symbol
ff644745 2520hppa_lookup_stub_minimal_symbol (const char *name,
dda83cd7 2521 enum unwind_stub_types stub_type)
ff644745 2522{
f6b3ad54 2523 struct bound_minimal_symbol result;
ff644745 2524
2030c079 2525 for (objfile *objfile : current_program_space->objfiles ())
ff644745 2526 {
7932255d 2527 for (minimal_symbol *msym : objfile->msymbols ())
5325b9bf 2528 {
c9d95fa3 2529 if (strcmp (msym->linkage_name (), name) == 0)
3b7344d5 2530 {
5325b9bf
TT
2531 struct unwind_table_entry *u;
2532
4aeddc50 2533 u = find_unwind_entry (msym->value_longest ());
5325b9bf
TT
2534 if (u != NULL && u->stub_unwind.stub_type == stub_type)
2535 {
2536 result.objfile = objfile;
2537 result.minsym = msym;
2538 return result;
2539 }
3b7344d5 2540 }
5325b9bf 2541 }
ff644745
JB
2542 }
2543
3b7344d5 2544 return result;
ff644745
JB
2545}
2546
c906108c 2547static void
c482f52c 2548unwind_command (const char *exp, int from_tty)
c906108c
SS
2549{
2550 CORE_ADDR address;
2551 struct unwind_table_entry *u;
2552
2553 /* If we have an expression, evaluate it and use it as the address. */
2554
2555 if (exp != 0 && *exp != 0)
2556 address = parse_and_eval_address (exp);
2557 else
2558 return;
2559
2560 u = find_unwind_entry (address);
2561
2562 if (!u)
2563 {
6cb06a8c 2564 gdb_printf ("Can't find unwind table entry for %s\n", exp);
c906108c
SS
2565 return;
2566 }
2567
6cb06a8c 2568 gdb_printf ("unwind_table_entry (%s):\n", host_address_to_string (u));
c906108c 2569
6cb06a8c 2570 gdb_printf ("\tregion_start = %s\n", hex_string (u->region_start));
c906108c 2571
6cb06a8c 2572 gdb_printf ("\tregion_end = %s\n", hex_string (u->region_end));
c906108c 2573
6cb06a8c 2574#define pif(FLD) if (u->FLD) gdb_printf (" "#FLD);
c906108c 2575
6cb06a8c 2576 gdb_printf ("\n\tflags =");
c906108c
SS
2577 pif (Cannot_unwind);
2578 pif (Millicode);
2579 pif (Millicode_save_sr0);
2580 pif (Entry_SR);
2581 pif (Args_stored);
2582 pif (Variable_Frame);
2583 pif (Separate_Package_Body);
2584 pif (Frame_Extension_Millicode);
2585 pif (Stack_Overflow_Check);
2586 pif (Two_Instruction_SP_Increment);
6fcecea0
RC
2587 pif (sr4export);
2588 pif (cxx_info);
2589 pif (cxx_try_catch);
2590 pif (sched_entry_seq);
c906108c
SS
2591 pif (Save_SP);
2592 pif (Save_RP);
2593 pif (Save_MRP_in_frame);
6fcecea0 2594 pif (save_r19);
c906108c
SS
2595 pif (Cleanup_defined);
2596 pif (MPE_XL_interrupt_marker);
2597 pif (HP_UX_interrupt_marker);
2598 pif (Large_frame);
6fcecea0 2599 pif (alloca_frame);
c906108c 2600
a11ac3b3 2601 gdb_putc ('\n');
c906108c 2602
6cb06a8c 2603#define pin(FLD) gdb_printf ("\t"#FLD" = 0x%x\n", u->FLD);
c906108c
SS
2604
2605 pin (Region_description);
2606 pin (Entry_FR);
2607 pin (Entry_GR);
2608 pin (Total_frame_size);
57dac9e1
RC
2609
2610 if (u->stub_unwind.stub_type)
2611 {
6cb06a8c 2612 gdb_printf ("\tstub type = ");
57dac9e1 2613 switch (u->stub_unwind.stub_type)
dda83cd7 2614 {
57dac9e1 2615 case LONG_BRANCH:
6cb06a8c 2616 gdb_printf ("long branch\n");
57dac9e1
RC
2617 break;
2618 case PARAMETER_RELOCATION:
6cb06a8c 2619 gdb_printf ("parameter relocation\n");
57dac9e1
RC
2620 break;
2621 case EXPORT:
6cb06a8c 2622 gdb_printf ("export\n");
57dac9e1
RC
2623 break;
2624 case IMPORT:
6cb06a8c 2625 gdb_printf ("import\n");
57dac9e1
RC
2626 break;
2627 case IMPORT_SHLIB:
6cb06a8c 2628 gdb_printf ("import shlib\n");
57dac9e1
RC
2629 break;
2630 default:
6cb06a8c 2631 gdb_printf ("unknown (%d)\n", u->stub_unwind.stub_type);
57dac9e1
RC
2632 }
2633 }
c906108c 2634}
c906108c 2635
38ca4e0c
MK
2636/* Return the GDB type object for the "standard" data type of data in
2637 register REGNUM. */
d709c020 2638
eded0a31 2639static struct type *
38ca4e0c 2640hppa32_register_type (struct gdbarch *gdbarch, int regnum)
d709c020 2641{
38ca4e0c 2642 if (regnum < HPPA_FP4_REGNUM)
df4df182 2643 return builtin_type (gdbarch)->builtin_uint32;
d709c020 2644 else
27067745 2645 return builtin_type (gdbarch)->builtin_float;
d709c020
JB
2646}
2647
eded0a31 2648static struct type *
38ca4e0c 2649hppa64_register_type (struct gdbarch *gdbarch, int regnum)
3ff7cf9e 2650{
38ca4e0c 2651 if (regnum < HPPA64_FP4_REGNUM)
df4df182 2652 return builtin_type (gdbarch)->builtin_uint64;
3ff7cf9e 2653 else
27067745 2654 return builtin_type (gdbarch)->builtin_double;
3ff7cf9e
JB
2655}
2656
38ca4e0c
MK
2657/* Return non-zero if REGNUM is not a register available to the user
2658 through ptrace/ttrace. */
d709c020 2659
8d153463 2660static int
64a3914f 2661hppa32_cannot_store_register (struct gdbarch *gdbarch, int regnum)
d709c020
JB
2662{
2663 return (regnum == 0
dda83cd7
SM
2664 || regnum == HPPA_PCSQ_HEAD_REGNUM
2665 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2666 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA_FP4_REGNUM));
38ca4e0c 2667}
d709c020 2668
d037d088 2669static int
64a3914f 2670hppa32_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2671{
2672 /* cr26 and cr27 are readable (but not writable) from userspace. */
2673 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2674 return 0;
2675 else
64a3914f 2676 return hppa32_cannot_store_register (gdbarch, regnum);
d037d088
CD
2677}
2678
38ca4e0c 2679static int
64a3914f 2680hppa64_cannot_store_register (struct gdbarch *gdbarch, int regnum)
38ca4e0c
MK
2681{
2682 return (regnum == 0
dda83cd7
SM
2683 || regnum == HPPA_PCSQ_HEAD_REGNUM
2684 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2685 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA64_FP4_REGNUM));
d709c020
JB
2686}
2687
d037d088 2688static int
64a3914f 2689hppa64_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2690{
2691 /* cr26 and cr27 are readable (but not writable) from userspace. */
2692 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2693 return 0;
2694 else
64a3914f 2695 return hppa64_cannot_store_register (gdbarch, regnum);
d037d088
CD
2696}
2697
8d153463 2698static CORE_ADDR
85ddcc70 2699hppa_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
d709c020
JB
2700{
2701 /* The low two bits of the PC on the PA contain the privilege level.
2702 Some genius implementing a (non-GCC) compiler apparently decided
2703 this means that "addresses" in a text section therefore include a
2704 privilege level, and thus symbol tables should contain these bits.
2705 This seems like a bonehead thing to do--anyway, it seems to work
2706 for our purposes to just ignore those bits. */
2707
2708 return (addr &= ~0x3);
2709}
2710
e127f0db
MK
2711/* Get the ARGIth function argument for the current function. */
2712
4a302917 2713static CORE_ADDR
143985b7
AF
2714hppa_fetch_pointer_argument (struct frame_info *frame, int argi,
2715 struct type *type)
2716{
e127f0db 2717 return get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 26 - argi);
143985b7
AF
2718}
2719
05d1431c 2720static enum register_status
849d0ba8 2721hppa_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache,
e127f0db 2722 int regnum, gdb_byte *buf)
0f8d9d59 2723{
05d1431c
PA
2724 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2725 ULONGEST tmp;
2726 enum register_status status;
0f8d9d59 2727
03f50fc8 2728 status = regcache->raw_read (regnum, &tmp);
05d1431c
PA
2729 if (status == REG_VALID)
2730 {
2731 if (regnum == HPPA_PCOQ_HEAD_REGNUM || regnum == HPPA_PCOQ_TAIL_REGNUM)
2732 tmp &= ~0x3;
2733 store_unsigned_integer (buf, sizeof tmp, byte_order, tmp);
2734 }
2735 return status;
0f8d9d59
RC
2736}
2737
d49771ef 2738static CORE_ADDR
e38c262f 2739hppa_find_global_pointer (struct gdbarch *gdbarch, struct value *function)
d49771ef
RC
2740{
2741 return 0;
2742}
2743
227e86ad
JB
2744struct value *
2745hppa_frame_prev_register_helper (struct frame_info *this_frame,
098caef4 2746 trad_frame_saved_reg saved_regs[],
227e86ad 2747 int regnum)
0da28f8a 2748{
227e86ad 2749 struct gdbarch *arch = get_frame_arch (this_frame);
e17a4113 2750 enum bfd_endian byte_order = gdbarch_byte_order (arch);
8f4e467c 2751
8693c419
MK
2752 if (regnum == HPPA_PCOQ_TAIL_REGNUM)
2753 {
227e86ad
JB
2754 int size = register_size (arch, HPPA_PCOQ_HEAD_REGNUM);
2755 CORE_ADDR pc;
2756 struct value *pcoq_val =
dda83cd7
SM
2757 trad_frame_get_prev_register (this_frame, saved_regs,
2758 HPPA_PCOQ_HEAD_REGNUM);
8693c419 2759
50888e42 2760 pc = extract_unsigned_integer (value_contents_all (pcoq_val).data (),
e17a4113 2761 size, byte_order);
227e86ad 2762 return frame_unwind_got_constant (this_frame, regnum, pc + 4);
8693c419 2763 }
0da28f8a 2764
227e86ad 2765 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
0da28f8a 2766}
8693c419 2767\f
0da28f8a 2768
34f55018
MK
2769/* An instruction to match. */
2770struct insn_pattern
2771{
2772 unsigned int data; /* See if it matches this.... */
2773 unsigned int mask; /* ... with this mask. */
2774};
2775
2776/* See bfd/elf32-hppa.c */
2777static struct insn_pattern hppa_long_branch_stub[] = {
2778 /* ldil LR'xxx,%r1 */
2779 { 0x20200000, 0xffe00000 },
2780 /* be,n RR'xxx(%sr4,%r1) */
2781 { 0xe0202002, 0xffe02002 },
2782 { 0, 0 }
2783};
2784
2785static struct insn_pattern hppa_long_branch_pic_stub[] = {
2786 /* b,l .+8, %r1 */
2787 { 0xe8200000, 0xffe00000 },
2788 /* addil LR'xxx - ($PIC_pcrel$0 - 4), %r1 */
2789 { 0x28200000, 0xffe00000 },
2790 /* be,n RR'xxxx - ($PIC_pcrel$0 - 8)(%sr4, %r1) */
2791 { 0xe0202002, 0xffe02002 },
2792 { 0, 0 }
2793};
2794
2795static struct insn_pattern hppa_import_stub[] = {
2796 /* addil LR'xxx, %dp */
2797 { 0x2b600000, 0xffe00000 },
2798 /* ldw RR'xxx(%r1), %r21 */
2799 { 0x48350000, 0xffffb000 },
2800 /* bv %r0(%r21) */
2801 { 0xeaa0c000, 0xffffffff },
2802 /* ldw RR'xxx+4(%r1), %r19 */
2803 { 0x48330000, 0xffffb000 },
2804 { 0, 0 }
2805};
2806
2807static struct insn_pattern hppa_import_pic_stub[] = {
2808 /* addil LR'xxx,%r19 */
2809 { 0x2a600000, 0xffe00000 },
2810 /* ldw RR'xxx(%r1),%r21 */
2811 { 0x48350000, 0xffffb000 },
2812 /* bv %r0(%r21) */
2813 { 0xeaa0c000, 0xffffffff },
2814 /* ldw RR'xxx+4(%r1),%r19 */
2815 { 0x48330000, 0xffffb000 },
2816 { 0, 0 },
2817};
2818
2819static struct insn_pattern hppa_plt_stub[] = {
2820 /* b,l 1b, %r20 - 1b is 3 insns before here */
2821 { 0xea9f1fdd, 0xffffffff },
2822 /* depi 0,31,2,%r20 */
2823 { 0xd6801c1e, 0xffffffff },
2824 { 0, 0 }
34f55018
MK
2825};
2826
2827/* Maximum number of instructions on the patterns above. */
2828#define HPPA_MAX_INSN_PATTERN_LEN 4
2829
2830/* Return non-zero if the instructions at PC match the series
2831 described in PATTERN, or zero otherwise. PATTERN is an array of
2832 'struct insn_pattern' objects, terminated by an entry whose mask is
2833 zero.
2834
2835 When the match is successful, fill INSN[i] with what PATTERN[i]
2836 matched. */
2837
2838static int
e17a4113
UW
2839hppa_match_insns (struct gdbarch *gdbarch, CORE_ADDR pc,
2840 struct insn_pattern *pattern, unsigned int *insn)
34f55018 2841{
e17a4113 2842 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
34f55018
MK
2843 CORE_ADDR npc = pc;
2844 int i;
2845
2846 for (i = 0; pattern[i].mask; i++)
2847 {
2848 gdb_byte buf[HPPA_INSN_SIZE];
2849
8defab1a 2850 target_read_memory (npc, buf, HPPA_INSN_SIZE);
e17a4113 2851 insn[i] = extract_unsigned_integer (buf, HPPA_INSN_SIZE, byte_order);
34f55018 2852 if ((insn[i] & pattern[i].mask) == pattern[i].data)
dda83cd7 2853 npc += 4;
34f55018 2854 else
dda83cd7 2855 return 0;
34f55018
MK
2856 }
2857
2858 return 1;
2859}
2860
85102364 2861/* This relaxed version of the instruction matcher allows us to match
34f55018
MK
2862 from somewhere inside the pattern, by looking backwards in the
2863 instruction scheme. */
2864
2865static int
e17a4113
UW
2866hppa_match_insns_relaxed (struct gdbarch *gdbarch, CORE_ADDR pc,
2867 struct insn_pattern *pattern, unsigned int *insn)
34f55018
MK
2868{
2869 int offset, len = 0;
2870
2871 while (pattern[len].mask)
2872 len++;
2873
2874 for (offset = 0; offset < len; offset++)
e17a4113
UW
2875 if (hppa_match_insns (gdbarch, pc - offset * HPPA_INSN_SIZE,
2876 pattern, insn))
34f55018
MK
2877 return 1;
2878
2879 return 0;
2880}
2881
2882static int
2883hppa_in_dyncall (CORE_ADDR pc)
2884{
2885 struct unwind_table_entry *u;
2886
2887 u = find_unwind_entry (hppa_symbol_address ("$$dyncall"));
2888 if (!u)
2889 return 0;
2890
2891 return (pc >= u->region_start && pc <= u->region_end);
2892}
2893
2894int
3e5d3a5a 2895hppa_in_solib_call_trampoline (struct gdbarch *gdbarch, CORE_ADDR pc)
34f55018
MK
2896{
2897 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2898 struct unwind_table_entry *u;
2899
3e5d3a5a 2900 if (in_plt_section (pc) || hppa_in_dyncall (pc))
34f55018
MK
2901 return 1;
2902
2903 /* The GNU toolchain produces linker stubs without unwind
2904 information. Since the pattern matching for linker stubs can be
2905 quite slow, so bail out if we do have an unwind entry. */
2906
2907 u = find_unwind_entry (pc);
806e23c0 2908 if (u != NULL)
34f55018
MK
2909 return 0;
2910
e17a4113
UW
2911 return
2912 (hppa_match_insns_relaxed (gdbarch, pc, hppa_import_stub, insn)
2913 || hppa_match_insns_relaxed (gdbarch, pc, hppa_import_pic_stub, insn)
2914 || hppa_match_insns_relaxed (gdbarch, pc, hppa_long_branch_stub, insn)
2915 || hppa_match_insns_relaxed (gdbarch, pc,
2916 hppa_long_branch_pic_stub, insn));
34f55018
MK
2917}
2918
2919/* This code skips several kind of "trampolines" used on PA-RISC
2920 systems: $$dyncall, import stubs and PLT stubs. */
2921
2922CORE_ADDR
52f729a7 2923hppa_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
34f55018 2924{
0dfff4cb
UW
2925 struct gdbarch *gdbarch = get_frame_arch (frame);
2926 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
2927
34f55018
MK
2928 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2929 int dp_rel;
2930
2931 /* $$dyncall handles both PLABELs and direct addresses. */
2932 if (hppa_in_dyncall (pc))
2933 {
52f729a7 2934 pc = get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 22);
34f55018
MK
2935
2936 /* PLABELs have bit 30 set; if it's a PLABEL, then dereference it. */
2937 if (pc & 0x2)
0dfff4cb 2938 pc = read_memory_typed_address (pc & ~0x3, func_ptr_type);
34f55018
MK
2939
2940 return pc;
2941 }
2942
e17a4113
UW
2943 dp_rel = hppa_match_insns (gdbarch, pc, hppa_import_stub, insn);
2944 if (dp_rel || hppa_match_insns (gdbarch, pc, hppa_import_pic_stub, insn))
34f55018
MK
2945 {
2946 /* Extract the target address from the addil/ldw sequence. */
2947 pc = hppa_extract_21 (insn[0]) + hppa_extract_14 (insn[1]);
2948
2949 if (dp_rel)
dda83cd7 2950 pc += get_frame_register_unsigned (frame, HPPA_DP_REGNUM);
34f55018 2951 else
dda83cd7 2952 pc += get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 19);
34f55018
MK
2953
2954 /* fallthrough */
2955 }
2956
3e5d3a5a 2957 if (in_plt_section (pc))
34f55018 2958 {
0dfff4cb 2959 pc = read_memory_typed_address (pc, func_ptr_type);
34f55018
MK
2960
2961 /* If the PLT slot has not yet been resolved, the target will be
dda83cd7 2962 the PLT stub. */
3e5d3a5a 2963 if (in_plt_section (pc))
34f55018
MK
2964 {
2965 /* Sanity check: are we pointing to the PLT stub? */
24b21115 2966 if (!hppa_match_insns (gdbarch, pc, hppa_plt_stub, insn))
34f55018 2967 {
5af949e3
UW
2968 warning (_("Cannot resolve PLT stub at %s."),
2969 paddress (gdbarch, pc));
34f55018
MK
2970 return 0;
2971 }
2972
2973 /* This should point to the fixup routine. */
0dfff4cb 2974 pc = read_memory_typed_address (pc + 8, func_ptr_type);
34f55018
MK
2975 }
2976 }
2977
2978 return pc;
2979}
2980\f
2981
8e8b2dba
MC
2982/* Here is a table of C type sizes on hppa with various compiles
2983 and options. I measured this on PA 9000/800 with HP-UX 11.11
2984 and these compilers:
2985
2986 /usr/ccs/bin/cc HP92453-01 A.11.01.21
2987 /opt/ansic/bin/cc HP92453-01 B.11.11.28706.GP
2988 /opt/aCC/bin/aCC B3910B A.03.45
2989 gcc gcc 3.3.2 native hppa2.0w-hp-hpux11.11
2990
2991 cc : 1 2 4 4 8 : 4 8 -- : 4 4
2992 ansic +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
2993 ansic +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
2994 ansic +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
2995 acc +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
2996 acc +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
2997 acc +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
2998 gcc : 1 2 4 4 8 : 4 8 16 : 4 4
2999
3000 Each line is:
3001
3002 compiler and options
3003 char, short, int, long, long long
3004 float, double, long double
3005 char *, void (*)()
3006
3007 So all these compilers use either ILP32 or LP64 model.
3008 TODO: gcc has more options so it needs more investigation.
3009
a2379359
MC
3010 For floating point types, see:
3011
3012 http://docs.hp.com/hpux/pdf/B3906-90006.pdf
3013 HP-UX floating-point guide, hpux 11.00
3014
8e8b2dba
MC
3015 -- chastain 2003-12-18 */
3016
e6e68f1f
JB
3017static struct gdbarch *
3018hppa_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
3019{
3020 struct gdbarch *gdbarch;
3021
3022 /* find a candidate among the list of pre-declared architectures. */
3023 arches = gdbarch_list_lookup_by_info (arches, &info);
3024 if (arches != NULL)
3025 return (arches->gdbarch);
3026
3027 /* If none found, then allocate and initialize one. */
345bd07c 3028 hppa_gdbarch_tdep *tdep = new hppa_gdbarch_tdep;
3ff7cf9e
JB
3029 gdbarch = gdbarch_alloc (&info, tdep);
3030
3031 /* Determine from the bfd_arch_info structure if we are dealing with
3032 a 32 or 64 bits architecture. If the bfd_arch_info is not available,
3033 then default to a 32bit machine. */
3034 if (info.bfd_arch_info != NULL)
3035 tdep->bytes_per_address =
3036 info.bfd_arch_info->bits_per_address / info.bfd_arch_info->bits_per_byte;
3037 else
3038 tdep->bytes_per_address = 4;
3039
d49771ef
RC
3040 tdep->find_global_pointer = hppa_find_global_pointer;
3041
3ff7cf9e
JB
3042 /* Some parts of the gdbarch vector depend on whether we are running
3043 on a 32 bits or 64 bits target. */
3044 switch (tdep->bytes_per_address)
3045 {
3046 case 4:
dda83cd7
SM
3047 set_gdbarch_num_regs (gdbarch, hppa32_num_regs);
3048 set_gdbarch_register_name (gdbarch, hppa32_register_name);
3049 set_gdbarch_register_type (gdbarch, hppa32_register_type);
38ca4e0c
MK
3050 set_gdbarch_cannot_store_register (gdbarch,
3051 hppa32_cannot_store_register);
3052 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3053 hppa32_cannot_fetch_register);
dda83cd7 3054 break;
3ff7cf9e 3055 case 8:
dda83cd7
SM
3056 set_gdbarch_num_regs (gdbarch, hppa64_num_regs);
3057 set_gdbarch_register_name (gdbarch, hppa64_register_name);
3058 set_gdbarch_register_type (gdbarch, hppa64_register_type);
3059 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, hppa64_dwarf_reg_to_regnum);
38ca4e0c
MK
3060 set_gdbarch_cannot_store_register (gdbarch,
3061 hppa64_cannot_store_register);
3062 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3063 hppa64_cannot_fetch_register);
dda83cd7 3064 break;
3ff7cf9e 3065 default:
dda83cd7
SM
3066 internal_error (__FILE__, __LINE__, _("Unsupported address size: %d"),
3067 tdep->bytes_per_address);
3ff7cf9e
JB
3068 }
3069
3ff7cf9e 3070 set_gdbarch_long_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
3ff7cf9e 3071 set_gdbarch_ptr_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
e6e68f1f 3072
8e8b2dba
MC
3073 /* The following gdbarch vector elements are the same in both ILP32
3074 and LP64, but might show differences some day. */
3075 set_gdbarch_long_long_bit (gdbarch, 64);
3076 set_gdbarch_long_double_bit (gdbarch, 128);
552f1157 3077 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_quad);
8e8b2dba 3078
3ff7cf9e
JB
3079 /* The following gdbarch vector elements do not depend on the address
3080 size, or in any other gdbarch element previously set. */
60383d10 3081 set_gdbarch_skip_prologue (gdbarch, hppa_skip_prologue);
c9cf6e20
MG
3082 set_gdbarch_stack_frame_destroyed_p (gdbarch,
3083 hppa_stack_frame_destroyed_p);
a2a84a72 3084 set_gdbarch_inner_than (gdbarch, core_addr_greaterthan);
eded0a31
AC
3085 set_gdbarch_sp_regnum (gdbarch, HPPA_SP_REGNUM);
3086 set_gdbarch_fp0_regnum (gdbarch, HPPA_FP0_REGNUM);
85ddcc70 3087 set_gdbarch_addr_bits_remove (gdbarch, hppa_addr_bits_remove);
60383d10 3088 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
cc72850f
MK
3089 set_gdbarch_read_pc (gdbarch, hppa_read_pc);
3090 set_gdbarch_write_pc (gdbarch, hppa_write_pc);
60383d10 3091
143985b7
AF
3092 /* Helper for function argument information. */
3093 set_gdbarch_fetch_pointer_argument (gdbarch, hppa_fetch_pointer_argument);
3094
3a3bc038
AC
3095 /* When a hardware watchpoint triggers, we'll move the inferior past
3096 it by removing all eventpoints; stepping past the instruction
3097 that caused the trigger; reinserting eventpoints; and checking
3098 whether any watched location changed. */
3099 set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
3100
5979bc46 3101 /* Inferior function call methods. */
fca7aa43 3102 switch (tdep->bytes_per_address)
5979bc46 3103 {
fca7aa43
AC
3104 case 4:
3105 set_gdbarch_push_dummy_call (gdbarch, hppa32_push_dummy_call);
3106 set_gdbarch_frame_align (gdbarch, hppa32_frame_align);
d49771ef 3107 set_gdbarch_convert_from_func_ptr_addr
dda83cd7 3108 (gdbarch, hppa32_convert_from_func_ptr_addr);
fca7aa43
AC
3109 break;
3110 case 8:
782eae8b
AC
3111 set_gdbarch_push_dummy_call (gdbarch, hppa64_push_dummy_call);
3112 set_gdbarch_frame_align (gdbarch, hppa64_frame_align);
fca7aa43 3113 break;
782eae8b 3114 default:
e2e0b3e5 3115 internal_error (__FILE__, __LINE__, _("bad switch"));
fad850b2
AC
3116 }
3117
3118 /* Struct return methods. */
fca7aa43 3119 switch (tdep->bytes_per_address)
fad850b2 3120 {
fca7aa43
AC
3121 case 4:
3122 set_gdbarch_return_value (gdbarch, hppa32_return_value);
3123 break;
3124 case 8:
782eae8b 3125 set_gdbarch_return_value (gdbarch, hppa64_return_value);
f5f907e2 3126 break;
fca7aa43 3127 default:
e2e0b3e5 3128 internal_error (__FILE__, __LINE__, _("bad switch"));
e963316f 3129 }
7f07c5b6 3130
04180708
YQ
3131 set_gdbarch_breakpoint_kind_from_pc (gdbarch, hppa_breakpoint::kind_from_pc);
3132 set_gdbarch_sw_breakpoint_from_kind (gdbarch, hppa_breakpoint::bp_from_kind);
7f07c5b6 3133 set_gdbarch_pseudo_register_read (gdbarch, hppa_pseudo_register_read);
85f4f2d8 3134
5979bc46 3135 /* Frame unwind methods. */
782eae8b 3136 set_gdbarch_unwind_pc (gdbarch, hppa_unwind_pc);
7f07c5b6 3137
50306a9d
RC
3138 /* Hook in ABI-specific overrides, if they have been registered. */
3139 gdbarch_init_osabi (info, gdbarch);
3140
7f07c5b6 3141 /* Hook in the default unwinders. */
227e86ad
JB
3142 frame_unwind_append_unwinder (gdbarch, &hppa_stub_frame_unwind);
3143 frame_unwind_append_unwinder (gdbarch, &hppa_frame_unwind);
3144 frame_unwind_append_unwinder (gdbarch, &hppa_fallback_frame_unwind);
5979bc46 3145
e6e68f1f
JB
3146 return gdbarch;
3147}
3148
3149static void
464963c9 3150hppa_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
e6e68f1f 3151{
08106042 3152 hppa_gdbarch_tdep *tdep = gdbarch_tdep<hppa_gdbarch_tdep> (gdbarch);
fdd72f95 3153
6cb06a8c
TT
3154 gdb_printf (file, "bytes_per_address = %d\n",
3155 tdep->bytes_per_address);
3156 gdb_printf (file, "elf = %s\n", tdep->is_elf ? "yes" : "no");
e6e68f1f
JB
3157}
3158
6c265988 3159void _initialize_hppa_tdep ();
4facf7e8 3160void
6c265988 3161_initialize_hppa_tdep ()
4facf7e8 3162{
e6e68f1f 3163 gdbarch_register (bfd_arch_hppa, hppa_gdbarch_init, hppa_dump_tdep);
4facf7e8
JB
3164
3165 add_cmd ("unwind", class_maintenance, unwind_command,
1a966eab 3166 _("Print unwind table entry at given address."),
4facf7e8
JB
3167 &maintenanceprintlist);
3168
1777feb0 3169 /* Debug this files internals. */
7915a72c
AC
3170 add_setshow_boolean_cmd ("hppa", class_maintenance, &hppa_debug, _("\
3171Set whether hppa target specific debugging information should be displayed."),
3172 _("\
3173Show whether hppa target specific debugging information is displayed."), _("\
4a302917
RC
3174This flag controls whether hppa target specific debugging information is\n\
3175displayed. This information is particularly useful for debugging frame\n\
7915a72c 3176unwinding problems."),
2c5b56ce 3177 NULL,
7915a72c 3178 NULL, /* FIXME: i18n: hppa debug flag is %s. */
2c5b56ce 3179 &setdebuglist, &showdebuglist);
4facf7e8 3180}