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c906108c 1/* Intel 386 target-dependent stuff.
8e65ff28 2 Copyright (C) 1988, 1989, 1991, 1994, 1995, 1996, 1998, 2001
c906108c
SS
3 Free Software Foundation, Inc.
4
c5aa993b 5 This file is part of GDB.
c906108c 6
c5aa993b
JM
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
c906108c 11
c5aa993b
JM
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
c906108c 16
c5aa993b
JM
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
c906108c
SS
21
22#include "defs.h"
23#include "gdb_string.h"
24#include "frame.h"
25#include "inferior.h"
26#include "gdbcore.h"
27#include "target.h"
28#include "floatformat.h"
29#include "symtab.h"
30#include "gdbcmd.h"
31#include "command.h"
b4a20239 32#include "arch-utils.h"
c906108c 33
a14ed312 34static long i386_get_frame_setup (CORE_ADDR);
c906108c 35
a14ed312 36static void i386_follow_jump (void);
c906108c 37
a14ed312 38static void codestream_read (unsigned char *, int);
c906108c 39
a14ed312 40static void codestream_seek (CORE_ADDR);
c906108c 41
a14ed312 42static unsigned char codestream_fill (int);
c906108c 43
a14ed312 44CORE_ADDR skip_trampoline_code (CORE_ADDR, char *);
c906108c
SS
45
46static int gdb_print_insn_i386 (bfd_vma, disassemble_info *);
47
a14ed312 48void _initialize_i386_tdep (void);
c906108c 49
917317f4
JM
50/* i386_register_byte[i] is the offset into the register file of the
51 start of register number i. We initialize this from
52 i386_register_raw_size. */
53int i386_register_byte[MAX_NUM_REGS];
54
ceb4951f
JB
55/* i386_register_raw_size[i] is the number of bytes of storage in
56 GDB's register array occupied by register i. */
917317f4
JM
57int i386_register_raw_size[MAX_NUM_REGS] = {
58 4, 4, 4, 4,
59 4, 4, 4, 4,
60 4, 4, 4, 4,
61 4, 4, 4, 4,
62 10, 10, 10, 10,
63 10, 10, 10, 10,
64 4, 4, 4, 4,
65 4, 4, 4, 4,
66 16, 16, 16, 16,
67 16, 16, 16, 16,
68 4
69};
70
71/* i386_register_virtual_size[i] is the size in bytes of the virtual
72 type of register i. */
73int i386_register_virtual_size[MAX_NUM_REGS];
74
75
c906108c 76/* This is the variable the is set with "set disassembly-flavor",
c5aa993b 77 and its legitimate values. */
53904c9e
AC
78static const char att_flavor[] = "att";
79static const char intel_flavor[] = "intel";
80static const char *valid_flavors[] =
c5aa993b 81{
c906108c
SS
82 att_flavor,
83 intel_flavor,
84 NULL
85};
53904c9e 86static const char *disassembly_flavor = att_flavor;
c906108c 87
a14ed312 88static void i386_print_register (char *, int, int);
d4f3574e 89
7a292a7a 90/* This is used to keep the bfd arch_info in sync with the disassembly flavor. */
a14ed312
KB
91static void set_disassembly_flavor_sfunc (char *, int,
92 struct cmd_list_element *);
93static void set_disassembly_flavor (void);
7a292a7a 94
c906108c
SS
95/* Stdio style buffering was used to minimize calls to ptrace, but this
96 buffering did not take into account that the code section being accessed
97 may not be an even number of buffers long (even if the buffer is only
98 sizeof(int) long). In cases where the code section size happened to
99 be a non-integral number of buffers long, attempting to read the last
100 buffer would fail. Simply using target_read_memory and ignoring errors,
101 rather than read_memory, is not the correct solution, since legitimate
102 access errors would then be totally ignored. To properly handle this
103 situation and continue to use buffering would require that this code
104 be able to determine the minimum code section size granularity (not the
105 alignment of the section itself, since the actual failing case that
106 pointed out this problem had a section alignment of 4 but was not a
107 multiple of 4 bytes long), on a target by target basis, and then
108 adjust it's buffer size accordingly. This is messy, but potentially
109 feasible. It probably needs the bfd library's help and support. For
110 now, the buffer size is set to 1. (FIXME -fnf) */
111
112#define CODESTREAM_BUFSIZ 1 /* Was sizeof(int), see note above. */
113static CORE_ADDR codestream_next_addr;
114static CORE_ADDR codestream_addr;
115static unsigned char codestream_buf[CODESTREAM_BUFSIZ];
116static int codestream_off;
117static int codestream_cnt;
118
119#define codestream_tell() (codestream_addr + codestream_off)
120#define codestream_peek() (codestream_cnt == 0 ? \
121 codestream_fill(1): codestream_buf[codestream_off])
122#define codestream_get() (codestream_cnt-- == 0 ? \
123 codestream_fill(0) : codestream_buf[codestream_off++])
124
c5aa993b 125static unsigned char
fba45db2 126codestream_fill (int peek_flag)
c906108c
SS
127{
128 codestream_addr = codestream_next_addr;
129 codestream_next_addr += CODESTREAM_BUFSIZ;
130 codestream_off = 0;
131 codestream_cnt = CODESTREAM_BUFSIZ;
132 read_memory (codestream_addr, (char *) codestream_buf, CODESTREAM_BUFSIZ);
c5aa993b 133
c906108c 134 if (peek_flag)
c5aa993b 135 return (codestream_peek ());
c906108c 136 else
c5aa993b 137 return (codestream_get ());
c906108c
SS
138}
139
140static void
fba45db2 141codestream_seek (CORE_ADDR place)
c906108c
SS
142{
143 codestream_next_addr = place / CODESTREAM_BUFSIZ;
144 codestream_next_addr *= CODESTREAM_BUFSIZ;
145 codestream_cnt = 0;
146 codestream_fill (1);
c5aa993b 147 while (codestream_tell () != place)
c906108c
SS
148 codestream_get ();
149}
150
151static void
fba45db2 152codestream_read (unsigned char *buf, int count)
c906108c
SS
153{
154 unsigned char *p;
155 int i;
156 p = buf;
157 for (i = 0; i < count; i++)
158 *p++ = codestream_get ();
159}
160
161/* next instruction is a jump, move to target */
162
163static void
fba45db2 164i386_follow_jump (void)
c906108c
SS
165{
166 unsigned char buf[4];
167 long delta;
168
169 int data16;
170 CORE_ADDR pos;
171
172 pos = codestream_tell ();
173
174 data16 = 0;
175 if (codestream_peek () == 0x66)
176 {
177 codestream_get ();
178 data16 = 1;
179 }
180
181 switch (codestream_get ())
182 {
183 case 0xe9:
184 /* relative jump: if data16 == 0, disp32, else disp16 */
185 if (data16)
186 {
187 codestream_read (buf, 2);
188 delta = extract_signed_integer (buf, 2);
189
190 /* include size of jmp inst (including the 0x66 prefix). */
c5aa993b 191 pos += delta + 4;
c906108c
SS
192 }
193 else
194 {
195 codestream_read (buf, 4);
196 delta = extract_signed_integer (buf, 4);
197
198 pos += delta + 5;
199 }
200 break;
201 case 0xeb:
202 /* relative jump, disp8 (ignore data16) */
203 codestream_read (buf, 1);
204 /* Sign-extend it. */
205 delta = extract_signed_integer (buf, 1);
206
207 pos += delta + 2;
208 break;
209 }
210 codestream_seek (pos);
211}
212
213/*
214 * find & return amound a local space allocated, and advance codestream to
215 * first register push (if any)
216 *
217 * if entry sequence doesn't make sense, return -1, and leave
218 * codestream pointer random
219 */
220
221static long
fba45db2 222i386_get_frame_setup (CORE_ADDR pc)
c906108c
SS
223{
224 unsigned char op;
225
226 codestream_seek (pc);
227
228 i386_follow_jump ();
229
230 op = codestream_get ();
231
232 if (op == 0x58) /* popl %eax */
233 {
234 /*
235 * this function must start with
236 *
c5aa993b 237 * popl %eax 0x58
c906108c
SS
238 * xchgl %eax, (%esp) 0x87 0x04 0x24
239 * or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
240 *
241 * (the system 5 compiler puts out the second xchg
242 * inst, and the assembler doesn't try to optimize it,
243 * so the 'sib' form gets generated)
244 *
245 * this sequence is used to get the address of the return
246 * buffer for a function that returns a structure
247 */
248 int pos;
249 unsigned char buf[4];
c5aa993b
JM
250 static unsigned char proto1[3] =
251 {0x87, 0x04, 0x24};
252 static unsigned char proto2[4] =
253 {0x87, 0x44, 0x24, 0x00};
c906108c
SS
254 pos = codestream_tell ();
255 codestream_read (buf, 4);
256 if (memcmp (buf, proto1, 3) == 0)
257 pos += 3;
258 else if (memcmp (buf, proto2, 4) == 0)
259 pos += 4;
260
261 codestream_seek (pos);
c5aa993b 262 op = codestream_get (); /* update next opcode */
c906108c
SS
263 }
264
265 if (op == 0x68 || op == 0x6a)
266 {
267 /*
268 * this function may start with
269 *
270 * pushl constant
271 * call _probe
272 * addl $4, %esp
273 * followed by
274 * pushl %ebp
275 * etc.
276 */
277 int pos;
278 unsigned char buf[8];
279
280 /* Skip past the pushl instruction; it has either a one-byte
281 or a four-byte operand, depending on the opcode. */
282 pos = codestream_tell ();
283 if (op == 0x68)
284 pos += 4;
285 else
286 pos += 1;
287 codestream_seek (pos);
288
289 /* Read the following 8 bytes, which should be "call _probe" (6 bytes)
290 followed by "addl $4,%esp" (2 bytes). */
291 codestream_read (buf, sizeof (buf));
292 if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4)
293 pos += sizeof (buf);
294 codestream_seek (pos);
c5aa993b 295 op = codestream_get (); /* update next opcode */
c906108c
SS
296 }
297
298 if (op == 0x55) /* pushl %ebp */
c5aa993b 299 {
c906108c
SS
300 /* check for movl %esp, %ebp - can be written two ways */
301 switch (codestream_get ())
302 {
303 case 0x8b:
304 if (codestream_get () != 0xec)
305 return (-1);
306 break;
307 case 0x89:
308 if (codestream_get () != 0xe5)
309 return (-1);
310 break;
311 default:
312 return (-1);
313 }
314 /* check for stack adjustment
c5aa993b 315
c906108c
SS
316 * subl $XXX, %esp
317 *
318 * note: you can't subtract a 16 bit immediate
319 * from a 32 bit reg, so we don't have to worry
320 * about a data16 prefix
321 */
322 op = codestream_peek ();
323 if (op == 0x83)
324 {
325 /* subl with 8 bit immed */
326 codestream_get ();
327 if (codestream_get () != 0xec)
328 /* Some instruction starting with 0x83 other than subl. */
329 {
330 codestream_seek (codestream_tell () - 2);
331 return 0;
332 }
333 /* subl with signed byte immediate
334 * (though it wouldn't make sense to be negative)
335 */
c5aa993b 336 return (codestream_get ());
c906108c
SS
337 }
338 else if (op == 0x81)
339 {
340 char buf[4];
341 /* Maybe it is subl with 32 bit immedediate. */
c5aa993b 342 codestream_get ();
c906108c
SS
343 if (codestream_get () != 0xec)
344 /* Some instruction starting with 0x81 other than subl. */
345 {
346 codestream_seek (codestream_tell () - 2);
347 return 0;
348 }
349 /* It is subl with 32 bit immediate. */
c5aa993b 350 codestream_read ((unsigned char *) buf, 4);
c906108c
SS
351 return extract_signed_integer (buf, 4);
352 }
353 else
354 {
355 return (0);
356 }
357 }
358 else if (op == 0xc8)
359 {
360 char buf[2];
361 /* enter instruction: arg is 16 bit unsigned immed */
c5aa993b
JM
362 codestream_read ((unsigned char *) buf, 2);
363 codestream_get (); /* flush final byte of enter instruction */
c906108c
SS
364 return extract_unsigned_integer (buf, 2);
365 }
366 return (-1);
367}
368
369/* Return number of args passed to a frame.
370 Can return -1, meaning no way to tell. */
371
372int
fba45db2 373i386_frame_num_args (struct frame_info *fi)
c906108c
SS
374{
375#if 1
376 return -1;
377#else
378 /* This loses because not only might the compiler not be popping the
379 args right after the function call, it might be popping args from both
380 this call and a previous one, and we would say there are more args
381 than there really are. */
382
c5aa993b
JM
383 int retpc;
384 unsigned char op;
c906108c
SS
385 struct frame_info *pfi;
386
387 /* on the 386, the instruction following the call could be:
388 popl %ecx - one arg
389 addl $imm, %esp - imm/4 args; imm may be 8 or 32 bits
390 anything else - zero args */
391
392 int frameless;
393
392a587b 394 frameless = FRAMELESS_FUNCTION_INVOCATION (fi);
c906108c
SS
395 if (frameless)
396 /* In the absence of a frame pointer, GDB doesn't get correct values
397 for nameless arguments. Return -1, so it doesn't print any
398 nameless arguments. */
399 return -1;
400
c5aa993b 401 pfi = get_prev_frame (fi);
c906108c
SS
402 if (pfi == 0)
403 {
404 /* Note: this can happen if we are looking at the frame for
c5aa993b
JM
405 main, because FRAME_CHAIN_VALID won't let us go into
406 start. If we have debugging symbols, that's not really
407 a big deal; it just means it will only show as many arguments
408 to main as are declared. */
c906108c
SS
409 return -1;
410 }
411 else
412 {
c5aa993b
JM
413 retpc = pfi->pc;
414 op = read_memory_integer (retpc, 1);
415 if (op == 0x59)
416 /* pop %ecx */
417 return 1;
c906108c
SS
418 else if (op == 0x83)
419 {
c5aa993b
JM
420 op = read_memory_integer (retpc + 1, 1);
421 if (op == 0xc4)
422 /* addl $<signed imm 8 bits>, %esp */
423 return (read_memory_integer (retpc + 2, 1) & 0xff) / 4;
c906108c
SS
424 else
425 return 0;
426 }
427 else if (op == 0x81)
c5aa993b
JM
428 { /* add with 32 bit immediate */
429 op = read_memory_integer (retpc + 1, 1);
430 if (op == 0xc4)
431 /* addl $<imm 32>, %esp */
432 return read_memory_integer (retpc + 2, 4) / 4;
c906108c
SS
433 else
434 return 0;
435 }
436 else
437 {
438 return 0;
439 }
440 }
441#endif
442}
443
444/*
445 * parse the first few instructions of the function to see
446 * what registers were stored.
447 *
448 * We handle these cases:
449 *
450 * The startup sequence can be at the start of the function,
451 * or the function can start with a branch to startup code at the end.
452 *
453 * %ebp can be set up with either the 'enter' instruction, or
454 * 'pushl %ebp, movl %esp, %ebp' (enter is too slow to be useful,
455 * but was once used in the sys5 compiler)
456 *
457 * Local space is allocated just below the saved %ebp by either the
458 * 'enter' instruction, or by 'subl $<size>, %esp'. 'enter' has
459 * a 16 bit unsigned argument for space to allocate, and the
460 * 'addl' instruction could have either a signed byte, or
461 * 32 bit immediate.
462 *
463 * Next, the registers used by this function are pushed. In
464 * the sys5 compiler they will always be in the order: %edi, %esi, %ebx
465 * (and sometimes a harmless bug causes it to also save but not restore %eax);
466 * however, the code below is willing to see the pushes in any order,
467 * and will handle up to 8 of them.
468 *
469 * If the setup sequence is at the end of the function, then the
470 * next instruction will be a branch back to the start.
471 */
472
473void
fba45db2 474i386_frame_init_saved_regs (struct frame_info *fip)
c906108c
SS
475{
476 long locals = -1;
477 unsigned char op;
478 CORE_ADDR dummy_bottom;
479 CORE_ADDR adr;
480 CORE_ADDR pc;
481 int i;
c5aa993b 482
1211c4e4
AC
483 if (fip->saved_regs)
484 return;
485
486 frame_saved_regs_zalloc (fip);
c5aa993b 487
c906108c
SS
488 /* if frame is the end of a dummy, compute where the
489 * beginning would be
490 */
491 dummy_bottom = fip->frame - 4 - REGISTER_BYTES - CALL_DUMMY_LENGTH;
c5aa993b 492
c906108c 493 /* check if the PC is in the stack, in a dummy frame */
c5aa993b 494 if (dummy_bottom <= fip->pc && fip->pc <= fip->frame)
c906108c
SS
495 {
496 /* all regs were saved by push_call_dummy () */
497 adr = fip->frame;
c5aa993b 498 for (i = 0; i < NUM_REGS; i++)
c906108c
SS
499 {
500 adr -= REGISTER_RAW_SIZE (i);
1211c4e4 501 fip->saved_regs[i] = adr;
c906108c
SS
502 }
503 return;
504 }
c5aa993b 505
c906108c
SS
506 pc = get_pc_function_start (fip->pc);
507 if (pc != 0)
508 locals = i386_get_frame_setup (pc);
c5aa993b
JM
509
510 if (locals >= 0)
c906108c
SS
511 {
512 adr = fip->frame - 4 - locals;
c5aa993b 513 for (i = 0; i < 8; i++)
c906108c
SS
514 {
515 op = codestream_get ();
516 if (op < 0x50 || op > 0x57)
517 break;
518#ifdef I386_REGNO_TO_SYMMETRY
519 /* Dynix uses different internal numbering. Ick. */
1211c4e4 520 fip->saved_regs[I386_REGNO_TO_SYMMETRY (op - 0x50)] = adr;
c906108c 521#else
1211c4e4 522 fip->saved_regs[op - 0x50] = adr;
c906108c
SS
523#endif
524 adr -= 4;
525 }
526 }
c5aa993b 527
1211c4e4
AC
528 fip->saved_regs[PC_REGNUM] = fip->frame + 4;
529 fip->saved_regs[FP_REGNUM] = fip->frame;
c906108c
SS
530}
531
532/* return pc of first real instruction */
533
534int
fba45db2 535i386_skip_prologue (int pc)
c906108c
SS
536{
537 unsigned char op;
538 int i;
c5aa993b
JM
539 static unsigned char pic_pat[6] =
540 {0xe8, 0, 0, 0, 0, /* call 0x0 */
541 0x5b, /* popl %ebx */
542 };
c906108c 543 CORE_ADDR pos;
c5aa993b 544
c906108c
SS
545 if (i386_get_frame_setup (pc) < 0)
546 return (pc);
c5aa993b 547
c906108c
SS
548 /* found valid frame setup - codestream now points to
549 * start of push instructions for saving registers
550 */
c5aa993b 551
c906108c
SS
552 /* skip over register saves */
553 for (i = 0; i < 8; i++)
554 {
555 op = codestream_peek ();
556 /* break if not pushl inst */
c5aa993b 557 if (op < 0x50 || op > 0x57)
c906108c
SS
558 break;
559 codestream_get ();
560 }
561
562 /* The native cc on SVR4 in -K PIC mode inserts the following code to get
563 the address of the global offset table (GOT) into register %ebx.
c5aa993b
JM
564 call 0x0
565 popl %ebx
566 movl %ebx,x(%ebp) (optional)
567 addl y,%ebx
c906108c
SS
568 This code is with the rest of the prologue (at the end of the
569 function), so we have to skip it to get to the first real
570 instruction at the start of the function. */
c5aa993b 571
c906108c
SS
572 pos = codestream_tell ();
573 for (i = 0; i < 6; i++)
574 {
575 op = codestream_get ();
c5aa993b 576 if (pic_pat[i] != op)
c906108c
SS
577 break;
578 }
579 if (i == 6)
580 {
581 unsigned char buf[4];
582 long delta = 6;
583
584 op = codestream_get ();
c5aa993b 585 if (op == 0x89) /* movl %ebx, x(%ebp) */
c906108c
SS
586 {
587 op = codestream_get ();
c5aa993b 588 if (op == 0x5d) /* one byte offset from %ebp */
c906108c
SS
589 {
590 delta += 3;
591 codestream_read (buf, 1);
592 }
c5aa993b 593 else if (op == 0x9d) /* four byte offset from %ebp */
c906108c
SS
594 {
595 delta += 6;
596 codestream_read (buf, 4);
597 }
c5aa993b
JM
598 else /* unexpected instruction */
599 delta = -1;
600 op = codestream_get ();
c906108c 601 }
c5aa993b
JM
602 /* addl y,%ebx */
603 if (delta > 0 && op == 0x81 && codestream_get () == 0xc3)
c906108c 604 {
c5aa993b 605 pos += delta + 6;
c906108c
SS
606 }
607 }
608 codestream_seek (pos);
c5aa993b 609
c906108c 610 i386_follow_jump ();
c5aa993b 611
c906108c
SS
612 return (codestream_tell ());
613}
614
615void
fba45db2 616i386_push_dummy_frame (void)
c906108c
SS
617{
618 CORE_ADDR sp = read_register (SP_REGNUM);
619 int regnum;
620 char regbuf[MAX_REGISTER_RAW_SIZE];
c5aa993b 621
c906108c
SS
622 sp = push_word (sp, read_register (PC_REGNUM));
623 sp = push_word (sp, read_register (FP_REGNUM));
624 write_register (FP_REGNUM, sp);
625 for (regnum = 0; regnum < NUM_REGS; regnum++)
626 {
627 read_register_gen (regnum, regbuf);
628 sp = push_bytes (sp, regbuf, REGISTER_RAW_SIZE (regnum));
629 }
630 write_register (SP_REGNUM, sp);
631}
632
a7769679
MK
633/* Insert the (relative) function address into the call sequence
634 stored at DYMMY. */
635
636void
637i386_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs,
638 value_ptr *args, struct type *type, int gcc_p)
639{
640 int from, to, delta, loc;
641
642 loc = (int)(read_register (SP_REGNUM) - CALL_DUMMY_LENGTH);
643 from = loc + 5;
644 to = (int)(fun);
645 delta = to - from;
646
647 *((char *)(dummy) + 1) = (delta & 0xff);
648 *((char *)(dummy) + 2) = ((delta >> 8) & 0xff);
649 *((char *)(dummy) + 3) = ((delta >> 16) & 0xff);
650 *((char *)(dummy) + 4) = ((delta >> 24) & 0xff);
651}
652
c906108c 653void
fba45db2 654i386_pop_frame (void)
c906108c
SS
655{
656 struct frame_info *frame = get_current_frame ();
657 CORE_ADDR fp;
658 int regnum;
c906108c 659 char regbuf[MAX_REGISTER_RAW_SIZE];
c5aa993b 660
c906108c 661 fp = FRAME_FP (frame);
1211c4e4
AC
662 i386_frame_init_saved_regs (frame);
663
c5aa993b 664 for (regnum = 0; regnum < NUM_REGS; regnum++)
c906108c
SS
665 {
666 CORE_ADDR adr;
1211c4e4 667 adr = frame->saved_regs[regnum];
c906108c
SS
668 if (adr)
669 {
670 read_memory (adr, regbuf, REGISTER_RAW_SIZE (regnum));
671 write_register_bytes (REGISTER_BYTE (regnum), regbuf,
672 REGISTER_RAW_SIZE (regnum));
673 }
674 }
675 write_register (FP_REGNUM, read_memory_integer (fp, 4));
676 write_register (PC_REGNUM, read_memory_integer (fp + 4, 4));
677 write_register (SP_REGNUM, fp + 8);
678 flush_cached_frames ();
679}
680
681#ifdef GET_LONGJMP_TARGET
682
683/* Figure out where the longjmp will land. Slurp the args out of the stack.
684 We expect the first arg to be a pointer to the jmp_buf structure from which
685 we extract the pc (JB_PC) that we will land at. The pc is copied into PC.
686 This routine returns true on success. */
687
688int
fba45db2 689get_longjmp_target (CORE_ADDR *pc)
c906108c
SS
690{
691 char buf[TARGET_PTR_BIT / TARGET_CHAR_BIT];
692 CORE_ADDR sp, jb_addr;
693
694 sp = read_register (SP_REGNUM);
695
c5aa993b 696 if (target_read_memory (sp + SP_ARG0, /* Offset of first arg on stack */
c906108c
SS
697 buf,
698 TARGET_PTR_BIT / TARGET_CHAR_BIT))
699 return 0;
700
701 jb_addr = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
702
703 if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
704 TARGET_PTR_BIT / TARGET_CHAR_BIT))
705 return 0;
706
707 *pc = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
708
709 return 1;
710}
711
712#endif /* GET_LONGJMP_TARGET */
713
1a309862
MK
714/* These registers are used for returning integers (and on some
715 targets also for returning `struct' and `union' values when their
ef9dff19 716 size and alignment match an integer type). */
1a309862
MK
717#define LOW_RETURN_REGNUM 0 /* %eax */
718#define HIGH_RETURN_REGNUM 2 /* %edx */
719
720/* Extract from an array REGBUF containing the (raw) register state, a
721 function return value of TYPE, and copy that, in virtual format,
722 into VALBUF. */
723
c906108c 724void
1a309862 725i386_extract_return_value (struct type *type, char *regbuf, char *valbuf)
c906108c 726{
1a309862
MK
727 int len = TYPE_LENGTH (type);
728
c5aa993b 729 if (TYPE_CODE_FLT == TYPE_CODE (type))
c906108c 730 {
1a309862
MK
731 if (NUM_FREGS == 0)
732 {
733 warning ("Cannot find floating-point return value.");
734 memset (valbuf, 0, len);
ef9dff19 735 return;
1a309862
MK
736 }
737
738 /* Floating-point return values can be found in %st(0). */
739 if (len == TARGET_LONG_DOUBLE_BIT / TARGET_CHAR_BIT
740 && TARGET_LONG_DOUBLE_FORMAT == &floatformat_i387_ext)
741 {
742 /* Copy straight over, but take care of the padding. */
743 memcpy (valbuf, &regbuf[REGISTER_BYTE (FP0_REGNUM)],
744 FPU_REG_RAW_SIZE);
745 memset (valbuf + FPU_REG_RAW_SIZE, 0, len - FPU_REG_RAW_SIZE);
746 }
747 else
748 {
749 /* Convert the extended floating-point number found in
750 %st(0) to the desired type. This is probably not exactly
751 how it would happen on the target itself, but it is the
752 best we can do. */
753 DOUBLEST val;
754 floatformat_to_doublest (&floatformat_i387_ext,
755 &regbuf[REGISTER_BYTE (FP0_REGNUM)], &val);
756 store_floating (valbuf, TYPE_LENGTH (type), val);
757 }
c906108c
SS
758 }
759 else
c5aa993b 760 {
d4f3574e
SS
761 int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM);
762 int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM);
763
764 if (len <= low_size)
1a309862 765 memcpy (valbuf, &regbuf[REGISTER_BYTE (LOW_RETURN_REGNUM)], len);
d4f3574e
SS
766 else if (len <= (low_size + high_size))
767 {
768 memcpy (valbuf,
1a309862 769 &regbuf[REGISTER_BYTE (LOW_RETURN_REGNUM)], low_size);
d4f3574e 770 memcpy (valbuf + low_size,
1a309862 771 &regbuf[REGISTER_BYTE (HIGH_RETURN_REGNUM)], len - low_size);
d4f3574e
SS
772 }
773 else
8e65ff28
AC
774 internal_error (__FILE__, __LINE__,
775 "Cannot extract return value of %d bytes long.", len);
c906108c
SS
776 }
777}
778
ef9dff19
MK
779/* Write into the appropriate registers a function return value stored
780 in VALBUF of type TYPE, given in virtual format. */
781
782void
783i386_store_return_value (struct type *type, char *valbuf)
784{
785 int len = TYPE_LENGTH (type);
786
787 if (TYPE_CODE_FLT == TYPE_CODE (type))
788 {
789 if (NUM_FREGS == 0)
790 {
791 warning ("Cannot set floating-point return value.");
792 return;
793 }
794
795 /* Floating-point return values can be found in %st(0). */
796 if (len == TARGET_LONG_DOUBLE_BIT / TARGET_CHAR_BIT
797 && TARGET_LONG_DOUBLE_FORMAT == &floatformat_i387_ext)
798 {
799 /* Copy straight over. */
800 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), valbuf,
801 FPU_REG_RAW_SIZE);
802 }
803 else
804 {
805 char buf[FPU_REG_RAW_SIZE];
806 DOUBLEST val;
807
808 /* Convert the value found in VALBUF to the extended
809 floating point format used by the FPU. This is probably
810 not exactly how it would happen on the target itself, but
811 it is the best we can do. */
812 val = extract_floating (valbuf, TYPE_LENGTH (type));
813 floatformat_from_doublest (&floatformat_i387_ext, &val, buf);
814 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), buf,
815 FPU_REG_RAW_SIZE);
816 }
817 }
818 else
819 {
820 int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM);
821 int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM);
822
823 if (len <= low_size)
824 write_register_bytes (REGISTER_BYTE (LOW_RETURN_REGNUM), valbuf, len);
825 else if (len <= (low_size + high_size))
826 {
827 write_register_bytes (REGISTER_BYTE (LOW_RETURN_REGNUM),
828 valbuf, low_size);
829 write_register_bytes (REGISTER_BYTE (HIGH_RETURN_REGNUM),
830 valbuf + low_size, len - low_size);
831 }
832 else
8e65ff28
AC
833 internal_error (__FILE__, __LINE__,
834 "Cannot store return value of %d bytes long.", len);
ef9dff19
MK
835 }
836}
837
ac27f131
MK
838/* Convert data from raw format for register REGNUM in buffer FROM to
839 virtual format with type TYPE in buffer TO. In principle both
840 formats are identical except that the virtual format has two extra
841 bytes appended that aren't used. We set these to zero. */
842
843void
844i386_register_convert_to_virtual (int regnum, struct type *type,
845 char *from, char *to)
846{
847 /* Copy straight over, but take care of the padding. */
848 memcpy (to, from, FPU_REG_RAW_SIZE);
849 memset (to + FPU_REG_RAW_SIZE, 0, TYPE_LENGTH (type) - FPU_REG_RAW_SIZE);
850}
851
852/* Convert data from virtual format with type TYPE in buffer FROM to
853 raw format for register REGNUM in buffer TO. Simply omit the two
854 unused bytes. */
855
856void
857i386_register_convert_to_raw (struct type *type, int regnum,
858 char *from, char *to)
859{
860 memcpy (to, from, FPU_REG_RAW_SIZE);
861}
862
863\f
c906108c
SS
864#ifdef I386V4_SIGTRAMP_SAVED_PC
865/* Get saved user PC for sigtramp from the pushed ucontext on the stack
866 for all three variants of SVR4 sigtramps. */
867
868CORE_ADDR
fba45db2 869i386v4_sigtramp_saved_pc (struct frame_info *frame)
c906108c
SS
870{
871 CORE_ADDR saved_pc_offset = 4;
872 char *name = NULL;
873
874 find_pc_partial_function (frame->pc, &name, NULL, NULL);
875 if (name)
876 {
877 if (STREQ (name, "_sigreturn"))
878 saved_pc_offset = 132 + 14 * 4;
879 else if (STREQ (name, "_sigacthandler"))
880 saved_pc_offset = 80 + 14 * 4;
881 else if (STREQ (name, "sigvechandler"))
882 saved_pc_offset = 120 + 14 * 4;
883 }
884
885 if (frame->next)
886 return read_memory_integer (frame->next->frame + saved_pc_offset, 4);
887 return read_memory_integer (read_register (SP_REGNUM) + saved_pc_offset, 4);
888}
889#endif /* I386V4_SIGTRAMP_SAVED_PC */
890
a0b3c4fd 891
c906108c
SS
892#ifdef STATIC_TRANSFORM_NAME
893/* SunPRO encodes the static variables. This is not related to C++ mangling,
894 it is done for C too. */
895
896char *
fba45db2 897sunpro_static_transform_name (char *name)
c906108c
SS
898{
899 char *p;
900 if (IS_STATIC_TRANSFORM_NAME (name))
901 {
902 /* For file-local statics there will be a period, a bunch
c5aa993b
JM
903 of junk (the contents of which match a string given in the
904 N_OPT), a period and the name. For function-local statics
905 there will be a bunch of junk (which seems to change the
906 second character from 'A' to 'B'), a period, the name of the
907 function, and the name. So just skip everything before the
908 last period. */
c906108c
SS
909 p = strrchr (name, '.');
910 if (p != NULL)
911 name = p + 1;
912 }
913 return name;
914}
915#endif /* STATIC_TRANSFORM_NAME */
916
917
918
919/* Stuff for WIN32 PE style DLL's but is pretty generic really. */
920
921CORE_ADDR
fba45db2 922skip_trampoline_code (CORE_ADDR pc, char *name)
c906108c 923{
c5aa993b 924 if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */
c906108c 925 {
c5aa993b 926 unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4);
c906108c 927 struct minimal_symbol *indsym =
c5aa993b
JM
928 indirect ? lookup_minimal_symbol_by_pc (indirect) : 0;
929 char *symname = indsym ? SYMBOL_NAME (indsym) : 0;
c906108c 930
c5aa993b 931 if (symname)
c906108c 932 {
c5aa993b
JM
933 if (strncmp (symname, "__imp_", 6) == 0
934 || strncmp (symname, "_imp_", 5) == 0)
c906108c
SS
935 return name ? 1 : read_memory_unsigned_integer (indirect, 4);
936 }
937 }
938 return 0; /* not a trampoline */
939}
940
941static int
fba45db2 942gdb_print_insn_i386 (bfd_vma memaddr, disassemble_info *info)
c906108c
SS
943{
944 if (disassembly_flavor == att_flavor)
945 return print_insn_i386_att (memaddr, info);
946 else if (disassembly_flavor == intel_flavor)
947 return print_insn_i386_intel (memaddr, info);
7a292a7a
SS
948 /* Never reached - disassembly_flavour is always either att_flavor
949 or intel_flavor */
e1e9e218 950 internal_error (__FILE__, __LINE__, "failed internal consistency check");
7a292a7a
SS
951}
952
953/* If the disassembly mode is intel, we have to also switch the
954 bfd mach_type. This function is run in the set disassembly_flavor
955 command, and does that. */
956
957static void
fba45db2
KB
958set_disassembly_flavor_sfunc (char *args, int from_tty,
959 struct cmd_list_element *c)
7a292a7a
SS
960{
961 set_disassembly_flavor ();
7a292a7a
SS
962}
963
964static void
fba45db2 965set_disassembly_flavor (void)
7a292a7a
SS
966{
967 if (disassembly_flavor == att_flavor)
968 set_architecture_from_arch_mach (bfd_arch_i386, bfd_mach_i386_i386);
969 else if (disassembly_flavor == intel_flavor)
970 set_architecture_from_arch_mach (bfd_arch_i386, bfd_mach_i386_i386_intel_syntax);
c906108c
SS
971}
972
2acceee2 973
c906108c 974void
fba45db2 975_initialize_i386_tdep (void)
c906108c 976{
917317f4
JM
977 /* Initialize the table saying where each register starts in the
978 register file. */
979 {
980 int i, offset;
981
982 offset = 0;
983 for (i = 0; i < MAX_NUM_REGS; i++)
984 {
985 i386_register_byte[i] = offset;
986 offset += i386_register_raw_size[i];
987 }
988 }
989
990 /* Initialize the table of virtual register sizes. */
991 {
992 int i;
993
994 for (i = 0; i < MAX_NUM_REGS; i++)
995 i386_register_virtual_size[i] = TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (i));
996 }
c5aa993b 997
c906108c
SS
998 tm_print_insn = gdb_print_insn_i386;
999 tm_print_insn_info.mach = bfd_lookup_arch (bfd_arch_i386, 0)->mach;
1000
1001 /* Add the variable that controls the disassembly flavor */
917317f4
JM
1002 {
1003 struct cmd_list_element *new_cmd;
7a292a7a 1004
917317f4
JM
1005 new_cmd = add_set_enum_cmd ("disassembly-flavor", no_class,
1006 valid_flavors,
1ed2a135 1007 &disassembly_flavor,
917317f4 1008 "Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
c906108c 1009and the default value is \"att\".",
917317f4
JM
1010 &setlist);
1011 new_cmd->function.sfunc = set_disassembly_flavor_sfunc;
1012 add_show_from_set (new_cmd, &showlist);
1013 }
c5aa993b 1014
7a292a7a
SS
1015 /* Finally, initialize the disassembly flavor to the default given
1016 in the disassembly_flavor variable */
c906108c 1017
7a292a7a 1018 set_disassembly_flavor ();
c906108c 1019}