]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - gdb/m32r-tdep.c
import gdb-1999-07-07 post reformat
[thirdparty/binutils-gdb.git] / gdb / m32r-tdep.c
CommitLineData
c906108c
SS
1/* Target-dependent code for the Mitsubishi m32r for GDB, the GNU debugger.
2 Copyright 1996, Free Software Foundation, Inc.
3
c5aa993b 4 This file is part of GDB.
c906108c 5
c5aa993b
JM
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
c906108c 10
c5aa993b
JM
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
c906108c 15
c5aa993b
JM
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
c906108c
SS
20
21#include "defs.h"
22#include "frame.h"
23#include "inferior.h"
24#include "obstack.h"
25#include "target.h"
26#include "value.h"
27#include "bfd.h"
28#include "gdb_string.h"
29#include "gdbcore.h"
30#include "symfile.h"
31
32/* Function: m32r_use_struct_convention
33 Return nonzero if call_function should allocate stack space for a
34 struct return? */
35int
36m32r_use_struct_convention (gcc_p, type)
37 int gcc_p;
38 struct type *type;
39{
40 return (TYPE_LENGTH (type) > 8);
41}
42
43/* Function: frame_find_saved_regs
44 Return the frame_saved_regs structure for the frame.
45 Doesn't really work for dummy frames, but it does pass back
46 an empty frame_saved_regs, so I guess that's better than total failure */
47
c5aa993b 48void
c906108c
SS
49m32r_frame_find_saved_regs (fi, regaddr)
50 struct frame_info *fi;
51 struct frame_saved_regs *regaddr;
52{
c5aa993b 53 memcpy (regaddr, &fi->fsr, sizeof (struct frame_saved_regs));
c906108c
SS
54}
55
56/* Turn this on if you want to see just how much instruction decoding
57 if being done, its quite a lot
c5aa993b 58 */
c906108c 59#if 0
c5aa993b
JM
60static void
61dump_insn (char *commnt, CORE_ADDR pc, int insn)
c906108c 62{
c5aa993b
JM
63 printf_filtered (" %s %08x %08x ",
64 commnt, (unsigned int) pc, (unsigned int) insn);
65 (*tm_print_insn) (pc, &tm_print_insn_info);
66 printf_filtered ("\n");
c906108c
SS
67}
68#define insn_debug(args) { printf_filtered args; }
69#else
70#define dump_insn(a,b,c) {}
71#define insn_debug(args) {}
72#endif
73
c5aa993b 74#define DEFAULT_SEARCH_LIMIT 44
c906108c
SS
75
76/* Function: scan_prologue
77 This function decodes the target function prologue to determine
78 1) the size of the stack frame, and 2) which registers are saved on it.
79 It saves the offsets of saved regs in the frame_saved_regs argument,
80 and returns the frame size. */
81
82/*
c5aa993b
JM
83 The sequence it currently generates is:
84
85 if (varargs function) { ddi sp,#n }
86 push registers
87 if (additional stack <= 256) { addi sp,#-stack }
88 else if (additional stack < 65k) { add3 sp,sp,#-stack
89
90 } else if (additional stack) {
91 seth sp,#(stack & 0xffff0000)
92 or3 sp,sp,#(stack & 0x0000ffff)
93 sub sp,r4
94 }
95 if (frame pointer) {
96 mv sp,fp
97 }
c906108c 98
c5aa993b
JM
99 These instructions are scheduled like everything else, so you should stop at
100 the first branch instruction.
101
102 */
c906108c
SS
103
104/* This is required by skip prologue and by m32r_init_extra_frame_info.
105 The results of decoding a prologue should be cached because this
106 thrashing is getting nuts.
107 I am thinking of making a container class with two indexes, name and
108 address. It may be better to extend the symbol table.
c5aa993b 109 */
c906108c 110
c5aa993b
JM
111static void
112decode_prologue (start_pc, scan_limit,
113 pl_endptr, framelength,
114 fi, fsr)
c906108c
SS
115 CORE_ADDR start_pc;
116 CORE_ADDR scan_limit;
c5aa993b
JM
117 CORE_ADDR *pl_endptr; /* var parameter */
118 unsigned long *framelength;
119 struct frame_info *fi;
120 struct frame_saved_regs *fsr;
c906108c
SS
121{
122 unsigned long framesize;
123 int insn;
124 int op1;
125 int maybe_one_more = 0;
126 CORE_ADDR after_prologue = 0;
127 CORE_ADDR after_stack_adjust = 0;
128 CORE_ADDR current_pc;
129
130
131 framesize = 0;
132 after_prologue = 0;
c5aa993b 133 insn_debug (("rd prolog l(%d)\n", scan_limit - current_pc));
c906108c
SS
134
135 for (current_pc = start_pc; current_pc < scan_limit; current_pc += 2)
136 {
137
138 insn = read_memory_unsigned_integer (current_pc, 2);
c5aa993b
JM
139 dump_insn ("insn-1", current_pc, insn); /* MTZ */
140
141 /* If this is a 32 bit instruction, we dont want to examine its
142 immediate data as though it were an instruction */
c906108c 143 if (current_pc & 0x02)
c5aa993b 144 { /* Clear the parallel execution bit from 16 bit instruction */
c906108c 145 if (maybe_one_more)
c5aa993b
JM
146 { /* The last instruction was a branch, usually terminates
147 the series, but if this is a parallel instruction,
148 it may be a stack framing instruction */
149 if (!(insn & 0x8000))
150 {
151 insn_debug (("Really done"));
152 break; /* nope, we are really done */
c906108c
SS
153 }
154 }
c5aa993b 155 insn &= 0x7fff; /* decode this instruction further */
c906108c
SS
156 }
157 else
158 {
c5aa993b
JM
159 if (maybe_one_more)
160 break; /* This isnt the one more */
c906108c
SS
161 if (insn & 0x8000)
162 {
c5aa993b 163 insn_debug (("32 bit insn\n"));
c906108c 164 if (current_pc == scan_limit)
c5aa993b
JM
165 scan_limit += 2; /* extend the search */
166 current_pc += 2; /* skip the immediate data */
167 if (insn == 0x8faf) /* add3 sp, sp, xxxx */
c906108c 168 /* add 16 bit sign-extended offset */
c5aa993b
JM
169 {
170 insn_debug (("stack increment\n"));
171 framesize += -((short) read_memory_unsigned_integer (current_pc, 2));
c906108c
SS
172 }
173 else
174 {
c5aa993b
JM
175 if (((insn >> 8) == 0xe4) && /* ld24 r4, xxxxxx; sub sp, r4 */
176 read_memory_unsigned_integer (current_pc + 2, 2) == 0x0f24)
177 { /* subtract 24 bit sign-extended negative-offset */
178 dump_insn ("insn-2", current_pc + 2, insn);
c906108c 179 insn = read_memory_unsigned_integer (current_pc - 2, 4);
c5aa993b 180 dump_insn ("insn-3(l4)", current_pc - 2, insn);
c906108c 181 if (insn & 0x00800000) /* sign extend */
c5aa993b 182 insn |= 0xff000000; /* negative */
c906108c 183 else
c5aa993b 184 insn &= 0x00ffffff; /* positive */
c906108c
SS
185 framesize += insn;
186 }
187 }
188 after_prologue = current_pc;
189 continue;
190 }
191 }
c5aa993b
JM
192 op1 = insn & 0xf000; /* isolate just the first nibble */
193
c906108c 194 if ((insn & 0xf0ff) == 0x207f)
c5aa993b 195 { /* st reg, @-sp */
c906108c 196 int regno;
c5aa993b
JM
197 insn_debug (("push\n"));
198#if 0 /* No, PUSH FP is not an indication that we will use a frame pointer. */
199 if (((insn & 0xffff) == 0x2d7f) && fi)
c906108c
SS
200 fi->using_frame_pointer = 1;
201#endif
c5aa993b
JM
202 framesize += 4;
203#if 0
c906108c
SS
204/* Why should we increase the scan limit, just because we did a push?
205 And if there is a reason, surely we would only want to do it if we
206 had already reached the scan limit... */
207 if (current_pc == scan_limit)
208 scan_limit += 2;
209#endif
210 regno = ((insn >> 8) & 0xf);
c5aa993b 211 if (fsr) /* save_regs offset */
c906108c
SS
212 fsr->regs[regno] = framesize;
213 after_prologue = 0;
c5aa993b 214 continue;
c906108c 215 }
c5aa993b 216 if ((insn >> 8) == 0x4f) /* addi sp, xx */
c906108c
SS
217 /* add 8 bit sign-extended offset */
218 {
219 int stack_adjust = (char) (insn & 0xff);
220
221 /* there are probably two of these stack adjustments:
222 1) A negative one in the prologue, and
223 2) A positive one in the epilogue.
224 We are only interested in the first one. */
225
226 if (stack_adjust < 0)
227 {
228 framesize -= stack_adjust;
229 after_prologue = 0;
230 /* A frameless function may have no "mv fp, sp".
c5aa993b 231 In that case, this is the end of the prologue. */
c906108c
SS
232 after_stack_adjust = current_pc + 2;
233 }
234 continue;
235 }
c5aa993b
JM
236 if (insn == 0x1d8f)
237 { /* mv fp, sp */
238 if (fi)
239 fi->using_frame_pointer = 1; /* fp is now valid */
240 insn_debug (("done fp found\n"));
241 after_prologue = current_pc + 2;
242 break; /* end of stack adjustments */
243 }
244 if (insn == 0x7000) /* Nop looks like a branch, continue explicitly */
245 {
246 insn_debug (("nop\n"));
247 after_prologue = current_pc + 2;
248 continue; /* nop occurs between pushes */
c906108c
SS
249 }
250 /* End of prolog if any of these are branch instructions */
251 if ((op1 == 0x7000)
c5aa993b 252 || (op1 == 0xb000)
c906108c
SS
253 || (op1 == 0x7000))
254 {
255 after_prologue = current_pc;
c5aa993b 256 insn_debug (("Done: branch\n"));
c906108c
SS
257 maybe_one_more = 1;
258 continue;
259 }
260 /* Some of the branch instructions are mixed with other types */
261 if (op1 == 0x1000)
c5aa993b
JM
262 {
263 int subop = insn & 0x0ff0;
c906108c 264 if ((subop == 0x0ec0) || (subop == 0x0fc0))
c5aa993b
JM
265 {
266 insn_debug (("done: jmp\n"));
c906108c
SS
267 after_prologue = current_pc;
268 maybe_one_more = 1;
c5aa993b 269 continue; /* jmp , jl */
c906108c
SS
270 }
271 }
272 }
273
274 if (current_pc >= scan_limit)
275 {
c5aa993b 276 if (pl_endptr)
7a292a7a 277 {
c906108c 278#if 1
7a292a7a
SS
279 if (after_stack_adjust != 0)
280 /* We did not find a "mv fp,sp", but we DID find
281 a stack_adjust. Is it safe to use that as the
282 end of the prologue? I just don't know. */
283 {
284 *pl_endptr = after_stack_adjust;
285 if (framelength)
286 *framelength = framesize;
287 }
288 else
c906108c 289#endif
7a292a7a
SS
290 /* We reached the end of the loop without finding the end
291 of the prologue. No way to win -- we should report failure.
292 The way we do that is to return the original start_pc.
293 GDB will set a breakpoint at the start of the function (etc.) */
294 *pl_endptr = start_pc;
c5aa993b 295 }
c906108c
SS
296 return;
297 }
c5aa993b 298 if (after_prologue == 0)
c906108c
SS
299 after_prologue = current_pc;
300
c5aa993b
JM
301 insn_debug ((" framesize %d, firstline %08x\n", framesize, after_prologue));
302 if (framelength)
c906108c 303 *framelength = framesize;
c5aa993b 304 if (pl_endptr)
c906108c 305 *pl_endptr = after_prologue;
c5aa993b 306} /* decode_prologue */
c906108c
SS
307
308/* Function: skip_prologue
309 Find end of function prologue */
310
311CORE_ADDR
312m32r_skip_prologue (pc)
313 CORE_ADDR pc;
314{
315 CORE_ADDR func_addr, func_end;
316 struct symtab_and_line sal;
317
318 /* See what the symbol table says */
319
320 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
321 {
322 sal = find_pc_line (func_addr, 0);
323
324 if (sal.line != 0 && sal.end <= func_end)
325 {
c5aa993b
JM
326
327 insn_debug (("BP after prologue %08x\n", sal.end));
c906108c
SS
328 func_end = sal.end;
329 }
330 else
331 /* Either there's no line info, or the line after the prologue is after
332 the end of the function. In this case, there probably isn't a
333 prologue. */
334 {
c5aa993b
JM
335 insn_debug (("No line info, line(%x) sal_end(%x) funcend(%x)\n",
336 sal.line, sal.end, func_end));
337 func_end = min (func_end, func_addr + DEFAULT_SEARCH_LIMIT);
c906108c
SS
338 }
339 }
c5aa993b 340 else
c906108c
SS
341 func_end = pc + DEFAULT_SEARCH_LIMIT;
342 decode_prologue (pc, func_end, &sal.end, 0, 0, 0);
343 return sal.end;
344}
345
346static unsigned long
347m32r_scan_prologue (fi, fsr)
348 struct frame_info *fi;
349 struct frame_saved_regs *fsr;
350{
351 struct symtab_and_line sal;
352 CORE_ADDR prologue_start, prologue_end, current_pc;
353 unsigned long framesize;
354
355 /* this code essentially duplicates skip_prologue,
356 but we need the start address below. */
357
358 if (find_pc_partial_function (fi->pc, NULL, &prologue_start, &prologue_end))
359 {
360 sal = find_pc_line (prologue_start, 0);
361
c5aa993b 362 if (sal.line == 0) /* no line info, use current PC */
c906108c
SS
363 if (prologue_start == entry_point_address ())
364 return 0;
365 }
366 else
367 {
368 prologue_start = fi->pc;
c5aa993b
JM
369 prologue_end = prologue_start + 48; /* We're in the boondocks:
370 allow for 16 pushes, an add,
371 and "mv fp,sp" */
c906108c
SS
372 }
373#if 0
374 prologue_end = min (prologue_end, fi->pc);
375#endif
c5aa993b
JM
376 insn_debug (("fipc(%08x) start(%08x) end(%08x)\n",
377 fi->pc, prologue_start, prologue_end));
378 prologue_end = min (prologue_end, prologue_start + DEFAULT_SEARCH_LIMIT);
379 decode_prologue (prologue_start, prologue_end, &prologue_end, &framesize,
380 fi, fsr);
c906108c
SS
381 return framesize;
382}
383
384/* Function: init_extra_frame_info
385 This function actually figures out the frame address for a given pc and
386 sp. This is tricky on the m32r because we sometimes don't use an explicit
387 frame pointer, and the previous stack pointer isn't necessarily recorded
388 on the stack. The only reliable way to get this info is to
389 examine the prologue. */
390
391void
392m32r_init_extra_frame_info (fi)
393 struct frame_info *fi;
394{
395 int reg;
396
397 if (fi->next)
398 fi->pc = FRAME_SAVED_PC (fi->next);
399
400 memset (fi->fsr.regs, '\000', sizeof fi->fsr.regs);
401
402 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
403 {
404 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
c5aa993b 405 by assuming it's always FP. */
c906108c
SS
406 fi->frame = generic_read_register_dummy (fi->pc, fi->frame, SP_REGNUM);
407 fi->framesize = 0;
408 return;
409 }
c5aa993b 410 else
c906108c
SS
411 {
412 fi->using_frame_pointer = 0;
413 fi->framesize = m32r_scan_prologue (fi, &fi->fsr);
414
415 if (!fi->next)
416 if (fi->using_frame_pointer)
417 {
418 fi->frame = read_register (FP_REGNUM);
419 }
420 else
421 fi->frame = read_register (SP_REGNUM);
c5aa993b
JM
422 else
423 /* fi->next means this is not the innermost frame */ if (fi->using_frame_pointer)
424 /* we have an FP */
425 if (fi->next->fsr.regs[FP_REGNUM] != 0) /* caller saved our FP */
426 fi->frame = read_memory_integer (fi->next->fsr.regs[FP_REGNUM], 4);
c906108c
SS
427 for (reg = 0; reg < NUM_REGS; reg++)
428 if (fi->fsr.regs[reg] != 0)
429 fi->fsr.regs[reg] = fi->frame + fi->framesize - fi->fsr.regs[reg];
430 }
431}
432
433/* Function: mn10300_virtual_frame_pointer
434 Return the register that the function uses for a frame pointer,
435 plus any necessary offset to be applied to the register before
436 any frame pointer offsets. */
437
438void
439m32r_virtual_frame_pointer (pc, reg, offset)
440 CORE_ADDR pc;
441 long *reg;
442 long *offset;
443{
444 struct frame_info fi;
445
446 /* Set up a dummy frame_info. */
447 fi.next = NULL;
448 fi.prev = NULL;
449 fi.frame = 0;
450 fi.pc = pc;
451
452 /* Analyze the prolog and fill in the extra info. */
453 m32r_init_extra_frame_info (&fi);
454
455
456 /* Results will tell us which type of frame it uses. */
457 if (fi.using_frame_pointer)
458 {
c5aa993b 459 *reg = FP_REGNUM;
c906108c
SS
460 *offset = 0;
461 }
462 else
463 {
c5aa993b 464 *reg = SP_REGNUM;
c906108c
SS
465 *offset = 0;
466 }
467}
468
469/* Function: find_callers_reg
470 Find REGNUM on the stack. Otherwise, it's in an active register. One thing
471 we might want to do here is to check REGNUM against the clobber mask, and
472 somehow flag it as invalid if it isn't saved on the stack somewhere. This
473 would provide a graceful failure mode when trying to get the value of
474 caller-saves registers for an inner frame. */
475
476CORE_ADDR
477m32r_find_callers_reg (fi, regnum)
478 struct frame_info *fi;
479 int regnum;
480{
481 for (; fi; fi = fi->next)
482 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
483 return generic_read_register_dummy (fi->pc, fi->frame, regnum);
484 else if (fi->fsr.regs[regnum] != 0)
c5aa993b
JM
485 return read_memory_integer (fi->fsr.regs[regnum],
486 REGISTER_RAW_SIZE (regnum));
c906108c
SS
487 return read_register (regnum);
488}
489
490/* Function: frame_chain
491 Given a GDB frame, determine the address of the calling function's frame.
492 This will be used to create a new GDB frame struct, and then
493 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
494 For m32r, we save the frame size when we initialize the frame_info. */
495
496CORE_ADDR
497m32r_frame_chain (fi)
498 struct frame_info *fi;
499{
500 CORE_ADDR fn_start, callers_pc, fp;
501
502 /* is this a dummy frame? */
c5aa993b
JM
503 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
504 return fi->frame; /* dummy frame same as caller's frame */
c906108c
SS
505
506 /* is caller-of-this a dummy frame? */
c5aa993b 507 callers_pc = FRAME_SAVED_PC (fi); /* find out who called us: */
c906108c 508 fp = m32r_find_callers_reg (fi, FP_REGNUM);
c5aa993b
JM
509 if (PC_IN_CALL_DUMMY (callers_pc, fp, fp))
510 return fp; /* dummy frame's frame may bear no relation to ours */
c906108c
SS
511
512 if (find_pc_partial_function (fi->pc, 0, &fn_start, 0))
513 if (fn_start == entry_point_address ())
c5aa993b 514 return 0; /* in _start fn, don't chain further */
c906108c
SS
515 if (fi->framesize == 0)
516 {
c5aa993b
JM
517 printf_filtered ("cannot determine frame size @ %08x , pc(%08x)\n",
518 (unsigned long) fi->frame,
519 (unsigned long) fi->pc);
c906108c
SS
520 return 0;
521 }
c5aa993b 522 insn_debug (("m32rx frame %08x\n", fi->frame + fi->framesize));
c906108c
SS
523 return fi->frame + fi->framesize;
524}
525
526/* Function: push_return_address (pc)
527 Set up the return address for the inferior function call.
528 Necessary for targets that don't actually execute a JSR/BSR instruction
529 (ie. when using an empty CALL_DUMMY) */
530
531CORE_ADDR
532m32r_push_return_address (pc, sp)
533 CORE_ADDR pc;
534 CORE_ADDR sp;
535{
536 write_register (RP_REGNUM, CALL_DUMMY_ADDRESS ());
537 return sp;
538}
539
540
541/* Function: pop_frame
542 Discard from the stack the innermost frame,
543 restoring all saved registers. */
544
545struct frame_info *
546m32r_pop_frame (frame)
547 struct frame_info *frame;
548{
549 int regnum;
550
551 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
552 generic_pop_dummy_frame ();
553 else
554 {
555 for (regnum = 0; regnum < NUM_REGS; regnum++)
556 if (frame->fsr.regs[regnum] != 0)
c5aa993b 557 write_register (regnum,
c906108c
SS
558 read_memory_integer (frame->fsr.regs[regnum], 4));
559
560 write_register (PC_REGNUM, FRAME_SAVED_PC (frame));
561 write_register (SP_REGNUM, read_register (FP_REGNUM));
562 if (read_register (PSW_REGNUM) & 0x80)
563 write_register (SPU_REGNUM, read_register (SP_REGNUM));
564 else
565 write_register (SPI_REGNUM, read_register (SP_REGNUM));
566 }
567 flush_cached_frames ();
568 return NULL;
569}
570
571/* Function: frame_saved_pc
572 Find the caller of this frame. We do this by seeing if RP_REGNUM is saved
573 in the stack anywhere, otherwise we get it from the registers. */
574
575CORE_ADDR
576m32r_frame_saved_pc (fi)
577 struct frame_info *fi;
578{
c5aa993b
JM
579 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
580 return generic_read_register_dummy (fi->pc, fi->frame, PC_REGNUM);
c906108c
SS
581 else
582 return m32r_find_callers_reg (fi, RP_REGNUM);
583}
584
585/* Function: push_arguments
586 Setup the function arguments for calling a function in the inferior.
587
588 On the Mitsubishi M32R architecture, there are four registers (R0 to R3)
589 which are dedicated for passing function arguments. Up to the first
590 four arguments (depending on size) may go into these registers.
591 The rest go on the stack.
592
593 Arguments that are smaller than 4 bytes will still take up a whole
594 register or a whole 32-bit word on the stack, and will be
595 right-justified in the register or the stack word. This includes
596 chars, shorts, and small aggregate types.
c5aa993b 597
c906108c
SS
598 Arguments of 8 bytes size are split between two registers, if
599 available. If only one register is available, the argument will
600 be split between the register and the stack. Otherwise it is
601 passed entirely on the stack. Aggregate types with sizes between
602 4 and 8 bytes are passed entirely on the stack, and are left-justified
603 within the double-word (as opposed to aggregates smaller than 4 bytes
604 which are right-justified).
605
606 Aggregates of greater than 8 bytes are first copied onto the stack,
607 and then a pointer to the copy is passed in the place of the normal
608 argument (either in a register if available, or on the stack).
609
610 Functions that must return an aggregate type can return it in the
611 normal return value registers (R0 and R1) if its size is 8 bytes or
612 less. For larger return values, the caller must allocate space for
613 the callee to copy the return value to. A pointer to this space is
614 passed as an implicit first argument, always in R0. */
615
616CORE_ADDR
617m32r_push_arguments (nargs, args, sp, struct_return, struct_addr)
618 int nargs;
619 value_ptr *args;
620 CORE_ADDR sp;
621 unsigned char struct_return;
622 CORE_ADDR struct_addr;
623{
624 int stack_offset, stack_alloc;
625 int argreg;
626 int argnum;
627 struct type *type;
628 CORE_ADDR regval;
629 char *val;
630 char valbuf[4];
631 int len;
632 int odd_sized_struct;
633
634 /* first force sp to a 4-byte alignment */
635 sp = sp & ~3;
636
c5aa993b 637 argreg = ARG0_REGNUM;
c906108c
SS
638 /* The "struct return pointer" pseudo-argument goes in R0 */
639 if (struct_return)
c5aa993b
JM
640 write_register (argreg++, struct_addr);
641
c906108c
SS
642 /* Now make sure there's space on the stack */
643 for (argnum = 0, stack_alloc = 0;
644 argnum < nargs; argnum++)
c5aa993b
JM
645 stack_alloc += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3);
646 sp -= stack_alloc; /* make room on stack for args */
647
648
c906108c
SS
649 /* Now load as many as possible of the first arguments into
650 registers, and push the rest onto the stack. There are 16 bytes
651 in four registers available. Loop thru args from first to last. */
c5aa993b 652
c906108c
SS
653 argreg = ARG0_REGNUM;
654 for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
655 {
656 type = VALUE_TYPE (args[argnum]);
c5aa993b
JM
657 len = TYPE_LENGTH (type);
658 memset (valbuf, 0, sizeof (valbuf));
c906108c 659 if (len < 4)
c5aa993b
JM
660 { /* value gets right-justified in the register or stack word */
661 memcpy (valbuf + (4 - len),
662 (char *) VALUE_CONTENTS (args[argnum]), len);
663 val = valbuf;
664 }
c906108c 665 else
c5aa993b
JM
666 val = (char *) VALUE_CONTENTS (args[argnum]);
667
c906108c 668 if (len > 4 && (len & 3) != 0)
c5aa993b 669 odd_sized_struct = 1; /* such structs go entirely on stack */
c906108c 670 else
c5aa993b 671 odd_sized_struct = 0;
c906108c 672 while (len > 0)
c5aa993b
JM
673 {
674 if (argreg > ARGLAST_REGNUM || odd_sized_struct)
675 { /* must go on the stack */
676 write_memory (sp + stack_offset, val, 4);
677 stack_offset += 4;
678 }
679 /* NOTE WELL!!!!! This is not an "else if" clause!!!
680 That's because some *&^%$ things get passed on the stack
681 AND in the registers! */
682 if (argreg <= ARGLAST_REGNUM)
683 { /* there's room in a register */
684 regval = extract_address (val, REGISTER_RAW_SIZE (argreg));
685 write_register (argreg++, regval);
686 }
687 /* Store the value 4 bytes at a time. This means that things
688 larger than 4 bytes may go partly in registers and partly
689 on the stack. */
690 len -= REGISTER_RAW_SIZE (argreg);
691 val += REGISTER_RAW_SIZE (argreg);
692 }
c906108c
SS
693 }
694 return sp;
695}
696
697/* Function: fix_call_dummy
698 If there is real CALL_DUMMY code (eg. on the stack), this function
699 has the responsability to insert the address of the actual code that
700 is the target of the target function call. */
701
702void
703m32r_fix_call_dummy (dummy, pc, fun, nargs, args, type, gcc_p)
704 char *dummy;
705 CORE_ADDR pc;
706 CORE_ADDR fun;
707 int nargs;
708 value_ptr *args;
709 struct type *type;
710 int gcc_p;
711{
712 /* ld24 r8, <(imm24) fun> */
713 *(unsigned long *) (dummy) = (fun & 0x00ffffff) | 0xe8000000;
714}
715
c906108c
SS
716
717/* Function: m32r_write_sp
718 Because SP is really a read-only register that mirrors either SPU or SPI,
719 we must actually write one of those two as well, depending on PSW. */
720
721void
722m32r_write_sp (val)
723 CORE_ADDR val;
724{
725 unsigned long psw = read_register (PSW_REGNUM);
726
c5aa993b 727 if (psw & 0x80) /* stack mode: user or interrupt */
c906108c
SS
728 write_register (SPU_REGNUM, val);
729 else
730 write_register (SPI_REGNUM, val);
731 write_register (SP_REGNUM, val);
732}
733
734void
735_initialize_m32r_tdep ()
736{
737 tm_print_insn = print_insn_m32r;
738}