]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - gdb/mips-tdep.c
Thu Apr 22 14:50:05 1993 Jim Kingdon (kingdon@cygnus.com)
[thirdparty/binutils-gdb.git] / gdb / mips-tdep.c
CommitLineData
7d9884b9 1/* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger.
c2a0f1cb 2 Copyright 1988, 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
bd5635a1
RP
3 Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
4 and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
5
6This file is part of GDB.
7
361bf6ee 8This program is free software; you can redistribute it and/or modify
bd5635a1 9it under the terms of the GNU General Public License as published by
361bf6ee
JG
10the Free Software Foundation; either version 2 of the License, or
11(at your option) any later version.
bd5635a1 12
361bf6ee 13This program is distributed in the hope that it will be useful,
bd5635a1
RP
14but WITHOUT ANY WARRANTY; without even the implied warranty of
15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
361bf6ee
JG
19along with this program; if not, write to the Free Software
20Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
bd5635a1 21
bd5635a1 22#include "defs.h"
bd5635a1
RP
23#include "frame.h"
24#include "inferior.h"
25#include "symtab.h"
26#include "value.h"
27#include "gdbcmd.h"
ef08856f 28#include "language.h"
bd5635a1
RP
29
30#ifdef USG
31#include <sys/types.h>
32#endif
33
34#include <sys/param.h>
35#include <sys/dir.h>
36#include <signal.h>
37#include <sys/ioctl.h>
38
39#include "gdbcore.h"
62a469e1
SG
40#include "symfile.h"
41#include "objfiles.h"
bd5635a1
RP
42
43#ifndef MIPSMAGIC
44#ifdef MIPSEL
45#define MIPSMAGIC MIPSELMAGIC
46#else
47#define MIPSMAGIC MIPSEBMAGIC
48#endif
49#endif
50
51#define VM_MIN_ADDRESS (unsigned)0x400000
52
53#include <sys/user.h> /* After a.out.h */
54#include <sys/file.h>
55#include <sys/stat.h>
56
57\f
c2a0f1cb
ILT
58/* Some MIPS boards don't support floating point, so we permit the
59 user to turn it off. */
60int mips_fpu = 1;
61
0f552c5f
JG
62#define PROC_LOW_ADDR(proc) ((proc)->pdr.adr) /* least address */
63#define PROC_HIGH_ADDR(proc) ((proc)->pdr.iline) /* upper address bound */
64#define PROC_FRAME_OFFSET(proc) ((proc)->pdr.frameoffset)
65#define PROC_FRAME_REG(proc) ((proc)->pdr.framereg)
66#define PROC_REG_MASK(proc) ((proc)->pdr.regmask)
67#define PROC_FREG_MASK(proc) ((proc)->pdr.fregmask)
68#define PROC_REG_OFFSET(proc) ((proc)->pdr.regoffset)
69#define PROC_FREG_OFFSET(proc) ((proc)->pdr.fregoffset)
70#define PROC_PC_REG(proc) ((proc)->pdr.pcreg)
71#define PROC_SYMBOL(proc) (*(struct symbol**)&(proc)->pdr.isym)
bd5635a1 72#define _PROC_MAGIC_ 0x0F0F0F0F
0f552c5f
JG
73#define PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym == _PROC_MAGIC_)
74#define SET_PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym = _PROC_MAGIC_)
bd5635a1
RP
75
76struct linked_proc_info
77{
78 struct mips_extra_func_info info;
79 struct linked_proc_info *next;
dac4929a 80} *linked_proc_desc_table = NULL;
bd5635a1
RP
81
82\f
83#define READ_FRAME_REG(fi, regno) read_next_frame_reg((fi)->next, regno)
84
0f552c5f 85static int
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RP
86read_next_frame_reg(fi, regno)
87 FRAME fi;
88 int regno;
89{
e157305c
PS
90 /* If it is the frame for sigtramp we have a complete sigcontext
91 immediately below the frame and we get the saved registers from there.
92 If the stack layout for sigtramp changes we might have to change these
93 constants and the companion fixup_sigtramp in mipsread.c */
94#define SIGFRAME_BASE 0x12c /* sizeof(sigcontext) */
95#define SIGFRAME_PC_OFF (-SIGFRAME_BASE + 2 * 4)
96#define SIGFRAME_REGSAVE_OFF (-SIGFRAME_BASE + 3 * 4)
bd5635a1
RP
97 for (; fi; fi = fi->next)
98 if (in_sigtramp(fi->pc, 0)) {
bd5635a1
RP
99 int offset;
100 if (regno == PC_REGNUM) offset = SIGFRAME_PC_OFF;
e157305c 101 else if (regno < 32) offset = SIGFRAME_REGSAVE_OFF + regno * 4;
bd5635a1
RP
102 else return 0;
103 return read_memory_integer(fi->frame + offset, 4);
104 }
105 else if (regno == SP_REGNUM) return fi->frame;
106 else if (fi->saved_regs->regs[regno])
107 return read_memory_integer(fi->saved_regs->regs[regno], 4);
108 return read_register(regno);
109}
110
111int
112mips_frame_saved_pc(frame)
113 FRAME frame;
114{
0f552c5f 115 mips_extra_func_info_t proc_desc = frame->proc_desc;
bd5635a1 116 int pcreg = proc_desc ? PROC_PC_REG(proc_desc) : RA_REGNUM;
0f552c5f 117
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RP
118 if (proc_desc && PROC_DESC_IS_DUMMY(proc_desc))
119 return read_memory_integer(frame->frame - 4, 4);
0f552c5f 120
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RP
121 return read_next_frame_reg(frame, pcreg);
122}
123
124static struct mips_extra_func_info temp_proc_desc;
125static struct frame_saved_regs temp_saved_regs;
126
a8172eea
RP
127/* This fencepost looks highly suspicious to me. Removing it also
128 seems suspicious as it could affect remote debugging across serial
129 lines. At the very least, this needs a warning message.
130 rich@cygnus.com 12mar93. */
131
0f552c5f
JG
132static CORE_ADDR
133heuristic_proc_start(pc)
bd5635a1
RP
134 CORE_ADDR pc;
135{
bd5635a1 136 CORE_ADDR start_pc = pc;
5e2e79f8 137 CORE_ADDR fence = start_pc - 200;
0f552c5f
JG
138
139 if (start_pc == 0) return 0;
bd5635a1 140 if (fence < VM_MIN_ADDRESS) fence = VM_MIN_ADDRESS;
0f552c5f 141
bd5635a1
RP
142 /* search back for previous return */
143 for (start_pc -= 4; ; start_pc -= 4)
a8172eea
RP
144 if (start_pc < fence)
145 {
146 warning("Cannot find enclosing function for pc 0x%x", pc);
147 return 0;
148 }
bd5635a1
RP
149 else if (ABOUT_TO_RETURN(start_pc))
150 break;
151
152 start_pc += 8; /* skip return, and its delay slot */
153#if 0
154 /* skip nops (usually 1) 0 - is this */
155 while (start_pc < pc && read_memory_integer (start_pc, 4) == 0)
156 start_pc += 4;
157#endif
158 return start_pc;
159}
160
0f552c5f 161static mips_extra_func_info_t
bd5635a1
RP
162heuristic_proc_desc(start_pc, limit_pc, next_frame)
163 CORE_ADDR start_pc, limit_pc;
164 FRAME next_frame;
165{
166 CORE_ADDR sp = next_frame ? next_frame->frame : read_register (SP_REGNUM);
167 CORE_ADDR cur_pc;
168 int frame_size;
169 int has_frame_reg = 0;
170 int reg30; /* Value of $r30. Used by gcc for frame-pointer */
171 unsigned long reg_mask = 0;
172
173 if (start_pc == 0) return NULL;
174 bzero(&temp_proc_desc, sizeof(temp_proc_desc));
175 bzero(&temp_saved_regs, sizeof(struct frame_saved_regs));
a70dc898
RP
176 PROC_LOW_ADDR(&temp_proc_desc) = start_pc;
177
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RP
178 if (start_pc + 200 < limit_pc) limit_pc = start_pc + 200;
179 restart:
180 frame_size = 0;
181 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4) {
182 unsigned long word;
183 int status;
184
a70dc898 185 status = read_memory_nobpt (cur_pc, (char *)&word, 4);
bd5635a1 186 if (status) memory_error (status, cur_pc);
5e2e79f8 187 SWAP_TARGET_AND_HOST (&word, sizeof (word));
bd5635a1
RP
188 if ((word & 0xFFFF0000) == 0x27bd0000) /* addiu $sp,$sp,-i */
189 frame_size += (-word) & 0xFFFF;
190 else if ((word & 0xFFFF0000) == 0x23bd0000) /* addu $sp,$sp,-i */
191 frame_size += (-word) & 0xFFFF;
192 else if ((word & 0xFFE00000) == 0xafa00000) { /* sw reg,offset($sp) */
193 int reg = (word & 0x001F0000) >> 16;
194 reg_mask |= 1 << reg;
195 temp_saved_regs.regs[reg] = sp + (short)word;
196 }
197 else if ((word & 0xFFFF0000) == 0x27be0000) { /* addiu $30,$sp,size */
198 if ((unsigned short)word != frame_size)
199 reg30 = sp + (unsigned short)word;
200 else if (!has_frame_reg) {
201 int alloca_adjust;
202 has_frame_reg = 1;
203 reg30 = read_next_frame_reg(next_frame, 30);
204 alloca_adjust = reg30 - (sp + (unsigned short)word);
205 if (alloca_adjust > 0) {
206 /* FP > SP + frame_size. This may be because
207 /* of an alloca or somethings similar.
208 * Fix sp to "pre-alloca" value, and try again.
209 */
210 sp += alloca_adjust;
211 goto restart;
212 }
213 }
214 }
215 else if ((word & 0xFFE00000) == 0xafc00000) { /* sw reg,offset($30) */
216 int reg = (word & 0x001F0000) >> 16;
217 reg_mask |= 1 << reg;
218 temp_saved_regs.regs[reg] = reg30 + (short)word;
219 }
220 }
221 if (has_frame_reg) {
222 PROC_FRAME_REG(&temp_proc_desc) = 30;
223 PROC_FRAME_OFFSET(&temp_proc_desc) = 0;
224 }
225 else {
226 PROC_FRAME_REG(&temp_proc_desc) = SP_REGNUM;
227 PROC_FRAME_OFFSET(&temp_proc_desc) = frame_size;
228 }
229 PROC_REG_MASK(&temp_proc_desc) = reg_mask;
230 PROC_PC_REG(&temp_proc_desc) = RA_REGNUM;
231 return &temp_proc_desc;
232}
233
0f552c5f 234static mips_extra_func_info_t
bd5635a1
RP
235find_proc_desc(pc, next_frame)
236 CORE_ADDR pc;
237 FRAME next_frame;
238{
239 mips_extra_func_info_t proc_desc;
0f552c5f 240 struct block *b = block_for_pc(pc);
bd5635a1 241 struct symbol *sym =
dac4929a 242 b ? lookup_symbol(MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE, 0, NULL) : NULL;
0f552c5f
JG
243
244 if (sym)
bd5635a1
RP
245 {
246 /* IF this is the topmost frame AND
247 * (this proc does not have debugging information OR
248 * the PC is in the procedure prologue)
be772100 249 * THEN create a "heuristic" proc_desc (by analyzing
bd5635a1
RP
250 * the actual code) to replace the "official" proc_desc.
251 */
0f552c5f 252 proc_desc = (mips_extra_func_info_t)SYMBOL_VALUE(sym);
bd5635a1
RP
253 if (next_frame == NULL) {
254 struct symtab_and_line val;
255 struct symbol *proc_symbol =
256 PROC_DESC_IS_DUMMY(proc_desc) ? 0 : PROC_SYMBOL(proc_desc);
0f552c5f 257
bd5635a1
RP
258 if (proc_symbol) {
259 val = find_pc_line (BLOCK_START
260 (SYMBOL_BLOCK_VALUE(proc_symbol)),
261 0);
262 val.pc = val.end ? val.end : pc;
263 }
264 if (!proc_symbol || pc < val.pc) {
265 mips_extra_func_info_t found_heuristic =
266 heuristic_proc_desc(PROC_LOW_ADDR(proc_desc),
267 pc, next_frame);
268 if (found_heuristic) proc_desc = found_heuristic;
269 }
270 }
271 }
272 else
273 {
0f552c5f
JG
274 /* Is linked_proc_desc_table really necessary? It only seems to be used
275 by procedure call dummys. However, the procedures being called ought
276 to have their own proc_descs, and even if they don't,
277 heuristic_proc_desc knows how to create them! */
278
bd5635a1
RP
279 register struct linked_proc_info *link;
280 for (link = linked_proc_desc_table; link; link = link->next)
281 if (PROC_LOW_ADDR(&link->info) <= pc
282 && PROC_HIGH_ADDR(&link->info) > pc)
283 return &link->info;
284 proc_desc =
285 heuristic_proc_desc(heuristic_proc_start(pc), pc, next_frame);
286 }
287 return proc_desc;
288}
289
290mips_extra_func_info_t cached_proc_desc;
291
0f552c5f
JG
292FRAME_ADDR
293mips_frame_chain(frame)
bd5635a1
RP
294 FRAME frame;
295{
bd5635a1
RP
296 mips_extra_func_info_t proc_desc;
297 CORE_ADDR saved_pc = FRAME_SAVED_PC(frame);
be772100 298
0f552c5f
JG
299 if (saved_pc == 0 || inside_entry_file (saved_pc))
300 return 0;
301
bd5635a1 302 proc_desc = find_proc_desc(saved_pc, frame);
0f552c5f
JG
303 if (!proc_desc)
304 return 0;
305
bd5635a1
RP
306 cached_proc_desc = proc_desc;
307 return read_next_frame_reg(frame, PROC_FRAME_REG(proc_desc))
0f552c5f 308 + PROC_FRAME_OFFSET(proc_desc);
bd5635a1
RP
309}
310
311void
312init_extra_frame_info(fci)
313 struct frame_info *fci;
314{
315 extern struct obstack frame_cache_obstack;
316 /* Use proc_desc calculated in frame_chain */
317 mips_extra_func_info_t proc_desc = fci->next ? cached_proc_desc :
318 find_proc_desc(fci->pc, fci->next);
0f552c5f 319
bd5635a1
RP
320 fci->saved_regs = (struct frame_saved_regs*)
321 obstack_alloc (&frame_cache_obstack, sizeof(struct frame_saved_regs));
322 bzero(fci->saved_regs, sizeof(struct frame_saved_regs));
323 fci->proc_desc =
0f552c5f 324 proc_desc == &temp_proc_desc ? 0 : proc_desc;
bd5635a1
RP
325 if (proc_desc)
326 {
327 int ireg;
328 CORE_ADDR reg_position;
329 unsigned long mask;
330 /* r0 bit means kernel trap */
331 int kernel_trap = PROC_REG_MASK(proc_desc) & 1;
332
c2a0f1cb
ILT
333 /* Fixup frame-pointer - only needed for top frame */
334 /* This may not be quite right, if proc has a real frame register */
335 if (fci->pc == PROC_LOW_ADDR(proc_desc))
336 fci->frame = read_register (SP_REGNUM);
337 else
338 fci->frame = READ_FRAME_REG(fci, PROC_FRAME_REG(proc_desc))
339 + PROC_FRAME_OFFSET(proc_desc);
bd5635a1
RP
340
341 if (proc_desc == &temp_proc_desc)
342 *fci->saved_regs = temp_saved_regs;
343 else
344 {
345 /* find which general-purpose registers were saved */
346 reg_position = fci->frame + PROC_REG_OFFSET(proc_desc);
347 mask = kernel_trap ? 0xFFFFFFFF : PROC_REG_MASK(proc_desc);
348 for (ireg= 31; mask; --ireg, mask <<= 1)
349 if (mask & 0x80000000)
350 {
351 fci->saved_regs->regs[ireg] = reg_position;
352 reg_position -= 4;
353 }
354 /* find which floating-point registers were saved */
355 reg_position = fci->frame + PROC_FREG_OFFSET(proc_desc);
356 /* The freg_offset points to where the first *double* register is saved.
357 * So skip to the high-order word. */
358 reg_position += 4;
359 mask = kernel_trap ? 0xFFFFFFFF : PROC_FREG_MASK(proc_desc);
360 for (ireg = 31; mask; --ireg, mask <<= 1)
361 if (mask & 0x80000000)
362 {
d747e0af 363 fci->saved_regs->regs[FP0_REGNUM+ireg] = reg_position;
bd5635a1
RP
364 reg_position -= 4;
365 }
366 }
367
368 /* hack: if argument regs are saved, guess these contain args */
369 if ((PROC_REG_MASK(proc_desc) & 0xF0) == 0) fci->num_args = -1;
370 else if ((PROC_REG_MASK(proc_desc) & 0x80) == 0) fci->num_args = 4;
371 else if ((PROC_REG_MASK(proc_desc) & 0x40) == 0) fci->num_args = 3;
372 else if ((PROC_REG_MASK(proc_desc) & 0x20) == 0) fci->num_args = 2;
373 else if ((PROC_REG_MASK(proc_desc) & 0x10) == 0) fci->num_args = 1;
374
375 fci->saved_regs->regs[PC_REGNUM] = fci->saved_regs->regs[RA_REGNUM];
376 }
bd5635a1
RP
377}
378
a70dc898
RP
379/* MIPS stack frames are almost impenetrable. When execution stops,
380 we basically have to look at symbol information for the function
381 that we stopped in, which tells us *which* register (if any) is
382 the base of the frame pointer, and what offset from that register
383 the frame itself is at.
384
385 This presents a problem when trying to examine a stack in memory
386 (that isn't executing at the moment), using the "frame" command. We
387 don't have a PC, nor do we have any registers except SP.
388
389 This routine takes two arguments, SP and PC, and tries to make the
390 cached frames look as if these two arguments defined a frame on the
391 cache. This allows the rest of info frame to extract the important
392 arguments without difficulty. */
393
394FRAME
c2a0f1cb
ILT
395setup_arbitrary_frame (argc, argv)
396 int argc;
397 FRAME_ADDR *argv;
a70dc898 398{
c2a0f1cb
ILT
399 if (argc != 2)
400 error ("MIPS frame specifications require two arguments: sp and pc");
401
402 return create_new_frame (argv[0], argv[1]);
a70dc898
RP
403}
404
bd5635a1 405
0f552c5f
JG
406CORE_ADDR
407mips_push_arguments(nargs, args, sp, struct_return, struct_addr)
bd5635a1
RP
408 int nargs;
409 value *args;
410 CORE_ADDR sp;
411 int struct_return;
412 CORE_ADDR struct_addr;
413{
414 CORE_ADDR buf;
415 register i;
416 int accumulate_size = struct_return ? 4 : 0;
417 struct mips_arg { char *contents; int len; int offset; };
418 struct mips_arg *mips_args =
419 (struct mips_arg*)alloca(nargs * sizeof(struct mips_arg));
420 register struct mips_arg *m_arg;
421 for (i = 0, m_arg = mips_args; i < nargs; i++, m_arg++) {
422 extern value value_arg_coerce();
423 value arg = value_arg_coerce (args[i]);
424 m_arg->len = TYPE_LENGTH (VALUE_TYPE (arg));
425 /* This entire mips-specific routine is because doubles must be aligned
426 * on 8-byte boundaries. It still isn't quite right, because MIPS decided
427 * to align 'struct {int a, b}' on 4-byte boundaries (even though this
428 * breaks their varargs implementation...). A correct solution
429 * requires an simulation of gcc's 'alignof' (and use of 'alignof'
430 * in stdarg.h/varargs.h).
431 */
432 if (m_arg->len > 4) accumulate_size = (accumulate_size + 7) & -8;
433 m_arg->offset = accumulate_size;
434 accumulate_size = (accumulate_size + m_arg->len + 3) & -4;
435 m_arg->contents = VALUE_CONTENTS(arg);
436 }
437 accumulate_size = (accumulate_size + 7) & (-8);
438 if (accumulate_size < 16) accumulate_size = 16;
439 sp -= accumulate_size;
440 for (i = nargs; m_arg--, --i >= 0; )
441 write_memory(sp + m_arg->offset, m_arg->contents, m_arg->len);
442 if (struct_return) {
443 buf = struct_addr;
a70dc898
RP
444 write_memory(sp, (char *)&buf, sizeof(CORE_ADDR));
445 }
bd5635a1
RP
446 return sp;
447}
448
449/* MASK(i,j) == (1<<i) + (1<<(i+1)) + ... + (1<<j)). Assume i<=j<31. */
450#define MASK(i,j) ((1 << (j)+1)-1 ^ (1 << (i))-1)
451
452void
453mips_push_dummy_frame()
454{
455 int ireg;
456 struct linked_proc_info *link = (struct linked_proc_info*)
457 xmalloc(sizeof(struct linked_proc_info));
458 mips_extra_func_info_t proc_desc = &link->info;
459 CORE_ADDR sp = read_register (SP_REGNUM);
460 CORE_ADDR save_address;
461 REGISTER_TYPE buffer;
462 link->next = linked_proc_desc_table;
463 linked_proc_desc_table = link;
464#define PUSH_FP_REGNUM 16 /* must be a register preserved across calls */
465#define GEN_REG_SAVE_MASK MASK(1,16)|MASK(24,28)|(1<<31)
466#define GEN_REG_SAVE_COUNT 22
467#define FLOAT_REG_SAVE_MASK MASK(0,19)
468#define FLOAT_REG_SAVE_COUNT 20
469#define SPECIAL_REG_SAVE_COUNT 4
470 /*
471 * The registers we must save are all those not preserved across
472 * procedure calls. Dest_Reg (see tm-mips.h) must also be saved.
473 * In addition, we must save the PC, and PUSH_FP_REGNUM.
474 * (Ideally, we should also save MDLO/-HI and FP Control/Status reg.)
475 *
476 * Dummy frame layout:
477 * (high memory)
478 * Saved PC
479 * Saved MMHI, MMLO, FPC_CSR
480 * Saved R31
481 * Saved R28
482 * ...
483 * Saved R1
484 * Saved D18 (i.e. F19, F18)
485 * ...
486 * Saved D0 (i.e. F1, F0)
c2a0f1cb 487 * CALL_DUMMY (subroutine stub; see tm-mips.h)
bd5635a1
RP
488 * Parameter build area (not yet implemented)
489 * (low memory)
490 */
491 PROC_REG_MASK(proc_desc) = GEN_REG_SAVE_MASK;
c2a0f1cb 492 PROC_FREG_MASK(proc_desc) = mips_fpu ? FLOAT_REG_SAVE_MASK : 0;
bd5635a1
RP
493 PROC_REG_OFFSET(proc_desc) = /* offset of (Saved R31) from FP */
494 -sizeof(long) - 4 * SPECIAL_REG_SAVE_COUNT;
495 PROC_FREG_OFFSET(proc_desc) = /* offset of (Saved D18) from FP */
496 -sizeof(double) - 4 * (SPECIAL_REG_SAVE_COUNT + GEN_REG_SAVE_COUNT);
497 /* save general registers */
498 save_address = sp + PROC_REG_OFFSET(proc_desc);
499 for (ireg = 32; --ireg >= 0; )
500 if (PROC_REG_MASK(proc_desc) & (1 << ireg))
501 {
502 buffer = read_register (ireg);
a70dc898 503 write_memory (save_address, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1
RP
504 save_address -= 4;
505 }
0b0d6c3f
PS
506 /* save floating-points registers starting with high order word */
507 save_address = sp + PROC_FREG_OFFSET(proc_desc) + 4;
bd5635a1
RP
508 for (ireg = 32; --ireg >= 0; )
509 if (PROC_FREG_MASK(proc_desc) & (1 << ireg))
510 {
7d9884b9 511 buffer = read_register (ireg + FP0_REGNUM);
a70dc898 512 write_memory (save_address, (char *)&buffer, 4);
bd5635a1
RP
513 save_address -= 4;
514 }
515 write_register (PUSH_FP_REGNUM, sp);
516 PROC_FRAME_REG(proc_desc) = PUSH_FP_REGNUM;
517 PROC_FRAME_OFFSET(proc_desc) = 0;
518 buffer = read_register (PC_REGNUM);
a70dc898 519 write_memory (sp - 4, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1 520 buffer = read_register (HI_REGNUM);
a70dc898 521 write_memory (sp - 8, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1 522 buffer = read_register (LO_REGNUM);
a70dc898 523 write_memory (sp - 12, (char *)&buffer, sizeof(REGISTER_TYPE));
c2a0f1cb 524 buffer = read_register (mips_fpu ? FCRCS_REGNUM : ZERO_REGNUM);
a70dc898 525 write_memory (sp - 16, (char *)&buffer, sizeof(REGISTER_TYPE));
c2a0f1cb
ILT
526 sp -= 4 * (GEN_REG_SAVE_COUNT
527 + (mips_fpu ? FLOAT_REG_SAVE_COUNT : 0)
528 + SPECIAL_REG_SAVE_COUNT);
bd5635a1
RP
529 write_register (SP_REGNUM, sp);
530 PROC_LOW_ADDR(proc_desc) = sp - CALL_DUMMY_SIZE + CALL_DUMMY_START_OFFSET;
531 PROC_HIGH_ADDR(proc_desc) = sp;
532 SET_PROC_DESC_IS_DUMMY(proc_desc);
533 PROC_PC_REG(proc_desc) = RA_REGNUM;
534}
535
536void
537mips_pop_frame()
dac4929a
SG
538{
539 register int regnum;
bd5635a1
RP
540 FRAME frame = get_current_frame ();
541 CORE_ADDR new_sp = frame->frame;
dac4929a 542
a70dc898 543 mips_extra_func_info_t proc_desc = frame->proc_desc;
dac4929a
SG
544
545 write_register (PC_REGNUM, FRAME_SAVED_PC(frame));
546 if (proc_desc)
547 {
548 for (regnum = 32; --regnum >= 0; )
549 if (PROC_REG_MASK(proc_desc) & (1 << regnum))
550 write_register (regnum,
551 read_memory_integer (frame->saved_regs->regs[regnum],
552 4));
553 for (regnum = 32; --regnum >= 0; )
554 if (PROC_FREG_MASK(proc_desc) & (1 << regnum))
555 write_register (regnum + FP0_REGNUM,
556 read_memory_integer (frame->saved_regs->regs[regnum + FP0_REGNUM], 4));
557 }
558 write_register (SP_REGNUM, new_sp);
559 flush_cached_frames ();
560 /* We let mips_init_extra_frame_info figure out the frame pointer */
561 set_current_frame (create_new_frame (0, read_pc ()));
562
bd5635a1
RP
563 if (PROC_DESC_IS_DUMMY(proc_desc))
564 {
dac4929a
SG
565 struct linked_proc_info *pi_ptr, *prev_ptr;
566
567 for (pi_ptr = linked_proc_desc_table, prev_ptr = NULL;
568 pi_ptr != NULL;
569 prev_ptr = pi_ptr, pi_ptr = pi_ptr->next)
570 {
571 if (&pi_ptr->info == proc_desc)
572 break;
573 }
574
575 if (pi_ptr == NULL)
576 error ("Can't locate dummy extra frame info\n");
577
578 if (prev_ptr != NULL)
579 prev_ptr->next = pi_ptr->next;
580 else
581 linked_proc_desc_table = pi_ptr->next;
582
583 free (pi_ptr);
584
bd5635a1
RP
585 write_register (HI_REGNUM, read_memory_integer(new_sp - 8, 4));
586 write_register (LO_REGNUM, read_memory_integer(new_sp - 12, 4));
c2a0f1cb
ILT
587 if (mips_fpu)
588 write_register (FCRCS_REGNUM, read_memory_integer(new_sp - 16, 4));
bd5635a1 589 }
bd5635a1
RP
590}
591
0f552c5f 592static void
a70dc898 593mips_print_register (regnum, all)
bd5635a1
RP
594 int regnum, all;
595{
a70dc898 596 unsigned char raw_buffer[MAX_REGISTER_RAW_SIZE * 2]; /* *2 for doubles */
bd5635a1
RP
597 REGISTER_TYPE val;
598
5e2e79f8
FF
599 /* Get the data in raw format. */
600 if (read_relative_register_raw_bytes (regnum, raw_buffer))
601 {
602 printf_filtered ("%s: [Invalid]", reg_names[regnum]);
603 return;
604 }
605
d747e0af
MT
606 /* If an even floating pointer register, also print as double. */
607 if (regnum >= FP0_REGNUM && regnum < FP0_REGNUM+32
608 && !((regnum-FP0_REGNUM) & 1)) {
bd5635a1 609 read_relative_register_raw_bytes (regnum+1, raw_buffer+4);
d747e0af 610 printf_filtered ("(d%d: ", regnum-FP0_REGNUM);
bd5635a1
RP
611 val_print (builtin_type_double, raw_buffer, 0,
612 stdout, 0, 1, 0, Val_pretty_default);
d747e0af 613 printf_filtered ("); ");
bd5635a1
RP
614 }
615 fputs_filtered (reg_names[regnum], stdout);
616#ifndef NUMERIC_REG_NAMES
617 if (regnum < 32)
618 printf_filtered ("(r%d): ", regnum);
619 else
620#endif
621 printf_filtered (": ");
622
623 /* If virtual format is floating, print it that way. */
624 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT
625 && ! INVALID_FLOAT (raw_buffer, REGISTER_VIRTUAL_SIZE(regnum))) {
626 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0,
627 stdout, 0, 1, 0, Val_pretty_default);
628 }
629 /* Else print as integer in hex. */
630 else
631 {
632 long val;
633
634 bcopy (raw_buffer, &val, sizeof (long));
5e2e79f8 635 SWAP_TARGET_AND_HOST ((char *)&val, sizeof (long));
bd5635a1
RP
636 if (val == 0)
637 printf_filtered ("0");
638 else if (all)
d8b3b00e 639 printf_filtered (local_hex_format(), val);
bd5635a1 640 else
d8b3b00e 641 printf_filtered ("%s=%d", local_hex_string(val), val);
bd5635a1
RP
642 }
643}
644
d8b3b00e 645/* Replacement for generic do_registers_info. */
0f552c5f 646void
361bf6ee 647mips_do_registers_info (regnum, fpregs)
bd5635a1 648 int regnum;
361bf6ee 649 int fpregs;
bd5635a1
RP
650{
651 if (regnum != -1) {
652 mips_print_register (regnum, 0);
653 printf_filtered ("\n");
654 }
655 else {
656 for (regnum = 0; regnum < NUM_REGS; ) {
d8b3b00e
JG
657 if ((!fpregs) && regnum >= FP0_REGNUM && regnum <= FCRIR_REGNUM) {
658 regnum++;
659 continue;
660 }
bd5635a1
RP
661 mips_print_register (regnum, 1);
662 regnum++;
663 if ((regnum & 3) == 0 || regnum == NUM_REGS)
664 printf_filtered (";\n");
665 else
666 printf_filtered ("; ");
667 }
668 }
669}
670/* Return number of args passed to a frame. described by FIP.
671 Can return -1, meaning no way to tell. */
672
0f552c5f 673int
bd5635a1
RP
674mips_frame_num_args(fip)
675 FRAME fip;
676{
677#if 0
678 struct chain_info_t *p;
679
680 p = mips_find_cached_frame(FRAME_FP(fip));
681 if (p->valid)
682 return p->the_info.numargs;
683#endif
684 return -1;
685}
686
687\f
688/* Bad floats: Returns 0 if P points to a valid IEEE floating point number,
689 1 if P points to a denormalized number or a NaN. LEN says whether this is
690 a single-precision or double-precision float */
691#define SINGLE_EXP_BITS 8
692#define DOUBLE_EXP_BITS 11
693int
694isa_NAN(p, len)
695 int *p, len;
696{
697 int exponent;
698 if (len == 4)
699 {
700 exponent = *p;
701 exponent = exponent << 1 >> (32 - SINGLE_EXP_BITS - 1);
702 return ((exponent == -1) || (! exponent && *p));
703 }
704 else if (len == 8)
705 {
c2a0f1cb
ILT
706#if TARGET_BYTE_ORDER == BIG_ENDIAN
707 exponent = *p;
708#else
bd5635a1 709 exponent = *(p+1);
c2a0f1cb 710#endif
bd5635a1
RP
711 exponent = exponent << 1 >> (32 - DOUBLE_EXP_BITS - 1);
712 return ((exponent == -1) || (! exponent && *p * *(p+1)));
713 }
714 else return 1;
715}
407a8389 716\f
0b0d6c3f
PS
717/* To skip prologues, I use this predicate. Returns either PC
718 itself if the code at PC does not look like a function prologue;
719 otherwise returns an address that (if we're lucky) follows
720 the prologue. */
bd5635a1 721
be772100
JG
722CORE_ADDR
723mips_skip_prologue(pc)
bd5635a1
RP
724 CORE_ADDR pc;
725{
726 struct symbol *f;
727 struct block *b;
728 unsigned long inst;
d747e0af 729 int offset;
0b0d6c3f 730 int seen_sp_adjust = 0;
bd5635a1 731
e157305c
PS
732 /* Skip the typical prologue instructions. These are the stack adjustment
733 instruction and the instructions that save registers on the stack
734 or in the gcc frame. */
d747e0af
MT
735 for (offset = 0; offset < 100; offset += 4) {
736 inst = read_memory_integer(pc + offset, 4);
e157305c 737 if ((inst & 0xffff0000) == 0x27bd0000) /* addiu $sp,$sp,offset */
0b0d6c3f 738 seen_sp_adjust = 1;
e157305c
PS
739 else if ((inst & 0xFFE00000) == 0xAFA00000 && (inst & 0x001F0000))
740 continue; /* sw reg,n($sp) */
741 /* reg != $zero */
742 else if ((inst & 0xFFE00000) == 0xE7A00000) /* swc1 freg,n($sp) */
743 continue;
744 else if ((inst & 0xF3E00000) == 0xA3C00000 && (inst & 0x001F0000))
745 /* sx reg,n($s8) */
746 continue; /* reg != $zero */
747 else if (inst == 0x03A0F021) /* move $s8,$sp */
0b0d6c3f
PS
748 continue;
749 else
e157305c 750 break;
d747e0af 751 }
e157305c
PS
752 return pc + offset;
753
754/* FIXME schauer. The following code seems no longer necessary if we
755 always skip the typical prologue instructions. */
756
757#if 0
0b0d6c3f
PS
758 if (seen_sp_adjust)
759 return pc + offset;
bd5635a1
RP
760
761 /* Well, it looks like a frameless. Let's make sure.
762 Note that we are not called on the current PC,
763 but on the function`s start PC, and I have definitely
764 seen optimized code that adjusts the SP quite later */
765 b = block_for_pc(pc);
766 if (!b) return pc;
767
dac4929a 768 f = lookup_symbol(MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE, 0, NULL);
bd5635a1
RP
769 if (!f) return pc;
770 /* Ideally, I would like to use the adjusted info
771 from mips_frame_info(), but for all practical
772 purposes it will not matter (and it would require
773 a different definition of SKIP_PROLOGUE())
774
775 Actually, it would not hurt to skip the storing
776 of arguments on the stack as well. */
0f552c5f 777 if (((mips_extra_func_info_t)SYMBOL_VALUE(f))->pdr.frameoffset)
bd5635a1
RP
778 return pc + 4;
779
780 return pc;
e157305c 781#endif
bd5635a1 782}
c2a0f1cb
ILT
783
784/* Let the user turn off floating point. */
785
786void
787_initialize_mips_tdep ()
788{
789 add_show_from_set
a8172eea 790 (add_set_cmd ("mipsfpu", class_support, var_boolean,
c2a0f1cb
ILT
791 (char *) &mips_fpu,
792 "Set use of floating point coprocessor.\n\
793Turn off to avoid using floating point instructions when calling functions\n\
794or dealing with return values.", &setlist),
795 &showlist);
796}