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611889b1 1/* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger.
155bd5d1 2
32d0add0 3 Copyright (C) 2003-2015 Free Software Foundation, Inc.
611889b1
KB		 4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
a9762ec7 9 the Free Software Foundation; either version 3 of the License, or
611889b1
KB		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
a9762ec7 18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
611889b1
KB		 19
20#include "defs.h"
21#include "gdbcore.h"
611889b1
KB		 22#include "regcache.h"
23#include "mn10300-tdep.h"
611889b1
KB		 24#include "bfd.h"
25#include "elf-bfd.h"
26#include "osabi.h"
27#include "regset.h"
696cc4a6 28#include "solib-svr4.h"
f9ec92b6
KB		 29#include "frame.h"
30#include "trad-frame.h"
31#include "tramp-frame.h"
a5ee0f0c 32#include "linux-tdep.h"
611889b1 33
611889b1
KB		 34/* Transliterated from <asm-mn10300/elf.h>... */
35#define MN10300_ELF_NGREG 28
36#define MN10300_ELF_NFPREG 32
37
38typedef gdb_byte mn10300_elf_greg_t[4];
39typedef mn10300_elf_greg_t mn10300_elf_gregset_t[MN10300_ELF_NGREG];
40
41typedef gdb_byte mn10300_elf_fpreg_t[4];
42typedef struct
43{
44 mn10300_elf_fpreg_t fpregs[MN10300_ELF_NFPREG];
45 gdb_byte fpcr[4];
46} mn10300_elf_fpregset_t;
47
48/* elf_gregset_t register indices stolen from include/asm-mn10300/ptrace.h. */
49#define MN10300_ELF_GREGSET_T_REG_INDEX_A3 0
50#define MN10300_ELF_GREGSET_T_REG_INDEX_A2 1
51#define MN10300_ELF_GREGSET_T_REG_INDEX_D3 2
52#define MN10300_ELF_GREGSET_T_REG_INDEX_D2 3
53#define MN10300_ELF_GREGSET_T_REG_INDEX_MCVF 4
54#define MN10300_ELF_GREGSET_T_REG_INDEX_MCRL 5
55#define MN10300_ELF_GREGSET_T_REG_INDEX_MCRH 6
56#define MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ 7
57#define MN10300_ELF_GREGSET_T_REG_INDEX_E1 8
58#define MN10300_ELF_GREGSET_T_REG_INDEX_E0 9
59#define MN10300_ELF_GREGSET_T_REG_INDEX_E7 10
60#define MN10300_ELF_GREGSET_T_REG_INDEX_E6 11
61#define MN10300_ELF_GREGSET_T_REG_INDEX_E5 12
62#define MN10300_ELF_GREGSET_T_REG_INDEX_E4 13
63#define MN10300_ELF_GREGSET_T_REG_INDEX_E3 14
64#define MN10300_ELF_GREGSET_T_REG_INDEX_E2 15
65#define MN10300_ELF_GREGSET_T_REG_INDEX_SP 16
66#define MN10300_ELF_GREGSET_T_REG_INDEX_LAR 17
67#define MN10300_ELF_GREGSET_T_REG_INDEX_LIR 18
68#define MN10300_ELF_GREGSET_T_REG_INDEX_MDR 19
69#define MN10300_ELF_GREGSET_T_REG_INDEX_A1 20
70#define MN10300_ELF_GREGSET_T_REG_INDEX_A0 21
71#define MN10300_ELF_GREGSET_T_REG_INDEX_D1 22
72#define MN10300_ELF_GREGSET_T_REG_INDEX_D0 23
73#define MN10300_ELF_GREGSET_T_REG_INDEX_ORIG_D0 24
74#define MN10300_ELF_GREGSET_T_REG_INDEX_EPSW 25
75#define MN10300_ELF_GREGSET_T_REG_INDEX_PC 26
76
77/* New gdbarch API for corefile registers.
78 Given a section name and size, create a struct reg object
79 with a supply_register and a collect_register method. */
80
025bb325 81/* Copy register value of REGNUM from regset to regcache.
611889b1
KB		 82 If REGNUM is -1, do this for all gp registers in regset. */
83
84static void
85am33_supply_gregset_method (const struct regset *regset,
86 struct regcache *regcache,
87 int regnum, const void *gregs, size_t len)
88{
89 char zerobuf[MAX_REGISTER_SIZE];
90 const mn10300_elf_greg_t *regp = (const mn10300_elf_greg_t *) gregs;
91 int i;
92
93 gdb_assert (len == sizeof (mn10300_elf_gregset_t));
94
95 switch (regnum) {
96 case E_D0_REGNUM:
97 regcache_raw_supply (regcache, E_D0_REGNUM,
98 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D0));
99 break;
100 case E_D1_REGNUM:
101 regcache_raw_supply (regcache, E_D1_REGNUM,
102 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D1));
103 break;
104 case E_D2_REGNUM:
105 regcache_raw_supply (regcache, E_D2_REGNUM,
106 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D2));
107 break;
108 case E_D3_REGNUM:
109 regcache_raw_supply (regcache, E_D3_REGNUM,
110 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D3));
111 break;
112 case E_A0_REGNUM:
113 regcache_raw_supply (regcache, E_A0_REGNUM,
114 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A0));
115 break;
116 case E_A1_REGNUM:
117 regcache_raw_supply (regcache, E_A1_REGNUM,
118 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A1));
119 break;
120 case E_A2_REGNUM:
121 regcache_raw_supply (regcache, E_A2_REGNUM,
122 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A2));
123 break;
124 case E_A3_REGNUM:
125 regcache_raw_supply (regcache, E_A3_REGNUM,
126 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A3));
127 break;
128 case E_SP_REGNUM:
129 regcache_raw_supply (regcache, E_SP_REGNUM,
130 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_SP));
131 break;
132 case E_PC_REGNUM:
133 regcache_raw_supply (regcache, E_PC_REGNUM,
134 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_PC));
135 break;
136 case E_MDR_REGNUM:
137 regcache_raw_supply (regcache, E_MDR_REGNUM,
138 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDR));
139 break;
140 case E_PSW_REGNUM:
141 regcache_raw_supply (regcache, E_PSW_REGNUM,
142 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_EPSW));
143 break;
144 case E_LIR_REGNUM:
145 regcache_raw_supply (regcache, E_LIR_REGNUM,
146 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LIR));
147 break;
148 case E_LAR_REGNUM:
149 regcache_raw_supply (regcache, E_LAR_REGNUM,
150 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LAR));
151 break;
152 case E_MDRQ_REGNUM:
153 regcache_raw_supply (regcache, E_MDRQ_REGNUM,
154 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ));
155 break;
156 case E_E0_REGNUM:
157 regcache_raw_supply (regcache, E_E0_REGNUM,
158 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E0));
159 break;
160 case E_E1_REGNUM:
161 regcache_raw_supply (regcache, E_E1_REGNUM,
162 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E1));
163 break;
164 case E_E2_REGNUM:
165 regcache_raw_supply (regcache, E_E2_REGNUM,
166 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E2));
167 break;
168 case E_E3_REGNUM:
169 regcache_raw_supply (regcache, E_E3_REGNUM,
170 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E3));
171 break;
172 case E_E4_REGNUM:
173 regcache_raw_supply (regcache, E_E4_REGNUM,
174 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E4));
175 break;
176 case E_E5_REGNUM:
177 regcache_raw_supply (regcache, E_E5_REGNUM,
178 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E5));
179 break;
180 case E_E6_REGNUM:
181 regcache_raw_supply (regcache, E_E6_REGNUM,
182 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E6));
183 break;
184 case E_E7_REGNUM:
185 regcache_raw_supply (regcache, E_E7_REGNUM,
186 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E7));
187 break;
188
189 /* ssp, msp, and usp are inaccessible. */
190 case E_E8_REGNUM:
191 memset (zerobuf, 0, MAX_REGISTER_SIZE);
192 regcache_raw_supply (regcache, E_E8_REGNUM, zerobuf);
193 break;
194 case E_E9_REGNUM:
195 memset (zerobuf, 0, MAX_REGISTER_SIZE);
196 regcache_raw_supply (regcache, E_E9_REGNUM, zerobuf);
197 break;
198 case E_E10_REGNUM:
199 memset (zerobuf, 0, MAX_REGISTER_SIZE);
200 regcache_raw_supply (regcache, E_E10_REGNUM, zerobuf);
201
202 break;
203 case E_MCRH_REGNUM:
204 regcache_raw_supply (regcache, E_MCRH_REGNUM,
205 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRH));
206 break;
207 case E_MCRL_REGNUM:
208 regcache_raw_supply (regcache, E_MCRL_REGNUM,
209 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRL));
210 break;
211 case E_MCVF_REGNUM:
212 regcache_raw_supply (regcache, E_MCVF_REGNUM,
213 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCVF));
214 break;
215 case E_FPCR_REGNUM:
216 /* FPCR is numbered among the GP regs, but handled as an FP reg.
217 Do nothing. */
218 break;
219 case E_FPCR_REGNUM + 1:
220 /* The two unused registers beyond fpcr are inaccessible. */
221 memset (zerobuf, 0, MAX_REGISTER_SIZE);
222 regcache_raw_supply (regcache, E_FPCR_REGNUM + 1, zerobuf);
223 break;
224 case E_FPCR_REGNUM + 2:
225 memset (zerobuf, 0, MAX_REGISTER_SIZE);
226 regcache_raw_supply (regcache, E_FPCR_REGNUM + 2, zerobuf);
227 break;
228 default: /* An error, obviously, but should we error out? */
229 break;
230 case -1:
231 for (i = 0; i < MN10300_ELF_NGREG; i++)
232 am33_supply_gregset_method (regset, regcache, i, gregs, len);
233 break;
234 }
235 return;
236}
237
025bb325
MS		 238/* Copy fp register value of REGNUM from regset to regcache.
239 If REGNUM is -1, do this for all fp registers in regset. */
611889b1
KB		 240
241static void
242am33_supply_fpregset_method (const struct regset *regset,
243 struct regcache *regcache,
244 int regnum, const void *fpregs, size_t len)
245{
246 const mn10300_elf_fpregset_t *fpregset = fpregs;
247
248 gdb_assert (len == sizeof (mn10300_elf_fpregset_t));
249
250 if (regnum == -1)
251 {
252 int i;
253
254 for (i = 0; i < MN10300_ELF_NFPREG; i++)
255 am33_supply_fpregset_method (regset, regcache,
256 E_FS0_REGNUM + i, fpregs, len);
257 am33_supply_fpregset_method (regset, regcache,
258 E_FPCR_REGNUM, fpregs, len);
259 }
260 else if (regnum == E_FPCR_REGNUM)
9c9acae0 261 regcache_raw_supply (regcache, E_FPCR_REGNUM,
611889b1 262 &fpregset->fpcr);
025bb325
MS		 263 else if (E_FS0_REGNUM <= regnum
264 && regnum < E_FS0_REGNUM + MN10300_ELF_NFPREG)
9c9acae0 265 regcache_raw_supply (regcache, regnum,
611889b1
KB		 266 &fpregset->fpregs[regnum - E_FS0_REGNUM]);
267
268 return;
269}
270
271/* Copy register values from regcache to regset. */
272
273static void
274am33_collect_gregset_method (const struct regset *regset,
275 const struct regcache *regcache,
276 int regnum, void *gregs, size_t len)
277{
278 mn10300_elf_gregset_t *regp = gregs;
279 int i;
280
281 gdb_assert (len == sizeof (mn10300_elf_gregset_t));
282
283 switch (regnum) {
284 case E_D0_REGNUM:
285 regcache_raw_collect (regcache, E_D0_REGNUM,
286 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D0));
287 break;
288 case E_D1_REGNUM:
289 regcache_raw_collect (regcache, E_D1_REGNUM,
290 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D1));
291 break;
292 case E_D2_REGNUM:
293 regcache_raw_collect (regcache, E_D2_REGNUM,
294 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D2));
295 break;
296 case E_D3_REGNUM:
297 regcache_raw_collect (regcache, E_D3_REGNUM,
298 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D3));
299 break;
300 case E_A0_REGNUM:
301 regcache_raw_collect (regcache, E_A0_REGNUM,
302 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A0));
303 break;
304 case E_A1_REGNUM:
305 regcache_raw_collect (regcache, E_A1_REGNUM,
306 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A1));
307 break;
308 case E_A2_REGNUM:
309 regcache_raw_collect (regcache, E_A2_REGNUM,
310 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A2));
311 break;
312 case E_A3_REGNUM:
313 regcache_raw_collect (regcache, E_A3_REGNUM,
314 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A3));
315 break;
316 case E_SP_REGNUM:
317 regcache_raw_collect (regcache, E_SP_REGNUM,
318 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_SP));
319 break;
320 case E_PC_REGNUM:
321 regcache_raw_collect (regcache, E_PC_REGNUM,
322 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_PC));
323 break;
324 case E_MDR_REGNUM:
325 regcache_raw_collect (regcache, E_MDR_REGNUM,
326 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDR));
327 break;
328 case E_PSW_REGNUM:
329 regcache_raw_collect (regcache, E_PSW_REGNUM,
330 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_EPSW));
331 break;
332 case E_LIR_REGNUM:
333 regcache_raw_collect (regcache, E_LIR_REGNUM,
334 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LIR));
335 break;
336 case E_LAR_REGNUM:
337 regcache_raw_collect (regcache, E_LAR_REGNUM,
338 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LAR));
339 break;
340 case E_MDRQ_REGNUM:
341 regcache_raw_collect (regcache, E_MDRQ_REGNUM,
342 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ));
343 break;
344 case E_E0_REGNUM:
345 regcache_raw_collect (regcache, E_E0_REGNUM,
346 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E0));
347 break;
348 case E_E1_REGNUM:
349 regcache_raw_collect (regcache, E_E1_REGNUM,
350 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E1));
351 break;
352 case E_E2_REGNUM:
353 regcache_raw_collect (regcache, E_E2_REGNUM,
354 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E2));
355 break;
356 case E_E3_REGNUM:
357 regcache_raw_collect (regcache, E_E3_REGNUM,
358 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E3));
359 break;
360 case E_E4_REGNUM:
361 regcache_raw_collect (regcache, E_E4_REGNUM,
362 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E4));
363 break;
364 case E_E5_REGNUM:
365 regcache_raw_collect (regcache, E_E5_REGNUM,
366 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E5));
367 break;
368 case E_E6_REGNUM:
369 regcache_raw_collect (regcache, E_E6_REGNUM,
370 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E6));
371 break;
372 case E_E7_REGNUM:
373 regcache_raw_collect (regcache, E_E7_REGNUM,
374 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E7));
375 break;
376
377 /* ssp, msp, and usp are inaccessible. */
378 case E_E8_REGNUM:
379 /* The gregset struct has noplace to put this: do nothing. */
380 break;
381 case E_E9_REGNUM:
382 /* The gregset struct has noplace to put this: do nothing. */
383 break;
384 case E_E10_REGNUM:
385 /* The gregset struct has noplace to put this: do nothing. */
386 break;
387 case E_MCRH_REGNUM:
388 regcache_raw_collect (regcache, E_MCRH_REGNUM,
389 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRH));
390 break;
391 case E_MCRL_REGNUM:
392 regcache_raw_collect (regcache, E_MCRL_REGNUM,
393 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRL));
394 break;
395 case E_MCVF_REGNUM:
396 regcache_raw_collect (regcache, E_MCVF_REGNUM,
397 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCVF));
398 break;
399 case E_FPCR_REGNUM:
400 /* FPCR is numbered among the GP regs, but handled as an FP reg.
401 Do nothing. */
402 break;
403 case E_FPCR_REGNUM + 1:
404 /* The gregset struct has noplace to put this: do nothing. */
405 break;
406 case E_FPCR_REGNUM + 2:
407 /* The gregset struct has noplace to put this: do nothing. */
408 break;
409 default: /* An error, obviously, but should we error out? */
410 break;
411 case -1:
412 for (i = 0; i < MN10300_ELF_NGREG; i++)
413 am33_collect_gregset_method (regset, regcache, i, gregs, len);
414 break;
415 }
416 return;
417}
418
419/* Copy fp register values from regcache to regset. */
420
421static void
422am33_collect_fpregset_method (const struct regset *regset,
423 const struct regcache *regcache,
424 int regnum, void *fpregs, size_t len)
425{
426 mn10300_elf_fpregset_t *fpregset = fpregs;
427
428 gdb_assert (len == sizeof (mn10300_elf_fpregset_t));
429
430 if (regnum == -1)
431 {
432 int i;
433 for (i = 0; i < MN10300_ELF_NFPREG; i++)
434 am33_collect_fpregset_method (regset, regcache, E_FS0_REGNUM + i,
435 fpregs, len);
436 am33_collect_fpregset_method (regset, regcache,
437 E_FPCR_REGNUM, fpregs, len);
438 }
439 else if (regnum == E_FPCR_REGNUM)
9c9acae0 440 regcache_raw_collect (regcache, E_FPCR_REGNUM,
611889b1
KB		 441 &fpregset->fpcr);
442 else if (E_FS0_REGNUM <= regnum
443 && regnum < E_FS0_REGNUM + MN10300_ELF_NFPREG)
9c9acae0 444 regcache_raw_collect (regcache, regnum,
611889b1
KB		 445 &fpregset->fpregs[regnum - E_FS0_REGNUM]);
446
447 return;
448}
449
24534243
AA		 450static const struct regset am33_gregset =
451 {
452 NULL, am33_supply_gregset_method, am33_collect_gregset_method
453 };
454
455static const struct regset am33_fpregset =
456 {
457 NULL, am33_supply_fpregset_method, am33_collect_fpregset_method
458 };
459
3636e608 460/* Iterate over core file register note sections. */
611889b1 461
3636e608
AA		 462static void
463am33_iterate_over_regset_sections (struct gdbarch *gdbarch,
464 iterate_over_regset_sections_cb *cb,
465 void *cb_data,
466 const struct regcache *regcache)
611889b1 467{
3636e608
AA		 468 cb (".reg", sizeof (mn10300_elf_gregset_t), &am33_gregset,
469 NULL, cb_data);
470 cb (".reg2", sizeof(mn10300_elf_fpregset_t), &am33_fpregset,
471 NULL, cb_data);
611889b1 472}
f9ec92b6
KB		 473\f
474static void
475am33_linux_sigframe_cache_init (const struct tramp_frame *self,
5366653e 476 struct frame_info *this_frame,
f9ec92b6
KB		 477 struct trad_frame_cache *this_cache,
478 CORE_ADDR func);
479
480static const struct tramp_frame am33_linux_sigframe = {
481 SIGTRAMP_FRAME,
482 1,
483 {
484 /* mov 119,d0 */
485 { 0x2c, -1 },
486 { 0x77, -1 },
487 { 0x00, -1 },
488 /* syscall 0 */
489 { 0xf0, -1 },
490 { 0xe0, -1 },
491 { TRAMP_SENTINEL_INSN, -1 }
492 },
493 am33_linux_sigframe_cache_init
494};
495
496static const struct tramp_frame am33_linux_rt_sigframe = {
497 SIGTRAMP_FRAME,
498 1,
499 {
500 /* mov 173,d0 */
501 { 0x2c, -1 },
502 { 0xad, -1 },
503 { 0x00, -1 },
504 /* syscall 0 */
505 { 0xf0, -1 },
506 { 0xe0, -1 },
507 { TRAMP_SENTINEL_INSN, -1 }
508 },
509 am33_linux_sigframe_cache_init
510};
511
512/* Relevant struct definitions for signal handling...
513
514From arch/mn10300/kernel/sigframe.h:
515
516struct sigframe
517{
518 void (*pretcode)(void);
519 int sig;
e84605cd 520 struct sigcontext *psc;
f9ec92b6
KB		 521 struct sigcontext sc;
522 struct fpucontext fpuctx;
523 unsigned long extramask[_NSIG_WORDS-1];
524 char retcode[8];
525};
526
527struct rt_sigframe
528{
529 void (*pretcode)(void);
530 int sig;
531 struct siginfo *pinfo;
532 void *puc;
533 struct siginfo info;
534 struct ucontext uc;
535 struct fpucontext fpuctx;
536 char retcode[8];
537};
538
539From include/asm-mn10300/ucontext.h:
540
541struct ucontext {
542 unsigned long uc_flags;
543 struct ucontext *uc_link;
544 stack_t uc_stack;
545 struct sigcontext uc_mcontext;
546 sigset_t uc_sigmask;
547};
548
549From include/asm-mn10300/sigcontext.h:
550
551struct fpucontext {
552 unsigned long fs[32];
553 unsigned long fpcr;
554};
555
556struct sigcontext {
557 unsigned long d0;
558 unsigned long d1;
559 unsigned long d2;
560 unsigned long d3;
561 unsigned long a0;
562 unsigned long a1;
563 unsigned long a2;
564 unsigned long a3;
565 unsigned long e0;
566 unsigned long e1;
567 unsigned long e2;
568 unsigned long e3;
569 unsigned long e4;
570 unsigned long e5;
571 unsigned long e6;
572 unsigned long e7;
573 unsigned long lar;
574 unsigned long lir;
575 unsigned long mdr;
576 unsigned long mcvf;
577 unsigned long mcrl;
578 unsigned long mcrh;
579 unsigned long mdrq;
580 unsigned long sp;
581 unsigned long epsw;
582 unsigned long pc;
583 struct fpucontext *fpucontext;
584 unsigned long oldmask;
585}; */
586
587
588#define AM33_SIGCONTEXT_D0 0
589#define AM33_SIGCONTEXT_D1 4
590#define AM33_SIGCONTEXT_D2 8
591#define AM33_SIGCONTEXT_D3 12
592#define AM33_SIGCONTEXT_A0 16
593#define AM33_SIGCONTEXT_A1 20
594#define AM33_SIGCONTEXT_A2 24
595#define AM33_SIGCONTEXT_A3 28
596#define AM33_SIGCONTEXT_E0 32
597#define AM33_SIGCONTEXT_E1 36
598#define AM33_SIGCONTEXT_E2 40
599#define AM33_SIGCONTEXT_E3 44
600#define AM33_SIGCONTEXT_E4 48
601#define AM33_SIGCONTEXT_E5 52
602#define AM33_SIGCONTEXT_E6 56
603#define AM33_SIGCONTEXT_E7 60
604#define AM33_SIGCONTEXT_LAR 64
605#define AM33_SIGCONTEXT_LIR 68
606#define AM33_SIGCONTEXT_MDR 72
607#define AM33_SIGCONTEXT_MCVF 76
608#define AM33_SIGCONTEXT_MCRL 80
609#define AM33_SIGCONTEXT_MCRH 84
610#define AM33_SIGCONTEXT_MDRQ 88
611#define AM33_SIGCONTEXT_SP 92
612#define AM33_SIGCONTEXT_EPSW 96
613#define AM33_SIGCONTEXT_PC 100
614#define AM33_SIGCONTEXT_FPUCONTEXT 104
615
616
617static void
618am33_linux_sigframe_cache_init (const struct tramp_frame *self,
5366653e 619 struct frame_info *this_frame,
f9ec92b6
KB		 620 struct trad_frame_cache *this_cache,
621 CORE_ADDR func)
622{
623 CORE_ADDR sc_base, fpubase;
624 int i;
611889b1 625
5366653e 626 sc_base = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
f9ec92b6
KB		 627 if (self == &am33_linux_sigframe)
628 {
629 sc_base += 8;
5366653e 630 sc_base = get_frame_memory_unsigned (this_frame, sc_base, 4);
f9ec92b6
KB		 631 }
632 else
633 {
634 sc_base += 12;
5366653e 635 sc_base = get_frame_memory_unsigned (this_frame, sc_base, 4);
f9ec92b6
KB		 636 sc_base += 20;
637 }
638
639 trad_frame_set_reg_addr (this_cache, E_D0_REGNUM,
640 sc_base + AM33_SIGCONTEXT_D0);
641 trad_frame_set_reg_addr (this_cache, E_D1_REGNUM,
642 sc_base + AM33_SIGCONTEXT_D1);
643 trad_frame_set_reg_addr (this_cache, E_D2_REGNUM,
644 sc_base + AM33_SIGCONTEXT_D2);
645 trad_frame_set_reg_addr (this_cache, E_D3_REGNUM,
646 sc_base + AM33_SIGCONTEXT_D3);
647
648 trad_frame_set_reg_addr (this_cache, E_A0_REGNUM,
649 sc_base + AM33_SIGCONTEXT_A0);
650 trad_frame_set_reg_addr (this_cache, E_A1_REGNUM,
651 sc_base + AM33_SIGCONTEXT_A1);
652 trad_frame_set_reg_addr (this_cache, E_A2_REGNUM,
653 sc_base + AM33_SIGCONTEXT_A2);
654 trad_frame_set_reg_addr (this_cache, E_A3_REGNUM,
655 sc_base + AM33_SIGCONTEXT_A3);
656
657 trad_frame_set_reg_addr (this_cache, E_E0_REGNUM,
658 sc_base + AM33_SIGCONTEXT_E0);
659 trad_frame_set_reg_addr (this_cache, E_E1_REGNUM,
660 sc_base + AM33_SIGCONTEXT_E1);
661 trad_frame_set_reg_addr (this_cache, E_E2_REGNUM,
662 sc_base + AM33_SIGCONTEXT_E2);
663 trad_frame_set_reg_addr (this_cache, E_E3_REGNUM,
664 sc_base + AM33_SIGCONTEXT_E3);
665 trad_frame_set_reg_addr (this_cache, E_E4_REGNUM,
666 sc_base + AM33_SIGCONTEXT_E4);
667 trad_frame_set_reg_addr (this_cache, E_E5_REGNUM,
668 sc_base + AM33_SIGCONTEXT_E5);
669 trad_frame_set_reg_addr (this_cache, E_E6_REGNUM,
670 sc_base + AM33_SIGCONTEXT_E6);
671 trad_frame_set_reg_addr (this_cache, E_E7_REGNUM,
672 sc_base + AM33_SIGCONTEXT_E7);
673
674 trad_frame_set_reg_addr (this_cache, E_LAR_REGNUM,
675 sc_base + AM33_SIGCONTEXT_LAR);
676 trad_frame_set_reg_addr (this_cache, E_LIR_REGNUM,
677 sc_base + AM33_SIGCONTEXT_LIR);
678 trad_frame_set_reg_addr (this_cache, E_MDR_REGNUM,
679 sc_base + AM33_SIGCONTEXT_MDR);
680 trad_frame_set_reg_addr (this_cache, E_MCVF_REGNUM,
681 sc_base + AM33_SIGCONTEXT_MCVF);
682 trad_frame_set_reg_addr (this_cache, E_MCRL_REGNUM,
683 sc_base + AM33_SIGCONTEXT_MCRL);
684 trad_frame_set_reg_addr (this_cache, E_MDRQ_REGNUM,
685 sc_base + AM33_SIGCONTEXT_MDRQ);
686
687 trad_frame_set_reg_addr (this_cache, E_SP_REGNUM,
688 sc_base + AM33_SIGCONTEXT_SP);
689 trad_frame_set_reg_addr (this_cache, E_PSW_REGNUM,
690 sc_base + AM33_SIGCONTEXT_EPSW);
691 trad_frame_set_reg_addr (this_cache, E_PC_REGNUM,
692 sc_base + AM33_SIGCONTEXT_PC);
693
5366653e 694 fpubase = get_frame_memory_unsigned (this_frame,
025bb325
MS		 695 sc_base + AM33_SIGCONTEXT_FPUCONTEXT,
696 4);
f9ec92b6
KB		 697 if (fpubase)
698 {
699 for (i = 0; i < 32; i++)
700 {
701 trad_frame_set_reg_addr (this_cache, E_FS0_REGNUM + i,
702 fpubase + 4 * i);
703 }
704 trad_frame_set_reg_addr (this_cache, E_FPCR_REGNUM, fpubase + 4 * 32);
705 }
706
707 trad_frame_set_id (this_cache, frame_id_build (sc_base, func));
708}
709\f
155bd5d1 710/* AM33 GNU/Linux osabi has been recognized.
611889b1
KB		 711 Now's our chance to register our corefile handling. */
712
713static void
a5ee0f0c 714am33_linux_init_osabi (struct gdbarch_info info, struct gdbarch *gdbarch)
611889b1 715{
a5ee0f0c
PA		 716 linux_init_abi (info, gdbarch);
717
3636e608
AA		 718 set_gdbarch_iterate_over_regset_sections
719 (gdbarch, am33_iterate_over_regset_sections);
696cc4a6 720 set_solib_svr4_fetch_link_map_offsets
cf1f553f 721 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
f9ec92b6
KB		 722
723 tramp_frame_prepend_unwinder (gdbarch, &am33_linux_sigframe);
724 tramp_frame_prepend_unwinder (gdbarch, &am33_linux_rt_sigframe);
611889b1
KB		 725}
726
63807e1d
PA		 727/* Provide a prototype to silence -Wmissing-prototypes. */
728extern initialize_file_ftype _initialize_mn10300_linux_tdep;
729
611889b1
KB		 730void
731_initialize_mn10300_linux_tdep (void)
732{
733 gdbarch_register_osabi (bfd_arch_mn10300, 0,
734 GDB_OSABI_LINUX, am33_linux_init_osabi);
735}
736
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