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c906108c
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1/* Low level interface to ns532 running mach 3.0.
2 Copyright (C) 1992 Free Software Foundation, Inc.
3
c5aa993b 4 This file is part of GDB.
c906108c 5
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6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
c906108c 10
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11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
c906108c 15
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16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
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20
21#include "defs.h"
22#include "inferior.h"
23
24#include <stdio.h>
25
26#include <mach.h>
27#include <mach/message.h>
28#include <mach/exception.h>
29#include <mach_error.h>
30
31#define private static
c906108c 32\f
c5aa993b 33
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34/* Find offsets to thread states at compile time.
35 * If your compiler does not grok this, calculate offsets
36 * offsets yourself and use them (or get a compatible compiler :-)
37 */
38
39#define REG_N_OFFSET(reg) (int)(&((struct ns532_combined_state *)0)->ts.reg)
40#define REG_F_OFFSET(reg) (int)(&((struct ns532_combined_state *)0)->fs.reg)
41
42/* at reg_offset[i] is the offset to the ns532_combined_state
43 * location where the gdb registers[i] is stored.
44 */
45
c5aa993b 46static int reg_offset[] =
c906108c 47{
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48 REG_N_OFFSET (r0), REG_N_OFFSET (r1), REG_N_OFFSET (r2), REG_N_OFFSET (r3),
49 REG_N_OFFSET (r4), REG_N_OFFSET (r5), REG_N_OFFSET (r6), REG_N_OFFSET (r7),
50 REG_F_OFFSET (l0a), REG_F_OFFSET (l0b), REG_F_OFFSET (l2a), REG_F_OFFSET (l2b),
51 REG_F_OFFSET (l4a), REG_F_OFFSET (l4b), REG_F_OFFSET (l6a), REG_F_OFFSET (l6b),
52REG_N_OFFSET (sp), REG_N_OFFSET (fp), REG_N_OFFSET (pc), REG_N_OFFSET (psr),
53 REG_F_OFFSET (fsr),
54 REG_F_OFFSET (l0a), REG_F_OFFSET (l1a), REG_F_OFFSET (l2a), REG_F_OFFSET (l3a),
55 REG_F_OFFSET (l4a), REG_F_OFFSET (l5a), REG_F_OFFSET (l6a), REG_F_OFFSET (l7a),
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56};
57
58#define REG_ADDRESS(state,regnum) ((char *)(state)+reg_offset[regnum])
59
60/* Fetch COUNT contiguous registers from thread STATE starting from REGNUM
61 * Caller knows that the regs handled in one transaction are of same size.
62 */
63#define FETCH_REGS(state, regnum, count) \
64 memcpy (&registers[REGISTER_BYTE (regnum)], \
65 (char *)state+reg_offset[ regnum ], \
66 count*REGISTER_SIZE)
67
68/* Store COUNT contiguous registers to thread STATE starting from REGNUM */
69#define STORE_REGS(state, regnum, count) \
70 memcpy ((char *)state+reg_offset[ regnum ], \
71 &registers[REGISTER_BYTE (regnum)], \
72 count*REGISTER_SIZE)
73\f
74/*
75 * Fetch inferiors registers for gdb.
76 * REGNO specifies which (as gdb views it) register, -1 for all.
77 */
78
79void
80fetch_inferior_registers (regno)
81 int regno;
82{
83 kern_return_t ret;
84 thread_state_data_t state;
85 unsigned int stateCnt = NS532_COMBINED_STATE_COUNT;
86 int index;
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87
88 if (!MACH_PORT_VALID (current_thread))
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89 error ("fetch inferior registers: Invalid thread");
90
91 if (must_suspend_thread)
92 setup_thread (current_thread, 1);
93
94 ret = thread_get_state (current_thread,
95 NS532_COMBINED_STATE,
96 state,
97 &stateCnt);
98
99 if (ret != KERN_SUCCESS)
100 warning ("fetch_inferior_registers: %s ",
101 mach_error_string (ret));
102#if 0
103 /* It may be more effective to store validate all of them,
104 * since we fetched them all anyway
105 */
106 else if (regno != -1)
c5aa993b 107 supply_register (regno, (char *) state + reg_offset[regno]);
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108#endif
109 else
110 {
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111 for (index = 0; index < NUM_REGS; index++)
112 supply_register (index, (char *) state + reg_offset[index]);
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113 }
114
115 if (must_suspend_thread)
116 setup_thread (current_thread, 0);
117}
118\f
119/* Store our register values back into the inferior.
120 * If REGNO is -1, do this for all registers.
121 * Otherwise, REGNO specifies which register
122 *
123 * On mach3 all registers are always saved in one call.
124 */
125void
126store_inferior_registers (regno)
127 int regno;
128{
129 kern_return_t ret;
130 thread_state_data_t state;
131 unsigned int stateCnt = NS532_COMBINED_STATE_COUNT;
132 register int index;
133
c5aa993b 134 if (!MACH_PORT_VALID (current_thread))
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135 error ("store inferior registers: Invalid thread");
136
137 if (must_suspend_thread)
138 setup_thread (current_thread, 1);
139
140 /* Fetch the state of the current thread */
141 ret = thread_get_state (current_thread,
142 NS532_COMBINED_STATE,
143 state,
144 &stateCnt);
145
c5aa993b 146 if (ret != KERN_SUCCESS)
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147 {
148 warning ("store_inferior_registers (get): %s",
149 mach_error_string (ret));
150 if (must_suspend_thread)
151 setup_thread (current_thread, 0);
152 return;
153 }
154
155 /* move gdb's registers to thread's state
c5aa993b 156
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157 * Since we save all registers anyway, save the ones
158 * that gdb thinks are valid (e.g. ignore the regno
159 * parameter)
160 */
161#if 0
162 if (regno != -1)
163 STORE_REGS (state, regno, 1);
164 else
165#endif
166 {
c5aa993b 167 for (index = 0; index < NUM_REGS; index++)
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168 STORE_REGS (state, index, 1);
169 }
c5aa993b 170
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171 /* Write gdb's current view of register to the thread
172 */
173 ret = thread_set_state (current_thread,
174 NS532_COMBINED_STATE,
175 state,
176 NS532_COMBINED_STATE_COUNT);
c5aa993b 177
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178 if (ret != KERN_SUCCESS)
179 warning ("store_inferior_registers (set): %s",
180 mach_error_string (ret));
181
182 if (must_suspend_thread)
183 setup_thread (current_thread, 0);
184}