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7b112f9c JT |
1 | /* Target-dependent code for PowerPC systems using the SVR4 ABI |
2 | for GDB, the GNU debugger. | |
3 | ||
6aba47ca | 4 | Copyright (C) 2000, 2001, 2002, 2003, 2005, 2007 |
65ada037 | 5 | Free Software Foundation, Inc. |
7b112f9c JT |
6 | |
7 | This file is part of GDB. | |
8 | ||
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 11 | the Free Software Foundation; either version 3 of the License, or |
7b112f9c JT |
12 | (at your option) any later version. |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 20 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
7b112f9c JT |
21 | |
22 | #include "defs.h" | |
23 | #include "gdbcore.h" | |
24 | #include "inferior.h" | |
25 | #include "regcache.h" | |
26 | #include "value.h" | |
bdf64bac | 27 | #include "gdb_string.h" |
8be9034a | 28 | #include "gdb_assert.h" |
7b112f9c | 29 | #include "ppc-tdep.h" |
6066c3de | 30 | #include "target.h" |
0a90bcdd | 31 | #include "objfiles.h" |
7d9b040b | 32 | #include "infcall.h" |
7b112f9c | 33 | |
7b112f9c JT |
34 | /* Pass the arguments in either registers, or in the stack. Using the |
35 | ppc sysv ABI, the first eight words of the argument list (that might | |
36 | be less than eight parameters if some parameters occupy more than one | |
37 | word) are passed in r3..r10 registers. float and double parameters are | |
38 | passed in fpr's, in addition to that. Rest of the parameters if any | |
39 | are passed in user stack. | |
40 | ||
41 | If the function is returning a structure, then the return address is passed | |
42 | in r3, then the first 7 words of the parametes can be passed in registers, | |
43 | starting from r4. */ | |
44 | ||
45 | CORE_ADDR | |
7d9b040b | 46 | ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
77b2b6d4 AC |
47 | struct regcache *regcache, CORE_ADDR bp_addr, |
48 | int nargs, struct value **args, CORE_ADDR sp, | |
49 | int struct_return, CORE_ADDR struct_addr) | |
7b112f9c | 50 | { |
0a613259 | 51 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); |
fb4443d8 | 52 | ULONGEST saved_sp; |
68856ea3 AC |
53 | int argspace = 0; /* 0 is an initial wrong guess. */ |
54 | int write_pass; | |
7b112f9c | 55 | |
3e8c568d UW |
56 | regcache_cooked_read_unsigned (regcache, |
57 | gdbarch_sp_regnum (current_gdbarch), | |
58 | &saved_sp); | |
fb4443d8 | 59 | |
68856ea3 | 60 | /* Go through the argument list twice. |
7b112f9c | 61 | |
68856ea3 AC |
62 | Pass 1: Figure out how much new stack space is required for |
63 | arguments and pushed values. Unlike the PowerOpen ABI, the SysV | |
64 | ABI doesn't reserve any extra space for parameters which are put | |
65 | in registers, but does always push structures and then pass their | |
66 | address. | |
7a41266b | 67 | |
68856ea3 AC |
68 | Pass 2: Replay the same computation but this time also write the |
69 | values out to the target. */ | |
7b112f9c | 70 | |
68856ea3 AC |
71 | for (write_pass = 0; write_pass < 2; write_pass++) |
72 | { | |
73 | int argno; | |
74 | /* Next available floating point register for float and double | |
75 | arguments. */ | |
76 | int freg = 1; | |
77 | /* Next available general register for non-float, non-vector | |
78 | arguments. */ | |
79 | int greg = 3; | |
80 | /* Next available vector register for vector arguments. */ | |
81 | int vreg = 2; | |
82 | /* Arguments start above the "LR save word" and "Back chain". */ | |
83 | int argoffset = 2 * tdep->wordsize; | |
84 | /* Structures start after the arguments. */ | |
85 | int structoffset = argoffset + argspace; | |
86 | ||
87 | /* If the function is returning a `struct', then the first word | |
944fcfab AC |
88 | (which will be passed in r3) is used for struct return |
89 | address. In that case we should advance one word and start | |
90 | from r4 register to copy parameters. */ | |
68856ea3 | 91 | if (struct_return) |
7b112f9c | 92 | { |
68856ea3 AC |
93 | if (write_pass) |
94 | regcache_cooked_write_signed (regcache, | |
95 | tdep->ppc_gp0_regnum + greg, | |
96 | struct_addr); | |
97 | greg++; | |
7b112f9c | 98 | } |
68856ea3 AC |
99 | |
100 | for (argno = 0; argno < nargs; argno++) | |
7b112f9c | 101 | { |
68856ea3 | 102 | struct value *arg = args[argno]; |
df407dfe | 103 | struct type *type = check_typedef (value_type (arg)); |
68856ea3 | 104 | int len = TYPE_LENGTH (type); |
0fd88904 | 105 | const bfd_byte *val = value_contents (arg); |
68856ea3 | 106 | |
55eddb0f DJ |
107 | if (TYPE_CODE (type) == TYPE_CODE_FLT && len <= 8 |
108 | && !tdep->soft_float) | |
7b112f9c | 109 | { |
68856ea3 | 110 | /* Floating point value converted to "double" then |
944fcfab AC |
111 | passed in an FP register, when the registers run out, |
112 | 8 byte aligned stack is used. */ | |
68856ea3 AC |
113 | if (freg <= 8) |
114 | { | |
115 | if (write_pass) | |
116 | { | |
117 | /* Always store the floating point value using | |
944fcfab | 118 | the register's floating-point format. */ |
50fd1280 | 119 | gdb_byte regval[MAX_REGISTER_SIZE]; |
68856ea3 | 120 | struct type *regtype |
366f009f | 121 | = register_type (gdbarch, tdep->ppc_fp0_regnum + freg); |
68856ea3 | 122 | convert_typed_floating (val, type, regval, regtype); |
366f009f JB |
123 | regcache_cooked_write (regcache, |
124 | tdep->ppc_fp0_regnum + freg, | |
68856ea3 AC |
125 | regval); |
126 | } | |
127 | freg++; | |
128 | } | |
7b112f9c JT |
129 | else |
130 | { | |
68856ea3 | 131 | /* SysV ABI converts floats to doubles before |
944fcfab | 132 | writing them to an 8 byte aligned stack location. */ |
68856ea3 AC |
133 | argoffset = align_up (argoffset, 8); |
134 | if (write_pass) | |
135 | { | |
136 | char memval[8]; | |
8da61cc4 DJ |
137 | convert_typed_floating (val, type, memval, |
138 | builtin_type_ieee_double); | |
68856ea3 AC |
139 | write_memory (sp + argoffset, val, len); |
140 | } | |
141 | argoffset += 8; | |
7b112f9c JT |
142 | } |
143 | } | |
55eddb0f DJ |
144 | else if (len == 8 |
145 | && (TYPE_CODE (type) == TYPE_CODE_INT /* long long */ | |
146 | || TYPE_CODE (type) == TYPE_CODE_FLT)) /* double */ | |
7b112f9c | 147 | { |
55eddb0f | 148 | /* "long long" or soft-float "double" passed in an odd/even |
944fcfab AC |
149 | register pair with the low addressed word in the odd |
150 | register and the high addressed word in the even | |
151 | register, or when the registers run out an 8 byte | |
152 | aligned stack location. */ | |
68856ea3 AC |
153 | if (greg > 9) |
154 | { | |
155 | /* Just in case GREG was 10. */ | |
156 | greg = 11; | |
157 | argoffset = align_up (argoffset, 8); | |
158 | if (write_pass) | |
159 | write_memory (sp + argoffset, val, len); | |
160 | argoffset += 8; | |
161 | } | |
162 | else if (tdep->wordsize == 8) | |
163 | { | |
164 | if (write_pass) | |
165 | regcache_cooked_write (regcache, | |
944fcfab | 166 | tdep->ppc_gp0_regnum + greg, val); |
68856ea3 AC |
167 | greg += 1; |
168 | } | |
169 | else | |
170 | { | |
171 | /* Must start on an odd register - r3/r4 etc. */ | |
172 | if ((greg & 1) == 0) | |
173 | greg++; | |
174 | if (write_pass) | |
175 | { | |
176 | regcache_cooked_write (regcache, | |
177 | tdep->ppc_gp0_regnum + greg + 0, | |
178 | val + 0); | |
179 | regcache_cooked_write (regcache, | |
180 | tdep->ppc_gp0_regnum + greg + 1, | |
181 | val + 4); | |
182 | } | |
183 | greg += 2; | |
184 | } | |
7b112f9c | 185 | } |
68856ea3 AC |
186 | else if (len == 16 |
187 | && TYPE_CODE (type) == TYPE_CODE_ARRAY | |
55eddb0f DJ |
188 | && TYPE_VECTOR (type) |
189 | && tdep->vector_abi == POWERPC_VEC_ALTIVEC) | |
7b112f9c | 190 | { |
68856ea3 | 191 | /* Vector parameter passed in an Altivec register, or |
944fcfab | 192 | when that runs out, 16 byte aligned stack location. */ |
7b112f9c JT |
193 | if (vreg <= 13) |
194 | { | |
68856ea3 | 195 | if (write_pass) |
9c9acae0 | 196 | regcache_cooked_write (regcache, |
944fcfab | 197 | tdep->ppc_vr0_regnum + vreg, val); |
7b112f9c JT |
198 | vreg++; |
199 | } | |
200 | else | |
201 | { | |
68856ea3 AC |
202 | argoffset = align_up (argoffset, 16); |
203 | if (write_pass) | |
204 | write_memory (sp + argoffset, val, 16); | |
7b112f9c JT |
205 | argoffset += 16; |
206 | } | |
207 | } | |
944fcfab | 208 | else if (len == 8 |
0a613259 | 209 | && TYPE_CODE (type) == TYPE_CODE_ARRAY |
55eddb0f DJ |
210 | && TYPE_VECTOR (type) |
211 | && tdep->vector_abi == POWERPC_VEC_SPE) | |
944fcfab | 212 | { |
68856ea3 | 213 | /* Vector parameter passed in an e500 register, or when |
944fcfab AC |
214 | that runs out, 8 byte aligned stack location. Note |
215 | that since e500 vector and general purpose registers | |
216 | both map onto the same underlying register set, a | |
217 | "greg" and not a "vreg" is consumed here. A cooked | |
218 | write stores the value in the correct locations | |
219 | within the raw register cache. */ | |
220 | if (greg <= 10) | |
221 | { | |
68856ea3 | 222 | if (write_pass) |
9c9acae0 | 223 | regcache_cooked_write (regcache, |
944fcfab AC |
224 | tdep->ppc_ev0_regnum + greg, val); |
225 | greg++; | |
226 | } | |
227 | else | |
228 | { | |
68856ea3 AC |
229 | argoffset = align_up (argoffset, 8); |
230 | if (write_pass) | |
231 | write_memory (sp + argoffset, val, 8); | |
944fcfab AC |
232 | argoffset += 8; |
233 | } | |
234 | } | |
68856ea3 AC |
235 | else |
236 | { | |
237 | /* Reduce the parameter down to something that fits in a | |
944fcfab | 238 | "word". */ |
50fd1280 | 239 | gdb_byte word[MAX_REGISTER_SIZE]; |
68856ea3 AC |
240 | memset (word, 0, MAX_REGISTER_SIZE); |
241 | if (len > tdep->wordsize | |
242 | || TYPE_CODE (type) == TYPE_CODE_STRUCT | |
243 | || TYPE_CODE (type) == TYPE_CODE_UNION) | |
244 | { | |
55eddb0f DJ |
245 | /* Structs and large values are put in an |
246 | aligned stack slot ... */ | |
247 | if (TYPE_CODE (type) == TYPE_CODE_ARRAY | |
248 | && TYPE_VECTOR (type) | |
249 | && len >= 16) | |
250 | structoffset = align_up (structoffset, 16); | |
251 | else | |
252 | structoffset = align_up (structoffset, 8); | |
253 | ||
68856ea3 AC |
254 | if (write_pass) |
255 | write_memory (sp + structoffset, val, len); | |
256 | /* ... and then a "word" pointing to that address is | |
944fcfab | 257 | passed as the parameter. */ |
68856ea3 AC |
258 | store_unsigned_integer (word, tdep->wordsize, |
259 | sp + structoffset); | |
260 | structoffset += len; | |
261 | } | |
262 | else if (TYPE_CODE (type) == TYPE_CODE_INT) | |
263 | /* Sign or zero extend the "int" into a "word". */ | |
264 | store_unsigned_integer (word, tdep->wordsize, | |
265 | unpack_long (type, val)); | |
266 | else | |
267 | /* Always goes in the low address. */ | |
268 | memcpy (word, val, len); | |
269 | /* Store that "word" in a register, or on the stack. | |
944fcfab | 270 | The words have "4" byte alignment. */ |
68856ea3 AC |
271 | if (greg <= 10) |
272 | { | |
273 | if (write_pass) | |
274 | regcache_cooked_write (regcache, | |
944fcfab | 275 | tdep->ppc_gp0_regnum + greg, word); |
68856ea3 AC |
276 | greg++; |
277 | } | |
278 | else | |
279 | { | |
280 | argoffset = align_up (argoffset, tdep->wordsize); | |
281 | if (write_pass) | |
282 | write_memory (sp + argoffset, word, tdep->wordsize); | |
283 | argoffset += tdep->wordsize; | |
284 | } | |
285 | } | |
286 | } | |
287 | ||
288 | /* Compute the actual stack space requirements. */ | |
289 | if (!write_pass) | |
290 | { | |
291 | /* Remember the amount of space needed by the arguments. */ | |
292 | argspace = argoffset; | |
293 | /* Allocate space for both the arguments and the structures. */ | |
294 | sp -= (argoffset + structoffset); | |
295 | /* Ensure that the stack is still 16 byte aligned. */ | |
296 | sp = align_down (sp, 16); | |
297 | } | |
65ada037 MK |
298 | |
299 | /* The psABI says that "A caller of a function that takes a | |
300 | variable argument list shall set condition register bit 6 to | |
301 | 1 if it passes one or more arguments in the floating-point | |
302 | registers. It is strongly recommended that the caller set the | |
303 | bit to 0 otherwise..." Doing this for normal functions too | |
304 | shouldn't hurt. */ | |
305 | if (write_pass) | |
306 | { | |
307 | ULONGEST cr; | |
308 | ||
309 | regcache_cooked_read_unsigned (regcache, tdep->ppc_cr_regnum, &cr); | |
310 | if (freg > 1) | |
311 | cr |= 0x02000000; | |
312 | else | |
313 | cr &= ~0x02000000; | |
314 | regcache_cooked_write_unsigned (regcache, tdep->ppc_cr_regnum, cr); | |
315 | } | |
7b112f9c JT |
316 | } |
317 | ||
68856ea3 | 318 | /* Update %sp. */ |
3e8c568d UW |
319 | regcache_cooked_write_signed (regcache, |
320 | gdbarch_sp_regnum (current_gdbarch), sp); | |
68856ea3 AC |
321 | |
322 | /* Write the backchain (it occupies WORDSIZED bytes). */ | |
323 | write_memory_signed_integer (sp, tdep->wordsize, saved_sp); | |
324 | ||
e56a0ecc AC |
325 | /* Point the inferior function call's return address at the dummy's |
326 | breakpoint. */ | |
68856ea3 | 327 | regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr); |
e56a0ecc | 328 | |
7b112f9c JT |
329 | return sp; |
330 | } | |
331 | ||
e754ae69 AC |
332 | /* Handle the return-value conventions specified by the SysV 32-bit |
333 | PowerPC ABI (including all the supplements): | |
334 | ||
335 | no floating-point: floating-point values returned using 32-bit | |
336 | general-purpose registers. | |
337 | ||
338 | Altivec: 128-bit vectors returned using vector registers. | |
339 | ||
340 | e500: 64-bit vectors returned using the full full 64 bit EV | |
341 | register, floating-point values returned using 32-bit | |
342 | general-purpose registers. | |
343 | ||
344 | GCC (broken): Small struct values right (instead of left) aligned | |
345 | when returned in general-purpose registers. */ | |
346 | ||
347 | static enum return_value_convention | |
05580c65 | 348 | do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *type, |
55eddb0f DJ |
349 | struct regcache *regcache, gdb_byte *readbuf, |
350 | const gdb_byte *writebuf, int broken_gcc) | |
e754ae69 | 351 | { |
05580c65 | 352 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
e754ae69 AC |
353 | gdb_assert (tdep->wordsize == 4); |
354 | if (TYPE_CODE (type) == TYPE_CODE_FLT | |
355 | && TYPE_LENGTH (type) <= 8 | |
55eddb0f | 356 | && !tdep->soft_float) |
e754ae69 | 357 | { |
963e2bb7 | 358 | if (readbuf) |
e754ae69 AC |
359 | { |
360 | /* Floats and doubles stored in "f1". Convert the value to | |
361 | the required type. */ | |
50fd1280 | 362 | gdb_byte regval[MAX_REGISTER_SIZE]; |
366f009f JB |
363 | struct type *regtype = register_type (gdbarch, |
364 | tdep->ppc_fp0_regnum + 1); | |
365 | regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval); | |
963e2bb7 | 366 | convert_typed_floating (regval, regtype, readbuf, type); |
e754ae69 | 367 | } |
963e2bb7 | 368 | if (writebuf) |
e754ae69 AC |
369 | { |
370 | /* Floats and doubles stored in "f1". Convert the value to | |
371 | the register's "double" type. */ | |
50fd1280 | 372 | gdb_byte regval[MAX_REGISTER_SIZE]; |
366f009f | 373 | struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum); |
963e2bb7 | 374 | convert_typed_floating (writebuf, type, regval, regtype); |
366f009f | 375 | regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval); |
e754ae69 AC |
376 | } |
377 | return RETURN_VALUE_REGISTER_CONVENTION; | |
378 | } | |
379 | if ((TYPE_CODE (type) == TYPE_CODE_INT && TYPE_LENGTH (type) == 8) | |
380 | || (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8)) | |
381 | { | |
963e2bb7 | 382 | if (readbuf) |
e754ae69 AC |
383 | { |
384 | /* A long long, or a double stored in the 32 bit r3/r4. */ | |
385 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, | |
55eddb0f | 386 | readbuf + 0); |
e754ae69 | 387 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4, |
55eddb0f | 388 | readbuf + 4); |
e754ae69 | 389 | } |
963e2bb7 | 390 | if (writebuf) |
e754ae69 AC |
391 | { |
392 | /* A long long, or a double stored in the 32 bit r3/r4. */ | |
393 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, | |
55eddb0f | 394 | writebuf + 0); |
e754ae69 | 395 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4, |
55eddb0f | 396 | writebuf + 4); |
e754ae69 AC |
397 | } |
398 | return RETURN_VALUE_REGISTER_CONVENTION; | |
399 | } | |
f0027ce2 DJ |
400 | else if ((TYPE_CODE (type) == TYPE_CODE_INT |
401 | || TYPE_CODE (type) == TYPE_CODE_CHAR | |
402 | || TYPE_CODE (type) == TYPE_CODE_BOOL | |
403 | || TYPE_CODE (type) == TYPE_CODE_PTR | |
404 | || TYPE_CODE (type) == TYPE_CODE_REF | |
405 | || TYPE_CODE (type) == TYPE_CODE_ENUM) | |
406 | && TYPE_LENGTH (type) <= tdep->wordsize) | |
e754ae69 | 407 | { |
963e2bb7 | 408 | if (readbuf) |
e754ae69 AC |
409 | { |
410 | /* Some sort of integer stored in r3. Since TYPE isn't | |
411 | bigger than the register, sign extension isn't a problem | |
412 | - just do everything unsigned. */ | |
413 | ULONGEST regval; | |
414 | regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3, | |
415 | ®val); | |
963e2bb7 | 416 | store_unsigned_integer (readbuf, TYPE_LENGTH (type), regval); |
e754ae69 | 417 | } |
963e2bb7 | 418 | if (writebuf) |
e754ae69 AC |
419 | { |
420 | /* Some sort of integer stored in r3. Use unpack_long since | |
421 | that should handle any required sign extension. */ | |
422 | regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3, | |
963e2bb7 | 423 | unpack_long (type, writebuf)); |
e754ae69 AC |
424 | } |
425 | return RETURN_VALUE_REGISTER_CONVENTION; | |
426 | } | |
427 | if (TYPE_LENGTH (type) == 16 | |
428 | && TYPE_CODE (type) == TYPE_CODE_ARRAY | |
55eddb0f DJ |
429 | && TYPE_VECTOR (type) |
430 | && tdep->vector_abi == POWERPC_VEC_ALTIVEC) | |
e754ae69 | 431 | { |
963e2bb7 | 432 | if (readbuf) |
e754ae69 AC |
433 | { |
434 | /* Altivec places the return value in "v2". */ | |
963e2bb7 | 435 | regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf); |
e754ae69 | 436 | } |
963e2bb7 | 437 | if (writebuf) |
e754ae69 AC |
438 | { |
439 | /* Altivec places the return value in "v2". */ | |
963e2bb7 | 440 | regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf); |
e754ae69 AC |
441 | } |
442 | return RETURN_VALUE_REGISTER_CONVENTION; | |
443 | } | |
55eddb0f DJ |
444 | if (TYPE_LENGTH (type) == 16 |
445 | && TYPE_CODE (type) == TYPE_CODE_ARRAY | |
446 | && TYPE_VECTOR (type) | |
447 | && tdep->vector_abi == POWERPC_VEC_GENERIC) | |
448 | { | |
449 | /* GCC -maltivec -mabi=no-altivec returns vectors in r3/r4/r5/r6. | |
450 | GCC without AltiVec returns them in memory, but it warns about | |
451 | ABI risks in that case; we don't try to support it. */ | |
452 | if (readbuf) | |
453 | { | |
454 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, | |
455 | readbuf + 0); | |
456 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4, | |
457 | readbuf + 4); | |
458 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 5, | |
459 | readbuf + 8); | |
460 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 6, | |
461 | readbuf + 12); | |
462 | } | |
463 | if (writebuf) | |
464 | { | |
465 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, | |
466 | writebuf + 0); | |
467 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4, | |
468 | writebuf + 4); | |
469 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 5, | |
470 | writebuf + 8); | |
471 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 6, | |
472 | writebuf + 12); | |
473 | } | |
474 | return RETURN_VALUE_REGISTER_CONVENTION; | |
475 | } | |
e754ae69 AC |
476 | if (TYPE_LENGTH (type) == 8 |
477 | && TYPE_CODE (type) == TYPE_CODE_ARRAY | |
55eddb0f DJ |
478 | && TYPE_VECTOR (type) |
479 | && tdep->vector_abi == POWERPC_VEC_SPE) | |
e754ae69 AC |
480 | { |
481 | /* The e500 ABI places return values for the 64-bit DSP types | |
482 | (__ev64_opaque__) in r3. However, in GDB-speak, ev3 | |
483 | corresponds to the entire r3 value for e500, whereas GDB's r3 | |
484 | only corresponds to the least significant 32-bits. So place | |
485 | the 64-bit DSP type's value in ev3. */ | |
963e2bb7 AC |
486 | if (readbuf) |
487 | regcache_cooked_read (regcache, tdep->ppc_ev0_regnum + 3, readbuf); | |
488 | if (writebuf) | |
489 | regcache_cooked_write (regcache, tdep->ppc_ev0_regnum + 3, writebuf); | |
e754ae69 AC |
490 | return RETURN_VALUE_REGISTER_CONVENTION; |
491 | } | |
492 | if (broken_gcc && TYPE_LENGTH (type) <= 8) | |
493 | { | |
61bf9ae0 MK |
494 | /* GCC screwed up for structures or unions whose size is less |
495 | than or equal to 8 bytes.. Instead of left-aligning, it | |
496 | right-aligns the data into the buffer formed by r3, r4. */ | |
497 | gdb_byte regvals[MAX_REGISTER_SIZE * 2]; | |
498 | int len = TYPE_LENGTH (type); | |
499 | int offset = (2 * tdep->wordsize - len) % tdep->wordsize; | |
500 | ||
963e2bb7 | 501 | if (readbuf) |
e754ae69 | 502 | { |
61bf9ae0 MK |
503 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, |
504 | regvals + 0 * tdep->wordsize); | |
505 | if (len > tdep->wordsize) | |
506 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4, | |
507 | regvals + 1 * tdep->wordsize); | |
508 | memcpy (readbuf, regvals + offset, len); | |
e754ae69 | 509 | } |
963e2bb7 | 510 | if (writebuf) |
e754ae69 | 511 | { |
61bf9ae0 MK |
512 | memset (regvals, 0, sizeof regvals); |
513 | memcpy (regvals + offset, writebuf, len); | |
514 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, | |
515 | regvals + 0 * tdep->wordsize); | |
516 | if (len > tdep->wordsize) | |
517 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4, | |
518 | regvals + 1 * tdep->wordsize); | |
e754ae69 | 519 | } |
61bf9ae0 | 520 | |
e754ae69 AC |
521 | return RETURN_VALUE_REGISTER_CONVENTION; |
522 | } | |
523 | if (TYPE_LENGTH (type) <= 8) | |
524 | { | |
963e2bb7 | 525 | if (readbuf) |
e754ae69 AC |
526 | { |
527 | /* This matches SVr4 PPC, it does not match GCC. */ | |
528 | /* The value is right-padded to 8 bytes and then loaded, as | |
529 | two "words", into r3/r4. */ | |
50fd1280 | 530 | gdb_byte regvals[MAX_REGISTER_SIZE * 2]; |
e754ae69 AC |
531 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, |
532 | regvals + 0 * tdep->wordsize); | |
533 | if (TYPE_LENGTH (type) > tdep->wordsize) | |
534 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4, | |
535 | regvals + 1 * tdep->wordsize); | |
963e2bb7 | 536 | memcpy (readbuf, regvals, TYPE_LENGTH (type)); |
e754ae69 | 537 | } |
963e2bb7 | 538 | if (writebuf) |
e754ae69 AC |
539 | { |
540 | /* This matches SVr4 PPC, it does not match GCC. */ | |
541 | /* The value is padded out to 8 bytes and then loaded, as | |
542 | two "words" into r3/r4. */ | |
50fd1280 | 543 | gdb_byte regvals[MAX_REGISTER_SIZE * 2]; |
e754ae69 | 544 | memset (regvals, 0, sizeof regvals); |
963e2bb7 | 545 | memcpy (regvals, writebuf, TYPE_LENGTH (type)); |
e754ae69 AC |
546 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, |
547 | regvals + 0 * tdep->wordsize); | |
548 | if (TYPE_LENGTH (type) > tdep->wordsize) | |
549 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4, | |
550 | regvals + 1 * tdep->wordsize); | |
551 | } | |
552 | return RETURN_VALUE_REGISTER_CONVENTION; | |
553 | } | |
554 | return RETURN_VALUE_STRUCT_CONVENTION; | |
555 | } | |
556 | ||
05580c65 AC |
557 | enum return_value_convention |
558 | ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype, | |
50fd1280 AC |
559 | struct regcache *regcache, gdb_byte *readbuf, |
560 | const gdb_byte *writebuf) | |
e754ae69 | 561 | { |
963e2bb7 AC |
562 | return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf, |
563 | writebuf, 0); | |
e754ae69 AC |
564 | } |
565 | ||
05580c65 | 566 | enum return_value_convention |
963e2bb7 AC |
567 | ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch, |
568 | struct type *valtype, | |
569 | struct regcache *regcache, | |
50fd1280 | 570 | gdb_byte *readbuf, const gdb_byte *writebuf) |
e754ae69 | 571 | { |
963e2bb7 AC |
572 | return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf, |
573 | writebuf, 1); | |
944fcfab | 574 | } |
afd48b75 | 575 | |
b6e1c027 AC |
576 | /* The helper function for 64-bit SYSV push_dummy_call. Converts the |
577 | function's code address back into the function's descriptor | |
578 | address. | |
579 | ||
580 | Find a value for the TOC register. Every symbol should have both | |
581 | ".FN" and "FN" in the minimal symbol table. "FN" points at the | |
582 | FN's descriptor, while ".FN" points at the entry point (which | |
583 | matches FUNC_ADDR). Need to reverse from FUNC_ADDR back to the | |
584 | FN's descriptor address (while at the same time being careful to | |
585 | find "FN" in the same object file as ".FN"). */ | |
586 | ||
587 | static int | |
588 | convert_code_addr_to_desc_addr (CORE_ADDR code_addr, CORE_ADDR *desc_addr) | |
589 | { | |
590 | struct obj_section *dot_fn_section; | |
591 | struct minimal_symbol *dot_fn; | |
592 | struct minimal_symbol *fn; | |
593 | CORE_ADDR toc; | |
594 | /* Find the minimal symbol that corresponds to CODE_ADDR (should | |
595 | have a name of the form ".FN"). */ | |
596 | dot_fn = lookup_minimal_symbol_by_pc (code_addr); | |
597 | if (dot_fn == NULL || SYMBOL_LINKAGE_NAME (dot_fn)[0] != '.') | |
598 | return 0; | |
599 | /* Get the section that contains CODE_ADDR. Need this for the | |
600 | "objfile" that it contains. */ | |
601 | dot_fn_section = find_pc_section (code_addr); | |
602 | if (dot_fn_section == NULL || dot_fn_section->objfile == NULL) | |
603 | return 0; | |
604 | /* Now find the corresponding "FN" (dropping ".") minimal symbol's | |
605 | address. Only look for the minimal symbol in ".FN"'s object file | |
606 | - avoids problems when two object files (i.e., shared libraries) | |
607 | contain a minimal symbol with the same name. */ | |
608 | fn = lookup_minimal_symbol (SYMBOL_LINKAGE_NAME (dot_fn) + 1, NULL, | |
609 | dot_fn_section->objfile); | |
610 | if (fn == NULL) | |
611 | return 0; | |
612 | /* Found a descriptor. */ | |
613 | (*desc_addr) = SYMBOL_VALUE_ADDRESS (fn); | |
614 | return 1; | |
615 | } | |
616 | ||
8be9034a AC |
617 | /* Pass the arguments in either registers, or in the stack. Using the |
618 | ppc 64 bit SysV ABI. | |
619 | ||
620 | This implements a dumbed down version of the ABI. It always writes | |
621 | values to memory, GPR and FPR, even when not necessary. Doing this | |
622 | greatly simplifies the logic. */ | |
623 | ||
624 | CORE_ADDR | |
7d9b040b | 625 | ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
8be9034a AC |
626 | struct regcache *regcache, CORE_ADDR bp_addr, |
627 | int nargs, struct value **args, CORE_ADDR sp, | |
628 | int struct_return, CORE_ADDR struct_addr) | |
629 | { | |
7d9b040b | 630 | CORE_ADDR func_addr = find_function_addr (function, NULL); |
8be9034a | 631 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); |
fb4443d8 | 632 | ULONGEST back_chain; |
8be9034a AC |
633 | /* See for-loop comment below. */ |
634 | int write_pass; | |
635 | /* Size of the Altivec's vector parameter region, the final value is | |
636 | computed in the for-loop below. */ | |
637 | LONGEST vparam_size = 0; | |
638 | /* Size of the general parameter region, the final value is computed | |
639 | in the for-loop below. */ | |
640 | LONGEST gparam_size = 0; | |
641 | /* Kevin writes ... I don't mind seeing tdep->wordsize used in the | |
642 | calls to align_up(), align_down(), etc. because this makes it | |
643 | easier to reuse this code (in a copy/paste sense) in the future, | |
644 | but it is a 64-bit ABI and asserting that the wordsize is 8 bytes | |
645 | at some point makes it easier to verify that this function is | |
646 | correct without having to do a non-local analysis to figure out | |
647 | the possible values of tdep->wordsize. */ | |
648 | gdb_assert (tdep->wordsize == 8); | |
649 | ||
55eddb0f DJ |
650 | /* This function exists to support a calling convention that |
651 | requires floating-point registers. It shouldn't be used on | |
652 | processors that lack them. */ | |
653 | gdb_assert (ppc_floating_point_unit_p (gdbarch)); | |
654 | ||
fb4443d8 UW |
655 | /* By this stage in the proceedings, SP has been decremented by "red |
656 | zone size" + "struct return size". Fetch the stack-pointer from | |
657 | before this and use that as the BACK_CHAIN. */ | |
3e8c568d UW |
658 | regcache_cooked_read_unsigned (regcache, |
659 | gdbarch_sp_regnum (current_gdbarch), | |
660 | &back_chain); | |
fb4443d8 | 661 | |
8be9034a AC |
662 | /* Go through the argument list twice. |
663 | ||
664 | Pass 1: Compute the function call's stack space and register | |
665 | requirements. | |
666 | ||
667 | Pass 2: Replay the same computation but this time also write the | |
668 | values out to the target. */ | |
669 | ||
670 | for (write_pass = 0; write_pass < 2; write_pass++) | |
671 | { | |
672 | int argno; | |
673 | /* Next available floating point register for float and double | |
674 | arguments. */ | |
675 | int freg = 1; | |
676 | /* Next available general register for non-vector (but possibly | |
677 | float) arguments. */ | |
678 | int greg = 3; | |
679 | /* Next available vector register for vector arguments. */ | |
680 | int vreg = 2; | |
681 | /* The address, at which the next general purpose parameter | |
682 | (integer, struct, float, ...) should be saved. */ | |
683 | CORE_ADDR gparam; | |
684 | /* Address, at which the next Altivec vector parameter should be | |
685 | saved. */ | |
686 | CORE_ADDR vparam; | |
687 | ||
688 | if (!write_pass) | |
689 | { | |
690 | /* During the first pass, GPARAM and VPARAM are more like | |
691 | offsets (start address zero) than addresses. That way | |
692 | the accumulate the total stack space each region | |
693 | requires. */ | |
694 | gparam = 0; | |
695 | vparam = 0; | |
696 | } | |
697 | else | |
698 | { | |
699 | /* Decrement the stack pointer making space for the Altivec | |
700 | and general on-stack parameters. Set vparam and gparam | |
701 | to their corresponding regions. */ | |
702 | vparam = align_down (sp - vparam_size, 16); | |
703 | gparam = align_down (vparam - gparam_size, 16); | |
704 | /* Add in space for the TOC, link editor double word, | |
705 | compiler double word, LR save area, CR save area. */ | |
706 | sp = align_down (gparam - 48, 16); | |
707 | } | |
708 | ||
709 | /* If the function is returning a `struct', then there is an | |
710 | extra hidden parameter (which will be passed in r3) | |
711 | containing the address of that struct.. In that case we | |
712 | should advance one word and start from r4 register to copy | |
713 | parameters. This also consumes one on-stack parameter slot. */ | |
714 | if (struct_return) | |
715 | { | |
716 | if (write_pass) | |
717 | regcache_cooked_write_signed (regcache, | |
718 | tdep->ppc_gp0_regnum + greg, | |
719 | struct_addr); | |
720 | greg++; | |
721 | gparam = align_up (gparam + tdep->wordsize, tdep->wordsize); | |
722 | } | |
723 | ||
724 | for (argno = 0; argno < nargs; argno++) | |
725 | { | |
726 | struct value *arg = args[argno]; | |
df407dfe | 727 | struct type *type = check_typedef (value_type (arg)); |
0fd88904 | 728 | const bfd_byte *val = value_contents (arg); |
8be9034a AC |
729 | if (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) <= 8) |
730 | { | |
731 | /* Floats and Doubles go in f1 .. f13. They also | |
732 | consume a left aligned GREG,, and can end up in | |
733 | memory. */ | |
734 | if (write_pass) | |
735 | { | |
55eddb0f | 736 | if (freg <= 13) |
8be9034a | 737 | { |
50fd1280 | 738 | gdb_byte regval[MAX_REGISTER_SIZE]; |
366f009f JB |
739 | struct type *regtype |
740 | = register_type (gdbarch, tdep->ppc_fp0_regnum); | |
8be9034a | 741 | convert_typed_floating (val, type, regval, regtype); |
366f009f JB |
742 | regcache_cooked_write (regcache, |
743 | tdep->ppc_fp0_regnum + freg, | |
8be9034a AC |
744 | regval); |
745 | } | |
746 | if (greg <= 10) | |
747 | { | |
748 | /* The ABI states "Single precision floating | |
749 | point values are mapped to the first word in | |
750 | a single doubleword" and "... floating point | |
751 | values mapped to the first eight doublewords | |
752 | of the parameter save area are also passed in | |
753 | general registers"). | |
754 | ||
755 | This code interprets that to mean: store it, | |
756 | left aligned, in the general register. */ | |
50fd1280 | 757 | gdb_byte regval[MAX_REGISTER_SIZE]; |
8be9034a AC |
758 | memset (regval, 0, sizeof regval); |
759 | memcpy (regval, val, TYPE_LENGTH (type)); | |
760 | regcache_cooked_write (regcache, | |
761 | tdep->ppc_gp0_regnum + greg, | |
762 | regval); | |
763 | } | |
764 | write_memory (gparam, val, TYPE_LENGTH (type)); | |
765 | } | |
766 | /* Always consume parameter stack space. */ | |
767 | freg++; | |
768 | greg++; | |
769 | gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize); | |
770 | } | |
771 | else if (TYPE_LENGTH (type) == 16 && TYPE_VECTOR (type) | |
772 | && TYPE_CODE (type) == TYPE_CODE_ARRAY | |
773 | && tdep->ppc_vr0_regnum >= 0) | |
774 | { | |
775 | /* In the Altivec ABI, vectors go in the vector | |
776 | registers v2 .. v13, or when that runs out, a vector | |
777 | annex which goes above all the normal parameters. | |
778 | NOTE: cagney/2003-09-21: This is a guess based on the | |
779 | PowerOpen Altivec ABI. */ | |
780 | if (vreg <= 13) | |
781 | { | |
782 | if (write_pass) | |
783 | regcache_cooked_write (regcache, | |
784 | tdep->ppc_vr0_regnum + vreg, val); | |
785 | vreg++; | |
786 | } | |
787 | else | |
788 | { | |
789 | if (write_pass) | |
790 | write_memory (vparam, val, TYPE_LENGTH (type)); | |
791 | vparam = align_up (vparam + TYPE_LENGTH (type), 16); | |
792 | } | |
793 | } | |
794 | else if ((TYPE_CODE (type) == TYPE_CODE_INT | |
b6e1c027 AC |
795 | || TYPE_CODE (type) == TYPE_CODE_ENUM |
796 | || TYPE_CODE (type) == TYPE_CODE_PTR) | |
8be9034a AC |
797 | && TYPE_LENGTH (type) <= 8) |
798 | { | |
b6e1c027 AC |
799 | /* Scalars and Pointers get sign[un]extended and go in |
800 | gpr3 .. gpr10. They can also end up in memory. */ | |
8be9034a AC |
801 | if (write_pass) |
802 | { | |
803 | /* Sign extend the value, then store it unsigned. */ | |
804 | ULONGEST word = unpack_long (type, val); | |
b6e1c027 AC |
805 | /* Convert any function code addresses into |
806 | descriptors. */ | |
807 | if (TYPE_CODE (type) == TYPE_CODE_PTR | |
808 | && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC) | |
809 | { | |
810 | CORE_ADDR desc = word; | |
811 | convert_code_addr_to_desc_addr (word, &desc); | |
812 | word = desc; | |
813 | } | |
8be9034a AC |
814 | if (greg <= 10) |
815 | regcache_cooked_write_unsigned (regcache, | |
816 | tdep->ppc_gp0_regnum + | |
817 | greg, word); | |
818 | write_memory_unsigned_integer (gparam, tdep->wordsize, | |
819 | word); | |
820 | } | |
821 | greg++; | |
822 | gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize); | |
823 | } | |
824 | else | |
825 | { | |
826 | int byte; | |
827 | for (byte = 0; byte < TYPE_LENGTH (type); | |
828 | byte += tdep->wordsize) | |
829 | { | |
830 | if (write_pass && greg <= 10) | |
831 | { | |
50fd1280 | 832 | gdb_byte regval[MAX_REGISTER_SIZE]; |
8be9034a AC |
833 | int len = TYPE_LENGTH (type) - byte; |
834 | if (len > tdep->wordsize) | |
835 | len = tdep->wordsize; | |
836 | memset (regval, 0, sizeof regval); | |
837 | /* WARNING: cagney/2003-09-21: As best I can | |
838 | tell, the ABI specifies that the value should | |
839 | be left aligned. Unfortunately, GCC doesn't | |
840 | do this - it instead right aligns even sized | |
841 | values and puts odd sized values on the | |
842 | stack. Work around that by putting both a | |
843 | left and right aligned value into the | |
844 | register (hopefully no one notices :-^). | |
845 | Arrrgh! */ | |
846 | /* Left aligned (8 byte values such as pointers | |
847 | fill the buffer). */ | |
848 | memcpy (regval, val + byte, len); | |
849 | /* Right aligned (but only if even). */ | |
850 | if (len == 1 || len == 2 || len == 4) | |
851 | memcpy (regval + tdep->wordsize - len, | |
852 | val + byte, len); | |
853 | regcache_cooked_write (regcache, greg, regval); | |
854 | } | |
855 | greg++; | |
856 | } | |
857 | if (write_pass) | |
858 | /* WARNING: cagney/2003-09-21: Strictly speaking, this | |
859 | isn't necessary, unfortunately, GCC appears to get | |
860 | "struct convention" parameter passing wrong putting | |
861 | odd sized structures in memory instead of in a | |
862 | register. Work around this by always writing the | |
863 | value to memory. Fortunately, doing this | |
864 | simplifies the code. */ | |
865 | write_memory (gparam, val, TYPE_LENGTH (type)); | |
b6e1c027 AC |
866 | if (write_pass) |
867 | /* WARNING: cagney/2004-06-20: It appears that GCC | |
868 | likes to put structures containing a single | |
869 | floating-point member in an FP register instead of | |
870 | general general purpose. */ | |
8be9034a AC |
871 | /* Always consume parameter stack space. */ |
872 | gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize); | |
873 | } | |
874 | } | |
875 | ||
876 | if (!write_pass) | |
877 | { | |
878 | /* Save the true region sizes ready for the second pass. */ | |
879 | vparam_size = vparam; | |
880 | /* Make certain that the general parameter save area is at | |
881 | least the minimum 8 registers (or doublewords) in size. */ | |
882 | if (greg < 8) | |
883 | gparam_size = 8 * tdep->wordsize; | |
884 | else | |
885 | gparam_size = gparam; | |
886 | } | |
887 | } | |
888 | ||
889 | /* Update %sp. */ | |
3e8c568d UW |
890 | regcache_cooked_write_signed (regcache, |
891 | gdbarch_sp_regnum (current_gdbarch), sp); | |
8be9034a AC |
892 | |
893 | /* Write the backchain (it occupies WORDSIZED bytes). */ | |
894 | write_memory_signed_integer (sp, tdep->wordsize, back_chain); | |
895 | ||
896 | /* Point the inferior function call's return address at the dummy's | |
897 | breakpoint. */ | |
898 | regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr); | |
899 | ||
b6e1c027 AC |
900 | /* Use the func_addr to find the descriptor, and use that to find |
901 | the TOC. */ | |
8be9034a | 902 | { |
b6e1c027 AC |
903 | CORE_ADDR desc_addr; |
904 | if (convert_code_addr_to_desc_addr (func_addr, &desc_addr)) | |
8be9034a | 905 | { |
b6e1c027 AC |
906 | /* The TOC is the second double word in the descriptor. */ |
907 | CORE_ADDR toc = | |
908 | read_memory_unsigned_integer (desc_addr + tdep->wordsize, | |
909 | tdep->wordsize); | |
910 | regcache_cooked_write_unsigned (regcache, | |
911 | tdep->ppc_gp0_regnum + 2, toc); | |
8be9034a AC |
912 | } |
913 | } | |
914 | ||
915 | return sp; | |
916 | } | |
917 | ||
afd48b75 | 918 | |
55eddb0f | 919 | /* The 64 bit ABI return value convention. |
afd48b75 AC |
920 | |
921 | Return non-zero if the return-value is stored in a register, return | |
922 | 0 if the return-value is instead stored on the stack (a.k.a., | |
923 | struct return convention). | |
924 | ||
963e2bb7 | 925 | For a return-value stored in a register: when WRITEBUF is non-NULL, |
afd48b75 | 926 | copy the buffer to the corresponding register return-value location |
963e2bb7 | 927 | location; when READBUF is non-NULL, fill the buffer from the |
afd48b75 | 928 | corresponding register return-value location. */ |
05580c65 AC |
929 | enum return_value_convention |
930 | ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype, | |
50fd1280 AC |
931 | struct regcache *regcache, gdb_byte *readbuf, |
932 | const gdb_byte *writebuf) | |
afd48b75 | 933 | { |
05580c65 | 934 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
16796152 JB |
935 | |
936 | /* This function exists to support a calling convention that | |
937 | requires floating-point registers. It shouldn't be used on | |
938 | processors that lack them. */ | |
939 | gdb_assert (ppc_floating_point_unit_p (gdbarch)); | |
940 | ||
afd48b75 | 941 | /* Floats and doubles in F1. */ |
944fcfab | 942 | if (TYPE_CODE (valtype) == TYPE_CODE_FLT && TYPE_LENGTH (valtype) <= 8) |
afd48b75 | 943 | { |
50fd1280 | 944 | gdb_byte regval[MAX_REGISTER_SIZE]; |
366f009f | 945 | struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum); |
963e2bb7 | 946 | if (writebuf != NULL) |
afd48b75 | 947 | { |
963e2bb7 | 948 | convert_typed_floating (writebuf, valtype, regval, regtype); |
366f009f | 949 | regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval); |
afd48b75 | 950 | } |
963e2bb7 | 951 | if (readbuf != NULL) |
afd48b75 | 952 | { |
366f009f | 953 | regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval); |
963e2bb7 | 954 | convert_typed_floating (regval, regtype, readbuf, valtype); |
afd48b75 AC |
955 | } |
956 | return RETURN_VALUE_REGISTER_CONVENTION; | |
957 | } | |
3d8476bc | 958 | /* Integers in r3. */ |
b6e1c027 AC |
959 | if ((TYPE_CODE (valtype) == TYPE_CODE_INT |
960 | || TYPE_CODE (valtype) == TYPE_CODE_ENUM) | |
961 | && TYPE_LENGTH (valtype) <= 8) | |
afd48b75 | 962 | { |
963e2bb7 | 963 | if (writebuf != NULL) |
afd48b75 AC |
964 | { |
965 | /* Be careful to sign extend the value. */ | |
966 | regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3, | |
963e2bb7 | 967 | unpack_long (valtype, writebuf)); |
afd48b75 | 968 | } |
963e2bb7 | 969 | if (readbuf != NULL) |
afd48b75 AC |
970 | { |
971 | /* Extract the integer from r3. Since this is truncating the | |
972 | value, there isn't a sign extension problem. */ | |
973 | ULONGEST regval; | |
974 | regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3, | |
975 | ®val); | |
963e2bb7 | 976 | store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), regval); |
afd48b75 AC |
977 | } |
978 | return RETURN_VALUE_REGISTER_CONVENTION; | |
979 | } | |
980 | /* All pointers live in r3. */ | |
981 | if (TYPE_CODE (valtype) == TYPE_CODE_PTR) | |
982 | { | |
983 | /* All pointers live in r3. */ | |
963e2bb7 AC |
984 | if (writebuf != NULL) |
985 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf); | |
986 | if (readbuf != NULL) | |
987 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf); | |
afd48b75 AC |
988 | return RETURN_VALUE_REGISTER_CONVENTION; |
989 | } | |
3d8476bc PG |
990 | /* Array type has more than one use. */ |
991 | if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY) | |
afd48b75 AC |
992 | { |
993 | /* Small character arrays are returned, right justified, in r3. */ | |
3d8476bc PG |
994 | if (TYPE_LENGTH (valtype) <= 8 |
995 | && TYPE_CODE (TYPE_TARGET_TYPE (valtype)) == TYPE_CODE_INT | |
996 | && TYPE_LENGTH (TYPE_TARGET_TYPE (valtype)) == 1) | |
997 | { | |
998 | int offset = (register_size (gdbarch, tdep->ppc_gp0_regnum + 3) | |
999 | - TYPE_LENGTH (valtype)); | |
1000 | if (writebuf != NULL) | |
1001 | regcache_cooked_write_part (regcache, tdep->ppc_gp0_regnum + 3, | |
1002 | offset, TYPE_LENGTH (valtype), writebuf); | |
1003 | if (readbuf != NULL) | |
1004 | regcache_cooked_read_part (regcache, tdep->ppc_gp0_regnum + 3, | |
1005 | offset, TYPE_LENGTH (valtype), readbuf); | |
1006 | return RETURN_VALUE_REGISTER_CONVENTION; | |
1007 | } | |
1008 | /* A VMX vector is returned in v2. */ | |
1009 | if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY | |
1010 | && TYPE_VECTOR (valtype) && tdep->ppc_vr0_regnum >= 0) | |
1011 | { | |
1012 | if (readbuf) | |
1013 | regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf); | |
1014 | if (writebuf) | |
1015 | regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf); | |
1016 | return RETURN_VALUE_REGISTER_CONVENTION; | |
1017 | } | |
afd48b75 AC |
1018 | } |
1019 | /* Big floating point values get stored in adjacent floating | |
3d8476bc | 1020 | point registers, starting with F1. */ |
afd48b75 | 1021 | if (TYPE_CODE (valtype) == TYPE_CODE_FLT |
944fcfab | 1022 | && (TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 32)) |
afd48b75 | 1023 | { |
963e2bb7 | 1024 | if (writebuf || readbuf != NULL) |
afd48b75 AC |
1025 | { |
1026 | int i; | |
1027 | for (i = 0; i < TYPE_LENGTH (valtype) / 8; i++) | |
1028 | { | |
963e2bb7 | 1029 | if (writebuf != NULL) |
366f009f | 1030 | regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i, |
963e2bb7 AC |
1031 | (const bfd_byte *) writebuf + i * 8); |
1032 | if (readbuf != NULL) | |
366f009f | 1033 | regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i, |
963e2bb7 | 1034 | (bfd_byte *) readbuf + i * 8); |
afd48b75 AC |
1035 | } |
1036 | } | |
1037 | return RETURN_VALUE_REGISTER_CONVENTION; | |
1038 | } | |
1039 | /* Complex values get returned in f1:f2, need to convert. */ | |
1040 | if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX | |
1041 | && (TYPE_LENGTH (valtype) == 8 || TYPE_LENGTH (valtype) == 16)) | |
1042 | { | |
1043 | if (regcache != NULL) | |
1044 | { | |
1045 | int i; | |
1046 | for (i = 0; i < 2; i++) | |
1047 | { | |
50fd1280 | 1048 | gdb_byte regval[MAX_REGISTER_SIZE]; |
944fcfab | 1049 | struct type *regtype = |
366f009f | 1050 | register_type (current_gdbarch, tdep->ppc_fp0_regnum); |
963e2bb7 | 1051 | if (writebuf != NULL) |
afd48b75 | 1052 | { |
963e2bb7 | 1053 | convert_typed_floating ((const bfd_byte *) writebuf + |
944fcfab | 1054 | i * (TYPE_LENGTH (valtype) / 2), |
afd48b75 | 1055 | valtype, regval, regtype); |
366f009f JB |
1056 | regcache_cooked_write (regcache, |
1057 | tdep->ppc_fp0_regnum + 1 + i, | |
944fcfab | 1058 | regval); |
afd48b75 | 1059 | } |
963e2bb7 | 1060 | if (readbuf != NULL) |
afd48b75 | 1061 | { |
366f009f JB |
1062 | regcache_cooked_read (regcache, |
1063 | tdep->ppc_fp0_regnum + 1 + i, | |
1064 | regval); | |
afd48b75 | 1065 | convert_typed_floating (regval, regtype, |
963e2bb7 | 1066 | (bfd_byte *) readbuf + |
944fcfab | 1067 | i * (TYPE_LENGTH (valtype) / 2), |
afd48b75 AC |
1068 | valtype); |
1069 | } | |
1070 | } | |
1071 | } | |
1072 | return RETURN_VALUE_REGISTER_CONVENTION; | |
1073 | } | |
1074 | /* Big complex values get stored in f1:f4. */ | |
944fcfab | 1075 | if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX && TYPE_LENGTH (valtype) == 32) |
afd48b75 AC |
1076 | { |
1077 | if (regcache != NULL) | |
1078 | { | |
1079 | int i; | |
1080 | for (i = 0; i < 4; i++) | |
1081 | { | |
963e2bb7 | 1082 | if (writebuf != NULL) |
366f009f | 1083 | regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i, |
963e2bb7 AC |
1084 | (const bfd_byte *) writebuf + i * 8); |
1085 | if (readbuf != NULL) | |
366f009f | 1086 | regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i, |
963e2bb7 | 1087 | (bfd_byte *) readbuf + i * 8); |
afd48b75 AC |
1088 | } |
1089 | } | |
1090 | return RETURN_VALUE_REGISTER_CONVENTION; | |
1091 | } | |
1092 | return RETURN_VALUE_STRUCT_CONVENTION; | |
1093 | } | |
1094 | ||
6066c3de AC |
1095 | CORE_ADDR |
1096 | ppc64_sysv_abi_adjust_breakpoint_address (struct gdbarch *gdbarch, | |
1097 | CORE_ADDR bpaddr) | |
1098 | { | |
1099 | /* PPC64 SYSV specifies that the minimal-symbol "FN" should point at | |
1100 | a function-descriptor while the corresponding minimal-symbol | |
1101 | ".FN" should point at the entry point. Consequently, a command | |
1102 | like "break FN" applied to an object file with only minimal | |
1103 | symbols, will insert the breakpoint into the descriptor at "FN" | |
1104 | and not the function at ".FN". Avoid this confusion by adjusting | |
1105 | any attempt to set a descriptor breakpoint into a corresponding | |
1106 | function breakpoint. Note that GDB warns the user when this | |
1107 | adjustment is applied - that's ok as otherwise the user will have | |
1108 | no way of knowing why their breakpoint at "FN" resulted in the | |
1109 | program stopping at ".FN". */ | |
1110 | return gdbarch_convert_from_func_ptr_addr (gdbarch, bpaddr, ¤t_target); | |
1111 | } |