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7b112f9c
JT
1/* Target-dependent code for PowerPC systems using the SVR4 ABI
2 for GDB, the GNU debugger.
3
6aba47ca 4 Copyright (C) 2000, 2001, 2002, 2003, 2005, 2007
65ada037 5 Free Software Foundation, Inc.
7b112f9c
JT
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
197e01b6
EZ
21 Foundation, Inc., 51 Franklin Street, Fifth Floor,
22 Boston, MA 02110-1301, USA. */
7b112f9c
JT
23
24#include "defs.h"
25#include "gdbcore.h"
26#include "inferior.h"
27#include "regcache.h"
28#include "value.h"
bdf64bac 29#include "gdb_string.h"
8be9034a 30#include "gdb_assert.h"
7b112f9c 31#include "ppc-tdep.h"
6066c3de 32#include "target.h"
0a90bcdd 33#include "objfiles.h"
7d9b040b 34#include "infcall.h"
7b112f9c 35
7b112f9c
JT
36/* Pass the arguments in either registers, or in the stack. Using the
37 ppc sysv ABI, the first eight words of the argument list (that might
38 be less than eight parameters if some parameters occupy more than one
39 word) are passed in r3..r10 registers. float and double parameters are
40 passed in fpr's, in addition to that. Rest of the parameters if any
41 are passed in user stack.
42
43 If the function is returning a structure, then the return address is passed
44 in r3, then the first 7 words of the parametes can be passed in registers,
45 starting from r4. */
46
47CORE_ADDR
7d9b040b 48ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
77b2b6d4
AC
49 struct regcache *regcache, CORE_ADDR bp_addr,
50 int nargs, struct value **args, CORE_ADDR sp,
51 int struct_return, CORE_ADDR struct_addr)
7b112f9c 52{
0a613259 53 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
fb4443d8 54 ULONGEST saved_sp;
68856ea3
AC
55 int argspace = 0; /* 0 is an initial wrong guess. */
56 int write_pass;
7b112f9c 57
3e8c568d
UW
58 regcache_cooked_read_unsigned (regcache,
59 gdbarch_sp_regnum (current_gdbarch),
60 &saved_sp);
fb4443d8 61
68856ea3 62 /* Go through the argument list twice.
7b112f9c 63
68856ea3
AC
64 Pass 1: Figure out how much new stack space is required for
65 arguments and pushed values. Unlike the PowerOpen ABI, the SysV
66 ABI doesn't reserve any extra space for parameters which are put
67 in registers, but does always push structures and then pass their
68 address.
7a41266b 69
68856ea3
AC
70 Pass 2: Replay the same computation but this time also write the
71 values out to the target. */
7b112f9c 72
68856ea3
AC
73 for (write_pass = 0; write_pass < 2; write_pass++)
74 {
75 int argno;
76 /* Next available floating point register for float and double
77 arguments. */
78 int freg = 1;
79 /* Next available general register for non-float, non-vector
80 arguments. */
81 int greg = 3;
82 /* Next available vector register for vector arguments. */
83 int vreg = 2;
84 /* Arguments start above the "LR save word" and "Back chain". */
85 int argoffset = 2 * tdep->wordsize;
86 /* Structures start after the arguments. */
87 int structoffset = argoffset + argspace;
88
89 /* If the function is returning a `struct', then the first word
944fcfab
AC
90 (which will be passed in r3) is used for struct return
91 address. In that case we should advance one word and start
92 from r4 register to copy parameters. */
68856ea3 93 if (struct_return)
7b112f9c 94 {
68856ea3
AC
95 if (write_pass)
96 regcache_cooked_write_signed (regcache,
97 tdep->ppc_gp0_regnum + greg,
98 struct_addr);
99 greg++;
7b112f9c 100 }
68856ea3
AC
101
102 for (argno = 0; argno < nargs; argno++)
7b112f9c 103 {
68856ea3 104 struct value *arg = args[argno];
df407dfe 105 struct type *type = check_typedef (value_type (arg));
68856ea3 106 int len = TYPE_LENGTH (type);
0fd88904 107 const bfd_byte *val = value_contents (arg);
68856ea3
AC
108
109 if (TYPE_CODE (type) == TYPE_CODE_FLT
944fcfab 110 && ppc_floating_point_unit_p (current_gdbarch) && len <= 8)
7b112f9c 111 {
68856ea3 112 /* Floating point value converted to "double" then
944fcfab
AC
113 passed in an FP register, when the registers run out,
114 8 byte aligned stack is used. */
68856ea3
AC
115 if (freg <= 8)
116 {
117 if (write_pass)
118 {
119 /* Always store the floating point value using
944fcfab 120 the register's floating-point format. */
50fd1280 121 gdb_byte regval[MAX_REGISTER_SIZE];
68856ea3 122 struct type *regtype
366f009f 123 = register_type (gdbarch, tdep->ppc_fp0_regnum + freg);
68856ea3 124 convert_typed_floating (val, type, regval, regtype);
366f009f
JB
125 regcache_cooked_write (regcache,
126 tdep->ppc_fp0_regnum + freg,
68856ea3
AC
127 regval);
128 }
129 freg++;
130 }
7b112f9c
JT
131 else
132 {
68856ea3 133 /* SysV ABI converts floats to doubles before
944fcfab 134 writing them to an 8 byte aligned stack location. */
68856ea3
AC
135 argoffset = align_up (argoffset, 8);
136 if (write_pass)
137 {
138 char memval[8];
8da61cc4
DJ
139 convert_typed_floating (val, type, memval,
140 builtin_type_ieee_double);
68856ea3
AC
141 write_memory (sp + argoffset, val, len);
142 }
143 argoffset += 8;
7b112f9c
JT
144 }
145 }
944fcfab
AC
146 else if (len == 8 && (TYPE_CODE (type) == TYPE_CODE_INT /* long long */
147 || (!ppc_floating_point_unit_p (current_gdbarch) && TYPE_CODE (type) == TYPE_CODE_FLT))) /* double */
7b112f9c 148 {
68856ea3 149 /* "long long" or "double" passed in an odd/even
944fcfab
AC
150 register pair with the low addressed word in the odd
151 register and the high addressed word in the even
152 register, or when the registers run out an 8 byte
153 aligned stack location. */
68856ea3
AC
154 if (greg > 9)
155 {
156 /* Just in case GREG was 10. */
157 greg = 11;
158 argoffset = align_up (argoffset, 8);
159 if (write_pass)
160 write_memory (sp + argoffset, val, len);
161 argoffset += 8;
162 }
163 else if (tdep->wordsize == 8)
164 {
165 if (write_pass)
166 regcache_cooked_write (regcache,
944fcfab 167 tdep->ppc_gp0_regnum + greg, val);
68856ea3
AC
168 greg += 1;
169 }
170 else
171 {
172 /* Must start on an odd register - r3/r4 etc. */
173 if ((greg & 1) == 0)
174 greg++;
175 if (write_pass)
176 {
177 regcache_cooked_write (regcache,
178 tdep->ppc_gp0_regnum + greg + 0,
179 val + 0);
180 regcache_cooked_write (regcache,
181 tdep->ppc_gp0_regnum + greg + 1,
182 val + 4);
183 }
184 greg += 2;
185 }
7b112f9c 186 }
68856ea3
AC
187 else if (len == 16
188 && TYPE_CODE (type) == TYPE_CODE_ARRAY
944fcfab 189 && TYPE_VECTOR (type) && tdep->ppc_vr0_regnum >= 0)
7b112f9c 190 {
68856ea3 191 /* Vector parameter passed in an Altivec register, or
944fcfab 192 when that runs out, 16 byte aligned stack location. */
7b112f9c
JT
193 if (vreg <= 13)
194 {
68856ea3 195 if (write_pass)
9c9acae0 196 regcache_cooked_write (regcache,
944fcfab 197 tdep->ppc_vr0_regnum + vreg, val);
7b112f9c
JT
198 vreg++;
199 }
200 else
201 {
68856ea3
AC
202 argoffset = align_up (argoffset, 16);
203 if (write_pass)
204 write_memory (sp + argoffset, val, 16);
7b112f9c
JT
205 argoffset += 16;
206 }
207 }
944fcfab 208 else if (len == 8
0a613259 209 && TYPE_CODE (type) == TYPE_CODE_ARRAY
944fcfab
AC
210 && TYPE_VECTOR (type) && tdep->ppc_ev0_regnum >= 0)
211 {
68856ea3 212 /* Vector parameter passed in an e500 register, or when
944fcfab
AC
213 that runs out, 8 byte aligned stack location. Note
214 that since e500 vector and general purpose registers
215 both map onto the same underlying register set, a
216 "greg" and not a "vreg" is consumed here. A cooked
217 write stores the value in the correct locations
218 within the raw register cache. */
219 if (greg <= 10)
220 {
68856ea3 221 if (write_pass)
9c9acae0 222 regcache_cooked_write (regcache,
944fcfab
AC
223 tdep->ppc_ev0_regnum + greg, val);
224 greg++;
225 }
226 else
227 {
68856ea3
AC
228 argoffset = align_up (argoffset, 8);
229 if (write_pass)
230 write_memory (sp + argoffset, val, 8);
944fcfab
AC
231 argoffset += 8;
232 }
233 }
68856ea3
AC
234 else
235 {
236 /* Reduce the parameter down to something that fits in a
944fcfab 237 "word". */
50fd1280 238 gdb_byte word[MAX_REGISTER_SIZE];
68856ea3
AC
239 memset (word, 0, MAX_REGISTER_SIZE);
240 if (len > tdep->wordsize
241 || TYPE_CODE (type) == TYPE_CODE_STRUCT
242 || TYPE_CODE (type) == TYPE_CODE_UNION)
243 {
244 /* Structs and large values are put on an 8 byte
944fcfab 245 aligned stack ... */
68856ea3
AC
246 structoffset = align_up (structoffset, 8);
247 if (write_pass)
248 write_memory (sp + structoffset, val, len);
249 /* ... and then a "word" pointing to that address is
944fcfab 250 passed as the parameter. */
68856ea3
AC
251 store_unsigned_integer (word, tdep->wordsize,
252 sp + structoffset);
253 structoffset += len;
254 }
255 else if (TYPE_CODE (type) == TYPE_CODE_INT)
256 /* Sign or zero extend the "int" into a "word". */
257 store_unsigned_integer (word, tdep->wordsize,
258 unpack_long (type, val));
259 else
260 /* Always goes in the low address. */
261 memcpy (word, val, len);
262 /* Store that "word" in a register, or on the stack.
944fcfab 263 The words have "4" byte alignment. */
68856ea3
AC
264 if (greg <= 10)
265 {
266 if (write_pass)
267 regcache_cooked_write (regcache,
944fcfab 268 tdep->ppc_gp0_regnum + greg, word);
68856ea3
AC
269 greg++;
270 }
271 else
272 {
273 argoffset = align_up (argoffset, tdep->wordsize);
274 if (write_pass)
275 write_memory (sp + argoffset, word, tdep->wordsize);
276 argoffset += tdep->wordsize;
277 }
278 }
279 }
280
281 /* Compute the actual stack space requirements. */
282 if (!write_pass)
283 {
284 /* Remember the amount of space needed by the arguments. */
285 argspace = argoffset;
286 /* Allocate space for both the arguments and the structures. */
287 sp -= (argoffset + structoffset);
288 /* Ensure that the stack is still 16 byte aligned. */
289 sp = align_down (sp, 16);
290 }
65ada037
MK
291
292 /* The psABI says that "A caller of a function that takes a
293 variable argument list shall set condition register bit 6 to
294 1 if it passes one or more arguments in the floating-point
295 registers. It is strongly recommended that the caller set the
296 bit to 0 otherwise..." Doing this for normal functions too
297 shouldn't hurt. */
298 if (write_pass)
299 {
300 ULONGEST cr;
301
302 regcache_cooked_read_unsigned (regcache, tdep->ppc_cr_regnum, &cr);
303 if (freg > 1)
304 cr |= 0x02000000;
305 else
306 cr &= ~0x02000000;
307 regcache_cooked_write_unsigned (regcache, tdep->ppc_cr_regnum, cr);
308 }
7b112f9c
JT
309 }
310
68856ea3 311 /* Update %sp. */
3e8c568d
UW
312 regcache_cooked_write_signed (regcache,
313 gdbarch_sp_regnum (current_gdbarch), sp);
68856ea3
AC
314
315 /* Write the backchain (it occupies WORDSIZED bytes). */
316 write_memory_signed_integer (sp, tdep->wordsize, saved_sp);
317
e56a0ecc
AC
318 /* Point the inferior function call's return address at the dummy's
319 breakpoint. */
68856ea3 320 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
e56a0ecc 321
7b112f9c
JT
322 return sp;
323}
324
e754ae69
AC
325/* Handle the return-value conventions specified by the SysV 32-bit
326 PowerPC ABI (including all the supplements):
327
328 no floating-point: floating-point values returned using 32-bit
329 general-purpose registers.
330
331 Altivec: 128-bit vectors returned using vector registers.
332
333 e500: 64-bit vectors returned using the full full 64 bit EV
334 register, floating-point values returned using 32-bit
335 general-purpose registers.
336
337 GCC (broken): Small struct values right (instead of left) aligned
338 when returned in general-purpose registers. */
339
340static enum return_value_convention
05580c65 341do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *type,
963e2bb7
AC
342 struct regcache *regcache, void *readbuf,
343 const void *writebuf, int broken_gcc)
e754ae69 344{
05580c65 345 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e754ae69
AC
346 gdb_assert (tdep->wordsize == 4);
347 if (TYPE_CODE (type) == TYPE_CODE_FLT
348 && TYPE_LENGTH (type) <= 8
05580c65 349 && ppc_floating_point_unit_p (gdbarch))
e754ae69 350 {
963e2bb7 351 if (readbuf)
e754ae69
AC
352 {
353 /* Floats and doubles stored in "f1". Convert the value to
354 the required type. */
50fd1280 355 gdb_byte regval[MAX_REGISTER_SIZE];
366f009f
JB
356 struct type *regtype = register_type (gdbarch,
357 tdep->ppc_fp0_regnum + 1);
358 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
963e2bb7 359 convert_typed_floating (regval, regtype, readbuf, type);
e754ae69 360 }
963e2bb7 361 if (writebuf)
e754ae69
AC
362 {
363 /* Floats and doubles stored in "f1". Convert the value to
364 the register's "double" type. */
50fd1280 365 gdb_byte regval[MAX_REGISTER_SIZE];
366f009f 366 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
963e2bb7 367 convert_typed_floating (writebuf, type, regval, regtype);
366f009f 368 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
e754ae69
AC
369 }
370 return RETURN_VALUE_REGISTER_CONVENTION;
371 }
372 if ((TYPE_CODE (type) == TYPE_CODE_INT && TYPE_LENGTH (type) == 8)
373 || (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8))
374 {
963e2bb7 375 if (readbuf)
e754ae69
AC
376 {
377 /* A long long, or a double stored in the 32 bit r3/r4. */
378 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
963e2bb7 379 (bfd_byte *) readbuf + 0);
e754ae69 380 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
963e2bb7 381 (bfd_byte *) readbuf + 4);
e754ae69 382 }
963e2bb7 383 if (writebuf)
e754ae69
AC
384 {
385 /* A long long, or a double stored in the 32 bit r3/r4. */
386 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
963e2bb7 387 (const bfd_byte *) writebuf + 0);
e754ae69 388 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
963e2bb7 389 (const bfd_byte *) writebuf + 4);
e754ae69
AC
390 }
391 return RETURN_VALUE_REGISTER_CONVENTION;
392 }
393 if (TYPE_CODE (type) == TYPE_CODE_INT
394 && TYPE_LENGTH (type) <= tdep->wordsize)
395 {
963e2bb7 396 if (readbuf)
e754ae69
AC
397 {
398 /* Some sort of integer stored in r3. Since TYPE isn't
399 bigger than the register, sign extension isn't a problem
400 - just do everything unsigned. */
401 ULONGEST regval;
402 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
403 &regval);
963e2bb7 404 store_unsigned_integer (readbuf, TYPE_LENGTH (type), regval);
e754ae69 405 }
963e2bb7 406 if (writebuf)
e754ae69
AC
407 {
408 /* Some sort of integer stored in r3. Use unpack_long since
409 that should handle any required sign extension. */
410 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
963e2bb7 411 unpack_long (type, writebuf));
e754ae69
AC
412 }
413 return RETURN_VALUE_REGISTER_CONVENTION;
414 }
415 if (TYPE_LENGTH (type) == 16
416 && TYPE_CODE (type) == TYPE_CODE_ARRAY
417 && TYPE_VECTOR (type) && tdep->ppc_vr0_regnum >= 0)
418 {
963e2bb7 419 if (readbuf)
e754ae69
AC
420 {
421 /* Altivec places the return value in "v2". */
963e2bb7 422 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
e754ae69 423 }
963e2bb7 424 if (writebuf)
e754ae69
AC
425 {
426 /* Altivec places the return value in "v2". */
963e2bb7 427 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
e754ae69
AC
428 }
429 return RETURN_VALUE_REGISTER_CONVENTION;
430 }
431 if (TYPE_LENGTH (type) == 8
432 && TYPE_CODE (type) == TYPE_CODE_ARRAY
433 && TYPE_VECTOR (type) && tdep->ppc_ev0_regnum >= 0)
434 {
435 /* The e500 ABI places return values for the 64-bit DSP types
436 (__ev64_opaque__) in r3. However, in GDB-speak, ev3
437 corresponds to the entire r3 value for e500, whereas GDB's r3
438 only corresponds to the least significant 32-bits. So place
439 the 64-bit DSP type's value in ev3. */
963e2bb7
AC
440 if (readbuf)
441 regcache_cooked_read (regcache, tdep->ppc_ev0_regnum + 3, readbuf);
442 if (writebuf)
443 regcache_cooked_write (regcache, tdep->ppc_ev0_regnum + 3, writebuf);
e754ae69
AC
444 return RETURN_VALUE_REGISTER_CONVENTION;
445 }
446 if (broken_gcc && TYPE_LENGTH (type) <= 8)
447 {
61bf9ae0
MK
448 /* GCC screwed up for structures or unions whose size is less
449 than or equal to 8 bytes.. Instead of left-aligning, it
450 right-aligns the data into the buffer formed by r3, r4. */
451 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
452 int len = TYPE_LENGTH (type);
453 int offset = (2 * tdep->wordsize - len) % tdep->wordsize;
454
963e2bb7 455 if (readbuf)
e754ae69 456 {
61bf9ae0
MK
457 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
458 regvals + 0 * tdep->wordsize);
459 if (len > tdep->wordsize)
460 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
461 regvals + 1 * tdep->wordsize);
462 memcpy (readbuf, regvals + offset, len);
e754ae69 463 }
963e2bb7 464 if (writebuf)
e754ae69 465 {
61bf9ae0
MK
466 memset (regvals, 0, sizeof regvals);
467 memcpy (regvals + offset, writebuf, len);
468 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
469 regvals + 0 * tdep->wordsize);
470 if (len > tdep->wordsize)
471 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
472 regvals + 1 * tdep->wordsize);
e754ae69 473 }
61bf9ae0 474
e754ae69
AC
475 return RETURN_VALUE_REGISTER_CONVENTION;
476 }
477 if (TYPE_LENGTH (type) <= 8)
478 {
963e2bb7 479 if (readbuf)
e754ae69
AC
480 {
481 /* This matches SVr4 PPC, it does not match GCC. */
482 /* The value is right-padded to 8 bytes and then loaded, as
483 two "words", into r3/r4. */
50fd1280 484 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
e754ae69
AC
485 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
486 regvals + 0 * tdep->wordsize);
487 if (TYPE_LENGTH (type) > tdep->wordsize)
488 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
489 regvals + 1 * tdep->wordsize);
963e2bb7 490 memcpy (readbuf, regvals, TYPE_LENGTH (type));
e754ae69 491 }
963e2bb7 492 if (writebuf)
e754ae69
AC
493 {
494 /* This matches SVr4 PPC, it does not match GCC. */
495 /* The value is padded out to 8 bytes and then loaded, as
496 two "words" into r3/r4. */
50fd1280 497 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
e754ae69 498 memset (regvals, 0, sizeof regvals);
963e2bb7 499 memcpy (regvals, writebuf, TYPE_LENGTH (type));
e754ae69
AC
500 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
501 regvals + 0 * tdep->wordsize);
502 if (TYPE_LENGTH (type) > tdep->wordsize)
503 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
504 regvals + 1 * tdep->wordsize);
505 }
506 return RETURN_VALUE_REGISTER_CONVENTION;
507 }
508 return RETURN_VALUE_STRUCT_CONVENTION;
509}
510
05580c65
AC
511enum return_value_convention
512ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype,
50fd1280
AC
513 struct regcache *regcache, gdb_byte *readbuf,
514 const gdb_byte *writebuf)
e754ae69 515{
963e2bb7
AC
516 return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf,
517 writebuf, 0);
e754ae69
AC
518}
519
05580c65 520enum return_value_convention
963e2bb7
AC
521ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch,
522 struct type *valtype,
523 struct regcache *regcache,
50fd1280 524 gdb_byte *readbuf, const gdb_byte *writebuf)
e754ae69 525{
963e2bb7
AC
526 return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf,
527 writebuf, 1);
944fcfab 528}
afd48b75 529
b6e1c027
AC
530/* The helper function for 64-bit SYSV push_dummy_call. Converts the
531 function's code address back into the function's descriptor
532 address.
533
534 Find a value for the TOC register. Every symbol should have both
535 ".FN" and "FN" in the minimal symbol table. "FN" points at the
536 FN's descriptor, while ".FN" points at the entry point (which
537 matches FUNC_ADDR). Need to reverse from FUNC_ADDR back to the
538 FN's descriptor address (while at the same time being careful to
539 find "FN" in the same object file as ".FN"). */
540
541static int
542convert_code_addr_to_desc_addr (CORE_ADDR code_addr, CORE_ADDR *desc_addr)
543{
544 struct obj_section *dot_fn_section;
545 struct minimal_symbol *dot_fn;
546 struct minimal_symbol *fn;
547 CORE_ADDR toc;
548 /* Find the minimal symbol that corresponds to CODE_ADDR (should
549 have a name of the form ".FN"). */
550 dot_fn = lookup_minimal_symbol_by_pc (code_addr);
551 if (dot_fn == NULL || SYMBOL_LINKAGE_NAME (dot_fn)[0] != '.')
552 return 0;
553 /* Get the section that contains CODE_ADDR. Need this for the
554 "objfile" that it contains. */
555 dot_fn_section = find_pc_section (code_addr);
556 if (dot_fn_section == NULL || dot_fn_section->objfile == NULL)
557 return 0;
558 /* Now find the corresponding "FN" (dropping ".") minimal symbol's
559 address. Only look for the minimal symbol in ".FN"'s object file
560 - avoids problems when two object files (i.e., shared libraries)
561 contain a minimal symbol with the same name. */
562 fn = lookup_minimal_symbol (SYMBOL_LINKAGE_NAME (dot_fn) + 1, NULL,
563 dot_fn_section->objfile);
564 if (fn == NULL)
565 return 0;
566 /* Found a descriptor. */
567 (*desc_addr) = SYMBOL_VALUE_ADDRESS (fn);
568 return 1;
569}
570
8be9034a
AC
571/* Pass the arguments in either registers, or in the stack. Using the
572 ppc 64 bit SysV ABI.
573
574 This implements a dumbed down version of the ABI. It always writes
575 values to memory, GPR and FPR, even when not necessary. Doing this
576 greatly simplifies the logic. */
577
578CORE_ADDR
7d9b040b 579ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
8be9034a
AC
580 struct regcache *regcache, CORE_ADDR bp_addr,
581 int nargs, struct value **args, CORE_ADDR sp,
582 int struct_return, CORE_ADDR struct_addr)
583{
7d9b040b 584 CORE_ADDR func_addr = find_function_addr (function, NULL);
8be9034a 585 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
fb4443d8 586 ULONGEST back_chain;
8be9034a
AC
587 /* See for-loop comment below. */
588 int write_pass;
589 /* Size of the Altivec's vector parameter region, the final value is
590 computed in the for-loop below. */
591 LONGEST vparam_size = 0;
592 /* Size of the general parameter region, the final value is computed
593 in the for-loop below. */
594 LONGEST gparam_size = 0;
595 /* Kevin writes ... I don't mind seeing tdep->wordsize used in the
596 calls to align_up(), align_down(), etc. because this makes it
597 easier to reuse this code (in a copy/paste sense) in the future,
598 but it is a 64-bit ABI and asserting that the wordsize is 8 bytes
599 at some point makes it easier to verify that this function is
600 correct without having to do a non-local analysis to figure out
601 the possible values of tdep->wordsize. */
602 gdb_assert (tdep->wordsize == 8);
603
fb4443d8
UW
604 /* By this stage in the proceedings, SP has been decremented by "red
605 zone size" + "struct return size". Fetch the stack-pointer from
606 before this and use that as the BACK_CHAIN. */
3e8c568d
UW
607 regcache_cooked_read_unsigned (regcache,
608 gdbarch_sp_regnum (current_gdbarch),
609 &back_chain);
fb4443d8 610
8be9034a
AC
611 /* Go through the argument list twice.
612
613 Pass 1: Compute the function call's stack space and register
614 requirements.
615
616 Pass 2: Replay the same computation but this time also write the
617 values out to the target. */
618
619 for (write_pass = 0; write_pass < 2; write_pass++)
620 {
621 int argno;
622 /* Next available floating point register for float and double
623 arguments. */
624 int freg = 1;
625 /* Next available general register for non-vector (but possibly
626 float) arguments. */
627 int greg = 3;
628 /* Next available vector register for vector arguments. */
629 int vreg = 2;
630 /* The address, at which the next general purpose parameter
631 (integer, struct, float, ...) should be saved. */
632 CORE_ADDR gparam;
633 /* Address, at which the next Altivec vector parameter should be
634 saved. */
635 CORE_ADDR vparam;
636
637 if (!write_pass)
638 {
639 /* During the first pass, GPARAM and VPARAM are more like
640 offsets (start address zero) than addresses. That way
641 the accumulate the total stack space each region
642 requires. */
643 gparam = 0;
644 vparam = 0;
645 }
646 else
647 {
648 /* Decrement the stack pointer making space for the Altivec
649 and general on-stack parameters. Set vparam and gparam
650 to their corresponding regions. */
651 vparam = align_down (sp - vparam_size, 16);
652 gparam = align_down (vparam - gparam_size, 16);
653 /* Add in space for the TOC, link editor double word,
654 compiler double word, LR save area, CR save area. */
655 sp = align_down (gparam - 48, 16);
656 }
657
658 /* If the function is returning a `struct', then there is an
659 extra hidden parameter (which will be passed in r3)
660 containing the address of that struct.. In that case we
661 should advance one word and start from r4 register to copy
662 parameters. This also consumes one on-stack parameter slot. */
663 if (struct_return)
664 {
665 if (write_pass)
666 regcache_cooked_write_signed (regcache,
667 tdep->ppc_gp0_regnum + greg,
668 struct_addr);
669 greg++;
670 gparam = align_up (gparam + tdep->wordsize, tdep->wordsize);
671 }
672
673 for (argno = 0; argno < nargs; argno++)
674 {
675 struct value *arg = args[argno];
df407dfe 676 struct type *type = check_typedef (value_type (arg));
0fd88904 677 const bfd_byte *val = value_contents (arg);
8be9034a
AC
678 if (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) <= 8)
679 {
680 /* Floats and Doubles go in f1 .. f13. They also
681 consume a left aligned GREG,, and can end up in
682 memory. */
683 if (write_pass)
684 {
685 if (ppc_floating_point_unit_p (current_gdbarch)
686 && freg <= 13)
687 {
50fd1280 688 gdb_byte regval[MAX_REGISTER_SIZE];
366f009f
JB
689 struct type *regtype
690 = register_type (gdbarch, tdep->ppc_fp0_regnum);
8be9034a 691 convert_typed_floating (val, type, regval, regtype);
366f009f
JB
692 regcache_cooked_write (regcache,
693 tdep->ppc_fp0_regnum + freg,
8be9034a
AC
694 regval);
695 }
696 if (greg <= 10)
697 {
698 /* The ABI states "Single precision floating
699 point values are mapped to the first word in
700 a single doubleword" and "... floating point
701 values mapped to the first eight doublewords
702 of the parameter save area are also passed in
703 general registers").
704
705 This code interprets that to mean: store it,
706 left aligned, in the general register. */
50fd1280 707 gdb_byte regval[MAX_REGISTER_SIZE];
8be9034a
AC
708 memset (regval, 0, sizeof regval);
709 memcpy (regval, val, TYPE_LENGTH (type));
710 regcache_cooked_write (regcache,
711 tdep->ppc_gp0_regnum + greg,
712 regval);
713 }
714 write_memory (gparam, val, TYPE_LENGTH (type));
715 }
716 /* Always consume parameter stack space. */
717 freg++;
718 greg++;
719 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
720 }
721 else if (TYPE_LENGTH (type) == 16 && TYPE_VECTOR (type)
722 && TYPE_CODE (type) == TYPE_CODE_ARRAY
723 && tdep->ppc_vr0_regnum >= 0)
724 {
725 /* In the Altivec ABI, vectors go in the vector
726 registers v2 .. v13, or when that runs out, a vector
727 annex which goes above all the normal parameters.
728 NOTE: cagney/2003-09-21: This is a guess based on the
729 PowerOpen Altivec ABI. */
730 if (vreg <= 13)
731 {
732 if (write_pass)
733 regcache_cooked_write (regcache,
734 tdep->ppc_vr0_regnum + vreg, val);
735 vreg++;
736 }
737 else
738 {
739 if (write_pass)
740 write_memory (vparam, val, TYPE_LENGTH (type));
741 vparam = align_up (vparam + TYPE_LENGTH (type), 16);
742 }
743 }
744 else if ((TYPE_CODE (type) == TYPE_CODE_INT
b6e1c027
AC
745 || TYPE_CODE (type) == TYPE_CODE_ENUM
746 || TYPE_CODE (type) == TYPE_CODE_PTR)
8be9034a
AC
747 && TYPE_LENGTH (type) <= 8)
748 {
b6e1c027
AC
749 /* Scalars and Pointers get sign[un]extended and go in
750 gpr3 .. gpr10. They can also end up in memory. */
8be9034a
AC
751 if (write_pass)
752 {
753 /* Sign extend the value, then store it unsigned. */
754 ULONGEST word = unpack_long (type, val);
b6e1c027
AC
755 /* Convert any function code addresses into
756 descriptors. */
757 if (TYPE_CODE (type) == TYPE_CODE_PTR
758 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
759 {
760 CORE_ADDR desc = word;
761 convert_code_addr_to_desc_addr (word, &desc);
762 word = desc;
763 }
8be9034a
AC
764 if (greg <= 10)
765 regcache_cooked_write_unsigned (regcache,
766 tdep->ppc_gp0_regnum +
767 greg, word);
768 write_memory_unsigned_integer (gparam, tdep->wordsize,
769 word);
770 }
771 greg++;
772 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
773 }
774 else
775 {
776 int byte;
777 for (byte = 0; byte < TYPE_LENGTH (type);
778 byte += tdep->wordsize)
779 {
780 if (write_pass && greg <= 10)
781 {
50fd1280 782 gdb_byte regval[MAX_REGISTER_SIZE];
8be9034a
AC
783 int len = TYPE_LENGTH (type) - byte;
784 if (len > tdep->wordsize)
785 len = tdep->wordsize;
786 memset (regval, 0, sizeof regval);
787 /* WARNING: cagney/2003-09-21: As best I can
788 tell, the ABI specifies that the value should
789 be left aligned. Unfortunately, GCC doesn't
790 do this - it instead right aligns even sized
791 values and puts odd sized values on the
792 stack. Work around that by putting both a
793 left and right aligned value into the
794 register (hopefully no one notices :-^).
795 Arrrgh! */
796 /* Left aligned (8 byte values such as pointers
797 fill the buffer). */
798 memcpy (regval, val + byte, len);
799 /* Right aligned (but only if even). */
800 if (len == 1 || len == 2 || len == 4)
801 memcpy (regval + tdep->wordsize - len,
802 val + byte, len);
803 regcache_cooked_write (regcache, greg, regval);
804 }
805 greg++;
806 }
807 if (write_pass)
808 /* WARNING: cagney/2003-09-21: Strictly speaking, this
809 isn't necessary, unfortunately, GCC appears to get
810 "struct convention" parameter passing wrong putting
811 odd sized structures in memory instead of in a
812 register. Work around this by always writing the
813 value to memory. Fortunately, doing this
814 simplifies the code. */
815 write_memory (gparam, val, TYPE_LENGTH (type));
b6e1c027
AC
816 if (write_pass)
817 /* WARNING: cagney/2004-06-20: It appears that GCC
818 likes to put structures containing a single
819 floating-point member in an FP register instead of
820 general general purpose. */
8be9034a
AC
821 /* Always consume parameter stack space. */
822 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
823 }
824 }
825
826 if (!write_pass)
827 {
828 /* Save the true region sizes ready for the second pass. */
829 vparam_size = vparam;
830 /* Make certain that the general parameter save area is at
831 least the minimum 8 registers (or doublewords) in size. */
832 if (greg < 8)
833 gparam_size = 8 * tdep->wordsize;
834 else
835 gparam_size = gparam;
836 }
837 }
838
839 /* Update %sp. */
3e8c568d
UW
840 regcache_cooked_write_signed (regcache,
841 gdbarch_sp_regnum (current_gdbarch), sp);
8be9034a
AC
842
843 /* Write the backchain (it occupies WORDSIZED bytes). */
844 write_memory_signed_integer (sp, tdep->wordsize, back_chain);
845
846 /* Point the inferior function call's return address at the dummy's
847 breakpoint. */
848 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
849
b6e1c027
AC
850 /* Use the func_addr to find the descriptor, and use that to find
851 the TOC. */
8be9034a 852 {
b6e1c027
AC
853 CORE_ADDR desc_addr;
854 if (convert_code_addr_to_desc_addr (func_addr, &desc_addr))
8be9034a 855 {
b6e1c027
AC
856 /* The TOC is the second double word in the descriptor. */
857 CORE_ADDR toc =
858 read_memory_unsigned_integer (desc_addr + tdep->wordsize,
859 tdep->wordsize);
860 regcache_cooked_write_unsigned (regcache,
861 tdep->ppc_gp0_regnum + 2, toc);
8be9034a
AC
862 }
863 }
864
865 return sp;
866}
867
afd48b75
AC
868
869/* The 64 bit ABI retun value convention.
870
871 Return non-zero if the return-value is stored in a register, return
872 0 if the return-value is instead stored on the stack (a.k.a.,
873 struct return convention).
874
963e2bb7 875 For a return-value stored in a register: when WRITEBUF is non-NULL,
afd48b75 876 copy the buffer to the corresponding register return-value location
963e2bb7 877 location; when READBUF is non-NULL, fill the buffer from the
afd48b75 878 corresponding register return-value location. */
05580c65
AC
879enum return_value_convention
880ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype,
50fd1280
AC
881 struct regcache *regcache, gdb_byte *readbuf,
882 const gdb_byte *writebuf)
afd48b75 883{
05580c65 884 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
16796152
JB
885
886 /* This function exists to support a calling convention that
887 requires floating-point registers. It shouldn't be used on
888 processors that lack them. */
889 gdb_assert (ppc_floating_point_unit_p (gdbarch));
890
afd48b75 891 /* Floats and doubles in F1. */
944fcfab 892 if (TYPE_CODE (valtype) == TYPE_CODE_FLT && TYPE_LENGTH (valtype) <= 8)
afd48b75 893 {
50fd1280 894 gdb_byte regval[MAX_REGISTER_SIZE];
366f009f 895 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
963e2bb7 896 if (writebuf != NULL)
afd48b75 897 {
963e2bb7 898 convert_typed_floating (writebuf, valtype, regval, regtype);
366f009f 899 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
afd48b75 900 }
963e2bb7 901 if (readbuf != NULL)
afd48b75 902 {
366f009f 903 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
963e2bb7 904 convert_typed_floating (regval, regtype, readbuf, valtype);
afd48b75
AC
905 }
906 return RETURN_VALUE_REGISTER_CONVENTION;
907 }
3d8476bc 908 /* Integers in r3. */
b6e1c027
AC
909 if ((TYPE_CODE (valtype) == TYPE_CODE_INT
910 || TYPE_CODE (valtype) == TYPE_CODE_ENUM)
911 && TYPE_LENGTH (valtype) <= 8)
afd48b75 912 {
963e2bb7 913 if (writebuf != NULL)
afd48b75
AC
914 {
915 /* Be careful to sign extend the value. */
916 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
963e2bb7 917 unpack_long (valtype, writebuf));
afd48b75 918 }
963e2bb7 919 if (readbuf != NULL)
afd48b75
AC
920 {
921 /* Extract the integer from r3. Since this is truncating the
922 value, there isn't a sign extension problem. */
923 ULONGEST regval;
924 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
925 &regval);
963e2bb7 926 store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), regval);
afd48b75
AC
927 }
928 return RETURN_VALUE_REGISTER_CONVENTION;
929 }
930 /* All pointers live in r3. */
931 if (TYPE_CODE (valtype) == TYPE_CODE_PTR)
932 {
933 /* All pointers live in r3. */
963e2bb7
AC
934 if (writebuf != NULL)
935 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
936 if (readbuf != NULL)
937 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf);
afd48b75
AC
938 return RETURN_VALUE_REGISTER_CONVENTION;
939 }
3d8476bc
PG
940 /* Array type has more than one use. */
941 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY)
afd48b75
AC
942 {
943 /* Small character arrays are returned, right justified, in r3. */
3d8476bc
PG
944 if (TYPE_LENGTH (valtype) <= 8
945 && TYPE_CODE (TYPE_TARGET_TYPE (valtype)) == TYPE_CODE_INT
946 && TYPE_LENGTH (TYPE_TARGET_TYPE (valtype)) == 1)
947 {
948 int offset = (register_size (gdbarch, tdep->ppc_gp0_regnum + 3)
949 - TYPE_LENGTH (valtype));
950 if (writebuf != NULL)
951 regcache_cooked_write_part (regcache, tdep->ppc_gp0_regnum + 3,
952 offset, TYPE_LENGTH (valtype), writebuf);
953 if (readbuf != NULL)
954 regcache_cooked_read_part (regcache, tdep->ppc_gp0_regnum + 3,
955 offset, TYPE_LENGTH (valtype), readbuf);
956 return RETURN_VALUE_REGISTER_CONVENTION;
957 }
958 /* A VMX vector is returned in v2. */
959 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
960 && TYPE_VECTOR (valtype) && tdep->ppc_vr0_regnum >= 0)
961 {
962 if (readbuf)
963 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
964 if (writebuf)
965 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
966 return RETURN_VALUE_REGISTER_CONVENTION;
967 }
afd48b75
AC
968 }
969 /* Big floating point values get stored in adjacent floating
3d8476bc 970 point registers, starting with F1. */
afd48b75 971 if (TYPE_CODE (valtype) == TYPE_CODE_FLT
944fcfab 972 && (TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 32))
afd48b75 973 {
963e2bb7 974 if (writebuf || readbuf != NULL)
afd48b75
AC
975 {
976 int i;
977 for (i = 0; i < TYPE_LENGTH (valtype) / 8; i++)
978 {
963e2bb7 979 if (writebuf != NULL)
366f009f 980 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
963e2bb7
AC
981 (const bfd_byte *) writebuf + i * 8);
982 if (readbuf != NULL)
366f009f 983 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
963e2bb7 984 (bfd_byte *) readbuf + i * 8);
afd48b75
AC
985 }
986 }
987 return RETURN_VALUE_REGISTER_CONVENTION;
988 }
989 /* Complex values get returned in f1:f2, need to convert. */
990 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX
991 && (TYPE_LENGTH (valtype) == 8 || TYPE_LENGTH (valtype) == 16))
992 {
993 if (regcache != NULL)
994 {
995 int i;
996 for (i = 0; i < 2; i++)
997 {
50fd1280 998 gdb_byte regval[MAX_REGISTER_SIZE];
944fcfab 999 struct type *regtype =
366f009f 1000 register_type (current_gdbarch, tdep->ppc_fp0_regnum);
963e2bb7 1001 if (writebuf != NULL)
afd48b75 1002 {
963e2bb7 1003 convert_typed_floating ((const bfd_byte *) writebuf +
944fcfab 1004 i * (TYPE_LENGTH (valtype) / 2),
afd48b75 1005 valtype, regval, regtype);
366f009f
JB
1006 regcache_cooked_write (regcache,
1007 tdep->ppc_fp0_regnum + 1 + i,
944fcfab 1008 regval);
afd48b75 1009 }
963e2bb7 1010 if (readbuf != NULL)
afd48b75 1011 {
366f009f
JB
1012 regcache_cooked_read (regcache,
1013 tdep->ppc_fp0_regnum + 1 + i,
1014 regval);
afd48b75 1015 convert_typed_floating (regval, regtype,
963e2bb7 1016 (bfd_byte *) readbuf +
944fcfab 1017 i * (TYPE_LENGTH (valtype) / 2),
afd48b75
AC
1018 valtype);
1019 }
1020 }
1021 }
1022 return RETURN_VALUE_REGISTER_CONVENTION;
1023 }
1024 /* Big complex values get stored in f1:f4. */
944fcfab 1025 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX && TYPE_LENGTH (valtype) == 32)
afd48b75
AC
1026 {
1027 if (regcache != NULL)
1028 {
1029 int i;
1030 for (i = 0; i < 4; i++)
1031 {
963e2bb7 1032 if (writebuf != NULL)
366f009f 1033 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
963e2bb7
AC
1034 (const bfd_byte *) writebuf + i * 8);
1035 if (readbuf != NULL)
366f009f 1036 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
963e2bb7 1037 (bfd_byte *) readbuf + i * 8);
afd48b75
AC
1038 }
1039 }
1040 return RETURN_VALUE_REGISTER_CONVENTION;
1041 }
1042 return RETURN_VALUE_STRUCT_CONVENTION;
1043}
1044
6066c3de
AC
1045CORE_ADDR
1046ppc64_sysv_abi_adjust_breakpoint_address (struct gdbarch *gdbarch,
1047 CORE_ADDR bpaddr)
1048{
1049 /* PPC64 SYSV specifies that the minimal-symbol "FN" should point at
1050 a function-descriptor while the corresponding minimal-symbol
1051 ".FN" should point at the entry point. Consequently, a command
1052 like "break FN" applied to an object file with only minimal
1053 symbols, will insert the breakpoint into the descriptor at "FN"
1054 and not the function at ".FN". Avoid this confusion by adjusting
1055 any attempt to set a descriptor breakpoint into a corresponding
1056 function breakpoint. Note that GDB warns the user when this
1057 adjustment is applied - that's ok as otherwise the user will have
1058 no way of knowing why their breakpoint at "FN" resulted in the
1059 program stopping at ".FN". */
1060 return gdbarch_convert_from_func_ptr_addr (gdbarch, bpaddr, &current_target);
1061}