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32178cab 1/* Cache and manage the values of registers for GDB, the GNU debugger.
8e65ff28 2 Copyright 1986, 87, 89, 91, 94, 95, 96, 1998, 2000, 2001
32178cab
MS
3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
23#include "frame.h"
24#include "inferior.h"
25#include "target.h"
26#include "gdbarch.h"
705152c5 27#include "gdbcmd.h"
32178cab
MS
28
29/*
30 * DATA STRUCTURE
31 *
32 * Here is the actual register cache.
33 */
34
5ebd2499 35/* NOTE: this is a write-through cache. There is no "dirty" bit for
32178cab
MS
36 recording if the register values have been changed (eg. by the
37 user). Therefore all registers must be written back to the
38 target when appropriate. */
39
40/* REGISTERS contains the cached register values (in target byte order). */
41
42char *registers;
43
44/* REGISTER_VALID is 0 if the register needs to be fetched,
45 1 if it has been fetched, and
46 -1 if the register value was not available.
47 "Not available" means don't try to fetch it again. */
48
49signed char *register_valid;
50
51/* The thread/process associated with the current set of registers.
52 For now, -1 is special, and means `no current process'. */
53
54static int registers_pid = -1;
55
56/*
57 * FUNCTIONS:
58 */
59
60/* REGISTER_CACHED()
61
62 Returns 0 if the value is not in the cache (needs fetch).
63 >0 if the value is in the cache.
64 <0 if the value is permanently unavailable (don't ask again). */
65
66int
67register_cached (int regnum)
68{
69 return register_valid[regnum];
70}
71
7302a204
ND
72/* Record that REGNUM's value is cached if STATE is >0, uncached but
73 fetchable if STATE is 0, and uncached and unfetchable if STATE is <0. */
74
75void
76set_register_cached (int regnum, int state)
77{
78 register_valid[regnum] = state;
79}
80
2dc4e391
DT
81/* REGISTER_CHANGED
82
83 invalidate a single register REGNUM in the cache */
84void
85register_changed (int regnum)
86{
7302a204
ND
87 set_register_cached (regnum, 0);
88}
89
90/* If REGNUM >= 0, return a pointer to register REGNUM's cache buffer area,
91 else return a pointer to the start of the cache buffer. */
92
93char *
94register_buffer (int regnum)
95{
96 if (regnum < 0)
97 return registers;
98 else
99 return &registers[REGISTER_BYTE (regnum)];
100}
101
102/* Return whether register REGNUM is a real register. */
103
104static int
105real_register (int regnum)
106{
107 return regnum >= 0 && regnum < NUM_REGS;
108}
109
110/* Return whether register REGNUM is a pseudo register. */
111
112static int
113pseudo_register (int regnum)
114{
115 return regnum >= NUM_REGS && regnum < NUM_REGS + NUM_PSEUDO_REGS;
116}
117
118/* Fetch register REGNUM into the cache. */
119
120static void
121fetch_register (int regnum)
122{
123 if (real_register (regnum))
124 target_fetch_registers (regnum);
125 else if (pseudo_register (regnum))
126 FETCH_PSEUDO_REGISTER (regnum);
127}
128
129/* Write register REGNUM cached value to the target. */
130
131static void
132store_register (int regnum)
133{
134 if (real_register (regnum))
135 target_store_registers (regnum);
136 else if (pseudo_register (regnum))
137 STORE_PSEUDO_REGISTER (regnum);
2dc4e391
DT
138}
139
32178cab
MS
140/* Low level examining and depositing of registers.
141
142 The caller is responsible for making sure that the inferior is
143 stopped before calling the fetching routines, or it will get
144 garbage. (a change from GDB version 3, in which the caller got the
145 value from the last stop). */
146
147/* REGISTERS_CHANGED ()
148
149 Indicate that registers may have changed, so invalidate the cache. */
150
151void
152registers_changed (void)
153{
154 int i;
32178cab
MS
155
156 registers_pid = -1;
157
158 /* Force cleanup of any alloca areas if using C alloca instead of
159 a builtin alloca. This particular call is used to clean up
160 areas allocated by low level target code which may build up
161 during lengthy interactions between gdb and the target before
162 gdb gives control to the user (ie watchpoints). */
163 alloca (0);
164
fcdc5976 165 for (i = 0; i < ARCH_NUM_REGS; i++)
7302a204 166 set_register_cached (i, 0);
fcdc5976
MS
167
168 /* Assume that if all the hardware regs have changed,
169 then so have the pseudo-registers. */
170 for (i = NUM_REGS; i < NUM_REGS + NUM_PSEUDO_REGS; i++)
7302a204 171 set_register_cached (i, 0);
32178cab
MS
172
173 if (registers_changed_hook)
174 registers_changed_hook ();
175}
176
177/* REGISTERS_FETCHED ()
178
179 Indicate that all registers have been fetched, so mark them all valid. */
180
181
182void
183registers_fetched (void)
184{
185 int i;
32178cab 186
fcdc5976 187 for (i = 0; i < ARCH_NUM_REGS; i++)
7302a204 188 set_register_cached (i, 1);
fcdc5976
MS
189 /* Do not assume that the pseudo-regs have also been fetched.
190 Fetching all real regs might not account for all pseudo-regs. */
32178cab
MS
191}
192
193/* read_register_bytes and write_register_bytes are generally a *BAD*
194 idea. They are inefficient because they need to check for partial
195 updates, which can only be done by scanning through all of the
196 registers and seeing if the bytes that are being read/written fall
197 inside of an invalid register. [The main reason this is necessary
198 is that register sizes can vary, so a simple index won't suffice.]
199 It is far better to call read_register_gen and write_register_gen
200 if you want to get at the raw register contents, as it only takes a
5ebd2499 201 regnum as an argument, and therefore can't do a partial register
32178cab
MS
202 update.
203
204 Prior to the recent fixes to check for partial updates, both read
205 and write_register_bytes always checked to see if any registers
206 were stale, and then called target_fetch_registers (-1) to update
207 the whole set. This caused really slowed things down for remote
208 targets. */
209
210/* Copy INLEN bytes of consecutive data from registers
211 starting with the INREGBYTE'th byte of register data
212 into memory at MYADDR. */
213
214void
215read_register_bytes (int inregbyte, char *myaddr, int inlen)
216{
217 int inregend = inregbyte + inlen;
5ebd2499 218 int regnum;
32178cab
MS
219
220 if (registers_pid != inferior_pid)
221 {
222 registers_changed ();
223 registers_pid = inferior_pid;
224 }
225
226 /* See if we are trying to read bytes from out-of-date registers. If so,
227 update just those registers. */
228
5ebd2499 229 for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
32178cab
MS
230 {
231 int regstart, regend;
232
7302a204 233 if (register_cached (regnum))
32178cab
MS
234 continue;
235
5ebd2499 236 if (REGISTER_NAME (regnum) == NULL || *REGISTER_NAME (regnum) == '\0')
32178cab
MS
237 continue;
238
5ebd2499
ND
239 regstart = REGISTER_BYTE (regnum);
240 regend = regstart + REGISTER_RAW_SIZE (regnum);
32178cab
MS
241
242 if (regend <= inregbyte || inregend <= regstart)
5ebd2499 243 /* The range the user wants to read doesn't overlap with regnum. */
32178cab
MS
244 continue;
245
fcdc5976 246 /* We've found an uncached register where at least one byte will be read.
32178cab 247 Update it from the target. */
7302a204 248 fetch_register (regnum);
32178cab 249
7302a204 250 if (!register_cached (regnum))
165cd47f
MS
251 {
252 /* Sometimes pseudoregs are never marked valid, so that they
253 will be fetched every time (it can be complicated to know
254 if a pseudoreg is valid, while "fetching" them can be cheap).
255 */
5ebd2499 256 if (regnum < NUM_REGS)
7302a204 257 error ("read_register_bytes: Couldn't update register %d.", regnum);
165cd47f 258 }
32178cab
MS
259 }
260
261 if (myaddr != NULL)
7302a204 262 memcpy (myaddr, register_buffer (-1) + inregbyte, inlen);
32178cab
MS
263}
264
5ebd2499
ND
265/* Read register REGNUM into memory at MYADDR, which must be large
266 enough for REGISTER_RAW_BYTES (REGNUM). Target byte-order. If the
32178cab
MS
267 register is known to be the size of a CORE_ADDR or smaller,
268 read_register can be used instead. */
269
270void
5ebd2499 271read_register_gen (int regnum, char *myaddr)
32178cab
MS
272{
273 if (registers_pid != inferior_pid)
274 {
275 registers_changed ();
276 registers_pid = inferior_pid;
277 }
278
7302a204
ND
279 if (!register_cached (regnum))
280 fetch_register (regnum);
281
282 memcpy (myaddr, register_buffer (regnum),
5ebd2499 283 REGISTER_RAW_SIZE (regnum));
32178cab
MS
284}
285
5ebd2499
ND
286/* Write register REGNUM at MYADDR to the target. MYADDR points at
287 REGISTER_RAW_BYTES(REGNUM), which must be in target byte-order. */
32178cab
MS
288
289/* Registers we shouldn't try to store. */
290#if !defined (CANNOT_STORE_REGISTER)
5ebd2499 291#define CANNOT_STORE_REGISTER(regnum) 0
32178cab
MS
292#endif
293
294void
5ebd2499 295write_register_gen (int regnum, char *myaddr)
32178cab
MS
296{
297 int size;
298
299 /* On the sparc, writing %g0 is a no-op, so we don't even want to
300 change the registers array if something writes to this register. */
5ebd2499 301 if (CANNOT_STORE_REGISTER (regnum))
32178cab
MS
302 return;
303
304 if (registers_pid != inferior_pid)
305 {
306 registers_changed ();
307 registers_pid = inferior_pid;
308 }
309
5ebd2499 310 size = REGISTER_RAW_SIZE (regnum);
32178cab
MS
311
312 /* If we have a valid copy of the register, and new value == old value,
313 then don't bother doing the actual store. */
314
7302a204
ND
315 if (register_cached (regnum)
316 && memcmp (register_buffer (regnum), myaddr, size) == 0)
32178cab
MS
317 return;
318
7302a204 319 if (real_register (regnum))
fcdc5976 320 target_prepare_to_store ();
32178cab 321
7302a204 322 memcpy (register_buffer (regnum), myaddr, size);
32178cab 323
7302a204
ND
324 set_register_cached (regnum, 1);
325 store_register (regnum);
32178cab
MS
326}
327
328/* Copy INLEN bytes of consecutive data from memory at MYADDR
329 into registers starting with the MYREGSTART'th byte of register data. */
330
331void
332write_register_bytes (int myregstart, char *myaddr, int inlen)
333{
334 int myregend = myregstart + inlen;
5ebd2499 335 int regnum;
32178cab
MS
336
337 target_prepare_to_store ();
338
339 /* Scan through the registers updating any that are covered by the
340 range myregstart<=>myregend using write_register_gen, which does
341 nice things like handling threads, and avoiding updates when the
342 new and old contents are the same. */
343
5ebd2499 344 for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
32178cab
MS
345 {
346 int regstart, regend;
347
5ebd2499
ND
348 regstart = REGISTER_BYTE (regnum);
349 regend = regstart + REGISTER_RAW_SIZE (regnum);
32178cab
MS
350
351 /* Is this register completely outside the range the user is writing? */
352 if (myregend <= regstart || regend <= myregstart)
353 /* do nothing */ ;
354
355 /* Is this register completely within the range the user is writing? */
356 else if (myregstart <= regstart && regend <= myregend)
5ebd2499 357 write_register_gen (regnum, myaddr + (regstart - myregstart));
32178cab
MS
358
359 /* The register partially overlaps the range being written. */
360 else
361 {
e6cbd02a 362 char *regbuf = (char*) alloca (MAX_REGISTER_RAW_SIZE);
32178cab
MS
363 /* What's the overlap between this register's bytes and
364 those the caller wants to write? */
365 int overlapstart = max (regstart, myregstart);
366 int overlapend = min (regend, myregend);
367
368 /* We may be doing a partial update of an invalid register.
369 Update it from the target before scribbling on it. */
5ebd2499 370 read_register_gen (regnum, regbuf);
32178cab
MS
371
372 memcpy (registers + overlapstart,
373 myaddr + (overlapstart - myregstart),
374 overlapend - overlapstart);
375
7302a204 376 store_register (regnum);
32178cab
MS
377 }
378 }
379}
380
381
5ebd2499 382/* Return the contents of register REGNUM as an unsigned integer. */
32178cab 383
173155e8 384ULONGEST
5ebd2499 385read_register (int regnum)
32178cab
MS
386{
387 if (registers_pid != inferior_pid)
388 {
389 registers_changed ();
390 registers_pid = inferior_pid;
391 }
392
7302a204
ND
393 if (!register_cached (regnum))
394 fetch_register (regnum);
32178cab 395
7302a204 396 return (extract_unsigned_integer (register_buffer (regnum),
5ebd2499 397 REGISTER_RAW_SIZE (regnum)));
32178cab
MS
398}
399
173155e8 400ULONGEST
5ebd2499 401read_register_pid (int regnum, int pid)
32178cab
MS
402{
403 int save_pid;
404 CORE_ADDR retval;
405
406 if (pid == inferior_pid)
5ebd2499 407 return read_register (regnum);
32178cab
MS
408
409 save_pid = inferior_pid;
410
411 inferior_pid = pid;
412
5ebd2499 413 retval = read_register (regnum);
32178cab
MS
414
415 inferior_pid = save_pid;
416
417 return retval;
418}
419
5ebd2499 420/* Return the contents of register REGNUM as a signed integer. */
173155e8
AC
421
422LONGEST
5ebd2499 423read_signed_register (int regnum)
173155e8
AC
424{
425 if (registers_pid != inferior_pid)
426 {
427 registers_changed ();
428 registers_pid = inferior_pid;
429 }
430
7302a204
ND
431 if (!register_cached (regnum))
432 fetch_register (regnum);
173155e8 433
7302a204 434 return (extract_signed_integer (register_buffer (regnum),
5ebd2499 435 REGISTER_RAW_SIZE (regnum)));
173155e8
AC
436}
437
438LONGEST
5ebd2499 439read_signed_register_pid (int regnum, int pid)
173155e8
AC
440{
441 int save_pid;
442 LONGEST retval;
443
444 if (pid == inferior_pid)
5ebd2499 445 return read_signed_register (regnum);
173155e8
AC
446
447 save_pid = inferior_pid;
448
449 inferior_pid = pid;
450
5ebd2499 451 retval = read_signed_register (regnum);
173155e8
AC
452
453 inferior_pid = save_pid;
454
455 return retval;
456}
457
5ebd2499 458/* Store VALUE into the raw contents of register number REGNUM. */
32178cab
MS
459
460void
5ebd2499 461write_register (int regnum, LONGEST val)
32178cab
MS
462{
463 PTR buf;
464 int size;
465
466 /* On the sparc, writing %g0 is a no-op, so we don't even want to
467 change the registers array if something writes to this register. */
5ebd2499 468 if (CANNOT_STORE_REGISTER (regnum))
32178cab
MS
469 return;
470
471 if (registers_pid != inferior_pid)
472 {
473 registers_changed ();
474 registers_pid = inferior_pid;
475 }
476
5ebd2499 477 size = REGISTER_RAW_SIZE (regnum);
32178cab
MS
478 buf = alloca (size);
479 store_signed_integer (buf, size, (LONGEST) val);
480
481 /* If we have a valid copy of the register, and new value == old value,
482 then don't bother doing the actual store. */
483
7302a204
ND
484 if (register_cached (regnum)
485 && memcmp (register_buffer (regnum), buf, size) == 0)
32178cab
MS
486 return;
487
7302a204 488 if (real_register (regnum))
fcdc5976 489 target_prepare_to_store ();
32178cab 490
7302a204 491 memcpy (register_buffer (regnum), buf, size);
32178cab 492
7302a204
ND
493 set_register_cached (regnum, 1);
494 store_register (regnum);
32178cab
MS
495}
496
497void
5ebd2499 498write_register_pid (int regnum, CORE_ADDR val, int pid)
32178cab
MS
499{
500 int save_pid;
501
502 if (pid == inferior_pid)
503 {
5ebd2499 504 write_register (regnum, val);
32178cab
MS
505 return;
506 }
507
508 save_pid = inferior_pid;
509
510 inferior_pid = pid;
511
5ebd2499 512 write_register (regnum, val);
32178cab
MS
513
514 inferior_pid = save_pid;
515}
516
517/* SUPPLY_REGISTER()
518
5ebd2499 519 Record that register REGNUM contains VAL. This is used when the
32178cab
MS
520 value is obtained from the inferior or core dump, so there is no
521 need to store the value there.
522
523 If VAL is a NULL pointer, then it's probably an unsupported register.
5ebd2499 524 We just set its value to all zeros. We might want to record this
32178cab
MS
525 fact, and report it to the users of read_register and friends. */
526
527void
5ebd2499 528supply_register (int regnum, char *val)
32178cab
MS
529{
530#if 1
531 if (registers_pid != inferior_pid)
532 {
533 registers_changed ();
534 registers_pid = inferior_pid;
535 }
536#endif
537
7302a204 538 set_register_cached (regnum, 1);
32178cab 539 if (val)
7302a204 540 memcpy (register_buffer (regnum), val,
5ebd2499 541 REGISTER_RAW_SIZE (regnum));
32178cab 542 else
7302a204 543 memset (register_buffer (regnum), '\000',
5ebd2499 544 REGISTER_RAW_SIZE (regnum));
32178cab
MS
545
546 /* On some architectures, e.g. HPPA, there are a few stray bits in
547 some registers, that the rest of the code would like to ignore. */
548
549#ifdef CLEAN_UP_REGISTER_VALUE
7302a204 550 CLEAN_UP_REGISTER_VALUE (regnum, register_buffer (regnum));
32178cab
MS
551#endif
552}
553
554/* read_pc, write_pc, read_sp, write_sp, read_fp, write_fp, etc.
555 Special handling for registers PC, SP, and FP. */
556
557/* This routine is getting awfully cluttered with #if's. It's probably
558 time to turn this into READ_PC and define it in the tm.h file.
559 Ditto for write_pc.
560
561 1999-06-08: The following were re-written so that it assumes the
8e1a459b 562 existence of a TARGET_READ_PC et.al. macro. A default generic
32178cab
MS
563 version of that macro is made available where needed.
564
565 Since the ``TARGET_READ_PC'' et.al. macro is going to be controlled
566 by the multi-arch framework, it will eventually be possible to
567 eliminate the intermediate read_pc_pid(). The client would call
568 TARGET_READ_PC directly. (cagney). */
569
32178cab
MS
570CORE_ADDR
571generic_target_read_pc (int pid)
572{
573#ifdef PC_REGNUM
574 if (PC_REGNUM >= 0)
575 {
576 CORE_ADDR pc_val = ADDR_BITS_REMOVE ((CORE_ADDR) read_register_pid (PC_REGNUM, pid));
577 return pc_val;
578 }
579#endif
8e65ff28
AC
580 internal_error (__FILE__, __LINE__,
581 "generic_target_read_pc");
32178cab
MS
582 return 0;
583}
584
585CORE_ADDR
586read_pc_pid (int pid)
587{
588 int saved_inferior_pid;
589 CORE_ADDR pc_val;
590
591 /* In case pid != inferior_pid. */
592 saved_inferior_pid = inferior_pid;
593 inferior_pid = pid;
594
595 pc_val = TARGET_READ_PC (pid);
596
597 inferior_pid = saved_inferior_pid;
598 return pc_val;
599}
600
601CORE_ADDR
602read_pc (void)
603{
604 return read_pc_pid (inferior_pid);
605}
606
32178cab
MS
607void
608generic_target_write_pc (CORE_ADDR pc, int pid)
609{
610#ifdef PC_REGNUM
611 if (PC_REGNUM >= 0)
612 write_register_pid (PC_REGNUM, pc, pid);
613 if (NPC_REGNUM >= 0)
614 write_register_pid (NPC_REGNUM, pc + 4, pid);
615 if (NNPC_REGNUM >= 0)
616 write_register_pid (NNPC_REGNUM, pc + 8, pid);
617#else
8e65ff28
AC
618 internal_error (__FILE__, __LINE__,
619 "generic_target_write_pc");
32178cab
MS
620#endif
621}
622
623void
624write_pc_pid (CORE_ADDR pc, int pid)
625{
626 int saved_inferior_pid;
627
628 /* In case pid != inferior_pid. */
629 saved_inferior_pid = inferior_pid;
630 inferior_pid = pid;
631
632 TARGET_WRITE_PC (pc, pid);
633
634 inferior_pid = saved_inferior_pid;
635}
636
637void
638write_pc (CORE_ADDR pc)
639{
640 write_pc_pid (pc, inferior_pid);
641}
642
643/* Cope with strage ways of getting to the stack and frame pointers */
644
32178cab
MS
645CORE_ADDR
646generic_target_read_sp (void)
647{
648#ifdef SP_REGNUM
649 if (SP_REGNUM >= 0)
650 return read_register (SP_REGNUM);
651#endif
8e65ff28
AC
652 internal_error (__FILE__, __LINE__,
653 "generic_target_read_sp");
32178cab
MS
654}
655
656CORE_ADDR
657read_sp (void)
658{
659 return TARGET_READ_SP ();
660}
661
32178cab
MS
662void
663generic_target_write_sp (CORE_ADDR val)
664{
665#ifdef SP_REGNUM
666 if (SP_REGNUM >= 0)
667 {
668 write_register (SP_REGNUM, val);
669 return;
670 }
671#endif
8e65ff28
AC
672 internal_error (__FILE__, __LINE__,
673 "generic_target_write_sp");
32178cab
MS
674}
675
676void
677write_sp (CORE_ADDR val)
678{
679 TARGET_WRITE_SP (val);
680}
681
32178cab
MS
682CORE_ADDR
683generic_target_read_fp (void)
684{
685#ifdef FP_REGNUM
686 if (FP_REGNUM >= 0)
687 return read_register (FP_REGNUM);
688#endif
8e65ff28
AC
689 internal_error (__FILE__, __LINE__,
690 "generic_target_read_fp");
32178cab
MS
691}
692
693CORE_ADDR
694read_fp (void)
695{
696 return TARGET_READ_FP ();
697}
698
32178cab
MS
699void
700generic_target_write_fp (CORE_ADDR val)
701{
702#ifdef FP_REGNUM
703 if (FP_REGNUM >= 0)
704 {
705 write_register (FP_REGNUM, val);
706 return;
707 }
708#endif
8e65ff28
AC
709 internal_error (__FILE__, __LINE__,
710 "generic_target_write_fp");
32178cab
MS
711}
712
713void
714write_fp (CORE_ADDR val)
715{
716 TARGET_WRITE_FP (val);
717}
718
705152c5
MS
719/* ARGSUSED */
720static void
721reg_flush_command (char *command, int from_tty)
722{
723 /* Force-flush the register cache. */
724 registers_changed ();
725 if (from_tty)
726 printf_filtered ("Register cache flushed.\n");
727}
728
729
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730static void
731build_regcache (void)
732{
733 /* We allocate some extra slop since we do a lot of memcpy's around
734 `registers', and failing-soft is better than failing hard. */
735 int sizeof_registers = REGISTER_BYTES + /* SLOP */ 256;
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736 int sizeof_register_valid =
737 (NUM_REGS + NUM_PSEUDO_REGS) * sizeof (*register_valid);
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738 registers = xmalloc (sizeof_registers);
739 memset (registers, 0, sizeof_registers);
740 register_valid = xmalloc (sizeof_register_valid);
741 memset (register_valid, 0, sizeof_register_valid);
742}
743
744void
745_initialize_regcache (void)
746{
747 build_regcache ();
748
749 register_gdbarch_swap (&registers, sizeof (registers), NULL);
750 register_gdbarch_swap (&register_valid, sizeof (register_valid), NULL);
751 register_gdbarch_swap (NULL, 0, build_regcache);
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752
753 add_com ("flushregs", class_maintenance, reg_flush_command,
754 "Force gdb to flush its register cache (maintainer command)");
32178cab 755}