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2ba6182b | 1 | /* Functions specific to running gdb native on a SPARC running SunOS4. |
7531f36e | 2 | Copyright 1989, 1992, 1993, 1994, 1996 Free Software Foundation, Inc. |
dfc82617 RP |
3 | |
4 | This file is part of GDB. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
6c9638b4 | 18 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
dfc82617 RP |
19 | |
20 | #include "defs.h" | |
21 | #include "inferior.h" | |
22 | #include "target.h" | |
dfc82617 RP |
23 | |
24 | #include <signal.h> | |
25 | #include <sys/ptrace.h> | |
26 | #include <sys/wait.h> | |
27 | #include <machine/reg.h> | |
7531f36e | 28 | #include <sys/user.h> |
dfc82617 RP |
29 | |
30 | /* We don't store all registers immediately when requested, since they | |
31 | get sent over in large chunks anyway. Instead, we accumulate most | |
32 | of the changes and send them over once. "deferred_stores" keeps | |
33 | track of which sets of registers we have locally-changed copies of, | |
34 | so we only need send the groups that have changed. */ | |
35 | ||
36 | #define INT_REGS 1 | |
37 | #define STACK_REGS 2 | |
38 | #define FP_REGS 4 | |
39 | ||
40 | /* Fetch one or more registers from the inferior. REGNO == -1 to get | |
41 | them all. We actually fetch more than requested, when convenient, | |
42 | marking them as valid so we won't fetch them again. */ | |
43 | ||
44 | void | |
45 | fetch_inferior_registers (regno) | |
46 | int regno; | |
47 | { | |
48 | struct regs inferior_registers; | |
49 | struct fp_status inferior_fp_registers; | |
50 | int i; | |
51 | ||
52 | /* We should never be called with deferred stores, because a prerequisite | |
53 | for writing regs is to have fetched them all (PREPARE_TO_STORE), sigh. */ | |
54 | if (deferred_stores) abort(); | |
55 | ||
56 | DO_DEFERRED_STORES; | |
57 | ||
58 | /* Global and Out regs are fetched directly, as well as the control | |
59 | registers. If we're getting one of the in or local regs, | |
60 | and the stack pointer has not yet been fetched, | |
61 | we have to do that first, since they're found in memory relative | |
62 | to the stack pointer. */ | |
63 | if (regno < O7_REGNUM /* including -1 */ | |
64 | || regno >= Y_REGNUM | |
65 | || (!register_valid[SP_REGNUM] && regno < I7_REGNUM)) | |
66 | { | |
67 | if (0 != ptrace (PTRACE_GETREGS, inferior_pid, | |
68 | (PTRACE_ARG3_TYPE) &inferior_registers, 0)) | |
69 | perror("ptrace_getregs"); | |
70 | ||
71 | registers[REGISTER_BYTE (0)] = 0; | |
72 | memcpy (®isters[REGISTER_BYTE (1)], &inferior_registers.r_g1, | |
73 | 15 * REGISTER_RAW_SIZE (G0_REGNUM)); | |
74 | *(int *)®isters[REGISTER_BYTE (PS_REGNUM)] = inferior_registers.r_ps; | |
75 | *(int *)®isters[REGISTER_BYTE (PC_REGNUM)] = inferior_registers.r_pc; | |
76 | *(int *)®isters[REGISTER_BYTE (NPC_REGNUM)] = inferior_registers.r_npc; | |
77 | *(int *)®isters[REGISTER_BYTE (Y_REGNUM)] = inferior_registers.r_y; | |
78 | ||
79 | for (i = G0_REGNUM; i <= O7_REGNUM; i++) | |
80 | register_valid[i] = 1; | |
81 | register_valid[Y_REGNUM] = 1; | |
82 | register_valid[PS_REGNUM] = 1; | |
83 | register_valid[PC_REGNUM] = 1; | |
84 | register_valid[NPC_REGNUM] = 1; | |
85 | /* If we don't set these valid, read_register_bytes() rereads | |
86 | all the regs every time it is called! FIXME. */ | |
87 | register_valid[WIM_REGNUM] = 1; /* Not true yet, FIXME */ | |
88 | register_valid[TBR_REGNUM] = 1; /* Not true yet, FIXME */ | |
dfc82617 RP |
89 | register_valid[CPS_REGNUM] = 1; /* Not true yet, FIXME */ |
90 | } | |
91 | ||
92 | /* Floating point registers */ | |
2ba6182b JG |
93 | if (regno == -1 || |
94 | regno == FPS_REGNUM || | |
95 | (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 31)) | |
dfc82617 RP |
96 | { |
97 | if (0 != ptrace (PTRACE_GETFPREGS, inferior_pid, | |
98 | (PTRACE_ARG3_TYPE) &inferior_fp_registers, | |
99 | 0)) | |
100 | perror("ptrace_getfpregs"); | |
101 | memcpy (®isters[REGISTER_BYTE (FP0_REGNUM)], &inferior_fp_registers, | |
102 | sizeof inferior_fp_registers.fpu_fr); | |
c369b6a3 | 103 | memcpy (®isters[REGISTER_BYTE (FPS_REGNUM)], |
ade40d31 | 104 | &inferior_fp_registers.Fpu_fsr, |
c369b6a3 | 105 | sizeof (FPU_FSR_TYPE)); |
dfc82617 RP |
106 | for (i = FP0_REGNUM; i <= FP0_REGNUM+31; i++) |
107 | register_valid[i] = 1; | |
108 | register_valid[FPS_REGNUM] = 1; | |
109 | } | |
110 | ||
111 | /* These regs are saved on the stack by the kernel. Only read them | |
112 | all (16 ptrace calls!) if we really need them. */ | |
113 | if (regno == -1) | |
114 | { | |
115 | target_xfer_memory (*(CORE_ADDR*)®isters[REGISTER_BYTE (SP_REGNUM)], | |
116 | ®isters[REGISTER_BYTE (L0_REGNUM)], | |
117 | 16*REGISTER_RAW_SIZE (L0_REGNUM), 0); | |
118 | for (i = L0_REGNUM; i <= I7_REGNUM; i++) | |
119 | register_valid[i] = 1; | |
120 | } | |
121 | else if (regno >= L0_REGNUM && regno <= I7_REGNUM) | |
122 | { | |
123 | CORE_ADDR sp = *(CORE_ADDR*)®isters[REGISTER_BYTE (SP_REGNUM)]; | |
124 | i = REGISTER_BYTE (regno); | |
125 | if (register_valid[regno]) | |
199b2450 | 126 | printf_unfiltered("register %d valid and read\n", regno); |
dfc82617 RP |
127 | target_xfer_memory (sp + i - REGISTER_BYTE (L0_REGNUM), |
128 | ®isters[i], REGISTER_RAW_SIZE (regno), 0); | |
129 | register_valid[regno] = 1; | |
130 | } | |
131 | } | |
132 | ||
133 | /* Store our register values back into the inferior. | |
134 | If REGNO is -1, do this for all registers. | |
135 | Otherwise, REGNO specifies which register (so we can save time). */ | |
136 | ||
137 | void | |
138 | store_inferior_registers (regno) | |
139 | int regno; | |
140 | { | |
141 | struct regs inferior_registers; | |
142 | struct fp_status inferior_fp_registers; | |
143 | int wanna_store = INT_REGS + STACK_REGS + FP_REGS; | |
144 | ||
145 | /* First decide which pieces of machine-state we need to modify. | |
146 | Default for regno == -1 case is all pieces. */ | |
147 | if (regno >= 0) | |
148 | if (FP0_REGNUM <= regno && regno < FP0_REGNUM + 32) | |
149 | { | |
150 | wanna_store = FP_REGS; | |
151 | } | |
152 | else | |
153 | { | |
154 | if (regno == SP_REGNUM) | |
155 | wanna_store = INT_REGS + STACK_REGS; | |
156 | else if (regno < L0_REGNUM || regno > I7_REGNUM) | |
157 | wanna_store = INT_REGS; | |
2ba6182b JG |
158 | else if (regno == FPS_REGNUM) |
159 | wanna_store = FP_REGS; | |
dfc82617 RP |
160 | else |
161 | wanna_store = STACK_REGS; | |
162 | } | |
163 | ||
164 | /* See if we're forcing the stores to happen now, or deferring. */ | |
165 | if (regno == -2) | |
166 | { | |
167 | wanna_store = deferred_stores; | |
168 | deferred_stores = 0; | |
169 | } | |
170 | else | |
171 | { | |
172 | if (wanna_store == STACK_REGS) | |
173 | { | |
174 | /* Fall through and just store one stack reg. If we deferred | |
175 | it, we'd have to store them all, or remember more info. */ | |
176 | } | |
177 | else | |
178 | { | |
179 | deferred_stores |= wanna_store; | |
180 | return; | |
181 | } | |
182 | } | |
183 | ||
184 | if (wanna_store & STACK_REGS) | |
185 | { | |
186 | CORE_ADDR sp = *(CORE_ADDR *)®isters[REGISTER_BYTE (SP_REGNUM)]; | |
187 | ||
188 | if (regno < 0 || regno == SP_REGNUM) | |
189 | { | |
190 | if (!register_valid[L0_REGNUM+5]) abort(); | |
191 | target_xfer_memory (sp, | |
192 | ®isters[REGISTER_BYTE (L0_REGNUM)], | |
193 | 16*REGISTER_RAW_SIZE (L0_REGNUM), 1); | |
194 | } | |
195 | else | |
196 | { | |
197 | if (!register_valid[regno]) abort(); | |
198 | target_xfer_memory (sp + REGISTER_BYTE (regno) - REGISTER_BYTE (L0_REGNUM), | |
199 | ®isters[REGISTER_BYTE (regno)], | |
200 | REGISTER_RAW_SIZE (regno), 1); | |
201 | } | |
202 | ||
203 | } | |
204 | ||
205 | if (wanna_store & INT_REGS) | |
206 | { | |
207 | if (!register_valid[G1_REGNUM]) abort(); | |
208 | ||
209 | memcpy (&inferior_registers.r_g1, ®isters[REGISTER_BYTE (G1_REGNUM)], | |
210 | 15 * REGISTER_RAW_SIZE (G1_REGNUM)); | |
211 | ||
212 | inferior_registers.r_ps = | |
213 | *(int *)®isters[REGISTER_BYTE (PS_REGNUM)]; | |
214 | inferior_registers.r_pc = | |
215 | *(int *)®isters[REGISTER_BYTE (PC_REGNUM)]; | |
216 | inferior_registers.r_npc = | |
217 | *(int *)®isters[REGISTER_BYTE (NPC_REGNUM)]; | |
218 | inferior_registers.r_y = | |
219 | *(int *)®isters[REGISTER_BYTE (Y_REGNUM)]; | |
220 | ||
221 | if (0 != ptrace (PTRACE_SETREGS, inferior_pid, | |
222 | (PTRACE_ARG3_TYPE) &inferior_registers, 0)) | |
223 | perror("ptrace_setregs"); | |
224 | } | |
225 | ||
226 | if (wanna_store & FP_REGS) | |
227 | { | |
228 | if (!register_valid[FP0_REGNUM+9]) abort(); | |
229 | memcpy (&inferior_fp_registers, ®isters[REGISTER_BYTE (FP0_REGNUM)], | |
230 | sizeof inferior_fp_registers.fpu_fr); | |
c369b6a3 | 231 | memcpy (&inferior_fp_registers.Fpu_fsr, |
dfc82617 | 232 | ®isters[REGISTER_BYTE (FPS_REGNUM)], sizeof (FPU_FSR_TYPE)); |
dfc82617 RP |
233 | if (0 != |
234 | ptrace (PTRACE_SETFPREGS, inferior_pid, | |
235 | (PTRACE_ARG3_TYPE) &inferior_fp_registers, 0)) | |
236 | perror("ptrace_setfpregs"); | |
237 | } | |
238 | } | |
239 | ||
240 | ||
241 | void | |
242 | fetch_core_registers (core_reg_sect, core_reg_size, which, ignore) | |
243 | char *core_reg_sect; | |
244 | unsigned core_reg_size; | |
245 | int which; | |
246 | unsigned int ignore; /* reg addr, unused in this version */ | |
247 | { | |
248 | ||
249 | if (which == 0) { | |
250 | ||
251 | /* Integer registers */ | |
252 | ||
253 | #define gregs ((struct regs *)core_reg_sect) | |
254 | /* G0 *always* holds 0. */ | |
255 | *(int *)®isters[REGISTER_BYTE (0)] = 0; | |
256 | ||
257 | /* The globals and output registers. */ | |
258 | memcpy (®isters[REGISTER_BYTE (G1_REGNUM)], &gregs->r_g1, | |
259 | 15 * REGISTER_RAW_SIZE (G1_REGNUM)); | |
260 | *(int *)®isters[REGISTER_BYTE (PS_REGNUM)] = gregs->r_ps; | |
261 | *(int *)®isters[REGISTER_BYTE (PC_REGNUM)] = gregs->r_pc; | |
262 | *(int *)®isters[REGISTER_BYTE (NPC_REGNUM)] = gregs->r_npc; | |
263 | *(int *)®isters[REGISTER_BYTE (Y_REGNUM)] = gregs->r_y; | |
264 | ||
265 | /* My best guess at where to get the locals and input | |
266 | registers is exactly where they usually are, right above | |
267 | the stack pointer. If the core dump was caused by a bus error | |
268 | from blowing away the stack pointer (as is possible) then this | |
269 | won't work, but it's worth the try. */ | |
270 | { | |
271 | int sp; | |
272 | ||
273 | sp = *(int *)®isters[REGISTER_BYTE (SP_REGNUM)]; | |
274 | if (0 != target_read_memory (sp, ®isters[REGISTER_BYTE (L0_REGNUM)], | |
275 | 16 * REGISTER_RAW_SIZE (L0_REGNUM))) | |
276 | { | |
199b2450 TL |
277 | /* fprintf_unfiltered so user can still use gdb */ |
278 | fprintf_unfiltered (gdb_stderr, | |
dfc82617 RP |
279 | "Couldn't read input and local registers from core file\n"); |
280 | } | |
281 | } | |
282 | } else if (which == 2) { | |
283 | ||
284 | /* Floating point registers */ | |
285 | ||
286 | #define fpuregs ((struct fpu *) core_reg_sect) | |
287 | if (core_reg_size >= sizeof (struct fpu)) | |
288 | { | |
289 | memcpy (®isters[REGISTER_BYTE (FP0_REGNUM)], fpuregs->fpu_regs, | |
290 | sizeof (fpuregs->fpu_regs)); | |
291 | memcpy (®isters[REGISTER_BYTE (FPS_REGNUM)], &fpuregs->fpu_fsr, | |
292 | sizeof (FPU_FSR_TYPE)); | |
293 | } | |
294 | else | |
199b2450 | 295 | fprintf_unfiltered (gdb_stderr, "Couldn't read float regs from core file\n"); |
dfc82617 RP |
296 | } |
297 | } | |
298 | ||
7531f36e FF |
299 | int |
300 | kernel_u_size () | |
301 | { | |
302 | return (sizeof (struct user)); | |
303 | } |