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c761af65 | 1 | # Copyright (C) 2002, 2003, 2005 Free Software Foundation, Inc. |
57680a24 EZ |
2 | # |
3 | # This program is free software; you can redistribute it and/or modify | |
4 | # it under the terms of the GNU General Public License as published by | |
5 | # the Free Software Foundation; either version 2 of the License, or | |
6 | # (at your option) any later version. | |
7 | # | |
8 | # This program is distributed in the hope that it will be useful, | |
9 | # but WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
11 | # GNU General Public License for more details. | |
12 | # | |
13 | # You should have received a copy of the GNU General Public License | |
14 | # along with this program; if not, write to the Free Software | |
15 | # Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
16 | # | |
17 | # Please email any bugs, comments, and/or additions to this file to: | |
18 | # bug-gdb@prep.ai.mit.edu | |
19 | # | |
20 | ||
21 | # Tests for Powerpc AltiVec register setting and fetching | |
22 | ||
23 | if $tracelevel then { | |
24 | strace $tracelevel | |
25 | } | |
26 | ||
27 | # | |
28 | # Test the use of registers, especially AltiVec registers, for Powerpc. | |
29 | # This file uses altivec-regs.c for input. | |
30 | # | |
31 | ||
32 | set prms_id 0 | |
33 | set bug_id 0 | |
34 | ||
3c95e6af | 35 | if {![istarget "powerpc*"] || [skip_altivec_tests]} then { |
57680a24 | 36 | verbose "Skipping altivec register tests." |
3c95e6af | 37 | verbose -log "Skipping altivec register tests." |
57680a24 EZ |
38 | return |
39 | } | |
40 | ||
41 | set testfile "altivec-regs" | |
42 | set binfile ${objdir}/${subdir}/${testfile} | |
f2dd3617 | 43 | set srcfile ${testfile}.c |
57680a24 | 44 | |
d1779be4 PG |
45 | set compile_flags {debug additional_flags=-w} |
46 | if [get_compiler_info $binfile] { | |
47 | warning "get_compiler failed" | |
48 | return -1 | |
49 | } | |
50 | ||
51 | if [test_compiler_info gcc*] { | |
52 | set compile_flags "$compile_flags additional_flags=-maltivec" | |
53 | } elseif [test_compiler_info xlc*] { | |
54 | set compile_flags "$compile_flags additional_flags=-qaltivec" | |
55 | } else { | |
56 | warning "unknown compiler" | |
57 | return -1 | |
58 | } | |
59 | ||
60 | if { [gdb_compile ${srcdir}/${subdir}/${srcfile} ${binfile} executable $compile_flags] != "" } { | |
57680a24 EZ |
61 | gdb_suppress_entire_file "Testcase compile failed, so all tests in this file will automatically fail." |
62 | } | |
63 | ||
64 | gdb_start | |
65 | gdb_reinitialize_dir $srcdir/$subdir | |
66 | gdb_load ${binfile} | |
67 | ||
68 | # | |
69 | # Run to `main' where we begin our tests. | |
70 | # | |
71 | ||
72 | if ![runto_main] then { | |
73 | gdb_suppress_tests | |
74 | } | |
75 | ||
76 | # set all the registers integer portions to 1 | |
77 | for {set i 0} {$i < 32} {incr i 1} { | |
78 | for {set j 0} {$j < 4} {incr j 1} { | |
79 | gdb_test "set \$vr$i.v4_int32\[$j\] = 1" "" "set reg vr$i.v4si.f\[$j\]" | |
80 | } | |
81 | } | |
82 | ||
83 | gdb_test "set \$vscr = 1" "" "" | |
84 | gdb_test "set \$vrsave = 1" "" "" | |
85 | ||
86 | # Now execute some target code, so that GDB's register cache is flushed. | |
87 | ||
88 | gdb_test "next" "" "" | |
89 | ||
90 | send_gdb "show endian\n" | |
91 | gdb_expect { | |
92 | -re "(The target endianness is set automatically .currently )(big|little)( endian.*)$gdb_prompt $" { | |
93 | pass "endianness" | |
94 | set endianness $expect_out(2,string) | |
95 | } | |
96 | -re ".*$gdb_prompt $" { | |
97 | fail "couldn't get endianness" | |
98 | } | |
99 | timeout { fail "(timeout) endianness" } | |
100 | } | |
101 | ||
102 | # And then read the AltiVec registers back, to see that | |
103 | # a) the register write above worked, and | |
104 | # b) the register read (below) also works. | |
105 | ||
106 | if {$endianness == "big"} { | |
107 | set vector_register ".uint128 = 0x00000001000000010000000100000001, v4_float = .0x0, 0x0, 0x0, 0x0., v4_int32 = .0x1, 0x1, 0x1, 0x1., v8_int16 = .0x0, 0x1, 0x0, 0x1, 0x0, 0x1, 0x0, 0x1., v16_int8 = .0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1.." | |
108 | } else { | |
109 | set vector_register ".uint128 = 0x00000001000000010000000100000001, v4_float = .0x0, 0x0, 0x0, 0x0., v4_int32 = .0x1, 0x1, 0x1, 0x1., v8_int16 = .0x1, 0x0, 0x1, 0x0, 0x1, 0x0, 0x1, 0x0., v16_int8 = .0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0.." | |
110 | } | |
111 | ||
112 | for {set i 0} {$i < 32} {incr i 1} { | |
113 | gdb_test "info reg vr$i" "vr$i.*$vector_register" "info reg vr$i" | |
114 | } | |
115 | ||
f4711d79 PG |
116 | gdb_test "info reg vrsave" "vrsave.*0x1\t1" "info reg vrsave" |
117 | gdb_test "info reg vscr" "vscr.*0x1\t1" "info reg vscr" | |
57680a24 EZ |
118 | |
119 | # Now redo the same tests, but using the print command. | |
120 | # Note: in LE case, the char array is printed WITHOUT the last character. | |
121 | # Gdb treats the terminating null char in the array like the terminating | |
122 | # null char in a string and doesn't print it. This is not a failure, but | |
123 | # the way gdb works. | |
124 | ||
125 | if {$endianness == "big"} { | |
6ac4d15a | 126 | set decimal_vector ".uint128 = 0x00000001000000010000000100000001, v4_float = .1.*e-45, 1.*e-45, 1.*e-45, 1.*e-45., v4_int32 = .1, 1, 1, 1., v8_int16 = .0, 1, 0, 1, 0, 1, 0, 1., v16_int8 = ..000.000.000.001.000.000.000.001.000.000.000.001.000.000.000.001.." |
57680a24 | 127 | } else { |
6ac4d15a | 128 | set decimal_vector ".uint128 = 0x00000001000000010000000100000001, v4_float = .1.*e-45, 1.*e-45, 1.*e-45, 1.*e-45., v4_int32 = .1, 1, 1, 1., v8_int16 = .1, 0, 1, 0, 1, 0, 1, 0., v16_int8 = ..001.000.000.000.001.000.000.000.001.000.000.000.001.000.000.." |
57680a24 EZ |
129 | } |
130 | ||
131 | for {set i 0} {$i < 32} {incr i 1} { | |
132 | gdb_test "print \$vr$i" ".* = $decimal_vector" "print vr$i" | |
133 | } | |
134 | ||
135 | gdb_test "print \$vrsave" ".* = 1" "print vrsave" | |
136 | gdb_test "print \$vscr" ".* = 1" "print vscr" | |
137 | ||
138 | for {set i 0} {$i < 32} {incr i 1} { | |
139 | set pattern$i ".*vr$i.*" | |
140 | append pattern$i $vector_register | |
141 | } | |
142 | ||
561d7a1d PG |
143 | send_gdb "info vector\n" |
144 | gdb_expect_list "info vector" ".*$gdb_prompt $" { | |
57680a24 EZ |
145 | [$pattern0] |
146 | [$pattern1] | |
147 | [$pattern2] | |
148 | [$pattern3] | |
149 | [$pattern4] | |
150 | [$pattern5] | |
151 | [$pattern6] | |
152 | [$pattern7] | |
153 | [$pattern8] | |
154 | [$pattern9] | |
155 | [$pattern10] | |
156 | [$pattern11] | |
157 | [$pattern12] | |
158 | [$pattern13] | |
159 | [$pattern14] | |
160 | [$pattern15] | |
161 | [$pattern16] | |
162 | [$pattern17] | |
163 | [$pattern18] | |
164 | [$pattern19] | |
165 | [$pattern20] | |
166 | [$pattern21] | |
167 | [$pattern22] | |
168 | [$pattern23] | |
169 | [$pattern24] | |
170 | [$pattern25] | |
171 | [$pattern26] | |
172 | [$pattern27] | |
173 | [$pattern28] | |
174 | [$pattern29] | |
175 | [$pattern30] | |
176 | [$pattern31] | |
177 | "\[ \t\n\r\]+vscr\[ \t\]+0x1" | |
178 | "\[ \t\n\r\]+vrsave\[ \t\]+0x1" | |
179 | } | |
180 | ||
181 | gdb_test "break vector_fun" \ | |
182 | "Breakpoint 2 at.*altivec-regs.c, line \[0-9\]+\\." \ | |
183 | "Set breakpoint at vector_fun" | |
184 | ||
185 | # Actually it is nuch easier to see these results printed in hex. | |
186 | gdb_test "set output-radix 16" \ | |
187 | "Output radix now set to decimal 16, hex 10, octal 20." \ | |
188 | "Set output radix to hex" | |
189 | ||
190 | gdb_test "continue" \ | |
191 | "Breakpoint 2, vector_fun .a=.0xfefefefe, 0xfefefefe, 0xfefefefe, 0xfefefefe., b=.0x1010101, 0x1010101, 0x1010101, 0x1010101.*altivec-regs.c.*vec_splat_u8.2..;" \ | |
192 | "continue to vector_fun" | |
193 | ||
194 | # Do a next over the assignment to vector 'a'. | |
195 | gdb_test "next" ".*b = \\(\\(vector unsigned int\\) vec_splat_u8\\(3\\)\\);" \ | |
196 | "next (1)" | |
197 | ||
198 | # Do a next over the assignment to vector 'b'. | |
199 | gdb_test "next" "c = vec_add \\(a, b\\);" \ | |
200 | "next (2)" | |
201 | ||
202 | # Now 'a' should be '0x02020202...' and 'b' should be '0x03030303...' | |
203 | gdb_test "print/x a" \ | |
204 | ".*= .0x2020202, 0x2020202, 0x2020202, 0x2020202." \ | |
205 | "print vector parameter a" | |
206 | ||
207 | gdb_test "print/x b" \ | |
208 | ".*= .0x3030303, 0x3030303, 0x3030303, 0x3030303." \ | |
209 | "print vector parameter b" | |
210 | ||
211 | # If we do an 'up' now, and print 'x' and 'y' we should see the values they | |
212 | # have in main, not the values they have in vector_fun. | |
213 | gdb_test "up" ".1.*main \\(\\) at.*altivec-regs.c.*z = vector_fun \\(x, y\\);" \ | |
214 | "up to main" | |
215 | ||
216 | gdb_test "print/x x" \ | |
217 | ".*= .0xfefefefe, 0xfefefefe, 0xfefefefe, 0xfefefefe." \ | |
218 | "print vector x" | |
219 | ||
220 | gdb_test "print/x y" \ | |
221 | ".*= .0x1010101, 0x1010101, 0x1010101, 0x1010101." \ | |
222 | "print vector y" | |
223 | ||
224 | # now go back to vector_func and do a finish, to see if we can print the return | |
225 | # value correctly. | |
226 | ||
227 | gdb_test "down" \ | |
228 | ".0 vector_fun \\(a=.0x2020202, 0x2020202, 0x2020202, 0x2020202., b=.0x3030303, 0x3030303, 0x3030303, 0x3030303.\\) at.*altivec-regs.c.*c = vec_add \\(a, b\\);" \ | |
229 | "down to vector_fun" | |
230 | ||
231 | gdb_test "finish" \ | |
232 | "Run till exit from .0 vector_fun \\(a=.0x2020202, 0x2020202, 0x2020202, 0x2020202., b=.0x3030303, 0x3030303, 0x3030303, 0x3030303.\\) at.*altivec-regs.c.*in main \\(\\) at.*altivec-regs.c.*z = vector_fun \\(x, y\\);.*Value returned is.*= .0x5050505, 0x5050505, 0x5050505, 0x5050505." \ | |
233 | "finish returned correct value" | |
234 | ||
235 | ||
236 |