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7b6bb8da | 1 | # Copyright (C) 2008, 2009, 2010, 2011 Free Software Foundation, Inc. |
604c2f83 LM |
2 | # |
3 | # This program is free software; you can redistribute it and/or modify | |
4 | # it under the terms of the GNU General Public License as published by | |
5 | # the Free Software Foundation; either version 3 of the License, or | |
6 | # (at your option) any later version. | |
7 | # | |
8 | # This program is distributed in the hope that it will be useful, | |
9 | # but WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
11 | # GNU General Public License for more details. | |
12 | # | |
13 | # You should have received a copy of the GNU General Public License | |
14 | # along with this program. If not, see <http://www.gnu.org/licenses/>. | |
15 | # | |
604c2f83 | 16 | |
604c2f83 LM |
17 | if $tracelevel then { |
18 | strace $tracelevel | |
19 | } | |
20 | ||
21 | # | |
22 | # Test the use of VSX registers, for Powerpc. | |
23 | # | |
24 | ||
604c2f83 LM |
25 | |
26 | if {![istarget "powerpc*"] || [skip_vsx_tests]} then { | |
27 | verbose "Skipping vsx register tests." | |
604c2f83 LM |
28 | return |
29 | } | |
30 | ||
31 | set testfile "vsx-regs" | |
32 | set binfile ${objdir}/${subdir}/${testfile} | |
33 | set srcfile ${testfile}.c | |
34 | ||
35 | set compile_flags {debug nowarnings quiet} | |
36 | if [get_compiler_info $binfile] { | |
37 | warning "get_compiler failed" | |
38 | return -1 | |
39 | } | |
40 | ||
41 | if [test_compiler_info gcc*] { | |
42 | set compile_flags "$compile_flags additional_flags=-maltivec additional_flags=-mabi=altivec" | |
43 | } elseif [test_compiler_info xlc*] { | |
44 | set compile_flags "$compile_flags additional_flags=-qaltivec" | |
45 | } else { | |
46 | warning "unknown compiler" | |
47 | return -1 | |
48 | } | |
49 | ||
50 | if { [gdb_compile ${srcdir}/${subdir}/${srcfile} ${binfile} executable $compile_flags] != "" } { | |
51 | untested vsx-regs.exp | |
52 | return -1 | |
53 | } | |
54 | ||
55 | gdb_start | |
56 | gdb_reinitialize_dir $srcdir/$subdir | |
57 | gdb_load ${binfile} | |
58 | ||
59 | # Run to `main' where we begin our tests. | |
60 | ||
61 | if ![runto_main] then { | |
62 | gdb_suppress_tests | |
63 | } | |
64 | ||
65 | # Data sets used throughout the test | |
66 | ||
4572cbac TJB |
67 | set vector_register1 ".uint128 = 0x3ff4cccccccccccc0000000000000000, v2_double = .0x1, 0x0., v4_float = .0x1, 0xf99999a0, 0x0, 0x0., v4_int32 = .0x3ff4cccc, 0xcccccccc, 0x0, 0x0., v8_int16 = .0x3ff4, 0xcccc, 0xcccc, 0xcccc, 0x0, 0x0, 0x0, 0x0., v16_int8 = .0x3f, 0xf4, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0.." |
68 | ||
69 | set vector_register2 "uint128 = 0xdeadbeefdeadbeefdeadbeefdeadbeef, v2_double = .0x1, 0x1., v4_float = .0x0, 0x0, 0x0, 0x0., v4_int32 = .0xdeadbeef, 0xdeadbeef, 0xdeadbeef, 0xdeadbeef., v8_int16 = .0xdead, 0xbeef, 0xdead, 0xbeef, 0xdead, 0xbeef, 0xdead, 0xbeef., v16_int8 = .0xde, 0xad, 0xbe, 0xef, 0xde, 0xad, 0xbe, 0xef, 0xde, 0xad, 0xbe, 0xef, 0xde, 0xad, 0xbe, 0xef.." | |
604c2f83 | 70 | |
4572cbac | 71 | set vector_register3 ".uint128 = 0x00000001000000010000000100000001, v2_double = .0x0, 0x0., v4_float = .0x0, 0x0, 0x0, 0x0., v4_int32 = .0x1, 0x1, 0x1, 0x1., v8_int16 = .0x0, 0x1, 0x0, 0x1, 0x0, 0x1, 0x0, 0x1., v16_int8 = .0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1.." |
604c2f83 | 72 | |
4572cbac | 73 | set vector_register3_vr ".uint128 = 0x00000001000000010000000100000001, v4_float = .0x0, 0x0, 0x0, 0x0., v4_int32 = .0x1, 0x1, 0x1, 0x1., v8_int16 = .0x0, 0x1, 0x0, 0x1, 0x0, 0x1, 0x0, 0x1., v16_int8 = .0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1.." |
604c2f83 LM |
74 | |
75 | set float_register ".raw 0xdeadbeefdeadbeef." | |
76 | ||
77 | # First run the F0~F31/VS0~VS31 tests | |
78 | ||
79 | # 1: Set F0~F31 registers and check if it reflects on VS0~VS31. | |
80 | for {set i 0} {$i < 32} {incr i 1} { | |
4572cbac | 81 | gdb_test_no_output "set \$f$i = 1\.3" |
604c2f83 LM |
82 | } |
83 | ||
84 | for {set i 0} {$i < 32} {incr i 1} { | |
85 | gdb_test "info reg vs$i" "vs$i.*$vector_register1" "info reg vs$i (doubleword 0)" | |
86 | } | |
87 | ||
88 | # 2: Set VS0~VS31 registers and check if it reflects on F0~F31. | |
89 | for {set i 0} {$i < 32} {incr i 1} { | |
90 | for {set j 0} {$j < 4} {incr j 1} { | |
4572cbac | 91 | gdb_test_no_output "set \$vs$i.v4_int32\[$j\] = 0xdeadbeef" |
604c2f83 LM |
92 | } |
93 | } | |
94 | ||
95 | for {set i 0} {$i < 32} {incr i 1} { | |
96 | gdb_test "info reg f$i" "f$i.*$float_register" "info reg f$i" | |
97 | } | |
98 | ||
99 | for {set i 0} {$i < 32} {incr i 1} { | |
100 | gdb_test "info reg vs$i" "vs$i.*$vector_register2" "info reg vs$i (doubleword 1)" | |
101 | } | |
102 | ||
103 | # Now run the VR0~VR31/VS32~VS63 tests | |
104 | ||
105 | # 1: Set VR0~VR31 registers and check if it reflects on VS32~VS63. | |
106 | for {set i 0} {$i < 32} {incr i 1} { | |
107 | for {set j 0} {$j < 4} {incr j 1} { | |
4572cbac | 108 | gdb_test_no_output "set \$vr$i.v4_int32\[$j\] = 1" |
604c2f83 LM |
109 | } |
110 | } | |
111 | ||
112 | for {set i 32} {$i < 64} {incr i 1} { | |
113 | gdb_test "info reg vs$i" "vs$i.*$vector_register3" "info reg vs$i" | |
114 | } | |
115 | # 2: Set VS32~VS63 registers and check if it reflects on VR0~VR31. | |
116 | for {set i 32} {$i < 64} {incr i 1} { | |
117 | for {set j 0} {$j < 4} {incr j 1} { | |
4572cbac | 118 | gdb_test_no_output "set \$vs$i.v4_int32\[$j\] = 1" |
604c2f83 LM |
119 | } |
120 | } | |
121 | ||
122 | for {set i 0} {$i < 32} {incr i 1} { | |
4572cbac | 123 | gdb_test "info reg vr$i" "vr$i.*$vector_register3_vr" "info reg vr$i" |
604c2f83 LM |
124 | } |
125 | ||
126 | set escapedfilename [string_to_regexp ${objdir}/${subdir}/vsx-core.test] | |
127 | ||
128 | set core_supported 0 | |
129 | ||
130 | gdb_test_multiple "gcore ${objdir}/${subdir}/vsx-core.test" \ | |
131 | "Save a VSX-enabled corefile" \ | |
132 | { | |
133 | -re "Saved corefile ${escapedfilename}\[\r\n\]+$gdb_prompt $" { | |
134 | pass "Save a VSX-enabled corefile" | |
135 | global core_supported | |
136 | set core_supported 1 | |
137 | } | |
138 | -re "Can't create a corefile\[\r\n\]+$gdb_prompt $" { | |
139 | unsupported "Save a VSX-enabled corefile" | |
140 | global core_supported | |
141 | set core_supported 0 | |
142 | } | |
143 | } | |
144 | ||
145 | if {!$core_supported} { | |
146 | return -1 | |
147 | } | |
148 | ||
149 | gdb_exit | |
150 | gdb_start | |
151 | gdb_reinitialize_dir $srcdir/$subdir | |
152 | gdb_load ${binfile} | |
153 | ||
154 | gdb_test_multiple "core ${objdir}/${subdir}/vsx-core.test" \ | |
155 | "re-load generated corefile" \ | |
156 | { | |
157 | -re ".* is not a core dump:.*$gdb_prompt $" { | |
158 | fail "re-load generated corefile (bad file format)" | |
159 | # No use proceeding from here. | |
160 | return; | |
161 | } | |
162 | -re ".*: No such file or directory.*$gdb_prompt $" { | |
163 | fail "re-load generated corefile (file not found)" | |
164 | # No use proceeding from here. | |
165 | return; | |
166 | } | |
167 | -re ".*Couldn't find .* registers in core file.*$gdb_prompt $" { | |
168 | fail "re-load generated corefile (incomplete note section)" | |
169 | } | |
170 | -re "Core was generated by .*$gdb_prompt $" { | |
171 | pass "re-load generated corefile" | |
172 | } | |
173 | -re ".*$gdb_prompt $" { | |
174 | fail "re-load generated corefile" | |
175 | } | |
176 | timeout { | |
177 | fail "re-load generated corefile (timeout)" | |
178 | } | |
179 | } | |
180 | ||
181 | for {set i 0} {$i < 32} {incr i 1} { | |
182 | gdb_test "info reg vs$i" "vs$i.*$vector_register2" "Restore vs$i from core file" | |
183 | } | |
184 | ||
185 | for {set i 32} {$i < 64} {incr i 1} { | |
186 | gdb_test "info reg vs$i" "vs$i.*$vector_register3" "Restore vs$i from core file" | |
187 | } |