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Commit | Line | Data |
---|---|---|
54977a68 JL |
1 | |
2 | .globl _main | |
3 | .globl call_tests | |
4 | .globl movm_tests | |
5 | .globl misc_tests | |
6 | .globl mov_tests | |
7 | .globl ext_tests | |
8 | .globl add_tests | |
9 | .globl sub_tests | |
10 | .globl cmp_tests | |
11 | .globl logical_tests | |
12 | .globl shift_tests | |
13 | .globl muldiv_tests | |
14 | .globl movbu_tests | |
15 | .globl movhu_tests | |
16 | .globl mac_tests | |
17 | .globl bit_tests | |
18 | .globl dsp_add_tests | |
19 | .globl dsp_cmp_tests | |
20 | .globl dsp_sub_tests | |
21 | .globl dsp_mov_tests | |
22 | .globl dsp_logical_tests | |
23 | .globl dsp_misc_tests | |
24 | ||
25 | .text | |
26 | _main: | |
27 | call_tests: | |
28 | call 256,[a2,a3,exreg0],9 | |
29 | call 256,[a2,a3,exreg1],9 | |
30 | call 256,[a2,a3,exother],9 | |
31 | call 256,[a2,a3,all],9 | |
32 | call 131071,[a2,a3,exreg0],9 | |
33 | call 131071,[a2,a3,exreg1],9 | |
34 | call 131071,[a2,a3,exother],9 | |
35 | call 131071,[a2,a3,all],9 | |
36 | ||
37 | movm_tests: | |
38 | movm (sp),[a2,a3,exreg0] | |
39 | movm (sp),[a2,a3,exreg1] | |
40 | movm (sp),[a2,a3,exother] | |
41 | movm (sp),[a2,a3,all] | |
42 | movm [a2,a3,exreg0],(sp) | |
43 | movm [a2,a3,exreg1],(sp) | |
44 | movm [a2,a3,exother],(sp) | |
45 | movm [a2,a3,all],(sp) | |
46 | movm (usp),[a2,a3,exreg0] | |
47 | movm (usp),[a2,a3,exreg1] | |
48 | movm (usp),[a2,a3,exother] | |
49 | movm (usp),[a2,a3,all] | |
50 | movm [a2,a3,exreg0],(usp) | |
51 | movm [a2,a3,exreg1],(usp) | |
52 | movm [a2,a3,exother],(usp) | |
53 | movm [a2,a3,all],(usp) | |
54 | ||
55 | misc_tests: | |
56 | syscall 0x4 | |
57 | mcst9 d0 | |
58 | mcst48 d1 | |
59 | getchx d0 | |
60 | getclx d1 | |
61 | clr r9 | |
62 | sat16 r9,r8 | |
63 | mcste r7,r6 | |
64 | swap r5,r4 | |
65 | swaph r3,r2 | |
66 | swhw r1,r0 | |
67 | ||
68 | ||
69 | mov_tests: | |
70 | mov r0,r1 | |
71 | mov xr0, r1 | |
72 | mov r1, xr2 | |
73 | mov (r1),r2 | |
74 | mov r3,(r4) | |
75 | mov (sp),r5 | |
76 | mov r6,(sp) | |
77 | mov 16,r1 | |
78 | mov 16,xr1 | |
79 | mov (16,r1),r2 | |
80 | mov r2,(16,r1) | |
81 | mov (16,sp),r2 | |
82 | mov r2,(16,sp) | |
83 | mov 0x1ffeff,r2 | |
84 | mov 0x1ffeff,xr2 | |
85 | mov (0x1ffeff,r1),r2 | |
86 | mov r2,(0x1ffeff,r1) | |
87 | mov (0x1ffeff,sp),r2 | |
88 | mov r2,(0x1ffeff,sp) | |
89 | mov (0x1ffeff),r2 | |
90 | mov r2,(0x1ffeff) | |
91 | mov 0x7ffefdfc,r2 | |
92 | mov 0x7ffefdfc,xr2 | |
93 | mov (0x7ffefdfc,r1),r2 | |
94 | mov r2,(0x7ffefdfc,r1) | |
95 | mov (0x7ffefdfc,sp),r2 | |
96 | mov r2,(0x7ffefdfc,sp) | |
97 | mov (0x7ffefdfc),r2 | |
98 | mov r2,(0x7ffefdfc) | |
99 | movu 16,r1 | |
100 | movu 0x1ffeff,r2 | |
101 | movu 0x7ffefdfc,r2 | |
102 | mov usp,a0 | |
103 | mov ssp,a1 | |
104 | mov msp,a2 | |
105 | mov pc,a3 | |
106 | mov a0,usp | |
107 | mov a1,ssp | |
108 | mov a2,msp | |
109 | mov epsw,d0 | |
110 | mov d1,epsw | |
111 | mov a0,r1 | |
112 | mov d2,r3 | |
113 | mov r5,a1 | |
114 | mov r7,d3 | |
115 | ||
116 | ext_tests: | |
117 | ext r2 | |
118 | extb r3,r4 | |
119 | extbu r4,r5 | |
120 | exth r6,r7 | |
121 | exthu r7,r8 | |
122 | ||
123 | add_tests: | |
124 | add r10,r11 | |
125 | add 16,r1 | |
126 | add 0x1ffeff,r2 | |
127 | add 0x7ffefdfc,r2 | |
128 | add r1,r2,r3 | |
129 | addc r12,r13 | |
130 | addc 16,r1 | |
131 | addc 0x1ffeff,r2 | |
132 | addc 0x7ffefdfc,r2 | |
133 | inc r13 | |
134 | inc4 r12 | |
135 | ||
136 | ||
137 | sub_tests: | |
138 | sub r14,r15 | |
139 | sub 16,r1 | |
140 | sub 0x1ffeff,r2 | |
141 | sub 0x7ffefdfc,r2 | |
142 | subc r15,r14 | |
143 | subc 16,r1 | |
144 | subc 0x1ffeff,r2 | |
145 | subc 0x7ffefdfc,r2 | |
146 | ||
147 | cmp_tests: | |
148 | cmp r11,r10 | |
149 | cmp 16,r1 | |
150 | cmp 0x1ffeff,r2 | |
151 | cmp 0x7ffefdfc,r2 | |
152 | ||
153 | logical_tests: | |
154 | and r0,r1 | |
155 | or r2,r3 | |
156 | xor r4,r5 | |
157 | not r6 | |
158 | and 16,r1 | |
159 | or 16,r1 | |
160 | xor 16,r1 | |
161 | and 0x1ffeff,r2 | |
162 | or 0x1ffeff,r2 | |
163 | xor 0x1ffeff,r2 | |
164 | and 0x7ffefdfc,r2 | |
165 | or 0x7ffefdfc,r2 | |
166 | xor 0x7ffefdfc,r2 | |
167 | and 131072,epsw | |
168 | or 65535,epsw | |
169 | ||
170 | shift_tests: | |
171 | asr r7,r8 | |
172 | lsr r9,r10 | |
173 | asl r11,r12 | |
174 | asl2 r13 | |
175 | ror r14 | |
176 | rol r15 | |
177 | asr 16,r1 | |
178 | lsr 16,r1 | |
179 | asl 16,r1 | |
180 | asr 0x1ffeff,r2 | |
181 | lsr 0x1ffeff,r2 | |
182 | asl 0x1ffeff,r2 | |
183 | asr 0x7ffefdfc,r2 | |
184 | lsr 0x7ffefdfc,r2 | |
185 | asl 0x7ffefdfc,r2 | |
186 | ||
187 | muldiv_tests: | |
188 | mul r1,r2 | |
189 | mulu r3,r4 | |
190 | mul 16,r1 | |
191 | mulu 16,r1 | |
192 | mul 0x1ffeff,r2 | |
193 | mulu 0x1ffeff,r2 | |
194 | mul 0x7ffefdfc,r2 | |
195 | mulu 0x7ffefdfc,r2 | |
196 | div r5,r6 | |
197 | divu r7,r8 | |
198 | dmulh r13,r12 | |
199 | dmulhu r11,r10 | |
200 | dmulh 0x7ffefdfc,r2 | |
201 | dmulhu 0x7ffefdfc,r2 | |
202 | ||
203 | movbu_tests: | |
204 | movbu (r5),r6 | |
205 | movbu r7,(r8) | |
206 | movbu (sp),r7 | |
207 | movbu r8,(sp) | |
208 | movbu (16,r1),r2 | |
209 | movbu r2,(16,r1) | |
210 | movbu (16,sp),r2 | |
211 | movbu r2,(16,sp) | |
212 | movbu (0x1ffeff,r1),r2 | |
213 | movbu r2,(0x1ffeff,r1) | |
214 | movbu (0x1ffeff,sp),r2 | |
215 | movbu r2,(0x1ffeff,sp) | |
216 | movbu (0x1ffeff),r2 | |
217 | movbu r2,(0x1ffeff) | |
218 | movbu (0x7ffefdfc,r1),r2 | |
219 | movbu r2,(0x7ffefdfc,r1) | |
220 | movbu (0x7ffefdfc,sp),r2 | |
221 | movbu r2,(0x7ffefdfc,sp) | |
222 | movbu (0x7ffefdfc),r2 | |
223 | movbu r2,(0x7ffefdfc) | |
224 | ||
225 | movhu_tests: | |
226 | movhu (r9),r10 | |
227 | movhu r11,(r12) | |
228 | movhu (sp),r9 | |
229 | movhu r10,(sp) | |
230 | movhu (16,r1),r2 | |
231 | movhu r2,(16,r1) | |
232 | movhu (16,sp),r2 | |
233 | movhu r2,(16,sp) | |
234 | movhu (0x1ffeff,r1),r2 | |
235 | movhu r2,(0x1ffeff,r1) | |
236 | movhu (0x1ffeff,sp),r2 | |
237 | movhu r2,(0x1ffeff,sp) | |
238 | movhu (0x1ffeff),r2 | |
239 | movhu r2,(0x1ffeff) | |
240 | movhu (0x7ffefdfc,r1),r2 | |
241 | movhu r2,(0x7ffefdfc,r1) | |
242 | movhu (0x7ffefdfc,sp),r2 | |
243 | movhu r2,(0x7ffefdfc,sp) | |
244 | movhu (0x7ffefdfc),r2 | |
245 | movhu r2,(0x7ffefdfc) | |
246 | ||
247 | ||
248 | mac_tests: | |
249 | mac r1,r2 | |
250 | macu r3,r4 | |
251 | macb r5,r6 | |
252 | macbu r7,r8 | |
253 | mach r9,r10 | |
254 | machu r11,r12 | |
255 | dmach r13,r14 | |
256 | dmachu r15,r14 | |
257 | mac 16,r1 | |
258 | macu 16,r1 | |
259 | macb 16,r1 | |
260 | macbu 16,r1 | |
261 | mach 16,r1 | |
262 | machu 16,r1 | |
263 | mac 0x1ffeff,r2 | |
264 | macu 0x1ffeff,r2 | |
265 | macb 0x1ffeff,r2 | |
266 | macbu 0x1ffeff,r2 | |
267 | mach 0x1ffeff,r2 | |
268 | machu 0x1ffeff,r2 | |
269 | mac 0x7ffefdfc,r2 | |
270 | macu 0x7ffefdfc,r2 | |
271 | macb 0x7ffefdfc,r2 | |
272 | macbu 0x7ffefdfc,r2 | |
273 | mach 0x7ffefdfc,r2 | |
274 | machu 0x7ffefdfc,r2 | |
275 | dmach 0x7ffefdfc,r2 | |
276 | dmachu 0x7ffefdfc,r2 | |
277 | ||
278 | bit_tests: | |
279 | bsch r1,r2 | |
280 | btst 16,r1 | |
281 | btst 0x1ffeff,r2 | |
282 | btst 0x7ffefdfc,r2 | |
283 | ||
284 | ||
285 | ||
286 | dsp_add_tests: | |
287 | add_add r4,r1,r2,r3 | |
288 | add_add r4,r1,2,r3 | |
289 | add_sub r4,r1,r2,r3 | |
290 | add_sub r4,r1,2,r3 | |
291 | add_cmp r4,r1,r2,r3 | |
292 | add_cmp r4,r1,2,r3 | |
293 | add_mov r4,r1,r2,r3 | |
294 | add_mov r4,r1,2,r3 | |
295 | add_asr r4,r1,r2,r3 | |
296 | add_asr r4,r1,2,r3 | |
297 | add_lsr r4,r1,r2,r3 | |
298 | add_lsr r4,r1,2,r3 | |
299 | add_asl r4,r1,r2,r3 | |
300 | add_asl r4,r1,2,r3 | |
301 | add_add 4,r1,r2,r3 | |
302 | add_add 4,r1,2,r3 | |
303 | add_sub 4,r1,r2,r3 | |
304 | add_sub 4,r1,2,r3 | |
305 | add_cmp 4,r1,r2,r3 | |
306 | add_cmp 4,r1,2,r3 | |
307 | add_mov 4,r1,r2,r3 | |
308 | add_mov 4,r1,2,r3 | |
309 | add_asr 4,r1,r2,r3 | |
310 | add_asr 4,r1,2,r3 | |
311 | add_lsr 4,r1,r2,r3 | |
312 | add_lsr 4,r1,2,r3 | |
313 | add_asl 4,r1,r2,r3 | |
314 | add_asl 4,r1,2,r3 | |
315 | ||
316 | dsp_cmp_tests: | |
317 | cmp_add r4,r1,r2,r3 | |
318 | cmp_add r4,r1,2,r3 | |
319 | cmp_sub r4,r1,r2,r3 | |
320 | cmp_sub r4,r1,2,r3 | |
321 | cmp_mov r4,r1,r2,r3 | |
322 | cmp_mov r4,r1,2,r3 | |
323 | cmp_asr r4,r1,r2,r3 | |
324 | cmp_asr r4,r1,2,r3 | |
325 | cmp_lsr r4,r1,r2,r3 | |
326 | cmp_lsr r4,r1,2,r3 | |
327 | cmp_asl r4,r1,r2,r3 | |
328 | cmp_asl r4,r1,2,r3 | |
329 | cmp_add 4,r1,r2,r3 | |
330 | cmp_add 4,r1,2,r3 | |
331 | cmp_sub 4,r1,r2,r3 | |
332 | cmp_sub 4,r1,2,r3 | |
333 | cmp_mov 4,r1,r2,r3 | |
334 | cmp_mov 4,r1,2,r3 | |
335 | cmp_asr 4,r1,r2,r3 | |
336 | cmp_asr 4,r1,2,r3 | |
337 | cmp_lsr 4,r1,r2,r3 | |
338 | cmp_lsr 4,r1,2,r3 | |
339 | cmp_asl 4,r1,r2,r3 | |
340 | cmp_asl 4,r1,2,r3 | |
341 | ||
342 | dsp_sub_tests: | |
343 | sub_add r4,r1,r2,r3 | |
344 | sub_add r4,r1,2,r3 | |
345 | sub_sub r4,r1,r2,r3 | |
346 | sub_sub r4,r1,2,r3 | |
347 | sub_cmp r4,r1,r2,r3 | |
348 | sub_cmp r4,r1,2,r3 | |
349 | sub_mov r4,r1,r2,r3 | |
350 | sub_mov r4,r1,2,r3 | |
351 | sub_asr r4,r1,r2,r3 | |
352 | sub_asr r4,r1,2,r3 | |
353 | sub_lsr r4,r1,r2,r3 | |
354 | sub_lsr r4,r1,2,r3 | |
355 | sub_asl r4,r1,r2,r3 | |
356 | sub_asl r4,r1,2,r3 | |
357 | sub_add 4,r1,r2,r3 | |
358 | sub_add 4,r1,2,r3 | |
359 | sub_sub 4,r1,r2,r3 | |
360 | sub_sub 4,r1,2,r3 | |
361 | sub_cmp 4,r1,r2,r3 | |
362 | sub_cmp 4,r1,2,r3 | |
363 | sub_mov 4,r1,r2,r3 | |
364 | sub_mov 4,r1,2,r3 | |
365 | sub_asr 4,r1,r2,r3 | |
366 | sub_asr 4,r1,2,r3 | |
367 | sub_lsr 4,r1,r2,r3 | |
368 | sub_lsr 4,r1,2,r3 | |
369 | sub_asl 4,r1,r2,r3 | |
370 | sub_asl 4,r1,2,r3 | |
371 | ||
372 | dsp_mov_tests: | |
373 | mov_add r4,r1,r2,r3 | |
374 | mov_add r4,r1,2,r3 | |
375 | mov_sub r4,r1,r2,r3 | |
376 | mov_sub r4,r1,2,r3 | |
377 | mov_cmp r4,r1,r2,r3 | |
378 | mov_cmp r4,r1,2,r3 | |
379 | mov_mov r4,r1,r2,r3 | |
380 | mov_mov r4,r1,2,r3 | |
381 | mov_asr r4,r1,r2,r3 | |
382 | mov_asr r4,r1,2,r3 | |
383 | mov_lsr r4,r1,r2,r3 | |
384 | mov_lsr r4,r1,2,r3 | |
385 | mov_asl r4,r1,r2,r3 | |
386 | mov_asl r4,r1,2,r3 | |
387 | mov_add 4,r1,r2,r3 | |
388 | mov_add 4,r1,2,r3 | |
389 | mov_sub 4,r1,r2,r3 | |
390 | mov_sub 4,r1,2,r3 | |
391 | mov_cmp 4,r1,r2,r3 | |
392 | mov_cmp 4,r1,2,r3 | |
393 | mov_mov 4,r1,r2,r3 | |
394 | mov_mov 4,r1,2,r3 | |
395 | mov_asr 4,r1,r2,r3 | |
396 | mov_asr 4,r1,2,r3 | |
397 | mov_lsr 4,r1,r2,r3 | |
398 | mov_lsr 4,r1,2,r3 | |
399 | mov_asl 4,r1,r2,r3 | |
400 | mov_asl 4,r1,2,r3 | |
401 | ||
402 | dsp_logical_tests: | |
403 | and_add r4,r1,r2,r3 | |
404 | and_add r4,r1,2,r3 | |
405 | and_sub r4,r1,r2,r3 | |
406 | and_sub r4,r1,2,r3 | |
407 | and_cmp r4,r1,r2,r3 | |
408 | and_cmp r4,r1,2,r3 | |
409 | and_mov r4,r1,r2,r3 | |
410 | and_mov r4,r1,2,r3 | |
411 | and_asr r4,r1,r2,r3 | |
412 | and_asr r4,r1,2,r3 | |
413 | and_lsr r4,r1,r2,r3 | |
414 | and_lsr r4,r1,2,r3 | |
415 | and_asl r4,r1,r2,r3 | |
416 | and_asl r4,r1,2,r3 | |
417 | xor_add r4,r1,r2,r3 | |
418 | xor_add r4,r1,2,r3 | |
419 | xor_sub r4,r1,r2,r3 | |
420 | xor_sub r4,r1,2,r3 | |
421 | xor_cmp r4,r1,r2,r3 | |
422 | xor_cmp r4,r1,2,r3 | |
423 | xor_mov r4,r1,r2,r3 | |
424 | xor_mov r4,r1,2,r3 | |
425 | xor_asr r4,r1,r2,r3 | |
426 | xor_asr r4,r1,2,r3 | |
427 | xor_lsr r4,r1,r2,r3 | |
428 | xor_lsr r4,r1,2,r3 | |
429 | xor_asl r4,r1,r2,r3 | |
430 | xor_asl r4,r1,2,r3 | |
431 | or_add r4,r1,r2,r3 | |
432 | or_add r4,r1,2,r3 | |
433 | or_sub r4,r1,r2,r3 | |
434 | or_sub r4,r1,2,r3 | |
435 | or_cmp r4,r1,r2,r3 | |
436 | or_cmp r4,r1,2,r3 | |
437 | or_mov r4,r1,r2,r3 | |
438 | or_mov r4,r1,2,r3 | |
439 | or_asr r4,r1,r2,r3 | |
440 | or_asr r4,r1,2,r3 | |
441 | or_lsr r4,r1,r2,r3 | |
442 | or_lsr r4,r1,2,r3 | |
443 | or_asl r4,r1,r2,r3 | |
444 | or_asl r4,r1,2,r3 | |
445 | ||
446 | dsp_misc_tests: | |
447 | dmach_add r4,r1,r2,r3 | |
448 | dmach_add r4,r1,2,r3 | |
449 | dmach_sub r4,r1,r2,r3 | |
450 | dmach_sub r4,r1,2,r3 | |
451 | dmach_cmp r4,r1,r2,r3 | |
452 | dmach_cmp r4,r1,2,r3 | |
453 | dmach_mov r4,r1,r2,r3 | |
454 | dmach_mov r4,r1,2,r3 | |
455 | dmach_asr r4,r1,r2,r3 | |
456 | dmach_asr r4,r1,2,r3 | |
457 | dmach_lsr r4,r1,r2,r3 | |
458 | dmach_lsr r4,r1,2,r3 | |
459 | dmach_asl r4,r1,r2,r3 | |
460 | dmach_asl r4,r1,2,r3 | |
461 | swhw_add r4,r1,r2,r3 | |
462 | swhw_add r4,r1,2,r3 | |
463 | swhw_sub r4,r1,r2,r3 | |
464 | swhw_sub r4,r1,2,r3 | |
465 | swhw_cmp r4,r1,r2,r3 | |
466 | swhw_cmp r4,r1,2,r3 | |
467 | swhw_mov r4,r1,r2,r3 | |
468 | swhw_mov r4,r1,2,r3 | |
469 | swhw_asr r4,r1,r2,r3 | |
470 | swhw_asr r4,r1,2,r3 | |
471 | swhw_lsr r4,r1,r2,r3 | |
472 | swhw_lsr r4,r1,2,r3 | |
473 | swhw_asl r4,r1,r2,r3 | |
474 | swhw_asl r4,r1,2,r3 | |
475 | sat16_add r4,r1,r2,r3 | |
476 | sat16_add r4,r1,2,r3 | |
477 | sat16_sub r4,r1,r2,r3 | |
478 | sat16_sub r4,r1,2,r3 | |
479 | sat16_cmp r4,r1,r2,r3 | |
480 | sat16_cmp r4,r1,2,r3 | |
481 | sat16_mov r4,r1,r2,r3 | |
482 | sat16_mov r4,r1,2,r3 | |
483 | sat16_asr r4,r1,r2,r3 | |
484 | sat16_asr r4,r1,2,r3 | |
485 | sat16_lsr r4,r1,r2,r3 | |
486 | sat16_lsr r4,r1,2,r3 | |
487 | sat16_asl r4,r1,r2,r3 | |
488 | sat16_asl r4,r1,2,r3 | |
489 | # mov (r1+),r2 | |
490 | # mov r3,(r4+) | |
491 | # movhu (r6+),r7 | |
492 | # movhu r8,(r9+) | |
493 | # mov (rm+,imm8),rn | |
494 | # mov rn,(rm+,imm8) | |
495 | # movhu (rm+,imm8),rn | |
496 | # movhu rn,(rm+,imm8) | |
497 | # mov (rm+,imm24),rn | |
498 | # mov rn,(rm+,imm24) | |
499 | # movhu (rm+,imm24),rn | |
500 | # movhu rn,(rm+,imm24) | |
501 | # mov (rm+,imm32),rn | |
502 | # mov rn,(rm+,imm32) | |
503 | # movhu (rm+,imm32),rn | |
504 | # movhu rn,(rm+,imm32) | |
505 |