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c906108c
SS
1/* Target-dependent code for the NEC V850 for GDB, the GNU debugger.
2 Copyright 1996, Free Software Foundation, Inc.
3
c5aa993b 4 This file is part of GDB.
c906108c 5
c5aa993b
JM
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
c906108c 10
c5aa993b
JM
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
c906108c 15
c5aa993b
JM
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
c906108c
SS
20
21#include "defs.h"
22#include "frame.h"
23#include "inferior.h"
24#include "obstack.h"
25#include "target.h"
26#include "value.h"
27#include "bfd.h"
28#include "gdb_string.h"
29#include "gdbcore.h"
30#include "symfile.h"
31
32
33static char *v850_generic_reg_names[] = REGISTER_NAMES;
34
35static char *v850e_reg_names[] =
36{
37 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
38 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
39 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
40 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
41 "eipc", "eipsw", "fepc", "fepsw", "ecr", "psw", "sr6", "sr7",
42 "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15",
43 "ctpc", "ctpsw", "dbpc", "dbpsw", "ctbp", "sr21", "sr22", "sr23",
44 "sr24", "sr25", "sr26", "sr27", "sr28", "sr29", "sr30", "sr31",
45 "pc", "fp"
46};
47
48char **v850_register_names = v850_generic_reg_names;
49
50struct
c5aa993b
JM
51 {
52 char **regnames;
53 int mach;
54 }
55v850_processor_type_table[] =
c906108c 56{
c5aa993b
JM
57 {
58 v850_generic_reg_names, bfd_mach_v850
59 }
60 ,
61 {
62 v850e_reg_names, bfd_mach_v850e
63 }
64 ,
65 {
66 v850e_reg_names, bfd_mach_v850ea
67 }
68 ,
69 {
70 NULL, 0
71 }
c906108c
SS
72};
73
74/* Info gleaned from scanning a function's prologue. */
75
76struct pifsr /* Info about one saved reg */
c5aa993b
JM
77 {
78 int framereg; /* Frame reg (SP or FP) */
79 int offset; /* Offset from framereg */
80 int cur_frameoffset; /* Current frameoffset */
81 int reg; /* Saved register number */
82 };
c906108c
SS
83
84struct prologue_info
c5aa993b
JM
85 {
86 int framereg;
87 int frameoffset;
88 int start_function;
89 struct pifsr *pifsrs;
90 };
c906108c 91
a14ed312 92static CORE_ADDR v850_scan_prologue (CORE_ADDR pc, struct prologue_info *fs);
c906108c
SS
93
94
95/* Should call_function allocate stack space for a struct return? */
96int
97v850_use_struct_convention (gcc_p, type)
98 int gcc_p;
99 struct type *type;
100{
101 return (TYPE_NFIELDS (type) > 1 || TYPE_LENGTH (type) > 4);
102}
c906108c
SS
103\f
104
c5aa993b 105
c906108c 106/* Structure for mapping bits in register lists to register numbers. */
c5aa993b 107struct reg_list
c906108c
SS
108{
109 long mask;
110 int regno;
111};
112
113/* Helper function for v850_scan_prologue to handle prepare instruction. */
114
115static void
c5aa993b 116handle_prepare (int insn, int insn2, CORE_ADDR * current_pc_ptr,
c906108c
SS
117 struct prologue_info *pi, struct pifsr **pifsr_ptr)
118
119{
120 CORE_ADDR current_pc = *current_pc_ptr;
121 struct pifsr *pifsr = *pifsr_ptr;
122 long next = insn2 & 0xffff;
123 long list12 = ((insn & 1) << 16) + (next & 0xffe0);
124 long offset = (insn & 0x3e) << 1;
c5aa993b 125 static struct reg_list reg_table[] =
c906108c 126 {
c5aa993b
JM
127 {0x00800, 20}, /* r20 */
128 {0x00400, 21}, /* r21 */
129 {0x00200, 22}, /* r22 */
130 {0x00100, 23}, /* r23 */
131 {0x08000, 24}, /* r24 */
132 {0x04000, 25}, /* r25 */
133 {0x02000, 26}, /* r26 */
134 {0x01000, 27}, /* r27 */
135 {0x00080, 28}, /* r28 */
136 {0x00040, 29}, /* r29 */
137 {0x10000, 30}, /* ep */
138 {0x00020, 31}, /* lp */
139 {0, 0} /* end of table */
c906108c
SS
140 };
141 int i;
142
c5aa993b 143 if ((next & 0x1f) == 0x0b) /* skip imm16 argument */
c906108c
SS
144 current_pc += 2;
145 else if ((next & 0x1f) == 0x13) /* skip imm16 argument */
146 current_pc += 2;
147 else if ((next & 0x1f) == 0x1b) /* skip imm32 argument */
148 current_pc += 4;
149
150 /* Calculate the total size of the saved registers, and add it
151 it to the immediate value used to adjust SP. */
152 for (i = 0; reg_table[i].mask != 0; i++)
153 if (list12 & reg_table[i].mask)
154 offset += REGISTER_RAW_SIZE (regtable[i].regno);
155 pi->frameoffset -= offset;
156
157 /* Calculate the offsets of the registers relative to the value
158 the SP will have after the registers have been pushed and the
159 imm5 value has been subtracted from it. */
160 if (pifsr)
161 {
162 for (i = 0; reg_table[i].mask != 0; i++)
163 {
164 if (list12 & reg_table[i].mask)
165 {
166 int reg = reg_table[i].regno;
167 offset -= REGISTER_RAW_SIZE (reg);
168 pifsr->reg = reg;
169 pifsr->offset = offset;
170 pifsr->cur_frameoffset = pi->frameoffset;
c5aa993b 171#ifdef DEBUG
c906108c 172 printf_filtered ("\tSaved register r%d, offset %d", reg, pifsr->offset);
c5aa993b 173#endif
c906108c
SS
174 pifsr++;
175 }
176 }
177 }
178#ifdef DEBUG
179 printf_filtered ("\tfound ctret after regsave func");
180#endif
181
182 /* Set result parameters. */
183 *current_pc_ptr = current_pc;
184 *pifsr_ptr = pifsr;
185}
186
187
188/* Helper function for v850_scan_prologue to handle pushm/pushl instructions.
189 FIXME: the SR bit of the register list is not supported; must check
190 that the compiler does not ever generate this bit. */
191
192static void
193handle_pushm (int insn, int insn2, struct prologue_info *pi,
c5aa993b 194 struct pifsr **pifsr_ptr)
c906108c
SS
195
196{
197 struct pifsr *pifsr = *pifsr_ptr;
198 long list12 = ((insn & 0x0f) << 16) + (insn2 & 0xfff0);
199 long offset = 0;
c5aa993b 200 static struct reg_list pushml_reg_table[] =
c906108c 201 {
c5aa993b
JM
202 {0x80000, PS_REGNUM}, /* PSW */
203 {0x40000, 1}, /* r1 */
204 {0x20000, 2}, /* r2 */
205 {0x10000, 3}, /* r3 */
206 {0x00800, 4}, /* r4 */
207 {0x00400, 5}, /* r5 */
208 {0x00200, 6}, /* r6 */
209 {0x00100, 7}, /* r7 */
210 {0x08000, 8}, /* r8 */
211 {0x04000, 9}, /* r9 */
212 {0x02000, 10}, /* r10 */
213 {0x01000, 11}, /* r11 */
214 {0x00080, 12}, /* r12 */
215 {0x00040, 13}, /* r13 */
216 {0x00020, 14}, /* r14 */
217 {0x00010, 15}, /* r15 */
218 {0, 0} /* end of table */
c906108c 219 };
c5aa993b 220 static struct reg_list pushmh_reg_table[] =
c906108c 221 {
c5aa993b
JM
222 {0x80000, 16}, /* r16 */
223 {0x40000, 17}, /* r17 */
224 {0x20000, 18}, /* r18 */
225 {0x10000, 19}, /* r19 */
226 {0x00800, 20}, /* r20 */
227 {0x00400, 21}, /* r21 */
228 {0x00200, 22}, /* r22 */
229 {0x00100, 23}, /* r23 */
230 {0x08000, 24}, /* r24 */
231 {0x04000, 25}, /* r25 */
232 {0x02000, 26}, /* r26 */
233 {0x01000, 27}, /* r27 */
234 {0x00080, 28}, /* r28 */
235 {0x00040, 29}, /* r29 */
236 {0x00010, 30}, /* r30 */
237 {0x00020, 31}, /* r31 */
238 {0, 0} /* end of table */
c906108c
SS
239 };
240 struct reg_list *reg_table;
241 int i;
242
243 /* Is this a pushml or a pushmh? */
244 if ((insn2 & 7) == 1)
245 reg_table = pushml_reg_table;
246 else
247 reg_table = pushmh_reg_table;
248
249 /* Calculate the total size of the saved registers, and add it
250 it to the immediate value used to adjust SP. */
251 for (i = 0; reg_table[i].mask != 0; i++)
252 if (list12 & reg_table[i].mask)
253 offset += REGISTER_RAW_SIZE (regtable[i].regno);
254 pi->frameoffset -= offset;
255
256 /* Calculate the offsets of the registers relative to the value
257 the SP will have after the registers have been pushed and the
258 imm5 value is subtracted from it. */
259 if (pifsr)
260 {
261 for (i = 0; reg_table[i].mask != 0; i++)
262 {
263 if (list12 & reg_table[i].mask)
264 {
265 int reg = reg_table[i].regno;
266 offset -= REGISTER_RAW_SIZE (reg);
267 pifsr->reg = reg;
268 pifsr->offset = offset;
269 pifsr->cur_frameoffset = pi->frameoffset;
c5aa993b 270#ifdef DEBUG
c906108c 271 printf_filtered ("\tSaved register r%d, offset %d", reg, pifsr->offset);
c5aa993b 272#endif
c906108c
SS
273 pifsr++;
274 }
275 }
276 }
277#ifdef DEBUG
278 printf_filtered ("\tfound ctret after regsave func");
279#endif
280
281 /* Set result parameters. */
282 *pifsr_ptr = pifsr;
283}
c5aa993b 284\f
c906108c
SS
285
286
287
c906108c
SS
288/* Function: scan_prologue
289 Scan the prologue of the function that contains PC, and record what
290 we find in PI. PI->fsr must be zeroed by the called. Returns the
291 pc after the prologue. Note that the addresses saved in pi->fsr
292 are actually just frame relative (negative offsets from the frame
293 pointer). This is because we don't know the actual value of the
294 frame pointer yet. In some circumstances, the frame pointer can't
295 be determined till after we have scanned the prologue. */
296
297static CORE_ADDR
298v850_scan_prologue (pc, pi)
299 CORE_ADDR pc;
300 struct prologue_info *pi;
301{
302 CORE_ADDR func_addr, prologue_end, current_pc;
303 struct pifsr *pifsr, *pifsr_tmp;
304 int fp_used;
305 int ep_used;
306 int reg;
307 CORE_ADDR save_pc, save_end;
308 int regsave_func_p;
309 int r12_tmp;
310
311 /* First, figure out the bounds of the prologue so that we can limit the
312 search to something reasonable. */
313
314 if (find_pc_partial_function (pc, NULL, &func_addr, NULL))
315 {
316 struct symtab_and_line sal;
317
318 sal = find_pc_line (func_addr, 0);
319
320 if (func_addr == entry_point_address ())
321 pi->start_function = 1;
322 else
323 pi->start_function = 0;
324
325#if 0
326 if (sal.line == 0)
327 prologue_end = pc;
328 else
329 prologue_end = sal.end;
330#else
331 prologue_end = pc;
332#endif
333 }
334 else
335 { /* We're in the boondocks */
336 func_addr = pc - 100;
337 prologue_end = pc;
338 }
339
340 prologue_end = min (prologue_end, pc);
341
342 /* Now, search the prologue looking for instructions that setup fp, save
343 rp, adjust sp and such. We also record the frame offset of any saved
c5aa993b 344 registers. */
c906108c
SS
345
346 pi->frameoffset = 0;
347 pi->framereg = SP_REGNUM;
348 fp_used = 0;
349 ep_used = 0;
350 pifsr = pi->pifsrs;
351 regsave_func_p = 0;
352 save_pc = 0;
353 save_end = 0;
354 r12_tmp = 0;
355
356#ifdef DEBUG
357 printf_filtered ("Current_pc = 0x%.8lx, prologue_end = 0x%.8lx\n",
c5aa993b 358 (long) func_addr, (long) prologue_end);
c906108c
SS
359#endif
360
c5aa993b 361 for (current_pc = func_addr; current_pc < prologue_end;)
c906108c
SS
362 {
363 int insn, insn2;
364
365#ifdef DEBUG
c5aa993b 366 printf_filtered ("0x%.8lx ", (long) current_pc);
c906108c
SS
367 (*tm_print_insn) (current_pc, &tm_print_insn_info);
368#endif
369
370 insn = read_memory_unsigned_integer (current_pc, 2);
371 current_pc += 2;
c5aa993b 372 if ((insn & 0x0780) >= 0x0600) /* Four byte instruction? */
c906108c
SS
373 {
374 insn2 = read_memory_unsigned_integer (current_pc, 2);
375 current_pc += 2;
376 }
377
378 if ((insn & 0xffc0) == ((10 << 11) | 0x0780) && !regsave_func_p)
379 { /* jarl <func>,10 */
c5aa993b 380 long low_disp = insn2 & ~(long) 1;
c906108c 381 long disp = (((((insn & 0x3f) << 16) + low_disp)
c5aa993b 382 & ~(long) 1) ^ 0x00200000) - 0x00200000;
c906108c
SS
383
384 save_pc = current_pc;
385 save_end = prologue_end;
386 regsave_func_p = 1;
387 current_pc += disp - 4;
388 prologue_end = (current_pc
389 + (2 * 3) /* moves to/from ep */
c5aa993b
JM
390 + 4 /* addi <const>,sp,sp */
391 + 2 /* jmp [r10] */
c906108c
SS
392 + (2 * 12) /* sst.w to save r2, r20-r29, r31 */
393 + 20); /* slop area */
394
395#ifdef DEBUG
396 printf_filtered ("\tfound jarl <func>,r10, disp = %ld, low_disp = %ld, new pc = 0x%.8lx\n",
c5aa993b 397 disp, low_disp, (long) current_pc + 2);
c906108c
SS
398#endif
399 continue;
400 }
401 else if ((insn & 0xffc0) == 0x0200 && !regsave_func_p)
402 { /* callt <imm6> */
403 long ctbp = read_register (CTBP_REGNUM);
404 long adr = ctbp + ((insn & 0x3f) << 1);
405
406 save_pc = current_pc;
407 save_end = prologue_end;
408 regsave_func_p = 1;
409 current_pc = ctbp + (read_memory_unsigned_integer (adr, 2) & 0xffff);
410 prologue_end = (current_pc
411 + (2 * 3) /* prepare list2,imm5,sp/imm */
c5aa993b 412 + 4 /* ctret */
c906108c
SS
413 + 20); /* slop area */
414
415#ifdef DEBUG
416 printf_filtered ("\tfound callt, ctbp = 0x%.8lx, adr = %.8lx, new pc = 0x%.8lx\n",
c5aa993b 417 ctbp, adr, (long) current_pc);
c906108c
SS
418#endif
419 continue;
420 }
421 else if ((insn & 0xffc0) == 0x0780) /* prepare list2,imm5 */
422 {
423 handle_prepare (insn, insn2, &current_pc, pi, &pifsr);
424 continue;
425 }
426 else if (insn == 0x07e0 && regsave_func_p && insn2 == 0x0144)
427 { /* ctret after processing register save function */
428 current_pc = save_pc;
429 prologue_end = save_end;
430 regsave_func_p = 0;
431#ifdef DEBUG
432 printf_filtered ("\tfound ctret after regsave func");
433#endif
434 continue;
435 }
436 else if ((insn & 0xfff0) == 0x07e0 && (insn2 & 5) == 1)
437 { /* pushml, pushmh */
438 handle_pushm (insn, insn2, pi, &pifsr);
439 continue;
440 }
441 else if ((insn & 0xffe0) == 0x0060 && regsave_func_p)
442 { /* jmp after processing register save function */
443 current_pc = save_pc;
444 prologue_end = save_end;
445 regsave_func_p = 0;
446#ifdef DEBUG
447 printf_filtered ("\tfound jmp after regsave func");
448#endif
449 continue;
450 }
451 else if ((insn & 0x07c0) == 0x0780 /* jarl or jr */
452 || (insn & 0xffe0) == 0x0060 /* jmp */
453 || (insn & 0x0780) == 0x0580) /* branch */
454 {
455#ifdef DEBUG
456 printf_filtered ("\n");
457#endif
c5aa993b 458 break; /* Ran into end of prologue */
c906108c
SS
459 }
460
461 else if ((insn & 0xffe0) == ((SP_REGNUM << 11) | 0x0240)) /* add <imm>,sp */
462 pi->frameoffset += ((insn & 0x1f) ^ 0x10) - 0x10;
463 else if (insn == ((SP_REGNUM << 11) | 0x0600 | SP_REGNUM)) /* addi <imm>,sp,sp */
464 pi->frameoffset += insn2;
465 else if (insn == ((FP_RAW_REGNUM << 11) | 0x0000 | SP_REGNUM)) /* mov sp,fp */
466 {
467 fp_used = 1;
468 pi->framereg = FP_RAW_REGNUM;
469 }
470
471 else if (insn == ((R12_REGNUM << 11) | 0x0640 | R0_REGNUM)) /* movhi hi(const),r0,r12 */
472 r12_tmp = insn2 << 16;
473 else if (insn == ((R12_REGNUM << 11) | 0x0620 | R12_REGNUM)) /* movea lo(const),r12,r12 */
474 r12_tmp += insn2;
c5aa993b 475 else if (insn == ((SP_REGNUM << 11) | 0x01c0 | R12_REGNUM) && r12_tmp) /* add r12,sp */
c906108c
SS
476 pi->frameoffset = r12_tmp;
477 else if (insn == ((EP_REGNUM << 11) | 0x0000 | SP_REGNUM)) /* mov sp,ep */
478 ep_used = 1;
479 else if (insn == ((EP_REGNUM << 11) | 0x0000 | R1_REGNUM)) /* mov r1,ep */
480 ep_used = 0;
c5aa993b 481 else if (((insn & 0x07ff) == (0x0760 | SP_REGNUM) /* st.w <reg>,<offset>[sp] */
c906108c
SS
482 || (fp_used
483 && (insn & 0x07ff) == (0x0760 | FP_RAW_REGNUM))) /* st.w <reg>,<offset>[fp] */
484 && pifsr
485 && (((reg = (insn >> 11) & 0x1f) >= SAVE1_START_REGNUM && reg <= SAVE1_END_REGNUM)
486 || (reg >= SAVE2_START_REGNUM && reg <= SAVE2_END_REGNUM)
c5aa993b 487 || (reg >= SAVE3_START_REGNUM && reg <= SAVE3_END_REGNUM)))
c906108c
SS
488 {
489 pifsr->reg = reg;
490 pifsr->offset = insn2 & ~1;
491 pifsr->cur_frameoffset = pi->frameoffset;
492#ifdef DEBUG
493 printf_filtered ("\tSaved register r%d, offset %d", reg, pifsr->offset);
494#endif
495 pifsr++;
496 }
497
c5aa993b 498 else if (ep_used /* sst.w <reg>,<offset>[ep] */
c906108c
SS
499 && ((insn & 0x0781) == 0x0501)
500 && pifsr
501 && (((reg = (insn >> 11) & 0x1f) >= SAVE1_START_REGNUM && reg <= SAVE1_END_REGNUM)
502 || (reg >= SAVE2_START_REGNUM && reg <= SAVE2_END_REGNUM)
c5aa993b 503 || (reg >= SAVE3_START_REGNUM && reg <= SAVE3_END_REGNUM)))
c906108c
SS
504 {
505 pifsr->reg = reg;
506 pifsr->offset = (insn & 0x007e) << 1;
507 pifsr->cur_frameoffset = pi->frameoffset;
508#ifdef DEBUG
509 printf_filtered ("\tSaved register r%d, offset %d", reg, pifsr->offset);
510#endif
511 pifsr++;
512 }
513
514#ifdef DEBUG
515 printf_filtered ("\n");
516#endif
517 }
518
519 if (pifsr)
520 pifsr->framereg = 0; /* Tie off last entry */
521
522 /* Fix up any offsets to the final offset. If a frame pointer was created, use it
523 instead of the stack pointer. */
524 for (pifsr_tmp = pi->pifsrs; pifsr_tmp && pifsr_tmp != pifsr; pifsr_tmp++)
525 {
526 pifsr_tmp->offset -= pi->frameoffset - pifsr_tmp->cur_frameoffset;
527 pifsr_tmp->framereg = pi->framereg;
528
529#ifdef DEBUG
530 printf_filtered ("Saved register r%d, offset = %d, framereg = r%d\n",
c5aa993b 531 pifsr_tmp->reg, pifsr_tmp->offset, pifsr_tmp->framereg);
c906108c
SS
532#endif
533 }
534
535#ifdef DEBUG
536 printf_filtered ("Framereg = r%d, frameoffset = %d\n", pi->framereg, pi->frameoffset);
537#endif
538
539 return current_pc;
540}
541
542/* Function: init_extra_frame_info
543 Setup the frame's frame pointer, pc, and frame addresses for saved
544 registers. Most of the work is done in scan_prologue().
545
546 Note that when we are called for the last frame (currently active frame),
547 that fi->pc and fi->frame will already be setup. However, fi->frame will
548 be valid only if this routine uses FP. For previous frames, fi-frame will
549 always be correct (since that is derived from v850_frame_chain ()).
550
551 We can be called with the PC in the call dummy under two circumstances.
552 First, during normal backtracing, second, while figuring out the frame
553 pointer just prior to calling the target function (see run_stack_dummy). */
554
555void
556v850_init_extra_frame_info (fi)
557 struct frame_info *fi;
558{
559 struct prologue_info pi;
560 struct pifsr pifsrs[NUM_REGS + 1], *pifsr;
561
562 if (fi->next)
563 fi->pc = FRAME_SAVED_PC (fi->next);
564
565 memset (fi->fsr.regs, '\000', sizeof fi->fsr.regs);
566
567 /* The call dummy doesn't save any registers on the stack, so we can return
568 now. */
569 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
c5aa993b 570 return;
c906108c
SS
571
572 pi.pifsrs = pifsrs;
573
574 v850_scan_prologue (fi->pc, &pi);
575
576 if (!fi->next && pi.framereg == SP_REGNUM)
577 fi->frame = read_register (pi.framereg) - pi.frameoffset;
578
579 for (pifsr = pifsrs; pifsr->framereg; pifsr++)
580 {
581 fi->fsr.regs[pifsr->reg] = pifsr->offset + fi->frame;
582
583 if (pifsr->framereg == SP_REGNUM)
584 fi->fsr.regs[pifsr->reg] += pi.frameoffset;
585 }
586}
587
588/* Function: frame_chain
589 Figure out the frame prior to FI. Unfortunately, this involves
590 scanning the prologue of the caller, which will also be done
591 shortly by v850_init_extra_frame_info. For the dummy frame, we
592 just return the stack pointer that was in use at the time the
593 function call was made. */
594
595CORE_ADDR
596v850_frame_chain (fi)
597 struct frame_info *fi;
598{
599 struct prologue_info pi;
600 CORE_ADDR callers_pc, fp;
601
602 /* First, find out who called us */
603 callers_pc = FRAME_SAVED_PC (fi);
604 /* If caller is a call-dummy, then our FP bears no relation to his FP! */
605 fp = v850_find_callers_reg (fi, FP_RAW_REGNUM);
c5aa993b
JM
606 if (PC_IN_CALL_DUMMY (callers_pc, fp, fp))
607 return fp; /* caller is call-dummy: return oldest value of FP */
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SS
608
609 /* Caller is NOT a call-dummy, so everything else should just work.
610 Even if THIS frame is a call-dummy! */
611 pi.pifsrs = NULL;
612
613 v850_scan_prologue (callers_pc, &pi);
614
615 if (pi.start_function)
616 return 0; /* Don't chain beyond the start function */
617
618 if (pi.framereg == FP_RAW_REGNUM)
619 return v850_find_callers_reg (fi, pi.framereg);
620
621 return fi->frame - pi.frameoffset;
622}
623
624/* Function: find_callers_reg
625 Find REGNUM on the stack. Otherwise, it's in an active register.
626 One thing we might want to do here is to check REGNUM against the
627 clobber mask, and somehow flag it as invalid if it isn't saved on
628 the stack somewhere. This would provide a graceful failure mode
629 when trying to get the value of caller-saves registers for an inner
630 frame. */
631
632CORE_ADDR
633v850_find_callers_reg (fi, regnum)
634 struct frame_info *fi;
635 int regnum;
636{
637 for (; fi; fi = fi->next)
638 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
639 return generic_read_register_dummy (fi->pc, fi->frame, regnum);
640 else if (fi->fsr.regs[regnum] != 0)
c5aa993b
JM
641 return read_memory_unsigned_integer (fi->fsr.regs[regnum],
642 REGISTER_RAW_SIZE (regnum));
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SS
643
644 return read_register (regnum);
645}
646
647/* Function: skip_prologue
648 Return the address of the first code past the prologue of the function. */
649
650CORE_ADDR
651v850_skip_prologue (pc)
652 CORE_ADDR pc;
653{
654 CORE_ADDR func_addr, func_end;
655
656 /* See what the symbol table says */
657
658 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
659 {
660 struct symtab_and_line sal;
661
662 sal = find_pc_line (func_addr, 0);
663
664 if (sal.line != 0 && sal.end < func_end)
665 return sal.end;
666 else
667 /* Either there's no line info, or the line after the prologue is after
668 the end of the function. In this case, there probably isn't a
669 prologue. */
670 return pc;
671 }
672
673/* We can't find the start of this function, so there's nothing we can do. */
674 return pc;
675}
676
677/* Function: pop_frame
678 This routine gets called when either the user uses the `return'
679 command, or the call dummy breakpoint gets hit. */
680
681void
682v850_pop_frame (frame)
683 struct frame_info *frame;
684{
685 int regnum;
686
c5aa993b 687 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
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SS
688 generic_pop_dummy_frame ();
689 else
690 {
691 write_register (PC_REGNUM, FRAME_SAVED_PC (frame));
692
693 for (regnum = 0; regnum < NUM_REGS; regnum++)
694 if (frame->fsr.regs[regnum] != 0)
695 write_register (regnum,
c5aa993b
JM
696 read_memory_unsigned_integer (frame->fsr.regs[regnum],
697 REGISTER_RAW_SIZE (regnum)));
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SS
698
699 write_register (SP_REGNUM, FRAME_FP (frame));
700 }
701
702 flush_cached_frames ();
703}
704
705/* Function: push_arguments
706 Setup arguments and RP for a call to the target. First four args
707 go in R6->R9, subsequent args go into sp + 16 -> sp + ... Structs
708 are passed by reference. 64 bit quantities (doubles and long
709 longs) may be split between the regs and the stack. When calling a
710 function that returns a struct, a pointer to the struct is passed
711 in as a secret first argument (always in R6).
712
713 Stack space for the args has NOT been allocated: that job is up to us.
c5aa993b 714 */
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SS
715
716CORE_ADDR
717v850_push_arguments (nargs, args, sp, struct_return, struct_addr)
718 int nargs;
719 value_ptr *args;
720 CORE_ADDR sp;
721 unsigned char struct_return;
722 CORE_ADDR struct_addr;
723{
724 int argreg;
725 int argnum;
726 int len = 0;
727 int stack_offset;
728
729 /* First, just for safety, make sure stack is aligned */
730 sp &= ~3;
731
732 /* Now make space on the stack for the args. */
733 for (argnum = 0; argnum < nargs; argnum++)
c5aa993b
JM
734 len += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3);
735 sp -= len; /* possibly over-allocating, but it works... */
736 /* (you might think we could allocate 16 bytes */
737 /* less, but the ABI seems to use it all! ) */
c906108c
SS
738 argreg = ARG0_REGNUM;
739
740 /* the struct_return pointer occupies the first parameter-passing reg */
741 if (struct_return)
c5aa993b 742 write_register (argreg++, struct_addr);
c906108c
SS
743
744 stack_offset = 16;
745 /* The offset onto the stack at which we will start copying parameters
746 (after the registers are used up) begins at 16 rather than at zero.
747 I don't really know why, that's just the way it seems to work. */
748
749 /* Now load as many as possible of the first arguments into
750 registers, and push the rest onto the stack. There are 16 bytes
751 in four registers available. Loop thru args from first to last. */
752 for (argnum = 0; argnum < nargs; argnum++)
753 {
754 int len;
755 char *val;
c5aa993b 756 char valbuf[REGISTER_RAW_SIZE (ARG0_REGNUM)];
c906108c
SS
757
758 if (TYPE_CODE (VALUE_TYPE (*args)) == TYPE_CODE_STRUCT
759 && TYPE_LENGTH (VALUE_TYPE (*args)) > 8)
760 {
761 store_address (valbuf, 4, VALUE_ADDRESS (*args));
762 len = 4;
763 val = valbuf;
764 }
765 else
766 {
767 len = TYPE_LENGTH (VALUE_TYPE (*args));
c5aa993b 768 val = (char *) VALUE_CONTENTS (*args);
c906108c
SS
769 }
770
771 while (len > 0)
c5aa993b 772 if (argreg <= ARGLAST_REGNUM)
c906108c
SS
773 {
774 CORE_ADDR regval;
775
776 regval = extract_address (val, REGISTER_RAW_SIZE (argreg));
777 write_register (argreg, regval);
778
779 len -= REGISTER_RAW_SIZE (argreg);
780 val += REGISTER_RAW_SIZE (argreg);
781 argreg++;
782 }
783 else
784 {
785 write_memory (sp + stack_offset, val, 4);
786
787 len -= 4;
788 val += 4;
789 stack_offset += 4;
790 }
791 args++;
792 }
793 return sp;
794}
795
796/* Function: push_return_address (pc)
797 Set up the return address for the inferior function call.
798 Needed for targets where we don't actually execute a JSR/BSR instruction */
c5aa993b 799
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SS
800CORE_ADDR
801v850_push_return_address (pc, sp)
802 CORE_ADDR pc;
803 CORE_ADDR sp;
804{
805 write_register (RP_REGNUM, CALL_DUMMY_ADDRESS ());
806 return sp;
807}
c5aa993b 808
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SS
809/* Function: frame_saved_pc
810 Find the caller of this frame. We do this by seeing if RP_REGNUM
811 is saved in the stack anywhere, otherwise we get it from the
812 registers. If the inner frame is a dummy frame, return its PC
813 instead of RP, because that's where "caller" of the dummy-frame
814 will be found. */
815
816CORE_ADDR
817v850_frame_saved_pc (fi)
818 struct frame_info *fi;
819{
c5aa993b
JM
820 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
821 return generic_read_register_dummy (fi->pc, fi->frame, PC_REGNUM);
c906108c
SS
822 else
823 return v850_find_callers_reg (fi, RP_REGNUM);
824}
825
c906108c
SS
826
827/* Function: fix_call_dummy
828 Pokes the callee function's address into the CALL_DUMMY assembly stub.
829 Assumes that the CALL_DUMMY looks like this:
c5aa993b
JM
830 jarl <offset24>, r31
831 trap
832 */
c906108c
SS
833
834int
835v850_fix_call_dummy (dummy, sp, fun, nargs, args, type, gcc_p)
836 char *dummy;
837 CORE_ADDR sp;
838 CORE_ADDR fun;
839 int nargs;
840 value_ptr *args;
841 struct type *type;
842 int gcc_p;
843{
844 long offset24;
845
846 offset24 = (long) fun - (long) entry_point_address ();
847 offset24 &= 0x3fffff;
848 offset24 |= 0xff800000; /* jarl <offset24>, r31 */
849
c5aa993b
JM
850 store_unsigned_integer ((unsigned int *) &dummy[2], 2, offset24 & 0xffff);
851 store_unsigned_integer ((unsigned int *) &dummy[0], 2, offset24 >> 16);
c906108c
SS
852 return 0;
853}
854
855/* Change the register names based on the current machine type. */
856
857static int
858v850_target_architecture_hook (ap)
859 const bfd_arch_info_type *ap;
860{
861 int i, j;
862
863 if (ap->arch != bfd_arch_v850)
864 return 0;
865
866 for (i = 0; v850_processor_type_table[i].regnames != NULL; i++)
867 {
868 if (v850_processor_type_table[i].mach == ap->mach)
869 {
870 v850_register_names = v850_processor_type_table[i].regnames;
c5394b80 871 tm_print_insn_info.mach = ap->mach;
c906108c
SS
872 return 1;
873 }
874 }
875
96baa820 876 internal_error ("Architecture `%s' unreconized", ap->printable_name);
c906108c
SS
877}
878
879void
880_initialize_v850_tdep ()
881{
882 tm_print_insn = print_insn_v850;
883 target_architecture_hook = v850_target_architecture_hook;
884}