]> git.ipfire.org Git - thirdparty/qemu.git/blame - hw/i2c/bitbang_i2c.c
Move QOM typedefs and add missing includes
[thirdparty/qemu.git] / hw / i2c / bitbang_i2c.c
CommitLineData
3ead03bd
AZ
1/*
2 * Bit-Bang i2c emulation extracted from
3 * Marvell MV88W8618 / Freecom MusicPal emulation.
4 *
5 * Copyright (c) 2008 Jan Kiszka
6 *
8e31bf38 7 * This code is licensed under the GNU GPL v2.
6b620ca3
PB
8 *
9 * Contributions after 2012-01-13 are licensed under the terms of the
10 * GNU GPL, version 2 or (at your option) any later version.
3ead03bd 11 */
0b8fa32f 12
0430891c 13#include "qemu/osdep.h"
64552b6b 14#include "hw/irq.h"
d718b747 15#include "hw/i2c/bitbang_i2c.h"
83c9f4ca 16#include "hw/sysbus.h"
0b8fa32f 17#include "qemu/module.h"
db1015e9 18#include "qom/object.h"
3ead03bd 19
3cd035d8
PB
20//#define DEBUG_BITBANG_I2C
21
22#ifdef DEBUG_BITBANG_I2C
23#define DPRINTF(fmt, ...) \
24do { printf("bitbang_i2c: " fmt , ## __VA_ARGS__); } while (0)
25#else
26#define DPRINTF(fmt, ...) do {} while(0)
27#endif
28
3ead03bd
AZ
29static void bitbang_i2c_enter_stop(bitbang_i2c_interface *i2c)
30{
3cd035d8 31 DPRINTF("STOP\n");
3ead03bd
AZ
32 if (i2c->current_addr >= 0)
33 i2c_end_transfer(i2c->bus);
34 i2c->current_addr = -1;
35 i2c->state = STOPPED;
36}
37
3cd035d8
PB
38/* Set device data pin. */
39static int bitbang_i2c_ret(bitbang_i2c_interface *i2c, int level)
40{
41 i2c->device_out = level;
42 //DPRINTF("%d %d %d\n", i2c->last_clock, i2c->last_data, i2c->device_out);
43 return level & i2c->last_data;
44}
45
46/* Leave device data pin unodified. */
47static int bitbang_i2c_nop(bitbang_i2c_interface *i2c)
48{
49 return bitbang_i2c_ret(i2c, i2c->device_out);
50}
51
52/* Returns data line level. */
53int bitbang_i2c_set(bitbang_i2c_interface *i2c, int line, int level)
3ead03bd 54{
3ead03bd 55 int data;
3ead03bd 56
3cd035d8
PB
57 if (level != 0 && level != 1) {
58 abort();
59 }
3ead03bd 60
3cd035d8
PB
61 if (line == BITBANG_I2C_SDA) {
62 if (level == i2c->last_data) {
63 return bitbang_i2c_nop(i2c);
64 }
65 i2c->last_data = level;
66 if (i2c->last_clock == 0) {
67 return bitbang_i2c_nop(i2c);
68 }
69 if (level == 0) {
70 DPRINTF("START\n");
71 /* START condition. */
3ead03bd 72 i2c->state = SENDING_BIT7;
3cd035d8
PB
73 i2c->current_addr = -1;
74 } else {
75 /* STOP condition. */
3ead03bd 76 bitbang_i2c_enter_stop(i2c);
3cd035d8
PB
77 }
78 return bitbang_i2c_ret(i2c, 1);
79 }
80
81 data = i2c->last_data;
82 if (i2c->last_clock == level) {
83 return bitbang_i2c_nop(i2c);
84 }
85 i2c->last_clock = level;
86 if (level == 0) {
87 /* State is set/read at the start of the clock pulse.
88 release the data line at the end. */
89 return bitbang_i2c_ret(i2c, 1);
90 }
91 switch (i2c->state) {
92 case STOPPED:
2eb9f241 93 case SENT_NACK:
3cd035d8 94 return bitbang_i2c_ret(i2c, 1);
3ead03bd
AZ
95
96 case SENDING_BIT7 ... SENDING_BIT0:
3cd035d8
PB
97 i2c->buffer = (i2c->buffer << 1) | data;
98 /* will end up in WAITING_FOR_ACK */
99 i2c->state++;
100 return bitbang_i2c_ret(i2c, 1);
3ead03bd
AZ
101
102 case WAITING_FOR_ACK:
9706e016
PM
103 {
104 int ret;
105
3cd035d8
PB
106 if (i2c->current_addr < 0) {
107 i2c->current_addr = i2c->buffer;
108 DPRINTF("Address 0x%02x\n", i2c->current_addr);
9706e016
PM
109 ret = i2c_start_transfer(i2c->bus, i2c->current_addr >> 1,
110 i2c->current_addr & 1);
3cd035d8
PB
111 } else {
112 DPRINTF("Sent 0x%02x\n", i2c->buffer);
9706e016
PM
113 ret = i2c_send(i2c->bus, i2c->buffer);
114 }
115 if (ret) {
116 /* NACK (either addressing a nonexistent device, or the
117 * device we were sending to decided to NACK us).
118 */
119 DPRINTF("Got NACK\n");
120 bitbang_i2c_enter_stop(i2c);
121 return bitbang_i2c_ret(i2c, 1);
3cd035d8
PB
122 }
123 if (i2c->current_addr & 1) {
124 i2c->state = RECEIVING_BIT7;
125 } else {
126 i2c->state = SENDING_BIT7;
127 }
128 return bitbang_i2c_ret(i2c, 0);
9706e016 129 }
3cd035d8
PB
130 case RECEIVING_BIT7:
131 i2c->buffer = i2c_recv(i2c->bus);
132 DPRINTF("RX byte 0x%02x\n", i2c->buffer);
133 /* Fall through... */
134 case RECEIVING_BIT6 ... RECEIVING_BIT0:
135 data = i2c->buffer >> 7;
136 /* will end up in SENDING_ACK */
137 i2c->state++;
138 i2c->buffer <<= 1;
139 return bitbang_i2c_ret(i2c, data);
3ead03bd
AZ
140
141 case SENDING_ACK:
3cd035d8
PB
142 i2c->state = RECEIVING_BIT7;
143 if (data != 0) {
144 DPRINTF("NACKED\n");
2eb9f241 145 i2c->state = SENT_NACK;
3cd035d8
PB
146 i2c_nack(i2c->bus);
147 } else {
148 DPRINTF("ACKED\n");
149 }
150 return bitbang_i2c_ret(i2c, 1);
3ead03bd 151 }
3cd035d8
PB
152 abort();
153}
154
41742927 155void bitbang_i2c_init(bitbang_i2c_interface *s, I2CBus *bus)
3cd035d8 156{
3cd035d8
PB
157 s->bus = bus;
158 s->last_data = 1;
159 s->last_clock = 1;
160 s->device_out = 1;
3cd035d8 161}
3ead03bd 162
3cd035d8 163/* GPIO interface. */
cc3c3b8a
AF
164
165#define TYPE_GPIO_I2C "gpio_i2c"
db1015e9 166typedef struct GPIOI2CState GPIOI2CState;
cc3c3b8a
AF
167#define GPIO_I2C(obj) OBJECT_CHECK(GPIOI2CState, (obj), TYPE_GPIO_I2C)
168
db1015e9 169struct GPIOI2CState {
cc3c3b8a
AF
170 SysBusDevice parent_obj;
171
cffac71b 172 MemoryRegion dummy_iomem;
41742927 173 bitbang_i2c_interface bitbang;
3cd035d8
PB
174 int last_level;
175 qemu_irq out;
db1015e9 176};
3cd035d8
PB
177
178static void bitbang_i2c_gpio_set(void *opaque, int irq, int level)
179{
180 GPIOI2CState *s = opaque;
181
41742927 182 level = bitbang_i2c_set(&s->bitbang, irq, level);
3cd035d8
PB
183 if (level != s->last_level) {
184 s->last_level = level;
185 qemu_set_irq(s->out, level);
186 }
3ead03bd
AZ
187}
188
00b2f758 189static void gpio_i2c_init(Object *obj)
3ead03bd 190{
00b2f758
XZ
191 DeviceState *dev = DEVICE(obj);
192 GPIOI2CState *s = GPIO_I2C(obj);
193 SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
a5c82852 194 I2CBus *bus;
3ead03bd 195
00b2f758 196 memory_region_init(&s->dummy_iomem, obj, "gpio_i2c", 0);
cc3c3b8a 197 sysbus_init_mmio(sbd, &s->dummy_iomem);
3ead03bd 198
cc3c3b8a 199 bus = i2c_init_bus(dev, "i2c");
41742927 200 bitbang_i2c_init(&s->bitbang, bus);
3ead03bd 201
cc3c3b8a
AF
202 qdev_init_gpio_in(dev, bitbang_i2c_gpio_set, 2);
203 qdev_init_gpio_out(dev, &s->out, 1);
3ead03bd
AZ
204}
205
999e12bb
AL
206static void gpio_i2c_class_init(ObjectClass *klass, void *data)
207{
39bffca2 208 DeviceClass *dc = DEVICE_CLASS(klass);
999e12bb 209
125ee0ed 210 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
39bffca2 211 dc->desc = "Virtual GPIO to I2C bridge";
999e12bb
AL
212}
213
8c43a6f0 214static const TypeInfo gpio_i2c_info = {
cc3c3b8a 215 .name = TYPE_GPIO_I2C,
39bffca2
AL
216 .parent = TYPE_SYS_BUS_DEVICE,
217 .instance_size = sizeof(GPIOI2CState),
00b2f758 218 .instance_init = gpio_i2c_init,
39bffca2 219 .class_init = gpio_i2c_class_init,
3cd035d8
PB
220};
221
83f7d43a 222static void bitbang_i2c_register_types(void)
3ead03bd 223{
39bffca2 224 type_register_static(&gpio_i2c_info);
3ead03bd
AZ
225}
226
83f7d43a 227type_init(bitbang_i2c_register_types)