[thirdparty/qemu.git] / hw / input / pxa2xx_keypad.c

/*
 * Intel PXA27X Keypad Controller emulation.
 *
 * Copyright (c) 2007 MontaVista Software, Inc
 * Written by Armin Kuster <akuster@kama-aina.net>
 *              or  <Akuster@mvista.com>
 *
 * This code is licensed under the GPLv2.
 *
 * Contributions after 2012-01-13 are licensed under the terms of the
 * GNU GPL, version 2 or (at your option) any later version.
 */

#include "qemu/osdep.h"
#include "qemu/log.h"
#include "hw/irq.h"
#include "migration/vmstate.h"
#include "hw/arm/pxa.h"
#include "ui/console.h"

/*
 * Keypad
 */
#define KPC         0x00    /* Keypad Interface Control register */
#define KPDK        0x08    /* Keypad Interface Direct Key register */
#define KPREC       0x10    /* Keypad Interface Rotary Encoder register */
#define KPMK        0x18    /* Keypad Interface Matrix Key register */
#define KPAS        0x20    /* Keypad Interface Automatic Scan register */
#define KPASMKP0    0x28    /* Keypad Interface Automatic Scan Multiple
                                Key Presser register 0 */
#define KPASMKP1    0x30    /* Keypad Interface Automatic Scan Multiple
                                Key Presser register 1 */
#define KPASMKP2    0x38    /* Keypad Interface Automatic Scan Multiple
                                Key Presser register 2 */
#define KPASMKP3    0x40    /* Keypad Interface Automatic Scan Multiple
                                Key Presser register 3 */
#define KPKDI       0x48    /* Keypad Interface Key Debounce Interval
                                register */

/* Keypad defines */
#define KPC_AS          (0x1 << 30)  /* Automatic Scan bit */
#define KPC_ASACT       (0x1 << 29)  /* Automatic Scan on Activity */
#define KPC_MI          (0x1 << 22)  /* Matrix interrupt bit */
#define KPC_IMKP        (0x1 << 21)  /* Ignore Multiple Key Press */
#define KPC_MS7         (0x1 << 20)  /* Matrix scan line 7 */
#define KPC_MS6         (0x1 << 19)  /* Matrix scan line 6 */
#define KPC_MS5         (0x1 << 18)  /* Matrix scan line 5 */
#define KPC_MS4         (0x1 << 17)  /* Matrix scan line 4 */
#define KPC_MS3         (0x1 << 16)  /* Matrix scan line 3 */
#define KPC_MS2         (0x1 << 15)  /* Matrix scan line 2 */
#define KPC_MS1         (0x1 << 14)  /* Matrix scan line 1 */
#define KPC_MS0         (0x1 << 13)  /* Matrix scan line 0 */
#define KPC_ME          (0x1 << 12)  /* Matrix Keypad Enable */
#define KPC_MIE         (0x1 << 11)  /* Matrix Interrupt Enable */
#define KPC_DK_DEB_SEL  (0x1 <<  9)  /* Direct Keypad Debounce Select */
#define KPC_DI          (0x1 <<  5)  /* Direct key interrupt bit */
#define KPC_RE_ZERO_DEB (0x1 <<  4)  /* Rotary Encoder Zero Debounce */
#define KPC_REE1        (0x1 <<  3)  /* Rotary Encoder1 Enable */
#define KPC_REE0        (0x1 <<  2)  /* Rotary Encoder0 Enable */
#define KPC_DE          (0x1 <<  1)  /* Direct Keypad Enable */
#define KPC_DIE         (0x1 <<  0)  /* Direct Keypad interrupt Enable */

#define KPDK_DKP        (0x1 << 31)
#define KPDK_DK7        (0x1 <<  7)
#define KPDK_DK6        (0x1 <<  6)
#define KPDK_DK5        (0x1 <<  5)
#define KPDK_DK4        (0x1 <<  4)
#define KPDK_DK3        (0x1 <<  3)
#define KPDK_DK2        (0x1 <<  2)
#define KPDK_DK1        (0x1 <<  1)
#define KPDK_DK0        (0x1 <<  0)

#define KPREC_OF1       (0x1 << 31)
#define KPREC_UF1       (0x1 << 30)
#define KPREC_OF0       (0x1 << 15)
#define KPREC_UF0       (0x1 << 14)

#define KPMK_MKP        (0x1 << 31)
#define KPAS_SO         (0x1 << 31)
#define KPASMKPx_SO     (0x1 << 31)


#define KPASMKPx_MKC(row, col)  (1 << (row + 16 * (col % 2)))

#define PXAKBD_MAXROW   8
#define PXAKBD_MAXCOL   8

struct PXA2xxKeyPadState {
    MemoryRegion iomem;
    qemu_irq    irq;
    const struct  keymap *map;
    int         pressed_cnt;
    int         alt_code;

    uint32_t    kpc;
    uint32_t    kpdk;
    uint32_t    kprec;
    uint32_t    kpmk;
    uint32_t    kpas;
    uint32_t    kpasmkp[4];
    uint32_t    kpkdi;
};

static void pxa27x_keypad_find_pressed_key(PXA2xxKeyPadState *kp, int *row, int *col)
{
    int i;
    for (i = 0; i < 4; i++)
    {
        *col = i * 2;
        for (*row = 0; *row < 8; (*row)++) {
            if (kp->kpasmkp[i] & (1 << *row))
                return;
        }
        *col = i * 2 + 1;
        for (*row = 0; *row < 8; (*row)++) {
            if (kp->kpasmkp[i] & (1 << (*row + 16)))
                return;
        }
    }
}

static void pxa27x_keyboard_event (PXA2xxKeyPadState *kp, int keycode)
{
    int row, col, rel, assert_irq = 0;
    uint32_t val;

    if (keycode == 0xe0) {
        kp->alt_code = 1;
        return;
    }

    if(!(kp->kpc & KPC_ME)) /* skip if not enabled */
        return;

    rel = (keycode & 0x80) ? 1 : 0; /* key release from qemu */
    keycode &= ~0x80; /* strip qemu key release bit */
    if (kp->alt_code) {
        keycode |= 0x80;
        kp->alt_code = 0;
    }

    row = kp->map[keycode].row;
    col = kp->map[keycode].column;
    if (row == -1 || col == -1) {
        return;
    }

    val = KPASMKPx_MKC(row, col);
    if (rel) {
        if (kp->kpasmkp[col / 2] & val) {
            kp->kpasmkp[col / 2] &= ~val;
            kp->pressed_cnt--;
            assert_irq = 1;
        }
    } else {
        if (!(kp->kpasmkp[col / 2] & val)) {
            kp->kpasmkp[col / 2] |= val;
            kp->pressed_cnt++;
            assert_irq = 1;
        }
    }
    kp->kpas = ((kp->pressed_cnt & 0x1f) << 26) | (0xf << 4) | 0xf;
    if (kp->pressed_cnt == 1) {
        kp->kpas &= ~((0xf << 4) | 0xf);
        if (rel) {
            pxa27x_keypad_find_pressed_key(kp, &row, &col);
        }
        kp->kpas |= ((row & 0xf) << 4) | (col & 0xf);
    }

    if (!(kp->kpc & (KPC_AS | KPC_ASACT)))
        assert_irq = 0;

    if (assert_irq && (kp->kpc & KPC_MIE)) {
        kp->kpc |= KPC_MI;
        qemu_irq_raise(kp->irq);
    }
}

static uint64_t pxa2xx_keypad_read(void *opaque, hwaddr offset,
                                   unsigned size)
{
    PXA2xxKeyPadState *s = (PXA2xxKeyPadState *) opaque;
    uint32_t tmp;

    switch (offset) {
    case KPC:
        tmp = s->kpc;
        if(tmp & KPC_MI)
            s->kpc &= ~(KPC_MI);
        if(tmp & KPC_DI)
            s->kpc &= ~(KPC_DI);
        qemu_irq_lower(s->irq);
        return tmp;
    case KPDK:
        return s->kpdk;
    case KPREC:
        tmp = s->kprec;
        if(tmp & KPREC_OF1)
            s->kprec &= ~(KPREC_OF1);
        if(tmp & KPREC_UF1)
            s->kprec &= ~(KPREC_UF1);
        if(tmp & KPREC_OF0)
            s->kprec &= ~(KPREC_OF0);
        if(tmp & KPREC_UF0)
            s->kprec &= ~(KPREC_UF0);
        return tmp;
    case KPMK:
        tmp = s->kpmk;
        if(tmp & KPMK_MKP)
            s->kpmk &= ~(KPMK_MKP);
        return tmp;
    case KPAS:
        return s->kpas;
    case KPASMKP0:
        return s->kpasmkp[0];
    case KPASMKP1:
        return s->kpasmkp[1];
    case KPASMKP2:
        return s->kpasmkp[2];
    case KPASMKP3:
        return s->kpasmkp[3];
    case KPKDI:
        return s->kpkdi;
    default:
        qemu_log_mask(LOG_GUEST_ERROR,
                      "%s: Bad read offset 0x%"HWADDR_PRIx"\n",
                      __func__, offset);
    }

    return 0;
}

static void pxa2xx_keypad_write(void *opaque, hwaddr offset,
                                uint64_t value, unsigned size)
{
    PXA2xxKeyPadState *s = (PXA2xxKeyPadState *) opaque;

    switch (offset) {
    case KPC:
        s->kpc = value;
        if (s->kpc & KPC_AS) {
            s->kpc &= ~(KPC_AS);
        }
        break;
    case KPDK:
        s->kpdk = value;
        break;
    case KPREC:
        s->kprec = value;
        break;
    case KPMK:
        s->kpmk = value;
        break;
    case KPAS:
        s->kpas = value;
        break;
    case KPASMKP0:
        s->kpasmkp[0] = value;
        break;
    case KPASMKP1:
        s->kpasmkp[1] = value;
        break;
    case KPASMKP2:
        s->kpasmkp[2] = value;
        break;
    case KPASMKP3:
        s->kpasmkp[3] = value;
        break;
    case KPKDI:
        s->kpkdi = value;
        break;

    default:
        qemu_log_mask(LOG_GUEST_ERROR,
                      "%s: Bad write offset 0x%"HWADDR_PRIx"\n",
                      __func__, offset);
    }
}

static const MemoryRegionOps pxa2xx_keypad_ops = {
    .read = pxa2xx_keypad_read,
    .write = pxa2xx_keypad_write,
    .endianness = DEVICE_NATIVE_ENDIAN,
};

static const VMStateDescription vmstate_pxa2xx_keypad = {
    .name = "pxa2xx_keypad",
    .version_id = 0,
    .minimum_version_id = 0,
    .fields = (VMStateField[]) {
        VMSTATE_UINT32(kpc, PXA2xxKeyPadState),
        VMSTATE_UINT32(kpdk, PXA2xxKeyPadState),
        VMSTATE_UINT32(kprec, PXA2xxKeyPadState),
        VMSTATE_UINT32(kpmk, PXA2xxKeyPadState),
        VMSTATE_UINT32(kpas, PXA2xxKeyPadState),
        VMSTATE_UINT32_ARRAY(kpasmkp, PXA2xxKeyPadState, 4),
        VMSTATE_UINT32(kpkdi, PXA2xxKeyPadState),
        VMSTATE_END_OF_LIST()
    }
};

PXA2xxKeyPadState *pxa27x_keypad_init(MemoryRegion *sysmem,
                                      hwaddr base,
                                      qemu_irq irq)
{
    PXA2xxKeyPadState *s;

    s = g_new0(PXA2xxKeyPadState, 1);
    s->irq = irq;

    memory_region_init_io(&s->iomem, NULL, &pxa2xx_keypad_ops, s,
                          "pxa2xx-keypad", 0x00100000);
    memory_region_add_subregion(sysmem, base, &s->iomem);

    vmstate_register(NULL, 0, &vmstate_pxa2xx_keypad, s);

    return s;
}

void pxa27x_register_keypad(PXA2xxKeyPadState *kp,
                            const struct keymap *map, int size)
{
    if(!map || size < 0x80) {
        fprintf(stderr, "%s - No PXA keypad map defined\n", __func__);
        exit(-1);
    }

    kp->map = map;
    qemu_add_kbd_event_handler((QEMUPutKBDEvent *) pxa27x_keyboard_event, kp);
}
Commit	Line	Data
31b87f2e AZ	1	/*
	2	* Intel PXA27X Keypad Controller emulation.
	3	*
	4	* Copyright (c) 2007 MontaVista Software, Inc
	5	* Written by Armin Kuster <akuster@kama-aina.net>
	6	* or <Akuster@mvista.com>
	7	*
	8	* This code is licensed under the GPLv2.
6b620ca3 PB	9	*
	10	* Contributions after 2012-01-13 are licensed under the terms of the
	11	* GNU GPL, version 2 or (at your option) any later version.
31b87f2e AZ	12	*/
31b87f2e AZ	13
8ef94f0b	14	#include "qemu/osdep.h"
3a37f239	15	#include "qemu/log.h"
64552b6b	16	#include "hw/irq.h"
d6454270	17	#include "migration/vmstate.h"
0d09e41a	18	#include "hw/arm/pxa.h"
28ecbaee	19	#include "ui/console.h"
31b87f2e AZ	20
	21	/*
	22	* Keypad
	23	*/
	24	#define KPC 0x00 /* Keypad Interface Control register */
	25	#define KPDK 0x08 /* Keypad Interface Direct Key register */
	26	#define KPREC 0x10 /* Keypad Interface Rotary Encoder register */
	27	#define KPMK 0x18 /* Keypad Interface Matrix Key register */
	28	#define KPAS 0x20 /* Keypad Interface Automatic Scan register */
	29	#define KPASMKP0 0x28 /* Keypad Interface Automatic Scan Multiple
	30	Key Presser register 0 */
	31	#define KPASMKP1 0x30 /* Keypad Interface Automatic Scan Multiple
	32	Key Presser register 1 */
	33	#define KPASMKP2 0x38 /* Keypad Interface Automatic Scan Multiple
	34	Key Presser register 2 */
	35	#define KPASMKP3 0x40 /* Keypad Interface Automatic Scan Multiple
	36	Key Presser register 3 */
	37	#define KPKDI 0x48 /* Keypad Interface Key Debounce Interval
	38	register */
	39
	40	/* Keypad defines */
	41	#define KPC_AS (0x1 << 30) /* Automatic Scan bit */
	42	#define KPC_ASACT (0x1 << 29) /* Automatic Scan on Activity */
	43	#define KPC_MI (0x1 << 22) /* Matrix interrupt bit */
	44	#define KPC_IMKP (0x1 << 21) /* Ignore Multiple Key Press */
	45	#define KPC_MS7 (0x1 << 20) /* Matrix scan line 7 */
	46	#define KPC_MS6 (0x1 << 19) /* Matrix scan line 6 */
	47	#define KPC_MS5 (0x1 << 18) /* Matrix scan line 5 */
	48	#define KPC_MS4 (0x1 << 17) /* Matrix scan line 4 */
	49	#define KPC_MS3 (0x1 << 16) /* Matrix scan line 3 */
	50	#define KPC_MS2 (0x1 << 15) /* Matrix scan line 2 */
	51	#define KPC_MS1 (0x1 << 14) /* Matrix scan line 1 */
	52	#define KPC_MS0 (0x1 << 13) /* Matrix scan line 0 */
	53	#define KPC_ME (0x1 << 12) /* Matrix Keypad Enable */
	54	#define KPC_MIE (0x1 << 11) /* Matrix Interrupt Enable */
	55	#define KPC_DK_DEB_SEL (0x1 << 9) /* Direct Keypad Debounce Select */
	56	#define KPC_DI (0x1 << 5) /* Direct key interrupt bit */
	57	#define KPC_RE_ZERO_DEB (0x1 << 4) /* Rotary Encoder Zero Debounce */
	58	#define KPC_REE1 (0x1 << 3) /* Rotary Encoder1 Enable */
	59	#define KPC_REE0 (0x1 << 2) /* Rotary Encoder0 Enable */
	60	#define KPC_DE (0x1 << 1) /* Direct Keypad Enable */
	61	#define KPC_DIE (0x1 << 0) /* Direct Keypad interrupt Enable */
	62
	63	#define KPDK_DKP (0x1 << 31)
	64	#define KPDK_DK7 (0x1 << 7)
	65	#define KPDK_DK6 (0x1 << 6)
	66	#define KPDK_DK5 (0x1 << 5)
	67	#define KPDK_DK4 (0x1 << 4)
	68	#define KPDK_DK3 (0x1 << 3)
	69	#define KPDK_DK2 (0x1 << 2)
	70	#define KPDK_DK1 (0x1 << 1)
	71	#define KPDK_DK0 (0x1 << 0)
	72
	73	#define KPREC_OF1 (0x1 << 31)
	74	#define KPREC_UF1 (0x1 << 30)
	75	#define KPREC_OF0 (0x1 << 15)
	76	#define KPREC_UF0 (0x1 << 14)
	77
	78	#define KPMK_MKP (0x1 << 31)
	79	#define KPAS_SO (0x1 << 31)
	80	#define KPASMKPx_SO (0x1 << 31)
	81
	82
	83	#define KPASMKPx_MKC(row, col) (1 << (row + 16 * (col % 2)))
84
85	#define PXAKBD_MAXROW 8
86	#define PXAKBD_MAXCOL 8
87
bc24a225	88	struct PXA2xxKeyPadState {
6cd816b8	89	MemoryRegion iomem;
31b87f2e	90	qemu_irq irq;
52975c31	91	const struct keymap *map;
b976b4c0	92	int pressed_cnt;
582798b5	93	int alt_code;
31b87f2e AZ	94
	95	uint32_t kpc;
	96	uint32_t kpdk;
	97	uint32_t kprec;
	98	uint32_t kpmk;
	99	uint32_t kpas;
b976b4c0	100	uint32_t kpasmkp[4];
31b87f2e AZ	101	uint32_t kpkdi;
	102	};
	103
b976b4c0 VK	104	static void pxa27x_keypad_find_pressed_key(PXA2xxKeyPadState kp, int row, int *col)
	105	{
	106	int i;
	107	for (i = 0; i < 4; i++)
	108	{
	109	col = i 2;
	110	for (row = 0; row < 8; (*row)++) {
	111	if (kp->kpasmkp[i] & (1 << *row))
	112	return;
	113	}
	114	col = i 2 + 1;
	115	for (row = 0; row < 8; (*row)++) {
	116	if (kp->kpasmkp[i] & (1 << (*row + 16)))
	117	return;
	118	}
	119	}
	120	}
	121
bc24a225	122	static void pxa27x_keyboard_event (PXA2xxKeyPadState *kp, int keycode)
31b87f2e	123	{
b976b4c0 VK	124	int row, col, rel, assert_irq = 0;
b976b4c0 VK	125	uint32_t val;
31b87f2e	126
582798b5 VK	127	if (keycode == 0xe0) {
	128	kp->alt_code = 1;
	129	return;
	130	}
	131
31b87f2e AZ	132	if(!(kp->kpc & KPC_ME)) /* skip if not enabled */
	133	return;
	134
753a97c6 VK	135	rel = (keycode & 0x80) ? 1 : 0; /* key release from qemu */
	136	keycode &= ~0x80; /* strip qemu key release bit */
	137	if (kp->alt_code) {
	138	keycode \|= 0x80;
	139	kp->alt_code = 0;
	140	}
b976b4c0	141
753a97c6 VK	142	row = kp->map[keycode].row;
	143	col = kp->map[keycode].column;
	144	if (row == -1 \|\| col == -1) {
	145	return;
	146	}
b976b4c0	147
753a97c6 VK	148	val = KPASMKPx_MKC(row, col);
	149	if (rel) {
	150	if (kp->kpasmkp[col / 2] & val) {
	151	kp->kpasmkp[col / 2] &= ~val;
	152	kp->pressed_cnt--;
	153	assert_irq = 1;
b976b4c0	154	}
753a97c6 VK	155	} else {
	156	if (!(kp->kpasmkp[col / 2] & val)) {
	157	kp->kpasmkp[col / 2] \|= val;
	158	kp->pressed_cnt++;
	159	assert_irq = 1;
b976b4c0	160	}
31b87f2e	161	}
753a97c6 VK	162	kp->kpas = ((kp->pressed_cnt & 0x1f) << 26) \| (0xf << 4) \| 0xf;
	163	if (kp->pressed_cnt == 1) {
	164	kp->kpas &= ~((0xf << 4) \| 0xf);
	165	if (rel) {
	166	pxa27x_keypad_find_pressed_key(kp, &row, &col);
	167	}
	168	kp->kpas \|= ((row & 0xf) << 4) \| (col & 0xf);
	169	}
	170
8c4ec5c0	171	if (!(kp->kpc & (KPC_AS \| KPC_ASACT)))
753a97c6	172	assert_irq = 0;
31b87f2e	173
b976b4c0	174	if (assert_irq && (kp->kpc & KPC_MIE)) {
31b87f2e AZ	175	kp->kpc \|= KPC_MI;
	176	qemu_irq_raise(kp->irq);
	177	}
31b87f2e AZ	178	}
31b87f2e AZ	179
a8170e5e	180	static uint64_t pxa2xx_keypad_read(void *opaque, hwaddr offset,
6cd816b8	181	unsigned size)
31b87f2e	182	{
bc24a225	183	PXA2xxKeyPadState s = (PXA2xxKeyPadState ) opaque;
31b87f2e	184	uint32_t tmp;
31b87f2e AZ	185
	186	switch (offset) {
	187	case KPC:
	188	tmp = s->kpc;
	189	if(tmp & KPC_MI)
	190	s->kpc &= ~(KPC_MI);
	191	if(tmp & KPC_DI)
	192	s->kpc &= ~(KPC_DI);
	193	qemu_irq_lower(s->irq);
	194	return tmp;
31b87f2e AZ	195	case KPDK:
31b87f2e AZ	196	return s->kpdk;
31b87f2e AZ	197	case KPREC:
	198	tmp = s->kprec;
	199	if(tmp & KPREC_OF1)
	200	s->kprec &= ~(KPREC_OF1);
	201	if(tmp & KPREC_UF1)
	202	s->kprec &= ~(KPREC_UF1);
	203	if(tmp & KPREC_OF0)
	204	s->kprec &= ~(KPREC_OF0);
	205	if(tmp & KPREC_UF0)
	206	s->kprec &= ~(KPREC_UF0);
	207	return tmp;
31b87f2e AZ	208	case KPMK:
	209	tmp = s->kpmk;
	210	if(tmp & KPMK_MKP)
	211	s->kpmk &= ~(KPMK_MKP);
	212	return tmp;
31b87f2e AZ	213	case KPAS:
31b87f2e AZ	214	return s->kpas;
31b87f2e	215	case KPASMKP0:
b976b4c0	216	return s->kpasmkp[0];
31b87f2e	217	case KPASMKP1:
b976b4c0	218	return s->kpasmkp[1];
31b87f2e	219	case KPASMKP2:
b976b4c0	220	return s->kpasmkp[2];
31b87f2e	221	case KPASMKP3:
b976b4c0	222	return s->kpasmkp[3];
31b87f2e AZ	223	case KPKDI:
31b87f2e AZ	224	return s->kpkdi;
31b87f2e	225	default:
3a37f239 PMD	226	qemu_log_mask(LOG_GUEST_ERROR,
	227	"%s: Bad read offset 0x%"HWADDR_PRIx"\n",
	228	__func__, offset);
31b87f2e AZ	229	}
	230
	231	return 0;
	232	}
	233
a8170e5e	234	static void pxa2xx_keypad_write(void *opaque, hwaddr offset,
6cd816b8	235	uint64_t value, unsigned size)
31b87f2e	236	{
bc24a225	237	PXA2xxKeyPadState s = (PXA2xxKeyPadState ) opaque;
31b87f2e AZ	238
	239	switch (offset) {
	240	case KPC:
	241	s->kpc = value;
753a97c6 VK	242	if (s->kpc & KPC_AS) {
	243	s->kpc &= ~(KPC_AS);
	244	}
31b87f2e AZ	245	break;
	246	case KPDK:
	247	s->kpdk = value;
	248	break;
	249	case KPREC:
	250	s->kprec = value;
	251	break;
	252	case KPMK:
	253	s->kpmk = value;
	254	break;
	255	case KPAS:
	256	s->kpas = value;
	257	break;
	258	case KPASMKP0:
b976b4c0	259	s->kpasmkp[0] = value;
31b87f2e AZ	260	break;
31b87f2e AZ	261	case KPASMKP1:
b976b4c0	262	s->kpasmkp[1] = value;
31b87f2e AZ	263	break;
31b87f2e AZ	264	case KPASMKP2:
b976b4c0	265	s->kpasmkp[2] = value;
31b87f2e AZ	266	break;
31b87f2e AZ	267	case KPASMKP3:
b976b4c0	268	s->kpasmkp[3] = value;
31b87f2e AZ	269	break;
	270	case KPKDI:
	271	s->kpkdi = value;
	272	break;
	273
	274	default:
3a37f239 PMD	275	qemu_log_mask(LOG_GUEST_ERROR,
	276	"%s: Bad write offset 0x%"HWADDR_PRIx"\n",
	277	__func__, offset);
31b87f2e AZ	278	}
	279	}
	280
6cd816b8 BC	281	static const MemoryRegionOps pxa2xx_keypad_ops = {
	282	.read = pxa2xx_keypad_read,
	283	.write = pxa2xx_keypad_write,
	284	.endianness = DEVICE_NATIVE_ENDIAN,
31b87f2e AZ	285	};
31b87f2e AZ	286
25f5a1b7 JQ	287	static const VMStateDescription vmstate_pxa2xx_keypad = {
	288	.name = "pxa2xx_keypad",
	289	.version_id = 0,
	290	.minimum_version_id = 0,
8f1e884b	291	.fields = (VMStateField[]) {
25f5a1b7 JQ	292	VMSTATE_UINT32(kpc, PXA2xxKeyPadState),
	293	VMSTATE_UINT32(kpdk, PXA2xxKeyPadState),
	294	VMSTATE_UINT32(kprec, PXA2xxKeyPadState),
	295	VMSTATE_UINT32(kpmk, PXA2xxKeyPadState),
	296	VMSTATE_UINT32(kpas, PXA2xxKeyPadState),
	297	VMSTATE_UINT32_ARRAY(kpasmkp, PXA2xxKeyPadState, 4),
	298	VMSTATE_UINT32(kpkdi, PXA2xxKeyPadState),
	299	VMSTATE_END_OF_LIST()
	300	}
	301	};
31b87f2e	302
6cd816b8	303	PXA2xxKeyPadState pxa27x_keypad_init(MemoryRegion sysmem,
a8170e5e	304	hwaddr base,
6cd816b8	305	qemu_irq irq)
31b87f2e	306	{
bc24a225	307	PXA2xxKeyPadState *s;
31b87f2e	308
b21e2380	309	s = g_new0(PXA2xxKeyPadState, 1);
31b87f2e AZ	310	s->irq = irq;
31b87f2e AZ	311
2c9b15ca	312	memory_region_init_io(&s->iomem, NULL, &pxa2xx_keypad_ops, s,
6cd816b8 BC	313	"pxa2xx-keypad", 0x00100000);
6cd816b8 BC	314	memory_region_add_subregion(sysmem, base, &s->iomem);
31b87f2e	315
25f5a1b7	316	vmstate_register(NULL, 0, &vmstate_pxa2xx_keypad, s);
31b87f2e AZ	317
	318	return s;
	319	}
	320
52975c31 SW	321	void pxa27x_register_keypad(PXA2xxKeyPadState *kp,
52975c31 SW	322	const struct keymap *map, int size)
31b87f2e	323	{
bd464c2e	324	if(!map \|\| size < 0x80) {
a89f364a	325	fprintf(stderr, "%s - No PXA keypad map defined\n", __func__);
31b87f2e AZ	326	exit(-1);
	327	}
	328
	329	kp->map = map;
	330	qemu_add_kbd_event_handler((QEMUPutKBDEvent *) pxa27x_keyboard_event, kp);
	331	}