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1ddda5cd AG |
1 | /* |
2 | * Apple SMC controller | |
3 | * | |
4 | * Copyright (c) 2007 Alexander Graf | |
5 | * | |
6 | * Authors: Alexander Graf <agraf@suse.de> | |
7 | * Susanne Graf <suse@csgraf.de> | |
8 | * | |
9 | * This library is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU Lesser General Public | |
11 | * License as published by the Free Software Foundation; either | |
12 | * version 2 of the License, or (at your option) any later version. | |
13 | * | |
14 | * This library is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
17 | * Lesser General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU Lesser General Public | |
20 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
21 | * | |
22 | * ***************************************************************** | |
23 | * | |
24 | * In all Intel-based Apple hardware there is an SMC chip to control the | |
25 | * backlight, fans and several other generic device parameters. It also | |
26 | * contains the magic keys used to dongle Mac OS X to the device. | |
27 | * | |
28 | * This driver was mostly created by looking at the Linux AppleSMC driver | |
29 | * implementation and does not support IRQ. | |
30 | * | |
31 | */ | |
32 | ||
83c9f4ca | 33 | #include "hw/hw.h" |
0d09e41a | 34 | #include "hw/isa/isa.h" |
28ecbaee | 35 | #include "ui/console.h" |
1de7afc9 | 36 | #include "qemu/timer.h" |
1ddda5cd AG |
37 | |
38 | /* #define DEBUG_SMC */ | |
39 | ||
40 | #define APPLESMC_DEFAULT_IOBASE 0x300 | |
41 | /* data port used by Apple SMC */ | |
42 | #define APPLESMC_DATA_PORT 0x0 | |
43 | /* command/status port used by Apple SMC */ | |
44 | #define APPLESMC_CMD_PORT 0x4 | |
45 | #define APPLESMC_NR_PORTS 32 | |
46 | #define APPLESMC_MAX_DATA_LENGTH 32 | |
47 | ||
48 | #define APPLESMC_READ_CMD 0x10 | |
49 | #define APPLESMC_WRITE_CMD 0x11 | |
50 | #define APPLESMC_GET_KEY_BY_INDEX_CMD 0x12 | |
51 | #define APPLESMC_GET_KEY_TYPE_CMD 0x13 | |
52 | ||
53 | #ifdef DEBUG_SMC | |
54 | #define smc_debug(...) fprintf(stderr, "AppleSMC: " __VA_ARGS__) | |
55 | #else | |
56 | #define smc_debug(...) do { } while(0) | |
57 | #endif | |
58 | ||
59 | static char default_osk[64] = "This is a dummy key. Enter the real key " | |
60 | "using the -osk parameter"; | |
61 | ||
62 | struct AppleSMCData { | |
63 | uint8_t len; | |
64 | const char *key; | |
65 | const char *data; | |
66 | QLIST_ENTRY(AppleSMCData) node; | |
67 | }; | |
68 | ||
82407b6c AF |
69 | #define TYPE_APPLE_SMC "isa-applesmc" |
70 | #define APPLE_SMC(obj) OBJECT_CHECK(AppleSMCState, (obj), TYPE_APPLE_SMC) | |
71 | ||
72 | typedef struct AppleSMCState AppleSMCState; | |
73 | struct AppleSMCState { | |
74 | ISADevice parent_obj; | |
75 | ||
e3914e3a JK |
76 | MemoryRegion io_data; |
77 | MemoryRegion io_cmd; | |
1ddda5cd AG |
78 | uint32_t iobase; |
79 | uint8_t cmd; | |
80 | uint8_t status; | |
81 | uint8_t key[4]; | |
82 | uint8_t read_pos; | |
83 | uint8_t data_len; | |
84 | uint8_t data_pos; | |
85 | uint8_t data[255]; | |
86 | uint8_t charactic[4]; | |
87 | char *osk; | |
88 | QLIST_HEAD(, AppleSMCData) data_def; | |
89 | }; | |
90 | ||
e3914e3a JK |
91 | static void applesmc_io_cmd_write(void *opaque, hwaddr addr, uint64_t val, |
92 | unsigned size) | |
1ddda5cd | 93 | { |
82407b6c | 94 | AppleSMCState *s = opaque; |
1ddda5cd AG |
95 | |
96 | smc_debug("CMD Write B: %#x = %#x\n", addr, val); | |
97 | switch(val) { | |
98 | case APPLESMC_READ_CMD: | |
99 | s->status = 0x0c; | |
100 | break; | |
101 | } | |
102 | s->cmd = val; | |
103 | s->read_pos = 0; | |
104 | s->data_pos = 0; | |
105 | } | |
106 | ||
82407b6c | 107 | static void applesmc_fill_data(AppleSMCState *s) |
1ddda5cd AG |
108 | { |
109 | struct AppleSMCData *d; | |
110 | ||
111 | QLIST_FOREACH(d, &s->data_def, node) { | |
112 | if (!memcmp(d->key, s->key, 4)) { | |
113 | smc_debug("Key matched (%s Len=%d Data=%s)\n", d->key, | |
114 | d->len, d->data); | |
115 | memcpy(s->data, d->data, d->len); | |
116 | return; | |
117 | } | |
118 | } | |
119 | } | |
120 | ||
e3914e3a JK |
121 | static void applesmc_io_data_write(void *opaque, hwaddr addr, uint64_t val, |
122 | unsigned size) | |
1ddda5cd | 123 | { |
82407b6c | 124 | AppleSMCState *s = opaque; |
1ddda5cd AG |
125 | |
126 | smc_debug("DATA Write B: %#x = %#x\n", addr, val); | |
127 | switch(s->cmd) { | |
128 | case APPLESMC_READ_CMD: | |
129 | if(s->read_pos < 4) { | |
130 | s->key[s->read_pos] = val; | |
131 | s->status = 0x04; | |
132 | } else if(s->read_pos == 4) { | |
133 | s->data_len = val; | |
134 | s->status = 0x05; | |
135 | s->data_pos = 0; | |
136 | smc_debug("Key = %c%c%c%c Len = %d\n", s->key[0], | |
137 | s->key[1], s->key[2], s->key[3], val); | |
138 | applesmc_fill_data(s); | |
139 | } | |
140 | s->read_pos++; | |
141 | break; | |
142 | } | |
143 | } | |
144 | ||
e3914e3a JK |
145 | static uint64_t applesmc_io_data_read(void *opaque, hwaddr addr1, |
146 | unsigned size) | |
1ddda5cd | 147 | { |
82407b6c | 148 | AppleSMCState *s = opaque; |
1ddda5cd AG |
149 | uint8_t retval = 0; |
150 | ||
151 | switch(s->cmd) { | |
152 | case APPLESMC_READ_CMD: | |
153 | if(s->data_pos < s->data_len) { | |
154 | retval = s->data[s->data_pos]; | |
155 | smc_debug("READ_DATA[%d] = %#hhx\n", s->data_pos, | |
156 | retval); | |
157 | s->data_pos++; | |
158 | if(s->data_pos == s->data_len) { | |
159 | s->status = 0x00; | |
160 | smc_debug("EOF\n"); | |
161 | } else | |
162 | s->status = 0x05; | |
163 | } | |
164 | } | |
165 | smc_debug("DATA Read b: %#x = %#x\n", addr1, retval); | |
166 | ||
167 | return retval; | |
168 | } | |
169 | ||
e3914e3a | 170 | static uint64_t applesmc_io_cmd_read(void *opaque, hwaddr addr1, unsigned size) |
1ddda5cd | 171 | { |
82407b6c | 172 | AppleSMCState *s = opaque; |
1ddda5cd AG |
173 | |
174 | smc_debug("CMD Read B: %#x\n", addr1); | |
175 | return s->status; | |
176 | } | |
177 | ||
82407b6c | 178 | static void applesmc_add_key(AppleSMCState *s, const char *key, |
1ddda5cd AG |
179 | int len, const char *data) |
180 | { | |
181 | struct AppleSMCData *def; | |
182 | ||
7267c094 | 183 | def = g_malloc0(sizeof(struct AppleSMCData)); |
1ddda5cd AG |
184 | def->key = key; |
185 | def->len = len; | |
186 | def->data = data; | |
187 | ||
188 | QLIST_INSERT_HEAD(&s->data_def, def, node); | |
189 | } | |
190 | ||
191 | static void qdev_applesmc_isa_reset(DeviceState *dev) | |
192 | { | |
82407b6c | 193 | AppleSMCState *s = APPLE_SMC(dev); |
1ddda5cd AG |
194 | struct AppleSMCData *d, *next; |
195 | ||
196 | /* Remove existing entries */ | |
197 | QLIST_FOREACH_SAFE(d, &s->data_def, node, next) { | |
198 | QLIST_REMOVE(d, node); | |
199 | } | |
200 | ||
7f90fa77 | 201 | applesmc_add_key(s, "REV ", 6, "\x01\x13\x0f\x00\x00\x03"); |
1ddda5cd AG |
202 | applesmc_add_key(s, "OSK0", 32, s->osk); |
203 | applesmc_add_key(s, "OSK1", 32, s->osk + 32); | |
204 | applesmc_add_key(s, "NATJ", 1, "\0"); | |
205 | applesmc_add_key(s, "MSSP", 1, "\0"); | |
206 | applesmc_add_key(s, "MSSD", 1, "\0x3"); | |
207 | } | |
208 | ||
e3914e3a JK |
209 | static const MemoryRegionOps applesmc_data_io_ops = { |
210 | .write = applesmc_io_data_write, | |
211 | .read = applesmc_io_data_read, | |
212 | .endianness = DEVICE_NATIVE_ENDIAN, | |
213 | .impl = { | |
214 | .min_access_size = 1, | |
215 | .max_access_size = 1, | |
216 | }, | |
217 | }; | |
218 | ||
219 | static const MemoryRegionOps applesmc_cmd_io_ops = { | |
220 | .write = applesmc_io_cmd_write, | |
221 | .read = applesmc_io_cmd_read, | |
222 | .endianness = DEVICE_NATIVE_ENDIAN, | |
223 | .impl = { | |
224 | .min_access_size = 1, | |
225 | .max_access_size = 1, | |
226 | }, | |
227 | }; | |
228 | ||
db895a1e | 229 | static void applesmc_isa_realize(DeviceState *dev, Error **errp) |
1ddda5cd | 230 | { |
82407b6c | 231 | AppleSMCState *s = APPLE_SMC(dev); |
1ddda5cd | 232 | |
3c161542 | 233 | memory_region_init_io(&s->io_data, OBJECT(s), &applesmc_data_io_ops, s, |
e3914e3a JK |
234 | "applesmc-data", 4); |
235 | isa_register_ioport(&s->parent_obj, &s->io_data, | |
236 | s->iobase + APPLESMC_DATA_PORT); | |
237 | ||
3c161542 | 238 | memory_region_init_io(&s->io_cmd, OBJECT(s), &applesmc_cmd_io_ops, s, |
e3914e3a JK |
239 | "applesmc-cmd", 4); |
240 | isa_register_ioport(&s->parent_obj, &s->io_cmd, | |
241 | s->iobase + APPLESMC_CMD_PORT); | |
1ddda5cd AG |
242 | |
243 | if (!s->osk || (strlen(s->osk) != 64)) { | |
244 | fprintf(stderr, "WARNING: Using AppleSMC with invalid key\n"); | |
245 | s->osk = default_osk; | |
246 | } | |
247 | ||
248 | QLIST_INIT(&s->data_def); | |
db895a1e | 249 | qdev_applesmc_isa_reset(dev); |
1ddda5cd AG |
250 | } |
251 | ||
39bffca2 | 252 | static Property applesmc_isa_properties[] = { |
82407b6c | 253 | DEFINE_PROP_HEX32("iobase", AppleSMCState, iobase, |
39bffca2 | 254 | APPLESMC_DEFAULT_IOBASE), |
82407b6c | 255 | DEFINE_PROP_STRING("osk", AppleSMCState, osk), |
39bffca2 AL |
256 | DEFINE_PROP_END_OF_LIST(), |
257 | }; | |
258 | ||
8f04ee08 AL |
259 | static void qdev_applesmc_class_init(ObjectClass *klass, void *data) |
260 | { | |
39bffca2 | 261 | DeviceClass *dc = DEVICE_CLASS(klass); |
db895a1e AF |
262 | |
263 | dc->realize = applesmc_isa_realize; | |
39bffca2 AL |
264 | dc->reset = qdev_applesmc_isa_reset; |
265 | dc->props = applesmc_isa_properties; | |
8f04ee08 AL |
266 | } |
267 | ||
8c43a6f0 | 268 | static const TypeInfo applesmc_isa_info = { |
82407b6c | 269 | .name = TYPE_APPLE_SMC, |
39bffca2 | 270 | .parent = TYPE_ISA_DEVICE, |
82407b6c | 271 | .instance_size = sizeof(AppleSMCState), |
39bffca2 | 272 | .class_init = qdev_applesmc_class_init, |
1ddda5cd AG |
273 | }; |
274 | ||
83f7d43a | 275 | static void applesmc_register_types(void) |
1ddda5cd | 276 | { |
39bffca2 | 277 | type_register_static(&applesmc_isa_info); |
1ddda5cd AG |
278 | } |
279 | ||
83f7d43a | 280 | type_init(applesmc_register_types) |