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Move QOM typedefs and add missing includes
[thirdparty/qemu.git] / hw / misc / pc-testdev.c
CommitLineData
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1/*
2 * QEMU x86 ISA testdev
3 *
4 * Copyright (c) 2012 Avi Kivity, Gerd Hoffmann, Marcelo Tosatti
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25/*
26 * This device is used to test KVM features specific to the x86 port, such
27 * as emulation, power management, interrupt routing, among others. It's meant
28 * to be used like:
29 *
30 * qemu-system-x86_64 -device pc-testdev -serial stdio \
31 * -device isa-debug-exit,iobase=0xf4,iosize=0x4 \
32 * -kernel /home/lmr/Code/virt-test.git/kvm/unittests/msr.flat
33 *
34 * Where msr.flat is one of the KVM unittests, present on a separate repo,
8308ed30 35 * https://git.kernel.org/pub/scm/virt/kvm/kvm-unit-tests.git
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36*/
37
b6a0aa05 38#include "qemu/osdep.h"
0b8fa32f 39#include "qemu/module.h"
64552b6b 40#include "hw/irq.h"
0d09e41a 41#include "hw/isa/isa.h"
db1015e9 42#include "qom/object.h"
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43
44#define IOMEM_LEN 0x10000
45
db1015e9 46struct PCTestdev {
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47 ISADevice parent_obj;
48
49 MemoryRegion ioport;
d2f5ea97 50 MemoryRegion ioport_byte;
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51 MemoryRegion flush;
52 MemoryRegion irq;
53 MemoryRegion iomem;
54 uint32_t ioport_data;
55 char iomem_buf[IOMEM_LEN];
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56};
57typedef struct PCTestdev PCTestdev;
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58
59#define TYPE_TESTDEV "pc-testdev"
60#define TESTDEV(obj) \
00e4d0db 61 OBJECT_CHECK(PCTestdev, (obj), TYPE_TESTDEV)
ee0cc541 62
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63static uint64_t test_irq_line_read(void *opaque, hwaddr addr, unsigned size)
64{
65 return 0;
66}
67
68static void test_irq_line_write(void *opaque, hwaddr addr, uint64_t data,
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69 unsigned len)
70{
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71 PCTestdev *dev = opaque;
72 ISADevice *isa = ISA_DEVICE(dev);
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73
74 qemu_set_irq(isa_get_irq(isa, addr), !!data);
75}
76
77static const MemoryRegionOps test_irq_ops = {
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78 .read = test_irq_line_read,
79 .write = test_irq_line_write,
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80 .valid.min_access_size = 1,
81 .valid.max_access_size = 1,
82 .endianness = DEVICE_LITTLE_ENDIAN,
83};
84
85static void test_ioport_write(void *opaque, hwaddr addr, uint64_t data,
86 unsigned len)
87{
00e4d0db 88 PCTestdev *dev = opaque;
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89 int bits = len * 8;
90 int start_bit = (addr & 3) * 8;
91 uint32_t mask = ((uint32_t)-1 >> (32 - bits)) << start_bit;
92 dev->ioport_data &= ~mask;
93 dev->ioport_data |= data << start_bit;
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94}
95
96static uint64_t test_ioport_read(void *opaque, hwaddr addr, unsigned len)
97{
00e4d0db 98 PCTestdev *dev = opaque;
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99 int bits = len * 8;
100 int start_bit = (addr & 3) * 8;
101 uint32_t mask = ((uint32_t)-1 >> (32 - bits)) << start_bit;
102 return (dev->ioport_data & mask) >> start_bit;
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103}
104
105static const MemoryRegionOps test_ioport_ops = {
106 .read = test_ioport_read,
107 .write = test_ioport_write,
108 .endianness = DEVICE_LITTLE_ENDIAN,
109};
110
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111static const MemoryRegionOps test_ioport_byte_ops = {
112 .read = test_ioport_read,
113 .write = test_ioport_write,
114 .valid.min_access_size = 1,
115 .valid.max_access_size = 4,
116 .impl.min_access_size = 1,
117 .impl.max_access_size = 1,
118 .endianness = DEVICE_LITTLE_ENDIAN,
119};
120
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121static uint64_t test_flush_page_read(void *opaque, hwaddr addr, unsigned size)
122{
123 return 0;
124}
125
126static void test_flush_page_write(void *opaque, hwaddr addr, uint64_t data,
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127 unsigned len)
128{
129 hwaddr page = 4096;
85eb7c18 130 void *a = cpu_physical_memory_map(data & ~0xffful, &page, false);
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131
132 /* We might not be able to get the full page, only mprotect what we actually
133 have mapped */
549db5c3 134#if defined(CONFIG_POSIX)
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135 mprotect(a, page, PROT_NONE);
136 mprotect(a, page, PROT_READ|PROT_WRITE);
549db5c3 137#endif
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138 cpu_physical_memory_unmap(a, page, 0, 0);
139}
140
141static const MemoryRegionOps test_flush_ops = {
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142 .read = test_flush_page_read,
143 .write = test_flush_page_write,
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144 .valid.min_access_size = 4,
145 .valid.max_access_size = 4,
146 .endianness = DEVICE_LITTLE_ENDIAN,
147};
148
149static uint64_t test_iomem_read(void *opaque, hwaddr addr, unsigned len)
150{
00e4d0db 151 PCTestdev *dev = opaque;
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152 uint64_t ret = 0;
153 memcpy(&ret, &dev->iomem_buf[addr], len);
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154
155 return ret;
156}
157
158static void test_iomem_write(void *opaque, hwaddr addr, uint64_t val,
159 unsigned len)
160{
00e4d0db 161 PCTestdev *dev = opaque;
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162 memcpy(&dev->iomem_buf[addr], &val, len);
163 dev->iomem_buf[addr] = val;
164}
165
166static const MemoryRegionOps test_iomem_ops = {
167 .read = test_iomem_read,
168 .write = test_iomem_write,
169 .endianness = DEVICE_LITTLE_ENDIAN,
170};
171
db895a1e 172static void testdev_realizefn(DeviceState *d, Error **errp)
ee0cc541 173{
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174 ISADevice *isa = ISA_DEVICE(d);
175 PCTestdev *dev = TESTDEV(d);
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176 MemoryRegion *mem = isa_address_space(isa);
177 MemoryRegion *io = isa_address_space_io(isa);
178
3c161542 179 memory_region_init_io(&dev->ioport, OBJECT(dev), &test_ioport_ops, dev,
ee0cc541 180 "pc-testdev-ioport", 4);
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181 memory_region_init_io(&dev->ioport_byte, OBJECT(dev),
182 &test_ioport_byte_ops, dev,
183 "pc-testdev-ioport-byte", 4);
3c161542 184 memory_region_init_io(&dev->flush, OBJECT(dev), &test_flush_ops, dev,
ee0cc541 185 "pc-testdev-flush-page", 4);
3c161542 186 memory_region_init_io(&dev->irq, OBJECT(dev), &test_irq_ops, dev,
ee0cc541 187 "pc-testdev-irq-line", 24);
3c161542 188 memory_region_init_io(&dev->iomem, OBJECT(dev), &test_iomem_ops, dev,
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189 "pc-testdev-iomem", IOMEM_LEN);
190
191 memory_region_add_subregion(io, 0xe0, &dev->ioport);
192 memory_region_add_subregion(io, 0xe4, &dev->flush);
d2f5ea97 193 memory_region_add_subregion(io, 0xe8, &dev->ioport_byte);
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194 memory_region_add_subregion(io, 0x2000, &dev->irq);
195 memory_region_add_subregion(mem, 0xff000000, &dev->iomem);
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196}
197
198static void testdev_class_init(ObjectClass *klass, void *data)
199{
db895a1e 200 DeviceClass *dc = DEVICE_CLASS(klass);
ee0cc541 201
125ee0ed 202 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
db895a1e 203 dc->realize = testdev_realizefn;
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204}
205
8c43a6f0 206static const TypeInfo testdev_info = {
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207 .name = TYPE_TESTDEV,
208 .parent = TYPE_ISA_DEVICE,
00e4d0db 209 .instance_size = sizeof(PCTestdev),
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210 .class_init = testdev_class_init,
211};
212
213static void testdev_register_types(void)
214{
215 type_register_static(&testdev_info);
216}
217
218type_init(testdev_register_types)