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[thirdparty/qemu.git] / hw / pcmcia / pxa2xx.c
CommitLineData
a171fe39
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1/*
2 * Intel XScale PXA255/270 PC Card and CompactFlash Interface.
3 *
4 * Copyright (c) 2006 Openedhand Ltd.
5 * Written by Andrzej Zaborowski <balrog@zabor.org>
6 *
7 * This code is licensed under the GPLv2.
6b620ca3
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8 *
9 * Contributions after 2012-01-13 are licensed under the terms of the
10 * GNU GPL, version 2 or (at your option) any later version.
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11 */
12
8ef94f0b 13#include "qemu/osdep.h"
64552b6b 14#include "hw/irq.h"
80bbaee6 15#include "hw/sysbus.h"
3e80f690 16#include "qapi/error.h"
0b8fa32f 17#include "qemu/module.h"
83c9f4ca 18#include "hw/pcmcia.h"
0d09e41a 19#include "hw/arm/pxa.h"
a171fe39 20
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21#define TYPE_PXA2XX_PCMCIA "pxa2xx-pcmcia"
22#define PXA2XX_PCMCIA(obj) \
23 OBJECT_CHECK(PXA2xxPCMCIAState, obj, TYPE_PXA2XX_PCMCIA)
4beeaa71 24
bc24a225 25struct PXA2xxPCMCIAState {
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26 SysBusDevice parent_obj;
27
bc24a225 28 PCMCIASocket slot;
80bbaee6 29 MemoryRegion container_mem;
354a8c06 30 MemoryRegion common_iomem;
4beeaa71 31 MemoryRegion attr_iomem;
59aee13c 32 MemoryRegion iomem;
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33
34 qemu_irq irq;
35 qemu_irq cd_irq;
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36
37 PCMCIACardState *card;
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38};
39
354a8c06 40static uint64_t pxa2xx_pcmcia_common_read(void *opaque,
a8170e5e 41 hwaddr offset, unsigned size)
a171fe39 42{
bc24a225 43 PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
d1f2c96a 44 PCMCIACardClass *pcc;
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45
46 if (s->slot.attached) {
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47 pcc = PCMCIA_CARD_GET_CLASS(s->card);
48 return pcc->common_read(s->card, offset);
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49 }
50
51 return 0;
52}
53
a8170e5e 54static void pxa2xx_pcmcia_common_write(void *opaque, hwaddr offset,
354a8c06 55 uint64_t value, unsigned size)
a171fe39 56{
bc24a225 57 PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
d1f2c96a 58 PCMCIACardClass *pcc;
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59
60 if (s->slot.attached) {
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61 pcc = PCMCIA_CARD_GET_CLASS(s->card);
62 pcc->common_write(s->card, offset, value);
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63 }
64}
65
4beeaa71 66static uint64_t pxa2xx_pcmcia_attr_read(void *opaque,
a8170e5e 67 hwaddr offset, unsigned size)
a171fe39 68{
bc24a225 69 PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
d1f2c96a 70 PCMCIACardClass *pcc;
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71
72 if (s->slot.attached) {
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73 pcc = PCMCIA_CARD_GET_CLASS(s->card);
74 return pcc->attr_read(s->card, offset);
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75 }
76
77 return 0;
78}
79
a8170e5e 80static void pxa2xx_pcmcia_attr_write(void *opaque, hwaddr offset,
4beeaa71 81 uint64_t value, unsigned size)
a171fe39 82{
bc24a225 83 PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
d1f2c96a 84 PCMCIACardClass *pcc;
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85
86 if (s->slot.attached) {
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87 pcc = PCMCIA_CARD_GET_CLASS(s->card);
88 pcc->attr_write(s->card, offset, value);
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89 }
90}
91
59aee13c 92static uint64_t pxa2xx_pcmcia_io_read(void *opaque,
a8170e5e 93 hwaddr offset, unsigned size)
a171fe39 94{
bc24a225 95 PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
d1f2c96a 96 PCMCIACardClass *pcc;
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97
98 if (s->slot.attached) {
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99 pcc = PCMCIA_CARD_GET_CLASS(s->card);
100 return pcc->io_read(s->card, offset);
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101 }
102
103 return 0;
104}
105
a8170e5e 106static void pxa2xx_pcmcia_io_write(void *opaque, hwaddr offset,
59aee13c 107 uint64_t value, unsigned size)
a171fe39 108{
bc24a225 109 PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
d1f2c96a 110 PCMCIACardClass *pcc;
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111
112 if (s->slot.attached) {
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113 pcc = PCMCIA_CARD_GET_CLASS(s->card);
114 pcc->io_write(s->card, offset, value);
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115 }
116}
117
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118static const MemoryRegionOps pxa2xx_pcmcia_common_ops = {
119 .read = pxa2xx_pcmcia_common_read,
120 .write = pxa2xx_pcmcia_common_write,
121 .endianness = DEVICE_NATIVE_ENDIAN
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122};
123
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124static const MemoryRegionOps pxa2xx_pcmcia_attr_ops = {
125 .read = pxa2xx_pcmcia_attr_read,
126 .write = pxa2xx_pcmcia_attr_write,
127 .endianness = DEVICE_NATIVE_ENDIAN
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128};
129
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130static const MemoryRegionOps pxa2xx_pcmcia_io_ops = {
131 .read = pxa2xx_pcmcia_io_read,
132 .write = pxa2xx_pcmcia_io_write,
133 .endianness = DEVICE_NATIVE_ENDIAN
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134};
135
136static void pxa2xx_pcmcia_set_irq(void *opaque, int line, int level)
137{
bc24a225 138 PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
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139 if (!s->irq)
140 return;
141
142 qemu_set_irq(s->irq, level);
143}
144
354a8c06 145PXA2xxPCMCIAState *pxa2xx_pcmcia_init(MemoryRegion *sysmem,
a8170e5e 146 hwaddr base)
a171fe39 147{
80bbaee6 148 DeviceState *dev;
bc24a225 149 PXA2xxPCMCIAState *s;
a171fe39 150
3e80f690 151 dev = qdev_new(TYPE_PXA2XX_PCMCIA);
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152 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
153 s = PXA2XX_PCMCIA(dev);
154
3c6ef471 155 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
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156
157 return s;
158}
159
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160static void pxa2xx_pcmcia_initfn(Object *obj)
161{
162 SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
163 PXA2xxPCMCIAState *s = PXA2XX_PCMCIA(obj);
164
165 memory_region_init(&s->container_mem, obj, "container", 0x10000000);
166 sysbus_init_mmio(sbd, &s->container_mem);
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167
168 /* Socket I/O Memory Space */
81e0ab48 169 memory_region_init_io(&s->iomem, obj, &pxa2xx_pcmcia_io_ops, s,
59aee13c 170 "pxa2xx-pcmcia-io", 0x04000000);
80bbaee6 171 memory_region_add_subregion(&s->container_mem, 0x00000000,
59aee13c 172 &s->iomem);
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173
174 /* Then next 64 MB is reserved */
175
176 /* Socket Attribute Memory Space */
81e0ab48 177 memory_region_init_io(&s->attr_iomem, obj, &pxa2xx_pcmcia_attr_ops, s,
4beeaa71 178 "pxa2xx-pcmcia-attribute", 0x04000000);
80bbaee6 179 memory_region_add_subregion(&s->container_mem, 0x08000000,
4beeaa71 180 &s->attr_iomem);
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181
182 /* Socket Common Memory Space */
81e0ab48 183 memory_region_init_io(&s->common_iomem, obj, &pxa2xx_pcmcia_common_ops, s,
354a8c06 184 "pxa2xx-pcmcia-common", 0x04000000);
80bbaee6 185 memory_region_add_subregion(&s->container_mem, 0x0c000000,
354a8c06 186 &s->common_iomem);
a171fe39 187
f3c7d038 188 s->slot.irq = qemu_allocate_irq(pxa2xx_pcmcia_set_irq, s, 0);
3f582262 189
80bbaee6 190 object_property_add_link(obj, "card", TYPE_PCMCIA_CARD,
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191 (Object **)&s->card,
192 NULL, /* read-only property */
d2623129 193 0);
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194}
195
196/* Insert a new card into a slot */
bc24a225 197int pxa2xx_pcmcia_attach(void *opaque, PCMCIACardState *card)
a171fe39 198{
bc24a225 199 PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
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200 PCMCIACardClass *pcc;
201
202 if (s->slot.attached) {
a171fe39 203 return -EEXIST;
d1f2c96a 204 }
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205
206 if (s->cd_irq) {
207 qemu_irq_raise(s->cd_irq);
208 }
209
210 s->card = card;
d1f2c96a 211 pcc = PCMCIA_CARD_GET_CLASS(s->card);
a171fe39 212
d1f2c96a 213 s->slot.attached = true;
a171fe39 214 s->card->slot = &s->slot;
d1f2c96a 215 pcc->attach(s->card);
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216
217 return 0;
218}
219
220/* Eject card from the slot */
853ca11d 221int pxa2xx_pcmcia_detach(void *opaque)
a171fe39 222{
bc24a225 223 PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
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224 PCMCIACardClass *pcc;
225
226 if (!s->slot.attached) {
a171fe39 227 return -ENOENT;
d1f2c96a 228 }
a171fe39 229
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230 pcc = PCMCIA_CARD_GET_CLASS(s->card);
231 pcc->detach(s->card);
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232 s->card->slot = NULL;
233 s->card = NULL;
a171fe39 234
d1f2c96a 235 s->slot.attached = false;
a171fe39 236
d1f2c96a 237 if (s->irq) {
a171fe39 238 qemu_irq_lower(s->irq);
d1f2c96a
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239 }
240 if (s->cd_irq) {
a171fe39 241 qemu_irq_lower(s->cd_irq);
d1f2c96a 242 }
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243
244 return 0;
245}
246
247/* Who to notify on card events */
248void pxa2xx_pcmcia_set_irq_cb(void *opaque, qemu_irq irq, qemu_irq cd_irq)
249{
bc24a225 250 PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
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251 s->irq = irq;
252 s->cd_irq = cd_irq;
253}
80bbaee6 254
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255static const TypeInfo pxa2xx_pcmcia_type_info = {
256 .name = TYPE_PXA2XX_PCMCIA,
257 .parent = TYPE_SYS_BUS_DEVICE,
258 .instance_size = sizeof(PXA2xxPCMCIAState),
259 .instance_init = pxa2xx_pcmcia_initfn,
80bbaee6
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260};
261
262static void pxa2xx_pcmcia_register_types(void)
263{
264 type_register_static(&pxa2xx_pcmcia_type_info);
265}
266
267type_init(pxa2xx_pcmcia_register_types)