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[thirdparty/qemu.git] / hw / ppc / spapr_drc.c
CommitLineData
bbf5c878
MR
1/*
2 * QEMU SPAPR Dynamic Reconfiguration Connector Implementation
3 *
4 * Copyright IBM Corp. 2014
5 *
6 * Authors:
7 * Michael Roth <mdroth@linux.vnet.ibm.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
11 */
12
0d75590d 13#include "qemu/osdep.h"
da34e65c 14#include "qapi/error.h"
15280c36 15#include "qapi/qmp/qnull.h"
4771d756 16#include "cpu.h"
f348b6d1 17#include "qemu/cutils.h"
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18#include "hw/ppc/spapr_drc.h"
19#include "qom/object.h"
d6454270 20#include "migration/vmstate.h"
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21#include "qapi/visitor.h"
22#include "qemu/error-report.h"
0cb688d2 23#include "hw/ppc/spapr.h" /* for RTAS return codes */
31834723 24#include "hw/pci-host/spapr.h" /* spapr_phb_remove_pci_device_cb callback */
ee3a71e3 25#include "hw/ppc/spapr_nvdimm.h"
d9c95c71 26#include "sysemu/device_tree.h"
71e8a915 27#include "sysemu/reset.h"
24ac7755 28#include "trace.h"
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29
30#define DRC_CONTAINER_PATH "/dr-connector"
31#define DRC_INDEX_TYPE_SHIFT 28
627c2ef7 32#define DRC_INDEX_ID_MASK ((1ULL << DRC_INDEX_TYPE_SHIFT) - 1)
bbf5c878 33
ce2918cb 34SpaprDrcType spapr_drc_type(SpaprDrc *drc)
2d335818 35{
ce2918cb 36 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
2d335818
DG
37
38 return 1 << drck->typeshift;
39}
40
ce2918cb 41uint32_t spapr_drc_index(SpaprDrc *drc)
bbf5c878 42{
ce2918cb 43 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
2d335818 44
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45 /* no set format for a drc index: it only needs to be globally
46 * unique. this is how we encode the DRC type on bare-metal
47 * however, so might as well do that here
48 */
2d335818
DG
49 return (drck->typeshift << DRC_INDEX_TYPE_SHIFT)
50 | (drc->id & DRC_INDEX_ID_MASK);
bbf5c878
MR
51}
52
ce2918cb 53static uint32_t drc_isolate_physical(SpaprDrc *drc)
bbf5c878 54{
9d4c0f4f
DG
55 switch (drc->state) {
56 case SPAPR_DRC_STATE_PHYSICAL_POWERON:
57 return RTAS_OUT_SUCCESS; /* Nothing to do */
58 case SPAPR_DRC_STATE_PHYSICAL_CONFIGURED:
59 break; /* see below */
60 case SPAPR_DRC_STATE_PHYSICAL_UNISOLATE:
61 return RTAS_OUT_PARAM_ERROR; /* not allowed */
62 default:
63 g_assert_not_reached();
64 }
65
9d4c0f4f 66 drc->state = SPAPR_DRC_STATE_PHYSICAL_POWERON;
0dfabd39 67
f1c52354 68 if (drc->unplug_requested) {
0dfabd39 69 uint32_t drc_index = spapr_drc_index(drc);
9d4c0f4f
DG
70 trace_spapr_drc_set_isolation_state_finalizing(drc_index);
71 spapr_drc_detach(drc);
9d1852ce 72 }
0dfabd39
DG
73
74 return RTAS_OUT_SUCCESS;
75}
76
ce2918cb 77static uint32_t drc_unisolate_physical(SpaprDrc *drc)
0dfabd39 78{
9d4c0f4f
DG
79 switch (drc->state) {
80 case SPAPR_DRC_STATE_PHYSICAL_UNISOLATE:
81 case SPAPR_DRC_STATE_PHYSICAL_CONFIGURED:
82 return RTAS_OUT_SUCCESS; /* Nothing to do */
83 case SPAPR_DRC_STATE_PHYSICAL_POWERON:
84 break; /* see below */
85 default:
86 g_assert_not_reached();
87 }
88
0dfabd39
DG
89 /* cannot unisolate a non-existent resource, and, or resources
90 * which are in an 'UNUSABLE' allocation state. (PAPR 2.7,
91 * 13.5.3.5)
92 */
93 if (!drc->dev) {
94 return RTAS_OUT_NO_SUCH_INDICATOR;
95 }
96
9d4c0f4f 97 drc->state = SPAPR_DRC_STATE_PHYSICAL_UNISOLATE;
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DG
98 drc->ccs_offset = drc->fdt_start_offset;
99 drc->ccs_depth = 0;
0dfabd39
DG
100
101 return RTAS_OUT_SUCCESS;
102}
103
ce2918cb 104static uint32_t drc_isolate_logical(SpaprDrc *drc)
0dfabd39 105{
9d4c0f4f
DG
106 switch (drc->state) {
107 case SPAPR_DRC_STATE_LOGICAL_AVAILABLE:
108 case SPAPR_DRC_STATE_LOGICAL_UNUSABLE:
109 return RTAS_OUT_SUCCESS; /* Nothing to do */
110 case SPAPR_DRC_STATE_LOGICAL_CONFIGURED:
111 break; /* see below */
112 case SPAPR_DRC_STATE_LOGICAL_UNISOLATE:
113 return RTAS_OUT_PARAM_ERROR; /* not allowed */
114 default:
115 g_assert_not_reached();
116 }
117
cf632463
BR
118 /*
119 * Fail any requests to ISOLATE the LMB DRC if this LMB doesn't
120 * belong to a DIMM device that is marked for removal.
121 *
122 * Currently the guest userspace tool drmgr that drives the memory
123 * hotplug/unplug will just try to remove a set of 'removable' LMBs
124 * in response to a hot unplug request that is based on drc-count.
125 * If the LMB being removed doesn't belong to a DIMM device that is
126 * actually being unplugged, fail the isolation request here.
127 */
0dfabd39 128 if (spapr_drc_type(drc) == SPAPR_DR_CONNECTOR_TYPE_LMB
f1c52354 129 && !drc->unplug_requested) {
0dfabd39 130 return RTAS_OUT_HW_ERROR;
cf632463
BR
131 }
132
9d4c0f4f 133 drc->state = SPAPR_DRC_STATE_LOGICAL_AVAILABLE;
bbf5c878 134
0dfabd39
DG
135 /* if we're awaiting release, but still in an unconfigured state,
136 * it's likely the guest is still in the process of configuring
137 * the device and is transitioning the devices to an ISOLATED
138 * state as a part of that process. so we only complete the
139 * removal when this transition happens for a device in a
140 * configured state, as suggested by the state diagram from PAPR+
141 * 2.7, 13.4
142 */
f1c52354 143 if (drc->unplug_requested) {
0dfabd39 144 uint32_t drc_index = spapr_drc_index(drc);
9d4c0f4f
DG
145 trace_spapr_drc_set_isolation_state_finalizing(drc_index);
146 spapr_drc_detach(drc);
bbf5c878 147 }
0dfabd39
DG
148 return RTAS_OUT_SUCCESS;
149}
150
ce2918cb 151static uint32_t drc_unisolate_logical(SpaprDrc *drc)
0dfabd39 152{
9d4c0f4f
DG
153 switch (drc->state) {
154 case SPAPR_DRC_STATE_LOGICAL_UNISOLATE:
155 case SPAPR_DRC_STATE_LOGICAL_CONFIGURED:
156 return RTAS_OUT_SUCCESS; /* Nothing to do */
157 case SPAPR_DRC_STATE_LOGICAL_AVAILABLE:
158 break; /* see below */
159 case SPAPR_DRC_STATE_LOGICAL_UNUSABLE:
160 return RTAS_OUT_NO_SUCH_INDICATOR; /* not allowed */
161 default:
162 g_assert_not_reached();
0dfabd39
DG
163 }
164
9d4c0f4f
DG
165 /* Move to AVAILABLE state should have ensured device was present */
166 g_assert(drc->dev);
bbf5c878 167
9d4c0f4f 168 drc->state = SPAPR_DRC_STATE_LOGICAL_UNISOLATE;
4445b1d2
DG
169 drc->ccs_offset = drc->fdt_start_offset;
170 drc->ccs_depth = 0;
171
0cb688d2 172 return RTAS_OUT_SUCCESS;
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173}
174
ce2918cb 175static uint32_t drc_set_usable(SpaprDrc *drc)
bbf5c878 176{
9d4c0f4f
DG
177 switch (drc->state) {
178 case SPAPR_DRC_STATE_LOGICAL_AVAILABLE:
179 case SPAPR_DRC_STATE_LOGICAL_UNISOLATE:
180 case SPAPR_DRC_STATE_LOGICAL_CONFIGURED:
181 return RTAS_OUT_SUCCESS; /* Nothing to do */
182 case SPAPR_DRC_STATE_LOGICAL_UNUSABLE:
183 break; /* see below */
184 default:
185 g_assert_not_reached();
186 }
187
61736732
DG
188 /* if there's no resource/device associated with the DRC, there's
189 * no way for us to put it in an allocation state consistent with
190 * being 'USABLE'. PAPR 2.7, 13.5.3.4 documents that this should
191 * result in an RTAS return code of -3 / "no such indicator"
192 */
193 if (!drc->dev) {
194 return RTAS_OUT_NO_SUCH_INDICATOR;
195 }
f1c52354 196 if (drc->unplug_requested) {
82a93a1d
DG
197 /* Don't allow the guest to move a device away from UNUSABLE
198 * state when we want to unplug it */
61736732 199 return RTAS_OUT_NO_SUCH_INDICATOR;
9d1852ce
MR
200 }
201
9d4c0f4f 202 drc->state = SPAPR_DRC_STATE_LOGICAL_AVAILABLE;
61736732
DG
203
204 return RTAS_OUT_SUCCESS;
205}
206
ce2918cb 207static uint32_t drc_set_unusable(SpaprDrc *drc)
61736732 208{
9d4c0f4f
DG
209 switch (drc->state) {
210 case SPAPR_DRC_STATE_LOGICAL_UNUSABLE:
211 return RTAS_OUT_SUCCESS; /* Nothing to do */
212 case SPAPR_DRC_STATE_LOGICAL_AVAILABLE:
213 break; /* see below */
214 case SPAPR_DRC_STATE_LOGICAL_UNISOLATE:
215 case SPAPR_DRC_STATE_LOGICAL_CONFIGURED:
216 return RTAS_OUT_NO_SUCH_INDICATOR; /* not allowed */
217 default:
218 g_assert_not_reached();
219 }
220
221 drc->state = SPAPR_DRC_STATE_LOGICAL_UNUSABLE;
f1c52354 222 if (drc->unplug_requested) {
61736732
DG
223 uint32_t drc_index = spapr_drc_index(drc);
224 trace_spapr_drc_set_allocation_state_finalizing(drc_index);
a8dc47fd 225 spapr_drc_detach(drc);
bbf5c878 226 }
61736732 227
0cb688d2 228 return RTAS_OUT_SUCCESS;
bbf5c878
MR
229}
230
dbd26f2f 231static char *spapr_drc_name(SpaprDrc *drc)
bbf5c878 232{
ce2918cb 233 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
79808336
DG
234
235 /* human-readable name for a DRC to encode into the DT
236 * description. this is mainly only used within a guest in place
237 * of the unique DRC index.
238 *
239 * in the case of VIO/PCI devices, it corresponds to a "location
240 * code" that maps a logical device/function (DRC index) to a
241 * physical (or virtual in the case of VIO) location in the system
242 * by chaining together the "location label" for each
243 * encapsulating component.
244 *
245 * since this is more to do with diagnosing physical hardware
246 * issues than guest compatibility, we choose location codes/DRC
247 * names that adhere to the documented format, but avoid encoding
248 * the entire topology information into the label/code, instead
249 * just using the location codes based on the labels for the
250 * endpoints (VIO/PCI adaptor connectors), which is basically just
251 * "C" followed by an integer ID.
252 *
253 * DRC names as documented by PAPR+ v2.7, 13.5.2.4
254 * location codes as documented by PAPR+ v2.7, 12.3.1.5
255 */
256 return g_strdup_printf("%s%d", drck->drc_name_prefix, drc->id);
bbf5c878
MR
257}
258
bbf5c878
MR
259/*
260 * dr-entity-sense sensor value
261 * returned via get-sensor-state RTAS calls
262 * as expected by state diagram in PAPR+ 2.7, 13.4
263 * based on the current allocation/indicator/power states
264 * for the DR connector.
265 */
ce2918cb 266static SpaprDREntitySense physical_entity_sense(SpaprDrc *drc)
bbf5c878 267{
f224d35b
DG
268 /* this assumes all PCI devices are assigned to a 'live insertion'
269 * power domain, where QEMU manages power state automatically as
270 * opposed to the guest. present, non-PCI resources are unaffected
271 * by power state.
272 */
273 return drc->dev ? SPAPR_DR_ENTITY_SENSE_PRESENT
274 : SPAPR_DR_ENTITY_SENSE_EMPTY;
275}
276
ce2918cb 277static SpaprDREntitySense logical_entity_sense(SpaprDrc *drc)
f224d35b 278{
9d4c0f4f
DG
279 switch (drc->state) {
280 case SPAPR_DRC_STATE_LOGICAL_UNUSABLE:
f224d35b 281 return SPAPR_DR_ENTITY_SENSE_UNUSABLE;
9d4c0f4f
DG
282 case SPAPR_DRC_STATE_LOGICAL_AVAILABLE:
283 case SPAPR_DRC_STATE_LOGICAL_UNISOLATE:
284 case SPAPR_DRC_STATE_LOGICAL_CONFIGURED:
285 g_assert(drc->dev);
286 return SPAPR_DR_ENTITY_SENSE_PRESENT;
287 default:
288 g_assert_not_reached();
bbf5c878 289 }
bbf5c878
MR
290}
291
d7bce999
EB
292static void prop_get_index(Object *obj, Visitor *v, const char *name,
293 void *opaque, Error **errp)
bbf5c878 294{
ce2918cb 295 SpaprDrc *drc = SPAPR_DR_CONNECTOR(obj);
0b55aa91 296 uint32_t value = spapr_drc_index(drc);
51e72bc1 297 visit_type_uint32(v, name, &value, errp);
bbf5c878
MR
298}
299
d7bce999
EB
300static void prop_get_fdt(Object *obj, Visitor *v, const char *name,
301 void *opaque, Error **errp)
bbf5c878 302{
ce2918cb 303 SpaprDrc *drc = SPAPR_DR_CONNECTOR(obj);
d2f95f4d 304 QNull *null = NULL;
c75304a1 305 Error *err = NULL;
bbf5c878
MR
306 int fdt_offset_next, fdt_offset, fdt_depth;
307 void *fdt;
308
309 if (!drc->fdt) {
d2f95f4d 310 visit_type_null(v, NULL, &null, errp);
cb3e7f08 311 qobject_unref(null);
bbf5c878
MR
312 return;
313 }
314
315 fdt = drc->fdt;
316 fdt_offset = drc->fdt_start_offset;
317 fdt_depth = 0;
318
319 do {
320 const char *name = NULL;
321 const struct fdt_property *prop = NULL;
322 int prop_len = 0, name_len = 0;
323 uint32_t tag;
324
325 tag = fdt_next_tag(fdt, fdt_offset, &fdt_offset_next);
326 switch (tag) {
327 case FDT_BEGIN_NODE:
328 fdt_depth++;
329 name = fdt_get_name(fdt, fdt_offset, &name_len);
668f62ec 330 if (!visit_start_struct(v, name, NULL, 0, errp)) {
c75304a1
MA
331 return;
332 }
bbf5c878
MR
333 break;
334 case FDT_END_NODE:
335 /* shouldn't ever see an FDT_END_NODE before FDT_BEGIN_NODE */
336 g_assert(fdt_depth > 0);
15c2f669 337 visit_check_struct(v, &err);
1158bb2a 338 visit_end_struct(v, NULL);
c75304a1
MA
339 if (err) {
340 error_propagate(errp, err);
341 return;
342 }
bbf5c878
MR
343 fdt_depth--;
344 break;
345 case FDT_PROP: {
346 int i;
347 prop = fdt_get_property_by_offset(fdt, fdt_offset, &prop_len);
348 name = fdt_string(fdt, fdt32_to_cpu(prop->nameoff));
668f62ec 349 if (!visit_start_list(v, name, NULL, 0, errp)) {
c75304a1
MA
350 return;
351 }
bbf5c878 352 for (i = 0; i < prop_len; i++) {
62a35aaa 353 if (!visit_type_uint8(v, NULL, (uint8_t *)&prop->data[i],
668f62ec 354 errp)) {
c75304a1
MA
355 return;
356 }
357 }
a4a1c70d 358 visit_check_list(v, &err);
1158bb2a 359 visit_end_list(v, NULL);
a4a1c70d
MA
360 if (err) {
361 error_propagate(errp, err);
362 return;
363 }
bbf5c878
MR
364 break;
365 }
366 default:
e20c6314
PMD
367 error_report("device FDT in unexpected state: %d", tag);
368 abort();
bbf5c878
MR
369 }
370 fdt_offset = fdt_offset_next;
371 } while (fdt_depth != 0);
372}
373
ce2918cb 374void spapr_drc_attach(SpaprDrc *drc, DeviceState *d, Error **errp)
bbf5c878 375{
0b55aa91 376 trace_spapr_drc_attach(spapr_drc_index(drc));
bbf5c878 377
9d4c0f4f 378 if (drc->dev) {
bbf5c878
MR
379 error_setg(errp, "an attached device is still awaiting release");
380 return;
381 }
9d4c0f4f
DG
382 g_assert((drc->state == SPAPR_DRC_STATE_LOGICAL_UNUSABLE)
383 || (drc->state == SPAPR_DRC_STATE_PHYSICAL_POWERON));
bbf5c878 384
bbf5c878 385 drc->dev = d;
d9c95c71 386
bbf5c878
MR
387 object_property_add_link(OBJECT(drc), "device",
388 object_get_typename(OBJECT(drc->dev)),
389 (Object **)(&drc->dev),
d2623129 390 NULL, 0);
bbf5c878
MR
391}
392
ce2918cb 393static void spapr_drc_release(SpaprDrc *drc)
bbf5c878 394{
ce2918cb 395 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
6b762f29
DG
396
397 drck->release(drc->dev);
bbf5c878 398
f1c52354 399 drc->unplug_requested = false;
bbf5c878
MR
400 g_free(drc->fdt);
401 drc->fdt = NULL;
402 drc->fdt_start_offset = 0;
df4fe0b2 403 object_property_del(OBJECT(drc), "device");
bbf5c878 404 drc->dev = NULL;
bbf5c878
MR
405}
406
ce2918cb 407void spapr_drc_detach(SpaprDrc *drc)
9c914e53 408{
ce2918cb 409 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
9d4c0f4f 410
9c914e53
DG
411 trace_spapr_drc_detach(spapr_drc_index(drc));
412
9d4c0f4f 413 g_assert(drc->dev);
a8dc47fd 414
9d4c0f4f 415 drc->unplug_requested = true;
9c914e53 416
9d4c0f4f
DG
417 if (drc->state != drck->empty_state) {
418 trace_spapr_drc_awaiting_quiesce(spapr_drc_index(drc));
9c914e53
DG
419 return;
420 }
421
9c914e53
DG
422 spapr_drc_release(drc);
423}
424
ce2918cb 425void spapr_drc_reset(SpaprDrc *drc)
bbf5c878 426{
ce2918cb 427 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
9d4c0f4f 428
0b55aa91 429 trace_spapr_drc_reset(spapr_drc_index(drc));
b8fdd530 430
bbf5c878 431 /* immediately upon reset we can safely assume DRCs whose devices
4f9242fc 432 * are pending removal can be safely removed.
bbf5c878 433 */
f1c52354 434 if (drc->unplug_requested) {
4f9242fc
DG
435 spapr_drc_release(drc);
436 }
437
4f9242fc 438 if (drc->dev) {
9d4c0f4f
DG
439 /* A device present at reset is ready to go, same as coldplugged */
440 drc->state = drck->ready_state;
188bfe1b
BR
441 /*
442 * Ensure that we are able to send the FDT fragment again
443 * via configure-connector call if the guest requests.
444 */
445 drc->ccs_offset = drc->fdt_start_offset;
446 drc->ccs_depth = 0;
4f9242fc 447 } else {
9d4c0f4f 448 drc->state = drck->empty_state;
188bfe1b
BR
449 drc->ccs_offset = -1;
450 drc->ccs_depth = -1;
bbf5c878
MR
451 }
452}
453
ab858434
GK
454static bool spapr_drc_unplug_requested_needed(void *opaque)
455{
456 return spapr_drc_unplug_requested(opaque);
457}
458
459static const VMStateDescription vmstate_spapr_drc_unplug_requested = {
460 .name = "spapr_drc/unplug_requested",
461 .version_id = 1,
462 .minimum_version_id = 1,
463 .needed = spapr_drc_unplug_requested_needed,
464 .fields = (VMStateField []) {
465 VMSTATE_BOOL(unplug_requested, SpaprDrc),
466 VMSTATE_END_OF_LIST()
467 }
468};
469
4b63db12 470bool spapr_drc_transient(SpaprDrc *drc)
a50919dd 471{
ce2918cb 472 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
a50919dd 473
4b63db12
GK
474 /*
475 * If no dev is plugged in there is no need to migrate the DRC state
476 * nor to reset the DRC at CAS.
477 */
c618e300 478 if (!drc->dev) {
a50919dd
DHB
479 return false;
480 }
481
482 /*
4b63db12
GK
483 * We need to reset the DRC at CAS or to migrate the DRC state if it's
484 * not equal to the expected long-term state, which is the same as the
ab858434 485 * coldplugged initial state, or if an unplug request is pending.
4b63db12 486 */
ab858434
GK
487 return drc->state != drck->ready_state ||
488 spapr_drc_unplug_requested(drc);
a50919dd
DHB
489}
490
4b63db12
GK
491static bool spapr_drc_needed(void *opaque)
492{
493 return spapr_drc_transient(opaque);
494}
495
a50919dd
DHB
496static const VMStateDescription vmstate_spapr_drc = {
497 .name = "spapr_drc",
498 .version_id = 1,
499 .minimum_version_id = 1,
500 .needed = spapr_drc_needed,
501 .fields = (VMStateField []) {
ce2918cb 502 VMSTATE_UINT32(state, SpaprDrc),
a50919dd 503 VMSTATE_END_OF_LIST()
ab858434
GK
504 },
505 .subsections = (const VMStateDescription * []) {
506 &vmstate_spapr_drc_unplug_requested,
507 NULL
a50919dd
DHB
508 }
509};
510
bbf5c878
MR
511static void realize(DeviceState *d, Error **errp)
512{
ce2918cb 513 SpaprDrc *drc = SPAPR_DR_CONNECTOR(d);
bbf5c878 514 Object *root_container;
f5babeac 515 gchar *link_name;
7a309cc9 516 const char *child_name;
bbf5c878 517
0b55aa91 518 trace_spapr_drc_realize(spapr_drc_index(drc));
bbf5c878
MR
519 /* NOTE: we do this as part of realize/unrealize due to the fact
520 * that the guest will communicate with the DRC via RTAS calls
521 * referencing the global DRC index. By unlinking the DRC
522 * from DRC_CONTAINER_PATH/<drc_index> we effectively make it
523 * inaccessible by the guest, since lookups rely on this path
524 * existing in the composition tree
525 */
526 root_container = container_get(object_get_root(), DRC_CONTAINER_PATH);
f5babeac 527 link_name = g_strdup_printf("%x", spapr_drc_index(drc));
bbf5c878 528 child_name = object_get_canonical_path_component(OBJECT(drc));
0b55aa91 529 trace_spapr_drc_realize_child(spapr_drc_index(drc), child_name);
bbf5c878 530 object_property_add_alias(root_container, link_name,
d2623129 531 drc->owner, child_name);
f5babeac 532 g_free(link_name);
3cad405b 533 vmstate_register(VMSTATE_IF(drc), spapr_drc_index(drc), &vmstate_spapr_drc,
a50919dd 534 drc);
0b55aa91 535 trace_spapr_drc_realize_complete(spapr_drc_index(drc));
bbf5c878
MR
536}
537
b69c3c21 538static void unrealize(DeviceState *d)
bbf5c878 539{
ce2918cb 540 SpaprDrc *drc = SPAPR_DR_CONNECTOR(d);
bbf5c878 541 Object *root_container;
f5babeac 542 gchar *name;
bbf5c878 543
0b55aa91 544 trace_spapr_drc_unrealize(spapr_drc_index(drc));
3cad405b 545 vmstate_unregister(VMSTATE_IF(drc), &vmstate_spapr_drc, drc);
bbf5c878 546 root_container = container_get(object_get_root(), DRC_CONTAINER_PATH);
f5babeac 547 name = g_strdup_printf("%x", spapr_drc_index(drc));
df4fe0b2 548 object_property_del(root_container, name);
f5babeac 549 g_free(name);
bbf5c878
MR
550}
551
ce2918cb 552SpaprDrc *spapr_dr_connector_new(Object *owner, const char *type,
bbf5c878
MR
553 uint32_t id)
554{
ce2918cb 555 SpaprDrc *drc = SPAPR_DR_CONNECTOR(object_new(type));
94649d42 556 char *prop_name;
bbf5c878 557
bbf5c878
MR
558 drc->id = id;
559 drc->owner = owner;
0b55aa91
DG
560 prop_name = g_strdup_printf("dr-connector[%"PRIu32"]",
561 spapr_drc_index(drc));
d2623129 562 object_property_add_child(owner, prop_name, OBJECT(drc));
f3f41030 563 object_unref(OBJECT(drc));
ce189ab2 564 qdev_realize(DEVICE(drc), NULL, NULL);
94649d42 565 g_free(prop_name);
bbf5c878 566
bbf5c878
MR
567 return drc;
568}
569
570static void spapr_dr_connector_instance_init(Object *obj)
571{
ce2918cb
DG
572 SpaprDrc *drc = SPAPR_DR_CONNECTOR(obj);
573 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
bbf5c878 574
d2623129 575 object_property_add_uint32_ptr(obj, "id", &drc->id, OBJ_PROP_FLAG_READ);
bbf5c878 576 object_property_add(obj, "index", "uint32", prop_get_index,
d2623129 577 NULL, NULL, NULL);
bbf5c878 578 object_property_add(obj, "fdt", "struct", prop_get_fdt,
d2623129 579 NULL, NULL, NULL);
9d4c0f4f 580 drc->state = drck->empty_state;
bbf5c878
MR
581}
582
583static void spapr_dr_connector_class_init(ObjectClass *k, void *data)
584{
585 DeviceClass *dk = DEVICE_CLASS(k);
bbf5c878 586
bbf5c878
MR
587 dk->realize = realize;
588 dk->unrealize = unrealize;
c401ae8c
MA
589 /*
590 * Reason: it crashes FIXME find and document the real reason
591 */
e90f2a8c 592 dk->user_creatable = false;
bbf5c878
MR
593}
594
67fea71b
DG
595static bool drc_physical_needed(void *opaque)
596{
ce2918cb
DG
597 SpaprDrcPhysical *drcp = (SpaprDrcPhysical *)opaque;
598 SpaprDrc *drc = SPAPR_DR_CONNECTOR(drcp);
67fea71b
DG
599
600 if ((drc->dev && (drcp->dr_indicator == SPAPR_DR_INDICATOR_ACTIVE))
601 || (!drc->dev && (drcp->dr_indicator == SPAPR_DR_INDICATOR_INACTIVE))) {
602 return false;
603 }
604 return true;
605}
606
607static const VMStateDescription vmstate_spapr_drc_physical = {
608 .name = "spapr_drc/physical",
609 .version_id = 1,
610 .minimum_version_id = 1,
611 .needed = drc_physical_needed,
612 .fields = (VMStateField []) {
ce2918cb 613 VMSTATE_UINT32(dr_indicator, SpaprDrcPhysical),
67fea71b
DG
614 VMSTATE_END_OF_LIST()
615 }
616};
617
618static void drc_physical_reset(void *opaque)
619{
ce2918cb
DG
620 SpaprDrc *drc = SPAPR_DR_CONNECTOR(opaque);
621 SpaprDrcPhysical *drcp = SPAPR_DRC_PHYSICAL(drc);
67fea71b
DG
622
623 if (drc->dev) {
624 drcp->dr_indicator = SPAPR_DR_INDICATOR_ACTIVE;
625 } else {
626 drcp->dr_indicator = SPAPR_DR_INDICATOR_INACTIVE;
627 }
628}
629
630static void realize_physical(DeviceState *d, Error **errp)
631{
ce2918cb 632 SpaprDrcPhysical *drcp = SPAPR_DRC_PHYSICAL(d);
67fea71b
DG
633 Error *local_err = NULL;
634
635 realize(d, &local_err);
636 if (local_err) {
637 error_propagate(errp, local_err);
638 return;
639 }
640
3cad405b
MAL
641 vmstate_register(VMSTATE_IF(drcp),
642 spapr_drc_index(SPAPR_DR_CONNECTOR(drcp)),
67fea71b
DG
643 &vmstate_spapr_drc_physical, drcp);
644 qemu_register_reset(drc_physical_reset, drcp);
645}
646
b69c3c21 647static void unrealize_physical(DeviceState *d)
379ae096 648{
ce2918cb 649 SpaprDrcPhysical *drcp = SPAPR_DRC_PHYSICAL(d);
379ae096 650
b69c3c21 651 unrealize(d);
3cad405b 652 vmstate_unregister(VMSTATE_IF(drcp), &vmstate_spapr_drc_physical, drcp);
379ae096
GK
653 qemu_unregister_reset(drc_physical_reset, drcp);
654}
655
f224d35b
DG
656static void spapr_drc_physical_class_init(ObjectClass *k, void *data)
657{
67fea71b 658 DeviceClass *dk = DEVICE_CLASS(k);
ce2918cb 659 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
f224d35b 660
67fea71b 661 dk->realize = realize_physical;
379ae096 662 dk->unrealize = unrealize_physical;
f224d35b 663 drck->dr_entity_sense = physical_entity_sense;
0dfabd39
DG
664 drck->isolate = drc_isolate_physical;
665 drck->unisolate = drc_unisolate_physical;
9d4c0f4f
DG
666 drck->ready_state = SPAPR_DRC_STATE_PHYSICAL_CONFIGURED;
667 drck->empty_state = SPAPR_DRC_STATE_PHYSICAL_POWERON;
f224d35b
DG
668}
669
670static void spapr_drc_logical_class_init(ObjectClass *k, void *data)
671{
ce2918cb 672 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
f224d35b
DG
673
674 drck->dr_entity_sense = logical_entity_sense;
0dfabd39
DG
675 drck->isolate = drc_isolate_logical;
676 drck->unisolate = drc_unisolate_logical;
9d4c0f4f
DG
677 drck->ready_state = SPAPR_DRC_STATE_LOGICAL_CONFIGURED;
678 drck->empty_state = SPAPR_DRC_STATE_LOGICAL_UNUSABLE;
f224d35b
DG
679}
680
2d335818
DG
681static void spapr_drc_cpu_class_init(ObjectClass *k, void *data)
682{
ce2918cb 683 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
2d335818
DG
684
685 drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_CPU;
1693ea16 686 drck->typename = "CPU";
79808336 687 drck->drc_name_prefix = "CPU ";
6b762f29 688 drck->release = spapr_core_release;
345b12b9 689 drck->dt_populate = spapr_core_dt_populate;
2d335818
DG
690}
691
692static void spapr_drc_pci_class_init(ObjectClass *k, void *data)
693{
ce2918cb 694 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
2d335818
DG
695
696 drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_PCI;
1693ea16 697 drck->typename = "28";
79808336 698 drck->drc_name_prefix = "C";
6b762f29 699 drck->release = spapr_phb_remove_pci_device_cb;
46fd0299 700 drck->dt_populate = spapr_pci_dt_populate;
2d335818
DG
701}
702
703static void spapr_drc_lmb_class_init(ObjectClass *k, void *data)
704{
ce2918cb 705 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
2d335818
DG
706
707 drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_LMB;
1693ea16 708 drck->typename = "MEM";
79808336 709 drck->drc_name_prefix = "LMB ";
6b762f29 710 drck->release = spapr_lmb_release;
62d38c9b 711 drck->dt_populate = spapr_lmb_dt_populate;
2d335818
DG
712}
713
962b6c36
MR
714static void spapr_drc_phb_class_init(ObjectClass *k, void *data)
715{
ce2918cb 716 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
962b6c36
MR
717
718 drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_PHB;
719 drck->typename = "PHB";
720 drck->drc_name_prefix = "PHB ";
bb2bdd81
GK
721 drck->release = spapr_phb_release;
722 drck->dt_populate = spapr_phb_dt_populate;
962b6c36
MR
723}
724
ee3a71e3
SB
725static void spapr_drc_pmem_class_init(ObjectClass *k, void *data)
726{
727 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
728
729 drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_PMEM;
730 drck->typename = "PMEM";
731 drck->drc_name_prefix = "PMEM ";
732 drck->release = NULL;
733 drck->dt_populate = spapr_pmem_dt_populate;
734}
735
bbf5c878
MR
736static const TypeInfo spapr_dr_connector_info = {
737 .name = TYPE_SPAPR_DR_CONNECTOR,
738 .parent = TYPE_DEVICE,
ce2918cb 739 .instance_size = sizeof(SpaprDrc),
bbf5c878 740 .instance_init = spapr_dr_connector_instance_init,
ce2918cb 741 .class_size = sizeof(SpaprDrcClass),
bbf5c878 742 .class_init = spapr_dr_connector_class_init,
2d335818
DG
743 .abstract = true,
744};
745
746static const TypeInfo spapr_drc_physical_info = {
747 .name = TYPE_SPAPR_DRC_PHYSICAL,
748 .parent = TYPE_SPAPR_DR_CONNECTOR,
ce2918cb 749 .instance_size = sizeof(SpaprDrcPhysical),
f224d35b 750 .class_init = spapr_drc_physical_class_init,
2d335818
DG
751 .abstract = true,
752};
753
754static const TypeInfo spapr_drc_logical_info = {
755 .name = TYPE_SPAPR_DRC_LOGICAL,
756 .parent = TYPE_SPAPR_DR_CONNECTOR,
f224d35b 757 .class_init = spapr_drc_logical_class_init,
2d335818
DG
758 .abstract = true,
759};
760
761static const TypeInfo spapr_drc_cpu_info = {
762 .name = TYPE_SPAPR_DRC_CPU,
763 .parent = TYPE_SPAPR_DRC_LOGICAL,
2d335818
DG
764 .class_init = spapr_drc_cpu_class_init,
765};
766
767static const TypeInfo spapr_drc_pci_info = {
768 .name = TYPE_SPAPR_DRC_PCI,
769 .parent = TYPE_SPAPR_DRC_PHYSICAL,
2d335818
DG
770 .class_init = spapr_drc_pci_class_init,
771};
772
773static const TypeInfo spapr_drc_lmb_info = {
774 .name = TYPE_SPAPR_DRC_LMB,
775 .parent = TYPE_SPAPR_DRC_LOGICAL,
2d335818 776 .class_init = spapr_drc_lmb_class_init,
bbf5c878
MR
777};
778
962b6c36
MR
779static const TypeInfo spapr_drc_phb_info = {
780 .name = TYPE_SPAPR_DRC_PHB,
781 .parent = TYPE_SPAPR_DRC_LOGICAL,
ce2918cb 782 .instance_size = sizeof(SpaprDrc),
962b6c36
MR
783 .class_init = spapr_drc_phb_class_init,
784};
785
ee3a71e3
SB
786static const TypeInfo spapr_drc_pmem_info = {
787 .name = TYPE_SPAPR_DRC_PMEM,
788 .parent = TYPE_SPAPR_DRC_LOGICAL,
789 .class_init = spapr_drc_pmem_class_init,
790};
791
bbf5c878
MR
792/* helper functions for external users */
793
ce2918cb 794SpaprDrc *spapr_drc_by_index(uint32_t index)
bbf5c878
MR
795{
796 Object *obj;
f5babeac 797 gchar *name;
bbf5c878 798
f5babeac 799 name = g_strdup_printf("%s/%x", DRC_CONTAINER_PATH, index);
bbf5c878 800 obj = object_resolve_path(name, NULL);
f5babeac 801 g_free(name);
bbf5c878
MR
802
803 return !obj ? NULL : SPAPR_DR_CONNECTOR(obj);
804}
805
ce2918cb 806SpaprDrc *spapr_drc_by_id(const char *type, uint32_t id)
bbf5c878 807{
ce2918cb 808 SpaprDrcClass *drck
fbf55397
DG
809 = SPAPR_DR_CONNECTOR_CLASS(object_class_by_name(type));
810
811 return spapr_drc_by_index(drck->typeshift << DRC_INDEX_TYPE_SHIFT
812 | (id & DRC_INDEX_ID_MASK));
bbf5c878 813}
e4b798bb 814
e4b798bb 815/**
9e7d38e8 816 * spapr_dt_drc
e4b798bb
MR
817 *
818 * @fdt: libfdt device tree
819 * @path: path in the DT to generate properties
820 * @owner: parent Object/DeviceState for which to generate DRC
821 * descriptions for
ce2918cb 822 * @drc_type_mask: mask of SpaprDrcType values corresponding
e4b798bb
MR
823 * to the types of DRCs to generate entries for
824 *
825 * generate OF properties to describe DRC topology/indices to guests
826 *
827 * as documented in PAPR+ v2.1, 13.5.2
828 */
9e7d38e8 829int spapr_dt_drc(void *fdt, int offset, Object *owner, uint32_t drc_type_mask)
e4b798bb
MR
830{
831 Object *root_container;
832 ObjectProperty *prop;
7746abd8 833 ObjectPropertyIterator iter;
e4b798bb
MR
834 uint32_t drc_count = 0;
835 GArray *drc_indexes, *drc_power_domains;
836 GString *drc_names, *drc_types;
837 int ret;
838
839 /* the first entry of each properties is a 32-bit integer encoding
840 * the number of elements in the array. we won't know this until
841 * we complete the iteration through all the matching DRCs, but
842 * reserve the space now and set the offsets accordingly so we
843 * can fill them in later.
844 */
845 drc_indexes = g_array_new(false, true, sizeof(uint32_t));
846 drc_indexes = g_array_set_size(drc_indexes, 1);
847 drc_power_domains = g_array_new(false, true, sizeof(uint32_t));
848 drc_power_domains = g_array_set_size(drc_power_domains, 1);
849 drc_names = g_string_set_size(g_string_new(NULL), sizeof(uint32_t));
850 drc_types = g_string_set_size(g_string_new(NULL), sizeof(uint32_t));
851
852 /* aliases for all DRConnector objects will be rooted in QOM
853 * composition tree at DRC_CONTAINER_PATH
854 */
855 root_container = container_get(object_get_root(), DRC_CONTAINER_PATH);
856
7746abd8
DB
857 object_property_iter_init(&iter, root_container);
858 while ((prop = object_property_iter_next(&iter))) {
e4b798bb 859 Object *obj;
ce2918cb
DG
860 SpaprDrc *drc;
861 SpaprDrcClass *drck;
dbd26f2f 862 char *drc_name = NULL;
e4b798bb
MR
863 uint32_t drc_index, drc_power_domain;
864
865 if (!strstart(prop->type, "link<", NULL)) {
866 continue;
867 }
868
552d7f49
MA
869 obj = object_property_get_link(root_container, prop->name,
870 &error_abort);
e4b798bb
MR
871 drc = SPAPR_DR_CONNECTOR(obj);
872 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
873
874 if (owner && (drc->owner != owner)) {
875 continue;
876 }
877
2d335818 878 if ((spapr_drc_type(drc) & drc_type_mask) == 0) {
e4b798bb
MR
879 continue;
880 }
881
882 drc_count++;
883
884 /* ibm,drc-indexes */
0b55aa91 885 drc_index = cpu_to_be32(spapr_drc_index(drc));
e4b798bb
MR
886 g_array_append_val(drc_indexes, drc_index);
887
888 /* ibm,drc-power-domains */
889 drc_power_domain = cpu_to_be32(-1);
890 g_array_append_val(drc_power_domains, drc_power_domain);
891
892 /* ibm,drc-names */
dbd26f2f
SB
893 drc_name = spapr_drc_name(drc);
894 drc_names = g_string_append(drc_names, drc_name);
e4b798bb 895 drc_names = g_string_insert_len(drc_names, -1, "\0", 1);
dbd26f2f 896 g_free(drc_name);
e4b798bb
MR
897
898 /* ibm,drc-types */
1693ea16 899 drc_types = g_string_append(drc_types, drck->typename);
e4b798bb
MR
900 drc_types = g_string_insert_len(drc_types, -1, "\0", 1);
901 }
902
903 /* now write the drc count into the space we reserved at the
904 * beginning of the arrays previously
905 */
906 *(uint32_t *)drc_indexes->data = cpu_to_be32(drc_count);
907 *(uint32_t *)drc_power_domains->data = cpu_to_be32(drc_count);
908 *(uint32_t *)drc_names->str = cpu_to_be32(drc_count);
909 *(uint32_t *)drc_types->str = cpu_to_be32(drc_count);
910
9e7d38e8 911 ret = fdt_setprop(fdt, offset, "ibm,drc-indexes",
e4b798bb
MR
912 drc_indexes->data,
913 drc_indexes->len * sizeof(uint32_t));
914 if (ret) {
ce9863b7 915 error_report("Couldn't create ibm,drc-indexes property");
e4b798bb
MR
916 goto out;
917 }
918
9e7d38e8 919 ret = fdt_setprop(fdt, offset, "ibm,drc-power-domains",
e4b798bb
MR
920 drc_power_domains->data,
921 drc_power_domains->len * sizeof(uint32_t));
922 if (ret) {
ce9863b7 923 error_report("Couldn't finalize ibm,drc-power-domains property");
e4b798bb
MR
924 goto out;
925 }
926
9e7d38e8 927 ret = fdt_setprop(fdt, offset, "ibm,drc-names",
e4b798bb
MR
928 drc_names->str, drc_names->len);
929 if (ret) {
ce9863b7 930 error_report("Couldn't finalize ibm,drc-names property");
e4b798bb
MR
931 goto out;
932 }
933
9e7d38e8 934 ret = fdt_setprop(fdt, offset, "ibm,drc-types",
e4b798bb
MR
935 drc_types->str, drc_types->len);
936 if (ret) {
ce9863b7 937 error_report("Couldn't finalize ibm,drc-types property");
e4b798bb
MR
938 goto out;
939 }
940
941out:
942 g_array_free(drc_indexes, true);
943 g_array_free(drc_power_domains, true);
944 g_string_free(drc_names, true);
945 g_string_free(drc_types, true);
946
947 return ret;
948}
b89b3d39
DG
949
950/*
951 * RTAS calls
952 */
953
7b7258f8 954static uint32_t rtas_set_isolation_state(uint32_t idx, uint32_t state)
b89b3d39 955{
ce2918cb
DG
956 SpaprDrc *drc = spapr_drc_by_index(idx);
957 SpaprDrcClass *drck;
7b7258f8
DG
958
959 if (!drc) {
0dfabd39 960 return RTAS_OUT_NO_SUCH_INDICATOR;
b89b3d39
DG
961 }
962
0dfabd39
DG
963 trace_spapr_drc_set_isolation_state(spapr_drc_index(drc), state);
964
7b7258f8 965 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
0dfabd39
DG
966
967 switch (state) {
968 case SPAPR_DR_ISOLATION_STATE_ISOLATED:
969 return drck->isolate(drc);
970
971 case SPAPR_DR_ISOLATION_STATE_UNISOLATED:
972 return drck->unisolate(drc);
973
974 default:
975 return RTAS_OUT_PARAM_ERROR;
976 }
b89b3d39
DG
977}
978
7b7258f8 979static uint32_t rtas_set_allocation_state(uint32_t idx, uint32_t state)
b89b3d39 980{
ce2918cb 981 SpaprDrc *drc = spapr_drc_by_index(idx);
b89b3d39 982
61736732
DG
983 if (!drc || !object_dynamic_cast(OBJECT(drc), TYPE_SPAPR_DRC_LOGICAL)) {
984 return RTAS_OUT_NO_SUCH_INDICATOR;
b89b3d39
DG
985 }
986
61736732
DG
987 trace_spapr_drc_set_allocation_state(spapr_drc_index(drc), state);
988
989 switch (state) {
990 case SPAPR_DR_ALLOCATION_STATE_USABLE:
991 return drc_set_usable(drc);
992
993 case SPAPR_DR_ALLOCATION_STATE_UNUSABLE:
994 return drc_set_unusable(drc);
995
996 default:
997 return RTAS_OUT_PARAM_ERROR;
998 }
7b7258f8 999}
b89b3d39 1000
cd74d27e 1001static uint32_t rtas_set_dr_indicator(uint32_t idx, uint32_t state)
7b7258f8 1002{
ce2918cb 1003 SpaprDrc *drc = spapr_drc_by_index(idx);
b89b3d39 1004
67fea71b
DG
1005 if (!drc || !object_dynamic_cast(OBJECT(drc), TYPE_SPAPR_DRC_PHYSICAL)) {
1006 return RTAS_OUT_NO_SUCH_INDICATOR;
1007 }
1008 if ((state != SPAPR_DR_INDICATOR_INACTIVE)
1009 && (state != SPAPR_DR_INDICATOR_ACTIVE)
1010 && (state != SPAPR_DR_INDICATOR_IDENTIFY)
1011 && (state != SPAPR_DR_INDICATOR_ACTION)) {
1012 return RTAS_OUT_PARAM_ERROR; /* bad state parameter */
7b7258f8
DG
1013 }
1014
cd74d27e 1015 trace_spapr_drc_set_dr_indicator(idx, state);
67fea71b 1016 SPAPR_DRC_PHYSICAL(drc)->dr_indicator = state;
cd74d27e 1017 return RTAS_OUT_SUCCESS;
7b7258f8
DG
1018}
1019
ce2918cb 1020static void rtas_set_indicator(PowerPCCPU *cpu, SpaprMachineState *spapr,
7b7258f8
DG
1021 uint32_t token,
1022 uint32_t nargs, target_ulong args,
1023 uint32_t nret, target_ulong rets)
1024{
1025 uint32_t type, idx, state;
1026 uint32_t ret = RTAS_OUT_SUCCESS;
1027
1028 if (nargs != 3 || nret != 1) {
b89b3d39
DG
1029 ret = RTAS_OUT_PARAM_ERROR;
1030 goto out;
1031 }
b89b3d39 1032
7b7258f8
DG
1033 type = rtas_ld(args, 0);
1034 idx = rtas_ld(args, 1);
1035 state = rtas_ld(args, 2);
1036
1037 switch (type) {
b89b3d39 1038 case RTAS_SENSOR_TYPE_ISOLATION_STATE:
7b7258f8 1039 ret = rtas_set_isolation_state(idx, state);
b89b3d39
DG
1040 break;
1041 case RTAS_SENSOR_TYPE_DR:
cd74d27e 1042 ret = rtas_set_dr_indicator(idx, state);
b89b3d39
DG
1043 break;
1044 case RTAS_SENSOR_TYPE_ALLOCATION_STATE:
7b7258f8 1045 ret = rtas_set_allocation_state(idx, state);
b89b3d39
DG
1046 break;
1047 default:
7b7258f8 1048 ret = RTAS_OUT_NOT_SUPPORTED;
b89b3d39
DG
1049 }
1050
1051out:
1052 rtas_st(rets, 0, ret);
b89b3d39
DG
1053}
1054
ce2918cb 1055static void rtas_get_sensor_state(PowerPCCPU *cpu, SpaprMachineState *spapr,
b89b3d39
DG
1056 uint32_t token, uint32_t nargs,
1057 target_ulong args, uint32_t nret,
1058 target_ulong rets)
1059{
1060 uint32_t sensor_type;
1061 uint32_t sensor_index;
1062 uint32_t sensor_state = 0;
ce2918cb
DG
1063 SpaprDrc *drc;
1064 SpaprDrcClass *drck;
b89b3d39
DG
1065 uint32_t ret = RTAS_OUT_SUCCESS;
1066
1067 if (nargs != 2 || nret != 2) {
1068 ret = RTAS_OUT_PARAM_ERROR;
1069 goto out;
1070 }
1071
1072 sensor_type = rtas_ld(args, 0);
1073 sensor_index = rtas_ld(args, 1);
1074
1075 if (sensor_type != RTAS_SENSOR_TYPE_ENTITY_SENSE) {
1076 /* currently only DR-related sensors are implemented */
1077 trace_spapr_rtas_get_sensor_state_not_supported(sensor_index,
1078 sensor_type);
1079 ret = RTAS_OUT_NOT_SUPPORTED;
1080 goto out;
1081 }
1082
fbf55397 1083 drc = spapr_drc_by_index(sensor_index);
b89b3d39
DG
1084 if (!drc) {
1085 trace_spapr_rtas_get_sensor_state_invalid(sensor_index);
1086 ret = RTAS_OUT_PARAM_ERROR;
1087 goto out;
1088 }
1089 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
f224d35b 1090 sensor_state = drck->dr_entity_sense(drc);
b89b3d39
DG
1091
1092out:
1093 rtas_st(rets, 0, ret);
1094 rtas_st(rets, 1, sensor_state);
1095}
1096
1097/* configure-connector work area offsets, int32_t units for field
1098 * indexes, bytes for field offset/len values.
1099 *
1100 * as documented by PAPR+ v2.7, 13.5.3.5
1101 */
1102#define CC_IDX_NODE_NAME_OFFSET 2
1103#define CC_IDX_PROP_NAME_OFFSET 2
1104#define CC_IDX_PROP_LEN 3
1105#define CC_IDX_PROP_DATA_OFFSET 4
1106#define CC_VAL_DATA_OFFSET ((CC_IDX_PROP_DATA_OFFSET + 1) * 4)
1107#define CC_WA_LEN 4096
1108
1109static void configure_connector_st(target_ulong addr, target_ulong offset,
1110 const void *buf, size_t len)
1111{
1112 cpu_physical_memory_write(ppc64_phys_to_real(addr + offset),
1113 buf, MIN(len, CC_WA_LEN - offset));
1114}
1115
b89b3d39 1116static void rtas_ibm_configure_connector(PowerPCCPU *cpu,
ce2918cb 1117 SpaprMachineState *spapr,
b89b3d39
DG
1118 uint32_t token, uint32_t nargs,
1119 target_ulong args, uint32_t nret,
1120 target_ulong rets)
1121{
1122 uint64_t wa_addr;
1123 uint64_t wa_offset;
1124 uint32_t drc_index;
ce2918cb
DG
1125 SpaprDrc *drc;
1126 SpaprDrcClass *drck;
1127 SpaprDRCCResponse resp = SPAPR_DR_CC_RESPONSE_CONTINUE;
b89b3d39 1128 int rc;
b89b3d39
DG
1129
1130 if (nargs != 2 || nret != 1) {
1131 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
1132 return;
1133 }
1134
1135 wa_addr = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 0);
1136
1137 drc_index = rtas_ld(wa_addr, 0);
fbf55397 1138 drc = spapr_drc_by_index(drc_index);
b89b3d39
DG
1139 if (!drc) {
1140 trace_spapr_rtas_ibm_configure_connector_invalid(drc_index);
1141 rc = RTAS_OUT_PARAM_ERROR;
1142 goto out;
1143 }
1144
9d4c0f4f 1145 if ((drc->state != SPAPR_DRC_STATE_LOGICAL_UNISOLATE)
188bfe1b
BR
1146 && (drc->state != SPAPR_DRC_STATE_PHYSICAL_UNISOLATE)
1147 && (drc->state != SPAPR_DRC_STATE_LOGICAL_CONFIGURED)
1148 && (drc->state != SPAPR_DRC_STATE_PHYSICAL_CONFIGURED)) {
1149 /*
1150 * Need to unisolate the device before configuring
1151 * or it should already be in configured state to
1152 * allow configure-connector be called repeatedly.
1153 */
b89b3d39
DG
1154 rc = SPAPR_DR_CC_RESPONSE_NOT_CONFIGURABLE;
1155 goto out;
1156 }
1157
9d4c0f4f
DG
1158 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
1159
d9c95c71 1160 if (!drc->fdt) {
d9c95c71
GK
1161 void *fdt;
1162 int fdt_size;
1163
1164 fdt = create_device_tree(&fdt_size);
1165
1166 if (drck->dt_populate(drc, spapr, fdt, &drc->fdt_start_offset,
9261ef5e 1167 NULL)) {
d9c95c71 1168 g_free(fdt);
d9c95c71
GK
1169 rc = SPAPR_DR_CC_RESPONSE_ERROR;
1170 goto out;
1171 }
1172
1173 drc->fdt = fdt;
1174 drc->ccs_offset = drc->fdt_start_offset;
1175 drc->ccs_depth = 0;
1176 }
1177
b89b3d39
DG
1178 do {
1179 uint32_t tag;
1180 const char *name;
1181 const struct fdt_property *prop;
1182 int fdt_offset_next, prop_len;
1183
4445b1d2 1184 tag = fdt_next_tag(drc->fdt, drc->ccs_offset, &fdt_offset_next);
b89b3d39
DG
1185
1186 switch (tag) {
1187 case FDT_BEGIN_NODE:
4445b1d2
DG
1188 drc->ccs_depth++;
1189 name = fdt_get_name(drc->fdt, drc->ccs_offset, NULL);
b89b3d39
DG
1190
1191 /* provide the name of the next OF node */
1192 wa_offset = CC_VAL_DATA_OFFSET;
1193 rtas_st(wa_addr, CC_IDX_NODE_NAME_OFFSET, wa_offset);
1194 configure_connector_st(wa_addr, wa_offset, name, strlen(name) + 1);
1195 resp = SPAPR_DR_CC_RESPONSE_NEXT_CHILD;
1196 break;
1197 case FDT_END_NODE:
4445b1d2
DG
1198 drc->ccs_depth--;
1199 if (drc->ccs_depth == 0) {
0b55aa91 1200 uint32_t drc_index = spapr_drc_index(drc);
9d4c0f4f
DG
1201
1202 /* done sending the device tree, move to configured state */
0b55aa91 1203 trace_spapr_drc_set_configured(drc_index);
9d4c0f4f 1204 drc->state = drck->ready_state;
188bfe1b
BR
1205 /*
1206 * Ensure that we are able to send the FDT fragment
1207 * again via configure-connector call if the guest requests.
1208 */
1209 drc->ccs_offset = drc->fdt_start_offset;
1210 drc->ccs_depth = 0;
1211 fdt_offset_next = drc->fdt_start_offset;
b89b3d39
DG
1212 resp = SPAPR_DR_CC_RESPONSE_SUCCESS;
1213 } else {
1214 resp = SPAPR_DR_CC_RESPONSE_PREV_PARENT;
1215 }
1216 break;
1217 case FDT_PROP:
4445b1d2 1218 prop = fdt_get_property_by_offset(drc->fdt, drc->ccs_offset,
b89b3d39 1219 &prop_len);
88af6ea5 1220 name = fdt_string(drc->fdt, fdt32_to_cpu(prop->nameoff));
b89b3d39
DG
1221
1222 /* provide the name of the next OF property */
1223 wa_offset = CC_VAL_DATA_OFFSET;
1224 rtas_st(wa_addr, CC_IDX_PROP_NAME_OFFSET, wa_offset);
1225 configure_connector_st(wa_addr, wa_offset, name, strlen(name) + 1);
1226
1227 /* provide the length and value of the OF property. data gets
1228 * placed immediately after NULL terminator of the OF property's
1229 * name string
1230 */
1231 wa_offset += strlen(name) + 1,
1232 rtas_st(wa_addr, CC_IDX_PROP_LEN, prop_len);
1233 rtas_st(wa_addr, CC_IDX_PROP_DATA_OFFSET, wa_offset);
1234 configure_connector_st(wa_addr, wa_offset, prop->data, prop_len);
1235 resp = SPAPR_DR_CC_RESPONSE_NEXT_PROPERTY;
1236 break;
1237 case FDT_END:
1238 resp = SPAPR_DR_CC_RESPONSE_ERROR;
1239 default:
1240 /* keep seeking for an actionable tag */
1241 break;
1242 }
4445b1d2
DG
1243 if (drc->ccs_offset >= 0) {
1244 drc->ccs_offset = fdt_offset_next;
b89b3d39
DG
1245 }
1246 } while (resp == SPAPR_DR_CC_RESPONSE_CONTINUE);
1247
1248 rc = resp;
1249out:
1250 rtas_st(rets, 0, rc);
1251}
1252
1253static void spapr_drc_register_types(void)
1254{
1255 type_register_static(&spapr_dr_connector_info);
2d335818
DG
1256 type_register_static(&spapr_drc_physical_info);
1257 type_register_static(&spapr_drc_logical_info);
1258 type_register_static(&spapr_drc_cpu_info);
1259 type_register_static(&spapr_drc_pci_info);
1260 type_register_static(&spapr_drc_lmb_info);
962b6c36 1261 type_register_static(&spapr_drc_phb_info);
ee3a71e3 1262 type_register_static(&spapr_drc_pmem_info);
b89b3d39
DG
1263
1264 spapr_rtas_register(RTAS_SET_INDICATOR, "set-indicator",
1265 rtas_set_indicator);
1266 spapr_rtas_register(RTAS_GET_SENSOR_STATE, "get-sensor-state",
1267 rtas_get_sensor_state);
1268 spapr_rtas_register(RTAS_IBM_CONFIGURE_CONNECTOR, "ibm,configure-connector",
1269 rtas_ibm_configure_connector);
1270}
1271type_init(spapr_drc_register_types)