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4040ab72
DG
1/*
2 * QEMU sPAPR VIO code
3 *
4 * Copyright (c) 2010 David Gibson, IBM Corporation <dwg@au1.ibm.com>
5 * Based on the s390 virtio bus code:
6 * Copyright (c) 2009 Alexander Graf <agraf@suse.de>
7 *
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2 of the License, or (at your option) any later version.
12 *
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
17 *
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 */
21
0d75590d 22#include "qemu/osdep.h"
ce9863b7 23#include "qemu/error-report.h"
da34e65c 24#include "qapi/error.h"
efe2add7 25#include "qapi/visitor.h"
64552b6b 26#include "hw/irq.h"
03dd024f 27#include "qemu/log.h"
9c17d615 28#include "sysemu/sysemu.h"
83c9f4ca 29#include "hw/loader.h"
4040ab72
DG
30#include "elf.h"
31#include "hw/sysbus.h"
9c17d615
PB
32#include "sysemu/kvm.h"
33#include "sysemu/device_tree.h"
b45d63b6 34#include "kvm_ppc.h"
d6454270 35#include "migration/vmstate.h"
efe2add7 36#include "sysemu/qtest.h"
4040ab72 37
0d09e41a
PB
38#include "hw/ppc/spapr.h"
39#include "hw/ppc/spapr_vio.h"
bf5a6696 40#include "hw/ppc/fdt.h"
7ab6a501 41#include "trace.h"
4040ab72 42
4040ab72 43#include <libfdt.h>
4040ab72 44
82cffa2e
CLG
45#define SPAPR_VIO_REG_BASE 0x71000000
46
c4eda5b7
DG
47static char *spapr_vio_get_dev_name(DeviceState *qdev)
48{
ce2918cb
DG
49 SpaprVioDevice *dev = VIO_SPAPR_DEVICE(qdev);
50 SpaprVioDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
c4eda5b7
DG
51
52 /* Device tree style name device@reg */
9be38598 53 return g_strdup_printf("%s@%x", pc->dt_name, dev->reg);
c4eda5b7
DG
54}
55
56static void spapr_vio_bus_class_init(ObjectClass *klass, void *data)
57{
58 BusClass *k = BUS_CLASS(klass);
59
60 k->get_dev_path = spapr_vio_get_dev_name;
5a06393f 61 k->get_fw_dev_path = spapr_vio_get_dev_name;
c4eda5b7
DG
62}
63
0d936928
AL
64static const TypeInfo spapr_vio_bus_info = {
65 .name = TYPE_SPAPR_VIO_BUS,
66 .parent = TYPE_BUS,
c4eda5b7 67 .class_init = spapr_vio_bus_class_init,
ce2918cb 68 .instance_size = sizeof(SpaprVioBus),
4040ab72
DG
69};
70
ce2918cb 71SpaprVioDevice *spapr_vio_find_by_reg(SpaprVioBus *bus, uint32_t reg)
4040ab72 72{
0866aca1 73 BusChild *kid;
ce2918cb 74 SpaprVioDevice *dev = NULL;
4040ab72 75
0866aca1 76 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
ce2918cb 77 dev = (SpaprVioDevice *)kid->child;
4040ab72 78 if (dev->reg == reg) {
5435352c 79 return dev;
4040ab72
DG
80 }
81 }
82
5435352c 83 return NULL;
4040ab72
DG
84}
85
ce2918cb 86static int vio_make_devnode(SpaprVioDevice *dev,
4040ab72
DG
87 void *fdt)
88{
ce2918cb 89 SpaprVioDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
1e34d859
ME
90 int vdevice_off, node_off, ret;
91 char *dt_name;
4040ab72
DG
92
93 vdevice_off = fdt_path_offset(fdt, "/vdevice");
94 if (vdevice_off < 0) {
95 return vdevice_off;
96 }
97
c4eda5b7 98 dt_name = spapr_vio_get_dev_name(DEVICE(dev));
1e34d859 99 node_off = fdt_add_subnode(fdt, vdevice_off, dt_name);
4ecf8aa5 100 g_free(dt_name);
4040ab72
DG
101 if (node_off < 0) {
102 return node_off;
103 }
104
105 ret = fdt_setprop_cell(fdt, node_off, "reg", dev->reg);
106 if (ret < 0) {
107 return ret;
108 }
109
3954d33a 110 if (pc->dt_type) {
4040ab72 111 ret = fdt_setprop_string(fdt, node_off, "device_type",
3954d33a 112 pc->dt_type);
4040ab72
DG
113 if (ret < 0) {
114 return ret;
115 }
116 }
117
3954d33a 118 if (pc->dt_compatible) {
4040ab72 119 ret = fdt_setprop_string(fdt, node_off, "compatible",
3954d33a 120 pc->dt_compatible);
4040ab72
DG
121 if (ret < 0) {
122 return ret;
123 }
124 }
125
a307d594 126 if (dev->irq) {
bb2d8ab6 127 uint32_t ints_prop[2];
00dc738d 128
5c7adcf4 129 spapr_dt_irq(ints_prop, dev->irq, false);
00dc738d
DG
130 ret = fdt_setprop(fdt, node_off, "interrupts", ints_prop,
131 sizeof(ints_prop));
132 if (ret < 0) {
133 return ret;
134 }
135 }
136
2b7dc949 137 ret = spapr_tcet_dma_dt(fdt, node_off, "ibm,my-dma-window", dev->tcet);
ad0ebb91
DG
138 if (ret < 0) {
139 return ret;
ee86dfee
DG
140 }
141
3954d33a
AL
142 if (pc->devnode) {
143 ret = (pc->devnode)(dev, fdt, node_off);
4040ab72
DG
144 if (ret < 0) {
145 return ret;
146 }
147 }
148
149 return node_off;
150}
4040ab72 151
b45d63b6
BH
152/*
153 * CRQ handling
154 */
ce2918cb 155static target_ulong h_reg_crq(PowerPCCPU *cpu, SpaprMachineState *spapr,
b45d63b6
BH
156 target_ulong opcode, target_ulong *args)
157{
158 target_ulong reg = args[0];
159 target_ulong queue_addr = args[1];
160 target_ulong queue_len = args[2];
ce2918cb 161 SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
b45d63b6
BH
162
163 if (!dev) {
d9599c92 164 hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg);
b45d63b6
BH
165 return H_PARAMETER;
166 }
167
168 /* We can't grok a queue size bigger than 256M for now */
169 if (queue_len < 0x1000 || queue_len > 0x10000000) {
d9599c92
DG
170 hcall_dprintf("Queue size too small or too big (0x" TARGET_FMT_lx
171 ")\n", queue_len);
b45d63b6
BH
172 return H_PARAMETER;
173 }
174
175 /* Check queue alignment */
176 if (queue_addr & 0xfff) {
d9599c92 177 hcall_dprintf("Queue not aligned (0x" TARGET_FMT_lx ")\n", queue_addr);
b45d63b6
BH
178 return H_PARAMETER;
179 }
180
181 /* Check if device supports CRQs */
182 if (!dev->crq.SendFunc) {
8e01f355 183 hcall_dprintf("Device does not support CRQ\n");
b45d63b6
BH
184 return H_NOT_FOUND;
185 }
186
b45d63b6
BH
187 /* Already a queue ? */
188 if (dev->crq.qsize) {
8e01f355 189 hcall_dprintf("CRQ already registered\n");
b45d63b6
BH
190 return H_RESOURCE;
191 }
192 dev->crq.qladdr = queue_addr;
193 dev->crq.qsize = queue_len;
194 dev->crq.qnext = 0;
195
7ab6a501 196 trace_spapr_vio_h_reg_crq(reg, queue_addr, queue_len);
b45d63b6
BH
197 return H_SUCCESS;
198}
199
ce2918cb 200static target_ulong free_crq(SpaprVioDevice *dev)
8e01f355
DG
201{
202 dev->crq.qladdr = 0;
203 dev->crq.qsize = 0;
204 dev->crq.qnext = 0;
205
7ab6a501 206 trace_spapr_vio_free_crq(dev->reg);
8e01f355
DG
207
208 return H_SUCCESS;
209}
210
ce2918cb 211static target_ulong h_free_crq(PowerPCCPU *cpu, SpaprMachineState *spapr,
b45d63b6
BH
212 target_ulong opcode, target_ulong *args)
213{
214 target_ulong reg = args[0];
ce2918cb 215 SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
b45d63b6
BH
216
217 if (!dev) {
d9599c92 218 hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg);
b45d63b6
BH
219 return H_PARAMETER;
220 }
221
8e01f355 222 return free_crq(dev);
b45d63b6
BH
223}
224
ce2918cb 225static target_ulong h_send_crq(PowerPCCPU *cpu, SpaprMachineState *spapr,
b45d63b6
BH
226 target_ulong opcode, target_ulong *args)
227{
228 target_ulong reg = args[0];
229 target_ulong msg_hi = args[1];
230 target_ulong msg_lo = args[2];
ce2918cb 231 SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
b45d63b6
BH
232 uint64_t crq_mangle[2];
233
234 if (!dev) {
d9599c92 235 hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg);
b45d63b6
BH
236 return H_PARAMETER;
237 }
238 crq_mangle[0] = cpu_to_be64(msg_hi);
239 crq_mangle[1] = cpu_to_be64(msg_lo);
240
241 if (dev->crq.SendFunc) {
242 return dev->crq.SendFunc(dev, (uint8_t *)crq_mangle);
243 }
244
245 return H_HARDWARE;
246}
247
ce2918cb 248static target_ulong h_enable_crq(PowerPCCPU *cpu, SpaprMachineState *spapr,
b45d63b6
BH
249 target_ulong opcode, target_ulong *args)
250{
251 target_ulong reg = args[0];
ce2918cb 252 SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
b45d63b6
BH
253
254 if (!dev) {
d9599c92 255 hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg);
b45d63b6
BH
256 return H_PARAMETER;
257 }
258
259 return 0;
260}
261
262/* Returns negative error, 0 success, or positive: queue full */
ce2918cb 263int spapr_vio_send_crq(SpaprVioDevice *dev, uint8_t *crq)
b45d63b6
BH
264{
265 int rc;
266 uint8_t byte;
267
268 if (!dev->crq.qsize) {
ce9863b7 269 error_report("spapr_vio_send_creq on uninitialized queue");
b45d63b6
BH
270 return -1;
271 }
272
273 /* Maybe do a fast path for KVM just writing to the pages */
ad0ebb91 274 rc = spapr_vio_dma_read(dev, dev->crq.qladdr + dev->crq.qnext, &byte, 1);
b45d63b6
BH
275 if (rc) {
276 return rc;
277 }
278 if (byte != 0) {
279 return 1;
280 }
281
ad0ebb91 282 rc = spapr_vio_dma_write(dev, dev->crq.qladdr + dev->crq.qnext + 8,
b45d63b6
BH
283 &crq[8], 8);
284 if (rc) {
285 return rc;
286 }
287
288 kvmppc_eieio();
289
ad0ebb91 290 rc = spapr_vio_dma_write(dev, dev->crq.qladdr + dev->crq.qnext, crq, 8);
b45d63b6
BH
291 if (rc) {
292 return rc;
293 }
294
295 dev->crq.qnext = (dev->crq.qnext + 16) % dev->crq.qsize;
296
297 if (dev->signal_state & 1) {
a307d594 298 qemu_irq_pulse(spapr_vio_qirq(dev));
b45d63b6
BH
299 }
300
301 return 0;
302}
303
08942ac1
BH
304/* "quiesce" handling */
305
ce2918cb 306static void spapr_vio_quiesce_one(SpaprVioDevice *dev)
08942ac1 307{
2b7dc949 308 if (dev->tcet) {
a83000f5 309 device_reset(DEVICE(dev->tcet));
08942ac1 310 }
4dd96f24 311 free_crq(dev);
08942ac1
BH
312}
313
ce2918cb 314void spapr_vio_set_bypass(SpaprVioDevice *dev, bool bypass)
ee9a569a
AK
315{
316 if (!dev->tcet) {
317 return;
318 }
319
320 memory_region_set_enabled(&dev->mrbypass, bypass);
321 memory_region_set_enabled(spapr_tce_get_iommu(dev->tcet), !bypass);
322
323 dev->tcet->bypass = bypass;
324}
325
ce2918cb 326static void rtas_set_tce_bypass(PowerPCCPU *cpu, SpaprMachineState *spapr,
210b580b 327 uint32_t token,
08942ac1
BH
328 uint32_t nargs, target_ulong args,
329 uint32_t nret, target_ulong rets)
330{
ce2918cb
DG
331 SpaprVioBus *bus = spapr->vio_bus;
332 SpaprVioDevice *dev;
08942ac1
BH
333 uint32_t unit, enable;
334
335 if (nargs != 2) {
a64d325d 336 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
08942ac1
BH
337 return;
338 }
339 unit = rtas_ld(args, 0);
340 enable = rtas_ld(args, 1);
341 dev = spapr_vio_find_by_reg(bus, unit);
342 if (!dev) {
a64d325d 343 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
08942ac1
BH
344 return;
345 }
ad0ebb91 346
2b7dc949 347 if (!dev->tcet) {
a64d325d 348 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
53724ee5 349 return;
08942ac1
BH
350 }
351
ee9a569a 352 spapr_vio_set_bypass(dev, !!enable);
53724ee5 353
a64d325d 354 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
08942ac1
BH
355}
356
ce2918cb 357static void rtas_quiesce(PowerPCCPU *cpu, SpaprMachineState *spapr,
210b580b 358 uint32_t token,
08942ac1
BH
359 uint32_t nargs, target_ulong args,
360 uint32_t nret, target_ulong rets)
361{
ce2918cb 362 SpaprVioBus *bus = spapr->vio_bus;
0866aca1 363 BusChild *kid;
ce2918cb 364 SpaprVioDevice *dev = NULL;
08942ac1
BH
365
366 if (nargs != 0) {
a64d325d 367 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
08942ac1
BH
368 return;
369 }
370
0866aca1 371 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
ce2918cb 372 dev = (SpaprVioDevice *)kid->child;
08942ac1
BH
373 spapr_vio_quiesce_one(dev);
374 }
375
a64d325d 376 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
08942ac1
BH
377}
378
ce2918cb 379static SpaprVioDevice *reg_conflict(SpaprVioDevice *dev)
9fc380d3 380{
ce2918cb 381 SpaprVioBus *bus = SPAPR_VIO_BUS(dev->qdev.parent_bus);
0866aca1 382 BusChild *kid;
ce2918cb 383 SpaprVioDevice *other;
9fc380d3
ME
384
385 /*
d601fac4
DG
386 * Check for a device other than the given one which is already
387 * using the requested address. We have to open code this because
388 * the given dev might already be in the list.
9fc380d3 389 */
0866aca1 390 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
fd506b4f 391 other = VIO_SPAPR_DEVICE(kid->child);
9fc380d3 392
d601fac4
DG
393 if (other != dev && other->reg == dev->reg) {
394 return other;
9fc380d3
ME
395 }
396 }
397
398 return 0;
399}
400
b1c7f725 401static void spapr_vio_busdev_reset(DeviceState *qdev)
8e01f355 402{
ce2918cb
DG
403 SpaprVioDevice *dev = VIO_SPAPR_DEVICE(qdev);
404 SpaprVioDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
8e01f355 405
4dd96f24
DG
406 /* Shut down the request queue and TCEs if necessary */
407 spapr_vio_quiesce_one(dev);
408
409 dev->signal_state = 0;
b1c7f725 410
ee9a569a 411 spapr_vio_set_bypass(dev, false);
b1c7f725
DG
412 if (pc->reset) {
413 pc->reset(dev);
414 }
8e01f355
DG
415}
416
82cffa2e
CLG
417/*
418 * The register property of a VIO device is defined in livirt using
419 * 0x1000 as a base register number plus a 0x1000 increment. For the
420 * VIO tty device, the base number is changed to 0x30000000. QEMU uses
421 * a base register number of 0x71000000 and then a simple increment.
422 *
423 * The formula below tries to compute a unique index number from the
424 * register value that will be used to define the IRQ number of the
425 * VIO device.
426 *
427 * A maximum of 256 VIO devices is covered. Collisions are possible
428 * but they will be detected when the IRQ is claimed.
429 */
430static inline uint32_t spapr_vio_reg_to_irq(uint32_t reg)
431{
432 uint32_t irq;
433
434 if (reg >= SPAPR_VIO_REG_BASE) {
435 /*
436 * VIO device register values when allocated by QEMU. For
437 * these, we simply mask the high bits to fit the overall
438 * range: [0x00 - 0xff].
439 *
440 * The nvram VIO device (reg=0x71000000) is a static device of
441 * the pseries machine and so is always allocated by QEMU. Its
442 * IRQ number is 0x0.
443 */
444 irq = reg & 0xff;
445
446 } else if (reg >= 0x30000000) {
447 /*
448 * VIO tty devices register values, when allocated by livirt,
449 * are mapped in range [0xf0 - 0xff], gives us a maximum of 16
450 * vtys.
451 */
452 irq = 0xf0 | ((reg >> 12) & 0xf);
453
454 } else {
455 /*
456 * Other VIO devices register values, when allocated by
457 * livirt, should be mapped in range [0x00 - 0xef]. Conflicts
458 * will be detected when IRQ is claimed.
459 */
460 irq = (reg >> 12) & 0xff;
461 }
462
463 return SPAPR_IRQ_VIO | irq;
464}
465
28b07e73 466static void spapr_vio_busdev_realize(DeviceState *qdev, Error **errp)
4040ab72 467{
ce2918cb
DG
468 SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
469 SpaprVioDevice *dev = (SpaprVioDevice *)qdev;
470 SpaprVioDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
4040ab72 471 char *id;
a005b3ef 472 Error *local_err = NULL;
9fc380d3 473
d601fac4
DG
474 if (dev->reg != -1) {
475 /*
476 * Explicitly assigned address, just verify that no-one else
477 * is using it. other mechanism). We have to open code this
478 * rather than using spapr_vio_find_by_reg() because sdev
479 * itself is already in the list.
480 */
ce2918cb 481 SpaprVioDevice *other = reg_conflict(dev);
d601fac4
DG
482
483 if (other) {
28b07e73
MA
484 error_setg(errp, "%s and %s devices conflict at address %#x",
485 object_get_typename(OBJECT(qdev)),
486 object_get_typename(OBJECT(&other->qdev)),
487 dev->reg);
488 return;
d601fac4
DG
489 }
490 } else {
491 /* Need to assign an address */
ce2918cb 492 SpaprVioBus *bus = SPAPR_VIO_BUS(dev->qdev.parent_bus);
d601fac4
DG
493
494 do {
495 dev->reg = bus->next_reg++;
496 } while (reg_conflict(dev));
9fc380d3 497 }
4040ab72 498
1e34d859
ME
499 /* Don't overwrite ids assigned on the command line */
500 if (!dev->qdev.id) {
c4eda5b7 501 id = spapr_vio_get_dev_name(DEVICE(dev));
1e34d859 502 dev->qdev.id = id;
4040ab72
DG
503 }
504
48822064 505 dev->irq = spapr_vio_reg_to_irq(dev->reg);
82cffa2e 506
48822064
CLG
507 if (SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) {
508 dev->irq = spapr_irq_findone(spapr, &local_err);
509 if (local_err) {
510 error_propagate(errp, local_err);
511 return;
4fe75a8c
CLG
512 }
513 }
514
515 spapr_irq_claim(spapr, dev->irq, false, &local_err);
a005b3ef
GK
516 if (local_err) {
517 error_propagate(errp, local_err);
28b07e73 518 return;
416343b1 519 }
4040ab72 520
53724ee5 521 if (pc->rtce_window_size) {
4290ca49 522 uint32_t liobn = SPAPR_VIO_LIOBN(dev->reg);
ee9a569a
AK
523
524 memory_region_init(&dev->mrroot, OBJECT(dev), "iommu-spapr-root",
525 ram_size);
526 memory_region_init_alias(&dev->mrbypass, OBJECT(dev),
527 "iommu-spapr-bypass", get_system_memory(),
528 0, ram_size);
529 memory_region_add_subregion_overlap(&dev->mrroot, 0, &dev->mrbypass, 1);
530 address_space_init(&dev->as, &dev->mrroot, qdev->id);
531
df7625d4
AK
532 dev->tcet = spapr_tce_new_table(qdev, liobn);
533 spapr_tce_table_enable(dev->tcet, SPAPR_TCE_PAGE_SHIFT, 0,
534 pc->rtce_window_size >> SPAPR_TCE_PAGE_SHIFT);
ee9a569a
AK
535 dev->tcet->vdev = dev;
536 memory_region_add_subregion_overlap(&dev->mrroot, 0,
537 spapr_tce_get_iommu(dev->tcet), 2);
53724ee5 538 }
ee86dfee 539
28b07e73 540 pc->realize(dev, errp);
4040ab72
DG
541}
542
ce2918cb 543static target_ulong h_vio_signal(PowerPCCPU *cpu, SpaprMachineState *spapr,
00dc738d
DG
544 target_ulong opcode,
545 target_ulong *args)
546{
547 target_ulong reg = args[0];
548 target_ulong mode = args[1];
ce2918cb
DG
549 SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
550 SpaprVioDeviceClass *pc;
00dc738d
DG
551
552 if (!dev) {
553 return H_PARAMETER;
554 }
555
3954d33a 556 pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
00dc738d 557
3954d33a 558 if (mode & ~pc->signal_mask) {
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559 return H_PARAMETER;
560 }
561
562 dev->signal_state = mode;
563
564 return H_SUCCESS;
565}
566
ce2918cb 567SpaprVioBus *spapr_vio_bus_init(void)
4040ab72 568{
ce2918cb 569 SpaprVioBus *bus;
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570 BusState *qbus;
571 DeviceState *dev;
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572
573 /* Create bridge device */
215e2098 574 dev = qdev_create(NULL, TYPE_SPAPR_VIO_BRIDGE);
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575 qdev_init_nofail(dev);
576
577 /* Create bus on bridge device */
0d936928 578 qbus = qbus_create(TYPE_SPAPR_VIO_BUS, dev, "spapr-vio");
215e2098 579 bus = SPAPR_VIO_BUS(qbus);
82cffa2e 580 bus->next_reg = SPAPR_VIO_REG_BASE;
4040ab72 581
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582 /* hcall-vio */
583 spapr_register_hypercall(H_VIO_SIGNAL, h_vio_signal);
584
b45d63b6
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585 /* hcall-crq */
586 spapr_register_hypercall(H_REG_CRQ, h_reg_crq);
587 spapr_register_hypercall(H_FREE_CRQ, h_free_crq);
588 spapr_register_hypercall(H_SEND_CRQ, h_send_crq);
589 spapr_register_hypercall(H_ENABLE_CRQ, h_enable_crq);
590
08942ac1 591 /* RTAS calls */
3a3b8502
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592 spapr_rtas_register(RTAS_IBM_SET_TCE_BYPASS, "ibm,set-tce-bypass",
593 rtas_set_tce_bypass);
594 spapr_rtas_register(RTAS_QUIESCE, "quiesce", rtas_quiesce);
08942ac1 595
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596 return bus;
597}
598
999e12bb
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599static void spapr_vio_bridge_class_init(ObjectClass *klass, void *data)
600{
5a06393f 601 DeviceClass *dc = DEVICE_CLASS(klass);
999e12bb 602
5a06393f 603 dc->fw_name = "vdevice";
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AL
604}
605
8c43a6f0 606static const TypeInfo spapr_vio_bridge_info = {
215e2098 607 .name = TYPE_SPAPR_VIO_BRIDGE,
39bffca2 608 .parent = TYPE_SYS_BUS_DEVICE,
39bffca2 609 .class_init = spapr_vio_bridge_class_init,
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610};
611
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612const VMStateDescription vmstate_spapr_vio = {
613 .name = "spapr_vio",
614 .version_id = 1,
615 .minimum_version_id = 1,
3aff6c2f 616 .fields = (VMStateField[]) {
b368a7d8 617 /* Sanity check */
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618 VMSTATE_UINT32_EQUAL(reg, SpaprVioDevice, NULL),
619 VMSTATE_UINT32_EQUAL(irq, SpaprVioDevice, NULL),
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620
621 /* General VIO device state */
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622 VMSTATE_UINT64(signal_state, SpaprVioDevice),
623 VMSTATE_UINT64(crq.qladdr, SpaprVioDevice),
624 VMSTATE_UINT32(crq.qsize, SpaprVioDevice),
625 VMSTATE_UINT32(crq.qnext, SpaprVioDevice),
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626
627 VMSTATE_END_OF_LIST()
628 },
629};
630
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631static void vio_spapr_device_class_init(ObjectClass *klass, void *data)
632{
633 DeviceClass *k = DEVICE_CLASS(klass);
28b07e73 634 k->realize = spapr_vio_busdev_realize;
b1c7f725 635 k->reset = spapr_vio_busdev_reset;
0d936928 636 k->bus_type = TYPE_SPAPR_VIO_BUS;
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637}
638
8c43a6f0 639static const TypeInfo spapr_vio_type_info = {
3954d33a
AL
640 .name = TYPE_VIO_SPAPR_DEVICE,
641 .parent = TYPE_DEVICE,
ce2918cb 642 .instance_size = sizeof(SpaprVioDevice),
3954d33a 643 .abstract = true,
ce2918cb 644 .class_size = sizeof(SpaprVioDeviceClass),
39bffca2 645 .class_init = vio_spapr_device_class_init,
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646};
647
83f7d43a 648static void spapr_vio_register_types(void)
4040ab72 649{
0d936928 650 type_register_static(&spapr_vio_bus_info);
39bffca2 651 type_register_static(&spapr_vio_bridge_info);
3954d33a 652 type_register_static(&spapr_vio_type_info);
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653}
654
83f7d43a 655type_init(spapr_vio_register_types)
4040ab72 656
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657static int compare_reg(const void *p1, const void *p2)
658{
ce2918cb 659 SpaprVioDevice const *dev1, *dev2;
05c19438 660
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661 dev1 = (SpaprVioDevice *)*(DeviceState **)p1;
662 dev2 = (SpaprVioDevice *)*(DeviceState **)p2;
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663
664 if (dev1->reg < dev2->reg) {
665 return -1;
666 }
667 if (dev1->reg == dev2->reg) {
668 return 0;
669 }
670
671 /* dev1->reg > dev2->reg */
672 return 1;
673}
674
ce2918cb 675void spapr_dt_vdevice(SpaprVioBus *bus, void *fdt)
4040ab72 676{
05c19438 677 DeviceState *qdev, **qdevs;
0866aca1 678 BusChild *kid;
05c19438 679 int i, num, ret = 0;
bf5a6696
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680 int node;
681
682 _FDT(node = fdt_add_subnode(fdt, 0, "vdevice"));
683
684 _FDT(fdt_setprop_string(fdt, node, "device_type", "vdevice"));
685 _FDT(fdt_setprop_string(fdt, node, "compatible", "IBM,vdevice"));
686 _FDT(fdt_setprop_cell(fdt, node, "#address-cells", 1));
687 _FDT(fdt_setprop_cell(fdt, node, "#size-cells", 0));
688 _FDT(fdt_setprop_cell(fdt, node, "#interrupt-cells", 2));
689 _FDT(fdt_setprop(fdt, node, "interrupt-controller", NULL, 0));
4040ab72 690
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691 /* Count qdevs on the bus list */
692 num = 0;
0866aca1 693 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
05c19438
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694 num++;
695 }
696
697 /* Copy out into an array of pointers */
dec4ec40 698 qdevs = g_new(DeviceState *, num);
05c19438 699 num = 0;
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700 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
701 qdevs[num++] = kid->child;
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DG
702 }
703
704 /* Sort the array */
705 qsort(qdevs, num, sizeof(qdev), compare_reg);
706
707 /* Hack alert. Give the devices to libfdt in reverse order, we happen
708 * to know that will mean they are in forward order in the tree. */
709 for (i = num - 1; i >= 0; i--) {
ce2918cb
DG
710 SpaprVioDevice *dev = (SpaprVioDevice *)(qdevs[i]);
711 SpaprVioDeviceClass *vdc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
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712
713 ret = vio_make_devnode(dev, fdt);
4040ab72 714 if (ret < 0) {
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715 error_report("Couldn't create device node /vdevice/%s@%"PRIx32,
716 vdc->dt_name, dev->reg);
717 exit(1);
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718 }
719 }
720
5f1d1fc5 721 g_free(qdevs);
4040ab72 722}
68f3a94c 723
ce2918cb 724gchar *spapr_vio_stdout_path(SpaprVioBus *bus)
68f3a94c 725{
ce2918cb 726 SpaprVioDevice *dev;
68f3a94c 727 char *name, *path;
68f3a94c
DG
728
729 dev = spapr_vty_get_default(bus);
7c866c6a
DG
730 if (!dev) {
731 return NULL;
68f3a94c
DG
732 }
733
c4eda5b7 734 name = spapr_vio_get_dev_name(DEVICE(dev));
4ecf8aa5 735 path = g_strdup_printf("/vdevice/%s", name);
68f3a94c 736
4ecf8aa5 737 g_free(name);
7c866c6a 738 return path;
68f3a94c 739}