[people/ms/u-boot.git] / include / configs / ADCIOP.h

/*
 * (C) Copyright 2001
 * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

/*
 * board/config.h - configuration options, board specific
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * High Level Configuration Options
 * (easy to change)
 */

#define CONFIG_IOP480		1	/* This is a IOP480 CPU		*/
#define CONFIG_ADCIOP		1	/* ...on a ADCIOP board		*/

#define	CONFIG_SYS_TEXT_BASE	0xFFFD0000

#define CONFIG_BOARD_EARLY_INIT_F 1	/* call board_early_init_f()	*/

#define CONFIG_CLOCKS_IN_MHZ	1	/* clocks passsed to Linux in MHz */

#define CONFIG_CPUCLOCK		66
#define CONFIG_BUSCLOCK		(CONFIG_CPUCLOCK)

#define CONFIG_BAUDRATE		9600
#define CONFIG_BOOTDELAY	3	/* autoboot after 3 seconds	*/
#define CONFIG_BOOTCOMMAND	"bootm ffc00000" /* autoboot command	*/

#undef	CONFIG_BOOTARGS

#define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/
#define CONFIG_SYS_LOADS_BAUD_CHANGE	1	/* allow baudrate change	*/

#undef CONFIG_WATCHDOG			/* watchdog disabled		*/

#define CONFIG_PHY_ADDR		0	/* PHY address			*/

#define CONFIG_IPADDR		10.0.18.222
#define CONFIG_SERVERIP		10.0.18.190


/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME

/*
 * Command line configuration.
 */
#include <config_cmd_default.h>

#define CONFIG_CMD_DHCP
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_ELF
#define CONFIG_CMD_ASKENV


/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_LONGHELP			/* undef to save memory		*/
#define CONFIG_SYS_PROMPT	"=> "		/* Monitor Command Prompt	*/
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE	1024		/* Console I/O Buffer Size	*/
#else
#define CONFIG_SYS_CBSIZE	256		/* Console I/O Buffer Size	*/
#endif
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS	16		/* max number of command args	*/
#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/

#define CONFIG_SYS_CONSOLE_INFO_QUIET	1	/* don't print console @ startup*/

#define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
#define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/

/* The following table includes the supported baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE	\
	{ 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200 }

#define CONFIG_SYS_LOAD_ADDR	0x100000	/* default load address */

#define CONFIG_SYS_HZ		1000		/* decrementer freq: 1 ms ticks */

#define CONFIG_ZERO_BOOTDELAY_CHECK	/* check for keypress on bootdelay==0 */

/*-----------------------------------------------------------------------
 * Definitions for initial stack pointer and data area (in DPRAM)
 */
#define CONFIG_SYS_INIT_RAM_ADDR	0x00df0000 /* inside of SDRAM			*/
#define CONFIG_SYS_INIT_RAM_SIZE	0x0f00	/* Size of used area in RAM	       */
#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET

/*-----------------------------------------------------------------------
 * Start addresses for the final memory configuration
 * (Set up by the startup code)
 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
 */
#define CONFIG_SYS_SDRAM_BASE		0x00000000
#define CONFIG_SYS_FLASH_BASE		0xFFFD0000
#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_MONITOR_LEN		(192 << 10)	/* Reserve 192 kB for Monitor	*/
#define CONFIG_SYS_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()	*/

/*
 * For booting Linux, the board info and command line data
 * have to be in the first 8 MB of memory, since this is
 * the maximum mapped by the Linux kernel during initialization.
 */
#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
/*-----------------------------------------------------------------------
 * FLASH organization
 */
#define CONFIG_SYS_MAX_FLASH_BANKS	2	/* max number of memory banks		*/
#define CONFIG_SYS_MAX_FLASH_SECT	256	/* max number of sectors on one chip	*/

#define CONFIG_SYS_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms)	*/
#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)	*/

#define CONFIG_SYS_FLASH_WORD_SIZE	unsigned char	/* flash word size (width)	*/
#define CONFIG_SYS_FLASH_ADDR0		0x0AA9	/* 1st address for flash config cycles	*/
#define CONFIG_SYS_FLASH_ADDR1		0x0556	/* 2nd address for flash config cycles	*/
/*
 * The following defines are added for buggy IOP480 byte interface.
 * All other boards should use the standard values (CPCI405 etc.)
 */
#define CONFIG_SYS_FLASH_READ0		0x0002	/* 0 is standard			*/
#define CONFIG_SYS_FLASH_READ1		0x0000	/* 1 is standard			*/
#define CONFIG_SYS_FLASH_READ2		0x0004	/* 2 is standard			*/

#define CONFIG_SYS_FLASH_EMPTY_INFO		/* print 'E' for empty sector on flinfo */

#if 1 /* Use NVRAM for environment variables */
/*-----------------------------------------------------------------------
 * NVRAM organization
 */
#define CONFIG_ENV_IS_IN_NVRAM	1	/* use NVRAM for environment vars	*/
#define CONFIG_SYS_NVRAM_BASE_ADDR	0x10000000		/* NVRAM base address	*/
#define CONFIG_SYS_NVRAM_SIZE		(32*1024)		/* NVRAM size		*/
#define CONFIG_ENV_SIZE		0x0400		/* Size of Environment vars	*/
#define CONFIG_ENV_ADDR		\
	(CONFIG_SYS_NVRAM_BASE_ADDR+CONFIG_SYS_NVRAM_SIZE-CONFIG_ENV_SIZE)	/* Env	*/
#define CONFIG_SYS_VXWORKS_MAC_PTR     (CONFIG_SYS_NVRAM_BASE_ADDR+0x7800) /* VxWorks eth-addr*/

#else /* Use FLASH for environment variables */

#define CONFIG_ENV_IS_IN_FLASH	1
#define CONFIG_ENV_OFFSET		0x00010000	/* Offset of Environment Sector */
#define CONFIG_ENV_SIZE		0x1000	/* Total Size of Environment Sector	*/

#define CONFIG_ENV_SECT_SIZE	0x8000	/* see README - env sector total size	*/

#endif

/*-----------------------------------------------------------------------
 * PCI stuff
 */
#define CONFIG_PCI			/* include pci support			*/
#undef CONFIG_PCI_PNP

#define CONFIG_NET_MULTI		/* Multi ethernet cards support		*/

#define CONFIG_TULIP

#define CONFIG_SYS_ETH_DEV_FN	     0x0000
#define CONFIG_SYS_ETH_IOBASE	     0x0fff0000

/*
 * Init Memory Controller:
 *
 * BR0/1 and OR0/1 (FLASH)
 */

#define FLASH_BASE0_PRELIM	0xFFC00000	/* FLASH bank #0	*/
#define FLASH_BASE1_PRELIM	0xFFE00000	/* FLASH bank #1	*/

#endif	/* __CONFIG_H */
Commit	Line	Data
0f8c9768 WD	1	/*
	2	* (C) Copyright 2001
	3	* Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
	4	*
	5	* See file CREDITS for list of people who contributed to this
	6	* project.
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License as
	10	* published by the Free Software Foundation; either version 2 of
	11	* the License, or (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
c837dcb1	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
0f8c9768 WD	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	21	* MA 02111-1307 USA
	22	*/
	23
	24	/*
	25	* board/config.h - configuration options, board specific
	26	*/
	27
	28	#ifndef __CONFIG_H
	29	#define __CONFIG_H
	30
	31	/*
	32	* High Level Configuration Options
	33	* (easy to change)
	34	*/
	35
	36	#define CONFIG_IOP480 1 /* This is a IOP480 CPU */
c837dcb1	37	#define CONFIG_ADCIOP 1 /* ...on a ADCIOP board */
0f8c9768	38
2ae18241 WD	39	#define CONFIG_SYS_TEXT_BASE 0xFFFD0000
2ae18241 WD	40
c837dcb1	41	#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
0f8c9768	42
c837dcb1	43	#define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */
0f8c9768	44
c837dcb1 WD	45	#define CONFIG_CPUCLOCK 66
c837dcb1 WD	46	#define CONFIG_BUSCLOCK (CONFIG_CPUCLOCK)
0f8c9768	47
c837dcb1	48	#define CONFIG_BAUDRATE 9600
0f8c9768 WD	49	#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
	50	#define CONFIG_BOOTCOMMAND "bootm ffc00000" /* autoboot command */
	51
c837dcb1	52	#undef CONFIG_BOOTARGS
0f8c9768 WD	53
0f8c9768 WD	54	#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
6d0f6bcf	55	#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
0f8c9768 WD	56
	57	#undef CONFIG_WATCHDOG /* watchdog disabled */
	58
c837dcb1	59	#define CONFIG_PHY_ADDR 0 /* PHY address */
0f8c9768 WD	60
	61	#define CONFIG_IPADDR 10.0.18.222
	62	#define CONFIG_SERVERIP 10.0.18.190
	63
11799434 JL	64
	65	/*
	66	* BOOTP options
	67	*/
	68	#define CONFIG_BOOTP_BOOTFILESIZE
	69	#define CONFIG_BOOTP_BOOTPATH
	70	#define CONFIG_BOOTP_GATEWAY
	71	#define CONFIG_BOOTP_HOSTNAME
	72
498ff9a2 JL	73	/*
	74	* Command line configuration.
	75	*/
	76	#include <config_cmd_default.h>
	77
	78	#define CONFIG_CMD_DHCP
	79	#define CONFIG_CMD_IRQ
	80	#define CONFIG_CMD_ELF
	81	#define CONFIG_CMD_ASKENV
0f8c9768	82
0f8c9768 WD	83
	84	/*
	85	* Miscellaneous configurable options
	86	*/
6d0f6bcf JCPV	87	#define CONFIG_SYS_LONGHELP /* undef to save memory */
6d0f6bcf JCPV	88	#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
498ff9a2	89	#if defined(CONFIG_CMD_KGDB)
6d0f6bcf	90	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
0f8c9768	91	#else
6d0f6bcf	92	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
0f8c9768	93	#endif
6d0f6bcf JCPV	94	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
	95	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	96	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
0f8c9768	97
6d0f6bcf	98	#define CONFIG_SYS_CONSOLE_INFO_QUIET 1 /* don't print console @ startup*/
0f8c9768	99
6d0f6bcf JCPV	100	#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
6d0f6bcf JCPV	101	#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
0f8c9768 WD	102
0f8c9768 WD	103	/* The following table includes the supported baudrates */
6d0f6bcf	104	#define CONFIG_SYS_BAUDRATE_TABLE \
8bde7f77	105	{ 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200 }
0f8c9768	106
6d0f6bcf	107	#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
0f8c9768	108
6d0f6bcf	109	#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
0f8c9768 WD	110
	111	#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
	112
	113	/*-----------------------------------------------------------------------
	114	* Definitions for initial stack pointer and data area (in DPRAM)
	115	*/
6d0f6bcf	116	#define CONFIG_SYS_INIT_RAM_ADDR 0x00df0000 /* inside of SDRAM */
553f0982	117	#define CONFIG_SYS_INIT_RAM_SIZE 0x0f00 /* Size of used area in RAM */
25ddd1fb	118	#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
6d0f6bcf	119	#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
0f8c9768 WD	120
	121	/*-----------------------------------------------------------------------
	122	* Start addresses for the final memory configuration
	123	* (Set up by the startup code)
6d0f6bcf	124	* Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
0f8c9768	125	*/
6d0f6bcf JCPV	126	#define CONFIG_SYS_SDRAM_BASE 0x00000000
	127	#define CONFIG_SYS_FLASH_BASE 0xFFFD0000
	128	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
	129	#define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
	130	#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
0f8c9768 WD	131
	132	/*
	133	* For booting Linux, the board info and command line data
	134	* have to be in the first 8 MB of memory, since this is
	135	* the maximum mapped by the Linux kernel during initialization.
	136	*/
6d0f6bcf	137	#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
0f8c9768 WD	138	/*-----------------------------------------------------------------------
	139	* FLASH organization
	140	*/
6d0f6bcf JCPV	141	#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
6d0f6bcf JCPV	142	#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
0f8c9768	143
6d0f6bcf JCPV	144	#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
6d0f6bcf JCPV	145	#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
0f8c9768	146
6d0f6bcf JCPV	147	#define CONFIG_SYS_FLASH_WORD_SIZE unsigned char /* flash word size (width) */
	148	#define CONFIG_SYS_FLASH_ADDR0 0x0AA9 /* 1st address for flash config cycles */
	149	#define CONFIG_SYS_FLASH_ADDR1 0x0556 /* 2nd address for flash config cycles */
0f8c9768 WD	150	/*
	151	* The following defines are added for buggy IOP480 byte interface.
	152	* All other boards should use the standard values (CPCI405 etc.)
	153	*/
6d0f6bcf JCPV	154	#define CONFIG_SYS_FLASH_READ0 0x0002 /* 0 is standard */
	155	#define CONFIG_SYS_FLASH_READ1 0x0000 /* 1 is standard */
	156	#define CONFIG_SYS_FLASH_READ2 0x0004 /* 2 is standard */
0f8c9768	157
6d0f6bcf	158	#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
0f8c9768 WD	159
	160	#if 1 /* Use NVRAM for environment variables */
	161	/*-----------------------------------------------------------------------
	162	* NVRAM organization
	163	*/
9314cee6	164	#define CONFIG_ENV_IS_IN_NVRAM 1 /* use NVRAM for environment vars */
6d0f6bcf JCPV	165	#define CONFIG_SYS_NVRAM_BASE_ADDR 0x10000000 /* NVRAM base address */
6d0f6bcf JCPV	166	#define CONFIG_SYS_NVRAM_SIZE (321024) / NVRAM size */
0e8d1586 JCPV	167	#define CONFIG_ENV_SIZE 0x0400 /* Size of Environment vars */
0e8d1586 JCPV	168	#define CONFIG_ENV_ADDR \
6d0f6bcf JCPV	169	(CONFIG_SYS_NVRAM_BASE_ADDR+CONFIG_SYS_NVRAM_SIZE-CONFIG_ENV_SIZE) /* Env */
6d0f6bcf JCPV	170	#define CONFIG_SYS_VXWORKS_MAC_PTR (CONFIG_SYS_NVRAM_BASE_ADDR+0x7800) /* VxWorks eth-addr*/
0f8c9768 WD	171
	172	#else /* Use FLASH for environment variables */
	173
5a1aceb0	174	#define CONFIG_ENV_IS_IN_FLASH 1
0e8d1586 JCPV	175	#define CONFIG_ENV_OFFSET 0x00010000 /* Offset of Environment Sector */
0e8d1586 JCPV	176	#define CONFIG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */
0f8c9768	177
0e8d1586	178	#define CONFIG_ENV_SECT_SIZE 0x8000 /* see README - env sector total size */
0f8c9768 WD	179
	180	#endif
	181
	182	/*-----------------------------------------------------------------------
	183	* PCI stuff
	184	*/
	185	#define CONFIG_PCI /* include pci support */
	186	#undef CONFIG_PCI_PNP
	187
c837dcb1	188	#define CONFIG_NET_MULTI /* Multi ethernet cards support */
0f8c9768 WD	189
	190	#define CONFIG_TULIP
	191
6d0f6bcf JCPV	192	#define CONFIG_SYS_ETH_DEV_FN 0x0000
6d0f6bcf JCPV	193	#define CONFIG_SYS_ETH_IOBASE 0x0fff0000
0f8c9768	194
0f8c9768 WD	195	/*
	196	* Init Memory Controller:
	197	*
	198	* BR0/1 and OR0/1 (FLASH)
	199	*/
	200
	201	#define FLASH_BASE0_PRELIM 0xFFC00000 /* FLASH bank #0 */
	202	#define FLASH_BASE1_PRELIM 0xFFE00000 /* FLASH bank #1 */
	203
0f8c9768	204	#endif /* __CONFIG_H */