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0f8c9768 WD |
1 | /* |
2 | * (C) Copyright 2001 | |
3 | * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
c837dcb1 | 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
0f8c9768 WD |
16 | * GNU General Public License for more details. |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | /* | |
25 | * board/config.h - configuration options, board specific | |
26 | */ | |
27 | ||
28 | #ifndef __CONFIG_H | |
29 | #define __CONFIG_H | |
30 | ||
31 | /* | |
32 | * High Level Configuration Options | |
33 | * (easy to change) | |
34 | */ | |
35 | ||
36 | #define CONFIG_IOP480 1 /* This is a IOP480 CPU */ | |
c837dcb1 | 37 | #define CONFIG_ADCIOP 1 /* ...on a ADCIOP board */ |
0f8c9768 | 38 | |
c837dcb1 | 39 | #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ |
0f8c9768 | 40 | |
c837dcb1 | 41 | #define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */ |
0f8c9768 | 42 | |
c837dcb1 WD |
43 | #define CONFIG_CPUCLOCK 66 |
44 | #define CONFIG_BUSCLOCK (CONFIG_CPUCLOCK) | |
0f8c9768 | 45 | |
c837dcb1 | 46 | #define CONFIG_BAUDRATE 9600 |
0f8c9768 WD |
47 | #define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */ |
48 | #define CONFIG_BOOTCOMMAND "bootm ffc00000" /* autoboot command */ | |
49 | ||
c837dcb1 | 50 | #undef CONFIG_BOOTARGS |
0f8c9768 WD |
51 | |
52 | #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ | |
6d0f6bcf | 53 | #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ |
0f8c9768 WD |
54 | |
55 | #undef CONFIG_WATCHDOG /* watchdog disabled */ | |
56 | ||
c837dcb1 | 57 | #define CONFIG_PHY_ADDR 0 /* PHY address */ |
0f8c9768 WD |
58 | |
59 | #define CONFIG_IPADDR 10.0.18.222 | |
60 | #define CONFIG_SERVERIP 10.0.18.190 | |
61 | ||
11799434 JL |
62 | |
63 | /* | |
64 | * BOOTP options | |
65 | */ | |
66 | #define CONFIG_BOOTP_BOOTFILESIZE | |
67 | #define CONFIG_BOOTP_BOOTPATH | |
68 | #define CONFIG_BOOTP_GATEWAY | |
69 | #define CONFIG_BOOTP_HOSTNAME | |
70 | ||
498ff9a2 JL |
71 | /* |
72 | * Command line configuration. | |
73 | */ | |
74 | #include <config_cmd_default.h> | |
75 | ||
76 | #define CONFIG_CMD_DHCP | |
77 | #define CONFIG_CMD_IRQ | |
78 | #define CONFIG_CMD_ELF | |
79 | #define CONFIG_CMD_ASKENV | |
0f8c9768 | 80 | |
0f8c9768 WD |
81 | |
82 | /* | |
83 | * Miscellaneous configurable options | |
84 | */ | |
6d0f6bcf JCPV |
85 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
86 | #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ | |
498ff9a2 | 87 | #if defined(CONFIG_CMD_KGDB) |
6d0f6bcf | 88 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
0f8c9768 | 89 | #else |
6d0f6bcf | 90 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
0f8c9768 | 91 | #endif |
6d0f6bcf JCPV |
92 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
93 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
94 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ | |
0f8c9768 | 95 | |
6d0f6bcf | 96 | #define CONFIG_SYS_CONSOLE_INFO_QUIET 1 /* don't print console @ startup*/ |
0f8c9768 | 97 | |
6d0f6bcf JCPV |
98 | #define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */ |
99 | #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ | |
0f8c9768 WD |
100 | |
101 | /* The following table includes the supported baudrates */ | |
6d0f6bcf | 102 | #define CONFIG_SYS_BAUDRATE_TABLE \ |
8bde7f77 | 103 | { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200 } |
0f8c9768 | 104 | |
6d0f6bcf | 105 | #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ |
0f8c9768 | 106 | |
6d0f6bcf | 107 | #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ |
0f8c9768 WD |
108 | |
109 | #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ | |
110 | ||
111 | /*----------------------------------------------------------------------- | |
112 | * Definitions for initial stack pointer and data area (in DPRAM) | |
113 | */ | |
6d0f6bcf JCPV |
114 | #define CONFIG_SYS_INIT_RAM_ADDR 0x00df0000 /* inside of SDRAM */ |
115 | #define CONFIG_SYS_INIT_RAM_END 0x0f00 /* End of used area in RAM */ | |
116 | #define CONFIG_SYS_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */ | |
117 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) | |
118 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET | |
0f8c9768 WD |
119 | |
120 | /*----------------------------------------------------------------------- | |
121 | * Start addresses for the final memory configuration | |
122 | * (Set up by the startup code) | |
6d0f6bcf | 123 | * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 |
0f8c9768 | 124 | */ |
6d0f6bcf JCPV |
125 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 |
126 | #define CONFIG_SYS_FLASH_BASE 0xFFFD0000 | |
127 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE | |
128 | #define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */ | |
129 | #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ | |
0f8c9768 WD |
130 | |
131 | /* | |
132 | * For booting Linux, the board info and command line data | |
133 | * have to be in the first 8 MB of memory, since this is | |
134 | * the maximum mapped by the Linux kernel during initialization. | |
135 | */ | |
6d0f6bcf | 136 | #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
0f8c9768 WD |
137 | /*----------------------------------------------------------------------- |
138 | * FLASH organization | |
139 | */ | |
6d0f6bcf JCPV |
140 | #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ |
141 | #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ | |
0f8c9768 | 142 | |
6d0f6bcf JCPV |
143 | #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ |
144 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ | |
0f8c9768 | 145 | |
6d0f6bcf JCPV |
146 | #define CONFIG_SYS_FLASH_WORD_SIZE unsigned char /* flash word size (width) */ |
147 | #define CONFIG_SYS_FLASH_ADDR0 0x0AA9 /* 1st address for flash config cycles */ | |
148 | #define CONFIG_SYS_FLASH_ADDR1 0x0556 /* 2nd address for flash config cycles */ | |
0f8c9768 WD |
149 | /* |
150 | * The following defines are added for buggy IOP480 byte interface. | |
151 | * All other boards should use the standard values (CPCI405 etc.) | |
152 | */ | |
6d0f6bcf JCPV |
153 | #define CONFIG_SYS_FLASH_READ0 0x0002 /* 0 is standard */ |
154 | #define CONFIG_SYS_FLASH_READ1 0x0000 /* 1 is standard */ | |
155 | #define CONFIG_SYS_FLASH_READ2 0x0004 /* 2 is standard */ | |
0f8c9768 | 156 | |
6d0f6bcf | 157 | #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ |
0f8c9768 WD |
158 | |
159 | #if 1 /* Use NVRAM for environment variables */ | |
160 | /*----------------------------------------------------------------------- | |
161 | * NVRAM organization | |
162 | */ | |
9314cee6 | 163 | #define CONFIG_ENV_IS_IN_NVRAM 1 /* use NVRAM for environment vars */ |
6d0f6bcf JCPV |
164 | #define CONFIG_SYS_NVRAM_BASE_ADDR 0x10000000 /* NVRAM base address */ |
165 | #define CONFIG_SYS_NVRAM_SIZE (32*1024) /* NVRAM size */ | |
0e8d1586 JCPV |
166 | #define CONFIG_ENV_SIZE 0x0400 /* Size of Environment vars */ |
167 | #define CONFIG_ENV_ADDR \ | |
6d0f6bcf JCPV |
168 | (CONFIG_SYS_NVRAM_BASE_ADDR+CONFIG_SYS_NVRAM_SIZE-CONFIG_ENV_SIZE) /* Env */ |
169 | #define CONFIG_SYS_VXWORKS_MAC_PTR (CONFIG_SYS_NVRAM_BASE_ADDR+0x7800) /* VxWorks eth-addr*/ | |
0f8c9768 WD |
170 | |
171 | #else /* Use FLASH for environment variables */ | |
172 | ||
5a1aceb0 | 173 | #define CONFIG_ENV_IS_IN_FLASH 1 |
0e8d1586 JCPV |
174 | #define CONFIG_ENV_OFFSET 0x00010000 /* Offset of Environment Sector */ |
175 | #define CONFIG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */ | |
0f8c9768 | 176 | |
0e8d1586 | 177 | #define CONFIG_ENV_SECT_SIZE 0x8000 /* see README - env sector total size */ |
0f8c9768 WD |
178 | |
179 | #endif | |
180 | ||
181 | /*----------------------------------------------------------------------- | |
182 | * PCI stuff | |
183 | */ | |
184 | #define CONFIG_PCI /* include pci support */ | |
185 | #undef CONFIG_PCI_PNP | |
186 | ||
c837dcb1 | 187 | #define CONFIG_NET_MULTI /* Multi ethernet cards support */ |
0f8c9768 WD |
188 | |
189 | #define CONFIG_TULIP | |
190 | ||
6d0f6bcf JCPV |
191 | #define CONFIG_SYS_ETH_DEV_FN 0x0000 |
192 | #define CONFIG_SYS_ETH_IOBASE 0x0fff0000 | |
0f8c9768 | 193 | |
0f8c9768 WD |
194 | /* |
195 | * Init Memory Controller: | |
196 | * | |
197 | * BR0/1 and OR0/1 (FLASH) | |
198 | */ | |
199 | ||
200 | #define FLASH_BASE0_PRELIM 0xFFC00000 /* FLASH bank #0 */ | |
201 | #define FLASH_BASE1_PRELIM 0xFFE00000 /* FLASH bank #1 */ | |
202 | ||
203 | ||
204 | /* | |
205 | * Internal Definitions | |
206 | * | |
207 | * Boot Flags | |
208 | */ | |
209 | #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ | |
210 | #define BOOTFLAG_WARM 0x02 /* Software reboot */ | |
211 | ||
212 | #endif /* __CONFIG_H */ |