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78b123cd MB |
1 | /* |
2 | * Configuation settings for the Freescale M5271EVB | |
3 | * | |
4 | * Based on MC5272C3 and r5200 board configs | |
5 | * (C) Copyright 2006 Lab X Technologies <zachary.landau@labxtechnologies.com> | |
6 | * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de> | |
7 | * | |
8 | * See file CREDITS for list of people who contributed to this | |
9 | * project. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License as | |
13 | * published by the Free Software Foundation; either version 2 of | |
14 | * the License, or (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
24 | * MA 02111-1307 USA | |
25 | */ | |
26 | ||
27 | /* | |
28 | * board/config.h - configuration options, board specific | |
29 | */ | |
30 | ||
31 | #ifndef _M5271EVB_H | |
32 | #define _M5271EVB_H | |
33 | ||
78b123cd MB |
34 | /* |
35 | * High Level Configuration Options (easy to change) | |
36 | */ | |
37 | #define CONFIG_MCF52x2 /* define processor family */ | |
38 | #define CONFIG_M5271 /* define processor type */ | |
39 | #define CONFIG_M5271EVB /* define board type */ | |
40 | ||
f28e1bd9 | 41 | #define CONFIG_MCFTMR |
78b123cd | 42 | |
f28e1bd9 | 43 | #define CONFIG_MCFUART |
6d0f6bcf | 44 | #define CONFIG_SYS_UART_PORT (0) |
79e0799c | 45 | #define CONFIG_BAUDRATE 115200 |
6d0f6bcf | 46 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } |
78b123cd MB |
47 | |
48 | #undef CONFIG_WATCHDOG /* disable watchdog */ | |
49 | ||
50 | /* Configuration for environment | |
51 | * Environment is embedded in u-boot in the second sector of the flash | |
52 | */ | |
53 | #ifndef CONFIG_MONITOR_IS_IN_RAM | |
0e8d1586 | 54 | #define CONFIG_ENV_OFFSET 0x4000 |
78b123cd | 55 | #else |
0e8d1586 | 56 | #define CONFIG_ENV_ADDR 0xffe04000 |
67c31036 | 57 | #endif |
0e8d1586 | 58 | #define CONFIG_ENV_SECT_SIZE 0x2000 |
5a1aceb0 | 59 | #define CONFIG_ENV_IS_IN_FLASH 1 |
6d0f6bcf | 60 | #define CONFIG_SYS_USE_PPCENV /* Environment embedded in sect .ppcenv */ |
78b123cd | 61 | |
659e2f67 JL |
62 | /* |
63 | * BOOTP options | |
64 | */ | |
65 | #define CONFIG_BOOTP_BOOTFILESIZE | |
66 | #define CONFIG_BOOTP_BOOTPATH | |
67 | #define CONFIG_BOOTP_GATEWAY | |
68 | #define CONFIG_BOOTP_HOSTNAME | |
69 | ||
8353e139 JL |
70 | /* |
71 | * Command line configuration. | |
72 | */ | |
73 | #include <config_cmd_default.h> | |
74 | ||
75 | #define CONFIG_CMD_PING | |
76 | #define CONFIG_CMD_NET | |
f28e1bd9 TL |
77 | #define CONFIG_CMD_MII |
78 | #define CONFIG_CMD_ELF | |
79 | #define CONFIG_CMD_FLASH | |
80 | #define CONFIG_CMD_I2C | |
81 | #define CONFIG_CMD_MEMORY | |
82 | #define CONFIG_CMD_MISC | |
8353e139 JL |
83 | |
84 | #undef CONFIG_CMD_LOADS | |
85 | #undef CONFIG_CMD_LOADB | |
78b123cd | 86 | |
f28e1bd9 TL |
87 | #define CONFIG_MCFFEC |
88 | #ifdef CONFIG_MCFFEC | |
89 | # define CONFIG_NET_MULTI 1 | |
90 | # define CONFIG_MII 1 | |
0f3ba7e9 | 91 | # define CONFIG_MII_INIT 1 |
6d0f6bcf JCPV |
92 | # define CONFIG_SYS_DISCOVER_PHY |
93 | # define CONFIG_SYS_RX_ETH_BUFFER 8 | |
94 | # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN | |
f28e1bd9 | 95 | |
6d0f6bcf JCPV |
96 | # define CONFIG_SYS_FEC0_PINMUX 0 |
97 | # define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE | |
53677ef1 | 98 | # define MCFFEC_TOUT_LOOP 50000 |
6d0f6bcf JCPV |
99 | /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ |
100 | # ifndef CONFIG_SYS_DISCOVER_PHY | |
f28e1bd9 TL |
101 | # define FECDUPLEX FULL |
102 | # define FECSPEED _100BASET | |
103 | # else | |
6d0f6bcf JCPV |
104 | # ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN |
105 | # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN | |
f28e1bd9 | 106 | # endif |
6d0f6bcf | 107 | # endif /* CONFIG_SYS_DISCOVER_PHY */ |
f28e1bd9 TL |
108 | #endif |
109 | ||
110 | /* I2C */ | |
111 | #define CONFIG_FSL_I2C | |
112 | #define CONFIG_HARD_I2C /* I2C with hw support */ | |
113 | #undef CONFIG_SOFT_I2C /* I2C bit-banged */ | |
6d0f6bcf JCPV |
114 | #define CONFIG_SYS_I2C_SPEED 80000 |
115 | #define CONFIG_SYS_I2C_SLAVE 0x7F | |
116 | #define CONFIG_SYS_I2C_OFFSET 0x00000300 | |
117 | #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR | |
f28e1bd9 TL |
118 | |
119 | #define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */ | |
120 | #define CONFIG_BOOTFILE "u-boot.bin" | |
121 | #ifdef CONFIG_MCFFEC | |
122 | # define CONFIG_NET_RETRY_COUNT 5 | |
123 | # define CONFIG_ETHADDR 00:e0:0c:bc:e5:60 | |
124 | # define CONFIG_IPADDR 192.162.1.2 | |
125 | # define CONFIG_NETMASK 255.255.255.0 | |
126 | # define CONFIG_SERVERIP 192.162.1.1 | |
127 | # define CONFIG_GATEWAYIP 192.162.1.1 | |
128 | # define CONFIG_OVERWRITE_ETHADDR_ONCE | |
129 | #endif /* FEC_ENET */ | |
130 | ||
131 | #define CONFIG_HOSTNAME M5235EVB | |
132 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
133 | "netdev=eth0\0" \ | |
134 | "loadaddr=10000\0" \ | |
135 | "u-boot=u-boot.bin\0" \ | |
136 | "load=tftp ${loadaddr) ${u-boot}\0" \ | |
137 | "upd=run load; run prog\0" \ | |
138 | "prog=prot off ffe00000 ffe2ffff;" \ | |
139 | "era ffe00000 ffe2ffff;" \ | |
140 | "cp.b ${loadaddr} 0 ${filesize};" \ | |
141 | "save\0" \ | |
142 | "" | |
78b123cd | 143 | |
6d0f6bcf JCPV |
144 | #define CONFIG_SYS_PROMPT "=> " |
145 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ | |
78b123cd | 146 | |
8353e139 | 147 | #if defined(CONFIG_CMD_KGDB) |
6d0f6bcf | 148 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
78b123cd | 149 | #else |
6d0f6bcf | 150 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
78b123cd | 151 | #endif |
6d0f6bcf JCPV |
152 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
153 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
154 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ | |
78b123cd | 155 | |
6d0f6bcf | 156 | #define CONFIG_SYS_LOAD_ADDR 0x00100000 |
78b123cd | 157 | |
6d0f6bcf JCPV |
158 | #define CONFIG_SYS_MEMTEST_START 0x400 |
159 | #define CONFIG_SYS_MEMTEST_END 0x380000 | |
78b123cd | 160 | |
6d0f6bcf JCPV |
161 | #define CONFIG_SYS_HZ 1000000 |
162 | #define CONFIG_SYS_CLK 100000000 | |
78b123cd MB |
163 | |
164 | /* | |
165 | * Low Level Configuration Settings | |
166 | * (address mappings, register initial values, etc.) | |
167 | * You should know what you are doing if you make changes here. | |
168 | */ | |
169 | ||
6d0f6bcf | 170 | #define CONFIG_SYS_MBAR 0x40000000 /* Register Base Addrs */ |
78b123cd | 171 | |
78b123cd MB |
172 | /* |
173 | * Definitions for initial stack pointer and data area (in DPRAM) | |
174 | */ | |
6d0f6bcf JCPV |
175 | #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 |
176 | #define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */ | |
177 | #define CONFIG_SYS_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */ | |
178 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) | |
179 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET | |
78b123cd MB |
180 | |
181 | /* | |
182 | * Start addresses for the final memory configuration | |
183 | * (Set up by the startup code) | |
6d0f6bcf | 184 | * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 |
78b123cd | 185 | */ |
6d0f6bcf JCPV |
186 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 |
187 | #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ | |
188 | #define CONFIG_SYS_FLASH_BASE 0xffe00000 | |
78b123cd MB |
189 | |
190 | #ifdef CONFIG_MONITOR_IS_IN_RAM | |
6d0f6bcf | 191 | #define CONFIG_SYS_MONITOR_BASE 0x20000 |
78b123cd | 192 | #else |
6d0f6bcf | 193 | #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) |
78b123cd MB |
194 | #endif |
195 | ||
6d0f6bcf JCPV |
196 | #define CONFIG_SYS_MONITOR_LEN 0x40000 |
197 | #define CONFIG_SYS_MALLOC_LEN (256 << 10) | |
198 | #define CONFIG_SYS_BOOTPARAMS_LEN (64*1024) | |
78b123cd MB |
199 | |
200 | /* | |
201 | * For booting Linux, the board info and command line data | |
202 | * have to be in the first 8 MB of memory, since this is | |
203 | * the maximum mapped by the Linux kernel during initialization ?? | |
204 | */ | |
6d0f6bcf | 205 | #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) |
78b123cd MB |
206 | |
207 | /* FLASH organization */ | |
6d0f6bcf JCPV |
208 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
209 | #define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */ | |
210 | #define CONFIG_SYS_FLASH_ERASE_TOUT 1000 | |
78b123cd | 211 | |
6d0f6bcf | 212 | #define CONFIG_SYS_FLASH_CFI 1 |
00b1883a | 213 | #define CONFIG_FLASH_CFI_DRIVER 1 |
6d0f6bcf | 214 | #define CONFIG_SYS_FLASH_SIZE 0x200000 |
78b123cd MB |
215 | |
216 | /* Cache Configuration */ | |
6d0f6bcf | 217 | #define CONFIG_SYS_CACHELINE_SIZE 16 |
78b123cd MB |
218 | |
219 | /* Port configuration */ | |
6d0f6bcf | 220 | #define CONFIG_SYS_FECI2C 0xF0 |
78b123cd | 221 | |
f28e1bd9 | 222 | #endif /* _M5271EVB_H */ |