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rename CFG_ macros to CONFIG_SYS
[people/ms/u-boot.git] / include / configs / M5282EVB.h
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1/*
2 * Configuation settings for the Motorola MC5282EVB board.
3 *
4 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25/*
26 * board/config.h - configuration options, board specific
27 */
28
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29#ifndef _CONFIG_M5282EVB_H
30#define _CONFIG_M5282EVB_H
31
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32/*
33 * High Level Configuration Options
34 * (easy to change)
35 */
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36#define CONFIG_MCF52x2 /* define processor family */
37#define CONFIG_M5282 /* define processor type */
bf9e3b38 38
f28e1bd9 39#define CONFIG_MCFTMR
bf9e3b38 40
f28e1bd9 41#define CONFIG_MCFUART
6d0f6bcf 42#define CONFIG_SYS_UART_PORT (0)
79e0799c 43#define CONFIG_BAUDRATE 115200
6d0f6bcf 44#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
4e5ca3eb 45
f28e1bd9 46#undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */
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47
48/* Configuration for environment
49 * Environment is embedded in u-boot in the second sector of the flash
50 */
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51#define CONFIG_ENV_ADDR 0xffe04000
52#define CONFIG_ENV_SIZE 0x2000
5a1aceb0 53#define CONFIG_ENV_IS_IN_FLASH 1
bf9e3b38 54
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55/*
56 * BOOTP options
57 */
58#define CONFIG_BOOTP_BOOTFILESIZE
59#define CONFIG_BOOTP_BOOTPATH
60#define CONFIG_BOOTP_GATEWAY
61#define CONFIG_BOOTP_HOSTNAME
62
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63/*
64 * Command line configuration.
65 */
66#include <config_cmd_default.h>
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67#define CONFIG_CMD_NET
68#define CONFIG_CMD_PING
69#define CONFIG_CMD_MII
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70
71#undef CONFIG_CMD_LOADS
72#undef CONFIG_CMD_LOADB
73
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74#define CONFIG_MCFFEC
75#ifdef CONFIG_MCFFEC
76# define CONFIG_NET_MULTI 1
77# define CONFIG_MII 1
0f3ba7e9 78# define CONFIG_MII_INIT 1
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79# define CONFIG_SYS_DISCOVER_PHY
80# define CONFIG_SYS_RX_ETH_BUFFER 8
81# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
f28e1bd9 82
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83# define CONFIG_SYS_FEC0_PINMUX 0
84# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
53677ef1 85# define MCFFEC_TOUT_LOOP 50000
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86/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
87# ifndef CONFIG_SYS_DISCOVER_PHY
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88# define FECDUPLEX FULL
89# define FECSPEED _100BASET
90# else
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91# ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
92# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
f28e1bd9 93# endif
6d0f6bcf 94# endif /* CONFIG_SYS_DISCOVER_PHY */
f28e1bd9 95#endif
bf9e3b38 96
bf9e3b38 97#define CONFIG_BOOTDELAY 5
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98#ifdef CONFIG_MCFFEC
99# define CONFIG_ETHADDR 00:e0:0c:bc:e5:60
100# define CONFIG_IPADDR 192.162.1.2
101# define CONFIG_NETMASK 255.255.255.0
102# define CONFIG_SERVERIP 192.162.1.1
103# define CONFIG_GATEWAYIP 192.162.1.1
104# define CONFIG_OVERWRITE_ETHADDR_ONCE
105#endif /* CONFIG_MCFFEC */
106
4cb4e654 107#define CONFIG_HOSTNAME M5282EVB
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108#define CONFIG_EXTRA_ENV_SETTINGS \
109 "netdev=eth0\0" \
110 "loadaddr=10000\0" \
111 "u-boot=u-boot.bin\0" \
112 "load=tftp ${loadaddr) ${u-boot}\0" \
113 "upd=run load; run prog\0" \
114 "prog=prot off ffe00000 ffe3ffff;" \
115 "era ffe00000 ffe3ffff;" \
116 "cp.b ${loadaddr} ffe00000 ${filesize};"\
117 "save\0" \
118 ""
bf9e3b38 119
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120#define CONFIG_SYS_PROMPT "-> "
121#define CONFIG_SYS_LONGHELP /* undef to save memory */
bf9e3b38 122
8353e139 123#if defined(CONFIG_CMD_KGDB)
6d0f6bcf 124#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
bf9e3b38 125#else
6d0f6bcf 126#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
bf9e3b38 127#endif
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128#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
129#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
130#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
bf9e3b38 131
6d0f6bcf 132#define CONFIG_SYS_LOAD_ADDR 0x20000
bf9e3b38 133
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134#define CONFIG_SYS_MEMTEST_START 0x400
135#define CONFIG_SYS_MEMTEST_END 0x380000
bf9e3b38 136
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137#define CONFIG_SYS_HZ 1000
138#define CONFIG_SYS_CLK 64000000
bf9e3b38 139
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140/* PLL Configuration: Ext Clock * 6 (see table 9-4 of MCF user manual) */
141
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142#define CONFIG_SYS_MFD 0x02 /* PLL Multiplication Factor Devider */
143#define CONFIG_SYS_RFD 0x00 /* PLL Reduce Frecuency Devider */
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144
145/*
146 * Low Level Configuration Settings
147 * (address mappings, register initial values, etc.)
148 * You should know what you are doing if you make changes here.
149 */
6d0f6bcf 150#define CONFIG_SYS_MBAR 0x40000000
bf9e3b38 151
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152/*-----------------------------------------------------------------------
153 * Definitions for initial stack pointer and data area (in DPRAM)
154 */
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155#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
156#define CONFIG_SYS_INIT_RAM_END 0x10000 /* End of used area in internal SRAM */
157#define CONFIG_SYS_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
158#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
159#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
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160
161/*-----------------------------------------------------------------------
162 * Start addresses for the final memory configuration
163 * (Set up by the startup code)
6d0f6bcf 164 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
bf9e3b38 165 */
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166#define CONFIG_SYS_SDRAM_BASE 0x00000000
167#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
168#define CONFIG_SYS_FLASH_BASE 0xffe00000
169#define CONFIG_SYS_INT_FLASH_BASE 0xf0000000
170#define CONFIG_SYS_INT_FLASH_ENABLE 0x21
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171
172/* If M5282 port is fully implemented the monitor base will be behind
173 * the vector table. */
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174#if (TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE)
175#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
f28e1bd9 176#else
6d0f6bcf 177#define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x418) /* 24 Byte for CFM-Config */
f28e1bd9 178#endif
bf9e3b38 179
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180#define CONFIG_SYS_MONITOR_LEN 0x20000
181#define CONFIG_SYS_MALLOC_LEN (256 << 10)
182#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
bf9e3b38 183
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184/*
185 * For booting Linux, the board info and command line data
186 * have to be in the first 8 MB of memory, since this is
187 * the maximum mapped by the Linux kernel during initialization ??
188 */
6d0f6bcf 189#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
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190
191/*-----------------------------------------------------------------------
192 * FLASH organization
193 */
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194#define CONFIG_SYS_FLASH_CFI
195#ifdef CONFIG_SYS_FLASH_CFI
f28e1bd9 196
00b1883a 197# define CONFIG_FLASH_CFI_DRIVER 1
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198# define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */
199# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
200# define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
201# define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */
202# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
203# define CONFIG_SYS_FLASH_CHECKSUM
204# define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
f28e1bd9 205#endif
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206
207/*-----------------------------------------------------------------------
208 * Cache Configuration
209 */
6d0f6bcf 210#define CONFIG_SYS_CACHELINE_SIZE 16
bf9e3b38 211
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212/*-----------------------------------------------------------------------
213 * Memory bank definitions
214 */
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215#define CONFIG_SYS_CS0_BASE CONFIG_SYS_FLASH_BASE
216#define CONFIG_SYS_CS0_SIZE 2*1024*1024
217#define CONFIG_SYS_CS0_WIDTH 16
218#define CONFIG_SYS_CS0_RO 0
219#define CONFIG_SYS_CS0_WS 6
f28e1bd9 220/*
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221#define CONFIG_SYS_CS3_BASE 0xE0000000
222#define CONFIG_SYS_CS3_SIZE 1*1024*1024
223#define CONFIG_SYS_CS3_WIDTH 16
224#define CONFIG_SYS_CS3_RO 0
225#define CONFIG_SYS_CS3_WS 6
f28e1bd9 226*/
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227/*-----------------------------------------------------------------------
228 * Port configuration
229 */
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230#define CONFIG_SYS_PACNT 0x0000000 /* Port A D[31:24] */
231#define CONFIG_SYS_PADDR 0x0000000
232#define CONFIG_SYS_PADAT 0x0000000
233
234#define CONFIG_SYS_PBCNT 0x0000000 /* Port B D[23:16] */
235#define CONFIG_SYS_PBDDR 0x0000000
236#define CONFIG_SYS_PBDAT 0x0000000
237
238#define CONFIG_SYS_PCCNT 0x0000000 /* Port C D[15:08] */
239#define CONFIG_SYS_PCDDR 0x0000000
240#define CONFIG_SYS_PCDAT 0x0000000
241
242#define CONFIG_SYS_PDCNT 0x0000000 /* Port D D[07:00] */
243#define CONFIG_SYS_PCDDR 0x0000000
244#define CONFIG_SYS_PCDAT 0x0000000
245
246#define CONFIG_SYS_PEHLPAR 0xC0
247#define CONFIG_SYS_PUAPAR 0x0F /* UA0..UA3 = Uart 0 +1 */
248#define CONFIG_SYS_DDRUA 0x05
249#define CONFIG_SYS_PJPAR 0xFF
4e5ca3eb 250
f28e1bd9 251#endif /* _CONFIG_M5282EVB_H */