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1079432e SL |
1 | /* |
2 | * (C) Copyright 2008 Sergey Lapin <slapin@ossfans.org> | |
3 | * | |
4 | * Configuation settings for the AFEB9260 board. | |
5 | * Based on configuration for AT91SAM9260-EK | |
6 | * | |
7 | * See file CREDITS for list of people who contributed to this | |
8 | * project. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License as | |
12 | * published by the Free Software Foundation; either version 2 of | |
13 | * the License, or (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
23 | * MA 02111-1307 USA | |
24 | */ | |
25 | ||
26 | #ifndef __CONFIG_H | |
27 | #define __CONFIG_H | |
282e27c0 SL |
28 | #define CONFIG_AT91SAM9260 /* Atmel AT91SAM9260 SoC*/ |
29 | #include <asm/arch/hardware.h> | |
1079432e | 30 | |
282e27c0 | 31 | #define CONFIG_SYS_TEXT_BASE 0x21f00000 |
425de62d | 32 | |
1079432e | 33 | /* ARM asynchronous clock */ |
7c966a8b | 34 | #define CONFIG_SYS_AT91_MAIN_CLOCK 18429952 /* from 18.432 MHz crystal */ |
282e27c0 SL |
35 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 |
36 | #define CONFIG_SYS_HZ 1000 | |
1079432e | 37 | |
282e27c0 SL |
38 | #define CONFIG_BOARD_EARLY_INIT_F |
39 | #define CONFIG_DISPLAY_CPUINFO | |
40 | ||
41 | #define CONFIG_AFEB9260 /* AFEB9260 Board */ | |
dc39ae95 | 42 | #define CONFIG_ARCH_CPU_INIT |
1079432e SL |
43 | |
44 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ | |
45 | #define CONFIG_SETUP_MEMORY_TAGS 1 | |
46 | #define CONFIG_INITRD_TAG 1 | |
47 | ||
48 | #define CONFIG_SKIP_LOWLEVEL_INIT | |
1079432e SL |
49 | |
50 | /* | |
51 | * Hardware drivers | |
52 | */ | |
282e27c0 SL |
53 | #define CONFIG_ATMEL_LEGACY |
54 | #define CONFIG_AT91_GPIO | |
55 | #define CONFIG_AT91_PULLUP 1 | |
56 | ||
57 | #define CONFIG_ATMEL_USART | |
58 | #define CONFIG_USART_BASE ATMEL_BASE_DBGU | |
59 | #define CONFIG_USART_ID ATMEL_ID_SYS | |
60 | #define CONFIG_USART3 /* USART 3 is DBGU */ | |
1079432e SL |
61 | |
62 | #define CONFIG_BOOTDELAY 3 | |
63 | ||
64 | /* | |
65 | * BOOTP options | |
66 | */ | |
67 | #define CONFIG_BOOTP_BOOTFILESIZE 1 | |
68 | #define CONFIG_BOOTP_BOOTPATH 1 | |
69 | #define CONFIG_BOOTP_GATEWAY 1 | |
70 | #define CONFIG_BOOTP_HOSTNAME 1 | |
71 | ||
72 | /* | |
73 | * Command line configuration. | |
74 | */ | |
75 | #include <config_cmd_default.h> | |
76 | #undef CONFIG_CMD_BDI | |
1079432e | 77 | #undef CONFIG_CMD_FPGA |
74de7aef | 78 | #undef CONFIG_CMD_IMI |
1079432e | 79 | #undef CONFIG_CMD_IMLS |
74de7aef WD |
80 | #undef CONFIG_CMD_LOADS |
81 | #undef CONFIG_CMD_SOURCE | |
1079432e | 82 | |
282e27c0 SL |
83 | #define CONFIG_CMD_PING |
84 | #define CONFIG_CMD_DHCP | |
1079432e | 85 | |
282e27c0 SL |
86 | #define CONFIG_CMD_NAND |
87 | #define CONFIG_CMD_USB | |
1079432e SL |
88 | |
89 | /* SDRAM */ | |
90 | #define CONFIG_NR_DRAM_BANKS 1 | |
282e27c0 SL |
91 | #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 |
92 | #define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 megs */ | |
1079432e SL |
93 | |
94 | /* DataFlash */ | |
4758ebdd | 95 | #define CONFIG_ATMEL_DATAFLASH_SPI |
282e27c0 | 96 | #define CONFIG_HAS_DATAFLASH |
1079432e SL |
97 | #define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ) |
98 | #define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 | |
99 | #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ | |
100 | #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */ | |
101 | #define AT91_SPI_CLK 15000000 | |
102 | #define DATAFLASH_TCSS (0x1a << 16) | |
103 | #define DATAFLASH_TCHS (0x1 << 24) | |
104 | ||
105 | /* NAND flash */ | |
74c076d6 JCPV |
106 | #ifdef CONFIG_CMD_NAND |
107 | #define CONFIG_NAND_ATMEL | |
1079432e | 108 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
282e27c0 SL |
109 | #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 |
110 | #define CONFIG_SYS_NAND_DBW_8 | |
74c076d6 JCPV |
111 | /* our ALE is AD21 */ |
112 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) | |
113 | /* our CLE is AD22 */ | |
114 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) | |
115 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 | |
116 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 | |
2eb99ca8 | 117 | |
74c076d6 | 118 | #endif |
1079432e SL |
119 | |
120 | /* NOR flash - no real flash on this board */ | |
282e27c0 | 121 | #define CONFIG_SYS_NO_FLASH |
1079432e SL |
122 | |
123 | /* Ethernet */ | |
282e27c0 SL |
124 | #define CONFIG_MACB |
125 | #define CONFIG_RESET_PHY_R | |
1079432e | 126 | |
1079432e SL |
127 | #define CONFIG_NET_RETRY_COUNT 20 |
128 | ||
129 | /* USB */ | |
2b7178af | 130 | #define CONFIG_USB_ATMEL |
282e27c0 SL |
131 | #define CONFIG_USB_OHCI_NEW |
132 | #define CONFIG_DOS_PARTITION | |
133 | #define CONFIG_SYS_USB_OHCI_CPU_INIT | |
1079432e SL |
134 | #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */ |
135 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" | |
136 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 | |
282e27c0 | 137 | #define CONFIG_USB_STORAGE |
1079432e SL |
138 | |
139 | #define CONFIG_SYS_LOAD_ADDR 0x21000000 /* load address */ | |
140 | ||
282e27c0 | 141 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
1079432e SL |
142 | #define CONFIG_SYS_MEMTEST_END 0x21e00000 |
143 | ||
282e27c0 SL |
144 | #define CONFIG_SYS_USE_DATAFLASH_CS1 |
145 | #define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM1 + 0x1000 -\ | |
146 | GENERATED_GBL_DATA_SIZE) | |
1079432e SL |
147 | |
148 | /* bootstrap + u-boot + env + linux in dataflash on CS1 */ | |
282e27c0 | 149 | #define CONFIG_ENV_IS_IN_DATAFLASH |
1079432e SL |
150 | #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + 0x8400) |
151 | #define CONFIG_ENV_OFFSET 0x4200 | |
152 | #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + CONFIG_ENV_OFFSET) | |
153 | #define CONFIG_ENV_SIZE 0x4200 | |
154 | #define CONFIG_BOOTCOMMAND "nand read 0x21000000 0xa0000 0x200000; bootm" | |
155 | #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ | |
156 | "root=/dev/mtdblock2 " \ | |
157 | "rw rootfstype=jffs2 panic=20" | |
158 | ||
159 | #define CONFIG_BAUDRATE 115200 | |
160 | #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } | |
161 | ||
162 | #define CONFIG_SYS_PROMPT "U-Boot> " | |
163 | #define CONFIG_SYS_CBSIZE 256 | |
164 | #define CONFIG_SYS_MAXARGS 16 | |
165 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
282e27c0 SL |
166 | #define CONFIG_SYS_LONGHELP |
167 | #define CONFIG_CMDLINE_EDITING | |
1079432e | 168 | |
1079432e SL |
169 | /* |
170 | * Size of malloc() pool | |
171 | */ | |
172 | #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) | |
1079432e SL |
173 | |
174 | #define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ | |
175 | ||
176 | #ifdef CONFIG_USE_IRQ | |
177 | #error CONFIG_USE_IRQ not supported | |
178 | #endif | |
1079432e | 179 | #endif |