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5289e83a CN |
1 | /* |
2 | * am335x_evm.h | |
3 | * | |
4 | * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License as | |
8 | * published by the Free Software Foundation version 2. | |
9 | * | |
10 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | |
11 | * kind, whether express or implied; without even the implied warranty | |
12 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | */ | |
15 | ||
16 | #ifndef __CONFIG_AM335X_EVM_H | |
17 | #define __CONFIG_AM335X_EVM_H | |
18 | ||
f16da746 | 19 | #define CONFIG_AM33XX |
5289e83a CN |
20 | |
21 | #include <asm/arch/cpu.h> | |
22 | #include <asm/arch/hardware.h> | |
23 | ||
93042960 CN |
24 | #define CONFIG_DMA_COHERENT |
25 | #define CONFIG_DMA_COHERENT_SIZE (1 << 20) | |
26 | ||
7bf038ec TR |
27 | #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ |
28 | #define CONFIG_SYS_MALLOC_LEN (1024 << 10) | |
29 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ | |
30 | #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ | |
750b4bfe | 31 | #define CONFIG_SYS_PROMPT "U-Boot# " |
044fc14b | 32 | #define CONFIG_BOARD_LATE_INIT |
5289e83a | 33 | #define CONFIG_SYS_NO_FLASH |
a88f70b9 | 34 | #define MACH_TYPE_TIAM335EVM 3589 /* Until the next sync */ |
5289e83a CN |
35 | #define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM |
36 | ||
7bf038ec TR |
37 | #define CONFIG_OF_LIBFDT |
38 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ | |
39 | #define CONFIG_SETUP_MEMORY_TAGS | |
40 | #define CONFIG_INITRD_TAG | |
41 | ||
42 | /* commands to include */ | |
43 | #include <config_cmd_default.h> | |
44 | ||
5289e83a CN |
45 | #define CONFIG_CMD_ASKENV |
46 | #define CONFIG_VERSION_VARIABLE | |
47 | ||
48 | /* set to negative value for no autoboot */ | |
3580777b | 49 | #define CONFIG_BOOTDELAY 1 |
044fc14b TR |
50 | #define CONFIG_ENV_VARS_UBOOT_CONFIG |
51 | #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG | |
5289e83a | 52 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
7bf038ec TR |
53 | "loadaddr=0x80200000\0" \ |
54 | "fdtaddr=0x80F80000\0" \ | |
f170899f | 55 | "fdt_high=0xffffffff\0" \ |
7bf038ec TR |
56 | "rdaddr=0x81000000\0" \ |
57 | "bootfile=/boot/uImage\0" \ | |
044fc14b | 58 | "fdtfile=\0" \ |
7bf038ec TR |
59 | "console=ttyO0,115200n8\0" \ |
60 | "optargs=\0" \ | |
61 | "mmcdev=0\0" \ | |
3580777b | 62 | "mmcroot=/dev/mmcblk0p2 ro\0" \ |
7bf038ec | 63 | "mmcrootfstype=ext4 rootwait\0" \ |
73c1f4af CM |
64 | "nandroot=ubi0:rootfs rw ubi.mtd=7,2048\0" \ |
65 | "nandrootfstype=ubifs rootwait=1\0" \ | |
66 | "nandsrcaddr=0x280000\0" \ | |
67 | "nandimgsize=0x500000\0" \ | |
7bf038ec TR |
68 | "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \ |
69 | "ramrootfstype=ext2\0" \ | |
70 | "mmcargs=setenv bootargs console=${console} " \ | |
71 | "${optargs} " \ | |
72 | "root=${mmcroot} " \ | |
73 | "rootfstype=${mmcrootfstype}\0" \ | |
73c1f4af CM |
74 | "nandargs=setenv bootargs console=${console} " \ |
75 | "${optargs} " \ | |
76 | "root=${nandroot} " \ | |
77 | "rootfstype=${nandrootfstype}\0" \ | |
7bf038ec TR |
78 | "bootenv=uEnv.txt\0" \ |
79 | "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ | |
80 | "importbootenv=echo Importing environment from mmc ...; " \ | |
81 | "env import -t $loadaddr $filesize\0" \ | |
82 | "ramargs=setenv bootargs console=${console} " \ | |
83 | "${optargs} " \ | |
84 | "root=${ramroot} " \ | |
85 | "rootfstype=${ramrootfstype}\0" \ | |
86 | "loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \ | |
87 | "loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \ | |
88 | "loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} ${bootfile}\0" \ | |
89 | "mmcboot=echo Booting from mmc ...; " \ | |
90 | "run mmcargs; " \ | |
91 | "bootm ${loadaddr}\0" \ | |
73c1f4af CM |
92 | "nandboot=echo Booting from nand ...; " \ |
93 | "run nandargs; " \ | |
94 | "nand read ${loadaddr} ${nandsrcaddr} ${nandimgsize}; " \ | |
95 | "bootm ${loadaddr}\0" \ | |
7bf038ec TR |
96 | "ramboot=echo Booting from ramdisk ...; " \ |
97 | "run ramargs; " \ | |
98 | "bootm ${loadaddr}\0" \ | |
044fc14b TR |
99 | "findfdt="\ |
100 | "if test $board_name = A335BONE; then " \ | |
101 | "setenv fdtfile am335x-bone.dtb; fi; " \ | |
102 | "if test $board_name = A33515BB; then " \ | |
103 | "setenv fdtfile am335x-evm.dtb; fi; " \ | |
104 | "if test $board_name = A335X_SK; then " \ | |
105 | "setenv fdtfile am335x-evmsk.dtb; fi\0" \ | |
7bf038ec TR |
106 | |
107 | #define CONFIG_BOOTCOMMAND \ | |
66968110 | 108 | "mmc dev ${mmcdev}; if mmc rescan; then " \ |
7bf038ec TR |
109 | "echo SD/MMC found on device ${mmcdev};" \ |
110 | "if run loadbootenv; then " \ | |
111 | "echo Loaded environment from ${bootenv};" \ | |
112 | "run importbootenv;" \ | |
113 | "fi;" \ | |
114 | "if test -n $uenvcmd; then " \ | |
115 | "echo Running uenvcmd ...;" \ | |
116 | "run uenvcmd;" \ | |
117 | "fi;" \ | |
118 | "if run loaduimage; then " \ | |
119 | "run mmcboot;" \ | |
120 | "fi;" \ | |
73c1f4af CM |
121 | "else " \ |
122 | "run nandboot;" \ | |
7bf038ec | 123 | "fi;" \ |
5289e83a CN |
124 | |
125 | /* Clock Defines */ | |
126 | #define V_OSCK 24000000 /* Clock output from T2 */ | |
750b4bfe | 127 | #define V_SCLK (V_OSCK) |
5289e83a | 128 | |
5289e83a CN |
129 | #define CONFIG_CMD_ECHO |
130 | ||
131 | /* max number of command args */ | |
750b4bfe | 132 | #define CONFIG_SYS_MAXARGS 16 |
5289e83a CN |
133 | |
134 | /* Console I/O Buffer Size */ | |
135 | #define CONFIG_SYS_CBSIZE 512 | |
136 | ||
137 | /* Print Buffer Size */ | |
138 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ | |
139 | + sizeof(CONFIG_SYS_PROMPT) + 16) | |
140 | ||
141 | /* Boot Argument Buffer Size */ | |
142 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
143 | ||
144 | /* | |
145 | * memtest works on 8 MB in DRAM after skipping 32MB from | |
146 | * start addr of ram disk | |
147 | */ | |
148 | #define CONFIG_SYS_MEMTEST_START (PHYS_DRAM_1 + (64 * 1024 * 1024)) | |
149 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \ | |
150 | + (8 * 1024 * 1024)) | |
151 | ||
5289e83a CN |
152 | #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */ |
153 | #define CONFIG_SYS_HZ 1000 /* 1ms clock */ | |
154 | ||
876bdd6d CN |
155 | #define CONFIG_MMC |
156 | #define CONFIG_GENERIC_MMC | |
157 | #define CONFIG_OMAP_HSMMC | |
158 | #define CONFIG_CMD_MMC | |
159 | #define CONFIG_DOS_PARTITION | |
160 | #define CONFIG_CMD_FAT | |
161 | #define CONFIG_CMD_EXT2 | |
162 | ||
a4a99fff TR |
163 | #define CONFIG_SPI |
164 | #define CONFIG_OMAP3_SPI | |
165 | #define CONFIG_MTD_DEVICE | |
166 | #define CONFIG_SPI_FLASH | |
167 | #define CONFIG_SPI_FLASH_WINBOND | |
168 | #define CONFIG_CMD_SF | |
169 | #define CONFIG_SF_DEFAULT_SPEED (24000000) | |
170 | ||
5289e83a CN |
171 | /* Physical Memory Map */ |
172 | #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ | |
173 | #define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */ | |
5289e83a CN |
174 | #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ |
175 | ||
176 | #define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1 | |
41aebf81 | 177 | #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ |
5289e83a CN |
178 | GENERATED_GBL_DATA_SIZE) |
179 | /* Platform/Board specific defs */ | |
5289e83a CN |
180 | #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ |
181 | #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ | |
182 | #define CONFIG_SYS_HZ 1000 | |
183 | ||
184 | /* NS16550 Configuration */ | |
185 | #define CONFIG_SYS_NS16550 | |
186 | #define CONFIG_SYS_NS16550_SERIAL | |
c3f8318f | 187 | #define CONFIG_SERIAL_MULTI |
5289e83a CN |
188 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) |
189 | #define CONFIG_SYS_NS16550_CLK (48000000) | |
190 | #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ | |
c3f8318f AB |
191 | #define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ |
192 | #define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */ | |
193 | #define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ | |
194 | #define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ | |
195 | #define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ | |
5289e83a | 196 | |
b4116ede PR |
197 | /* I2C Configuration */ |
198 | #define CONFIG_I2C | |
199 | #define CONFIG_CMD_I2C | |
200 | #define CONFIG_HARD_I2C | |
201 | #define CONFIG_SYS_I2C_SPEED 100000 | |
202 | #define CONFIG_SYS_I2C_SLAVE 1 | |
d3decdeb | 203 | #define CONFIG_I2C_MULTI_BUS |
b4116ede | 204 | #define CONFIG_DRIVER_OMAP24XX_I2C |
726c05d2 | 205 | #define CONFIG_CMD_EEPROM |
a4a99fff | 206 | #define CONFIG_ENV_EEPROM_IS_ON_I2C |
726c05d2 TR |
207 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ |
208 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 | |
209 | #define CONFIG_SYS_I2C_MULTI_EEPROMS | |
b4116ede | 210 | |
308252ad MV |
211 | #define CONFIG_OMAP_GPIO |
212 | ||
5289e83a CN |
213 | #define CONFIG_BAUDRATE 115200 |
214 | #define CONFIG_SYS_BAUDRATE_TABLE { 110, 300, 600, 1200, 2400, \ | |
215 | 4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 } | |
216 | ||
c3f8318f | 217 | #define CONFIG_ENV_OVERWRITE 1 |
5289e83a CN |
218 | #define CONFIG_SYS_CONSOLE_INFO_QUIET |
219 | ||
220 | #define CONFIG_ENV_IS_NOWHERE | |
221 | ||
8a8f084e CN |
222 | /* Defines for SPL */ |
223 | #define CONFIG_SPL | |
47f7bcae | 224 | #define CONFIG_SPL_FRAMEWORK |
8a8f084e | 225 | #define CONFIG_SPL_TEXT_BASE 0x402F0400 |
6feb4e9d | 226 | #define CONFIG_SPL_MAX_SIZE (101 * 1024) |
41aebf81 | 227 | #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR |
8a8f084e CN |
228 | |
229 | #define CONFIG_SPL_BSS_START_ADDR 0x80000000 | |
230 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ | |
231 | ||
232 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ | |
233 | #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ | |
234 | #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 | |
235 | #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" | |
236 | #define CONFIG_SPL_MMC_SUPPORT | |
237 | #define CONFIG_SPL_FAT_SUPPORT | |
b4116ede | 238 | #define CONFIG_SPL_I2C_SUPPORT |
8a8f084e CN |
239 | |
240 | #define CONFIG_SPL_LIBCOMMON_SUPPORT | |
241 | #define CONFIG_SPL_LIBDISK_SUPPORT | |
242 | #define CONFIG_SPL_LIBGENERIC_SUPPORT | |
243 | #define CONFIG_SPL_SERIAL_SUPPORT | |
16e41c85 | 244 | #define CONFIG_SPL_GPIO_SUPPORT |
763cf0a3 | 245 | #define CONFIG_SPL_YMODEM_SUPPORT |
6feb4e9d IY |
246 | #define CONFIG_SPL_NET_SUPPORT |
247 | #define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL" | |
248 | #define CONFIG_SPL_ETH_SUPPORT | |
69916bcf TR |
249 | #define CONFIG_SPL_SPI_SUPPORT |
250 | #define CONFIG_SPL_SPI_FLASH_SUPPORT | |
251 | #define CONFIG_SPL_SPI_LOAD | |
252 | #define CONFIG_SPL_SPI_BUS 0 | |
253 | #define CONFIG_SPL_SPI_CS 0 | |
254 | #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 | |
255 | #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 | |
c0e66793 | 256 | #define CONFIG_SPL_MUSB_NEW_SUPPORT |
8a8f084e CN |
257 | #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" |
258 | ||
b4606c6c IY |
259 | #define CONFIG_SPL_BOARD_INIT |
260 | #define CONFIG_SPL_NAND_AM33XX_BCH | |
261 | #define CONFIG_SPL_NAND_SUPPORT | |
79f38777 AA |
262 | #define CONFIG_SPL_NAND_BASE |
263 | #define CONFIG_SPL_NAND_DRIVERS | |
264 | #define CONFIG_SPL_NAND_ECC | |
b4606c6c IY |
265 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE |
266 | #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ | |
267 | CONFIG_SYS_NAND_PAGE_SIZE) | |
268 | #define CONFIG_SYS_NAND_PAGE_SIZE 2048 | |
269 | #define CONFIG_SYS_NAND_OOBSIZE 64 | |
270 | #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) | |
271 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS | |
272 | #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ | |
273 | 10, 11, 12, 13, 14, 15, 16, 17, \ | |
274 | 18, 19, 20, 21, 22, 23, 24, 25, \ | |
275 | 26, 27, 28, 29, 30, 31, 32, 33, \ | |
276 | 34, 35, 36, 37, 38, 39, 40, 41, \ | |
277 | 42, 43, 44, 45, 46, 47, 48, 49, \ | |
278 | 50, 51, 52, 53, 54, 55, 56, 57, } | |
279 | ||
280 | #define CONFIG_SYS_NAND_ECCSIZE 512 | |
281 | #define CONFIG_SYS_NAND_ECCBYTES 14 | |
282 | ||
283 | #define CONFIG_SYS_NAND_ECCSTEPS 4 | |
284 | #define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \ | |
285 | CONFIG_SYS_NAND_ECCSTEPS) | |
286 | ||
287 | #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE | |
288 | ||
289 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 | |
290 | ||
8a8f084e CN |
291 | /* |
292 | * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM | |
293 | * 64 bytes before this address should be set aside for u-boot.img's | |
294 | * header. That is 0x800FFFC0--0x80100000 should not be used for any | |
295 | * other needs. | |
296 | */ | |
297 | #define CONFIG_SYS_TEXT_BASE 0x80800000 | |
298 | #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 | |
299 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 | |
300 | ||
301 | /* Since SPL did pll and ddr initialization for us, | |
302 | * we don't need to do it twice. | |
303 | */ | |
304 | #ifndef CONFIG_SPL_BUILD | |
305 | #define CONFIG_SKIP_LOWLEVEL_INIT | |
306 | #endif | |
5289e83a | 307 | |
d2aa1154 IY |
308 | /* |
309 | * USB configuration | |
310 | */ | |
311 | #define CONFIG_USB_MUSB_DSPS | |
312 | #define CONFIG_ARCH_MISC_INIT | |
313 | #define CONFIG_MUSB_GADGET | |
314 | #define CONFIG_MUSB_PIO_ONLY | |
315 | #define CONFIG_USB_GADGET_DUALSPEED | |
316 | #define CONFIG_MUSB_HOST | |
317 | #define CONFIG_AM335X_USB0 | |
318 | #define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL | |
319 | #define CONFIG_AM335X_USB1 | |
320 | #define CONFIG_AM335X_USB1_MODE MUSB_HOST | |
321 | ||
322 | #ifdef CONFIG_MUSB_HOST | |
323 | #define CONFIG_CMD_USB | |
324 | #define CONFIG_USB_STORAGE | |
325 | #endif | |
326 | ||
327 | #ifdef CONFIG_MUSB_GADGET | |
328 | #define CONFIG_USB_ETHER | |
329 | #define CONFIG_USB_ETH_RNDIS | |
c0e66793 | 330 | #define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00" |
d2aa1154 IY |
331 | #endif /* CONFIG_MUSB_GADGET */ |
332 | ||
c0e66793 IY |
333 | #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT) |
334 | /* disable host part of MUSB in SPL */ | |
335 | #undef CONFIG_MUSB_HOST | |
336 | /* | |
337 | * Disable UART, CPSW ethernet support and extra environment settings so we | |
338 | * will fit within 101KiB. | |
339 | */ | |
340 | #undef CONFIG_SPL_ETH_SUPPORT | |
341 | #undef CONFIG_SPL_YMODEM_SUPPORT | |
342 | #undef CONFIG_EXTRA_ENV_SETTINGS | |
343 | #endif | |
344 | ||
d2aa1154 IY |
345 | /* Unsupported features */ |
346 | #undef CONFIG_USE_IRQ | |
347 | ||
93042960 CN |
348 | #define CONFIG_CMD_NET |
349 | #define CONFIG_CMD_DHCP | |
350 | #define CONFIG_CMD_PING | |
351 | #define CONFIG_DRIVER_TI_CPSW | |
352 | #define CONFIG_MII | |
353 | #define CONFIG_BOOTP_DEFAULT | |
354 | #define CONFIG_BOOTP_DNS | |
355 | #define CONFIG_BOOTP_DNS2 | |
356 | #define CONFIG_BOOTP_SEND_HOSTNAME | |
357 | #define CONFIG_BOOTP_GATEWAY | |
358 | #define CONFIG_BOOTP_SUBNETMASK | |
359 | #define CONFIG_NET_RETRY_COUNT 10 | |
360 | #define CONFIG_NET_MULTI | |
361 | #define CONFIG_PHY_GIGE | |
362 | #define CONFIG_PHYLIB | |
cdd0729e | 363 | #define CONFIG_PHY_ADDR 0 |
c44080b2 | 364 | #define CONFIG_PHY_SMSC |
93042960 | 365 | |
98b5c269 IY |
366 | #define CONFIG_NAND |
367 | /* NAND support */ | |
368 | #ifdef CONFIG_NAND | |
369 | #define CONFIG_CMD_NAND | |
370 | #define CONFIG_NAND_OMAP_GPMC | |
371 | #define GPMC_NAND_ECC_LP_x16_LAYOUT 1 | |
372 | #define CONFIG_SYS_NAND_BASE (0x08000000) /* physical address */ | |
373 | /* to access nand at */ | |
374 | /* CS0 */ | |
b4606c6c IY |
375 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND |
376 | devices */ | |
377 | #undef CONFIG_ENV_IS_NOWHERE | |
378 | #define CONFIG_ENV_IS_IN_NAND | |
379 | #define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */ | |
380 | #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ | |
381 | #endif | |
98b5c269 | 382 | |
5289e83a | 383 | #endif /* ! __CONFIG_AM335X_EVM_H */ |