[people/ms/u-boot.git] / include / configs / ap325rxa.h

/*
 * Configuation settings for the Renesas Solutions AP-325RXA board
 *
 * Copyright (C) 2008 Renesas Solutions Corp.
 * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __AP325RXA_H
#define __AP325RXA_H

#undef DEBUG
#define CONFIG_SH		1
#define CONFIG_SH4		1
#define CONFIG_CPU_SH7723	1
#define CONFIG_AP325RXA	1

#define CONFIG_CMD_LOADB
#define CONFIG_CMD_LOADS
#define CONFIG_CMD_FLASH
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_NFS
#define CONFIG_CMD_SDRAM
#define CONFIG_CMD_SAVEENV
#define CONFIG_CMD_IDE
#define CONFIG_CMD_EXT2
#define CONFIG_DOS_PARTITION

#define CONFIG_BAUDRATE		38400
#define CONFIG_BOOTDELAY	3
#define CONFIG_BOOTARGS		"console=ttySC2,38400"

#define CONFIG_VERSION_VARIABLE
#undef  CONFIG_SHOW_BOOT_PROGRESS

/* SMC9118 */
#define CONFIG_NET_MULTI
#define CONFIG_SMC911X 1
#define CONFIG_SMC911X_32_BIT 1
#define CONFIG_SMC911X_BASE 0xB6080000

/* MEMORY */
#define AP325RXA_SDRAM_BASE		(0x88000000)
#define AP325RXA_FLASH_BASE_1		(0xA0000000)
#define AP325RXA_FLASH_BANK_SIZE	(128 * 1024 * 1024)

/* undef to save memory	*/
#define CONFIG_SYS_LONGHELP
/* Monitor Command Prompt */
#define CONFIG_SYS_PROMPT		"=> "
/* Buffer size for input from the Console */
#define CONFIG_SYS_CBSIZE		256
/* Buffer size for Console output */
#define CONFIG_SYS_PBSIZE		256
/* max args accepted for monitor commands */
#define CONFIG_SYS_MAXARGS		16
/* Buffer size for Boot Arguments passed to kernel */
#define CONFIG_SYS_BARGSIZE	512
/* List of legal baudrate settings for this board */
#define CONFIG_SYS_BAUDRATE_TABLE	{ 38400 }

/* SCIF */
#define CONFIG_SCIF_CONSOLE 1
#define CONFIG_SCIF_A		1 /* SH7723 has SCIF and SCIFA */
#define CONFIG_CONS_SCIF5	1

/* Suppress display of console information at boot */
#undef  CONFIG_SYS_CONSOLE_INFO_QUIET
#undef  CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
#undef  CONFIG_SYS_CONSOLE_ENV_OVERWRITE

#define CONFIG_SYS_MEMTEST_START	(AP325RXA_SDRAM_BASE)
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))

/* Enable alternate, more extensive, memory test */
#undef  CONFIG_SYS_ALT_MEMTEST
/* Scratch address used by the alternate memory test */
#undef  CONFIG_SYS_MEMTEST_SCRATCH

/* Enable temporary baudrate change while serial download */
#undef  CONFIG_SYS_LOADS_BAUD_CHANGE

#define CONFIG_SYS_SDRAM_BASE	(AP325RXA_SDRAM_BASE)
/* maybe more, but if so u-boot doesn't know about it... */
#define CONFIG_SYS_SDRAM_SIZE	(128 * 1024 * 1024)
/* default load address for scripts ?!? */
#define CONFIG_SYS_LOAD_ADDR	(CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)

/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
#define CONFIG_SYS_MONITOR_BASE	(AP325RXA_FLASH_BASE_1)
/* Monitor size */
#define CONFIG_SYS_MONITOR_LEN	(128 * 1024)
/* Size of DRAM reserved for malloc() use */
#define CONFIG_SYS_MALLOC_LEN	(256 * 1024)
/* size in bytes reserved for initial data */
#define CONFIG_SYS_BOOTMAPSZ	(8 * 1024 * 1024)

/* FLASH */
#define CONFIG_FLASH_CFI_DRIVER 1
#define CONFIG_SYS_FLASH_CFI
#undef  CONFIG_SYS_FLASH_QUIET_TEST
/* print 'E' for empty sector on flinfo */
#define CONFIG_SYS_FLASH_EMPTY_INFO
/* Physical start address of Flash memory */
#define CONFIG_SYS_FLASH_BASE	(AP325RXA_FLASH_BASE_1)
/* Max number of sectors on each Flash chip */
#define CONFIG_SYS_MAX_FLASH_SECT	512

/*
 * IDE support
 */
#define CONFIG_IDE_RESET	1
#define CONFIG_SYS_PIO_MODE		1
#define CONFIG_SYS_IDE_MAXBUS		1	/* IDE bus */
#define CONFIG_SYS_IDE_MAXDEVICE	1
#define CONFIG_SYS_ATA_BASE_ADDR	0xB4180000
#define CONFIG_SYS_ATA_STRIDE		2	/* 1bit shift */
#define CONFIG_SYS_ATA_DATA_OFFSET	0x200	/* data reg offset */
#define CONFIG_SYS_ATA_REG_OFFSET	0x200	/* reg offset */
#define CONFIG_SYS_ATA_ALT_OFFSET	0x210	/* alternate register offset */
#define CONFIG_IDE_SWAP_IO

/* if you use all NOR Flash , you change dip-switch. Please see Manual. */
#define CONFIG_SYS_MAX_FLASH_BANKS	1
#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * AP325RXA_FLASH_BANK_SIZE)}

/* Timeout for Flash erase operations (in ms) */
#define CONFIG_SYS_FLASH_ERASE_TOUT	(3 * 1000)
/* Timeout for Flash write operations (in ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT	(3 * 1000)
/* Timeout for Flash set sector lock bit operations (in ms) */
#define CONFIG_SYS_FLASH_LOCK_TOUT	(3 * 1000)
/* Timeout for Flash clear lock bit operations (in ms) */
#define CONFIG_SYS_FLASH_UNLOCK_TOUT	(3 * 1000)

/*
 * Use hardware flash sectors protection instead
 * of U-Boot software protection
 */
#undef  CONFIG_SYS_FLASH_PROTECTION
#undef  CONFIG_SYS_DIRECT_FLASH_TFTP

/* ENV setting */
#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_OVERWRITE	1
#define CONFIG_ENV_SECT_SIZE	(128 * 1024)
#define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
#define CONFIG_ENV_OFFSET		(CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
#define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SECT_SIZE)

/* Board Clock */
#define CONFIG_SYS_CLK_FREQ	33333333
#define CONFIG_SYS_TMU_CLK_DIV		(4)	/* 4 (default), 16, 64, 256 or 1024 */
#define CONFIG_SYS_HZ		1000

#endif	/* __AP325RXA_H */
Commit	Line	Data
6f0da497 NI	1	/*
	2	* Configuation settings for the Renesas Solutions AP-325RXA board
	3	*
	4	* Copyright (C) 2008 Renesas Solutions Corp.
	5	* Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
	6	*
	7	* See file CREDITS for list of people who contributed to this
	8	* project.
	9	*
	10	* This program is free software; you can redistribute it and/or
	11	* modify it under the terms of the GNU General Public License as
	12	* published by the Free Software Foundation; either version 2 of
	13	* the License, or (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	23	* MA 02111-1307 USA
	24	*/
	25
	26	#ifndef __AP325RXA_H
	27	#define __AP325RXA_H
	28
	29	#undef DEBUG
	30	#define CONFIG_SH 1
	31	#define CONFIG_SH4 1
	32	#define CONFIG_CPU_SH7723 1
	33	#define CONFIG_AP325RXA 1
	34
	35	#define CONFIG_CMD_LOADB
	36	#define CONFIG_CMD_LOADS
	37	#define CONFIG_CMD_FLASH
	38	#define CONFIG_CMD_MEMORY
	39	#define CONFIG_CMD_NET
	40	#define CONFIG_CMD_PING
	41	#define CONFIG_CMD_NFS
	42	#define CONFIG_CMD_SDRAM
bdab39d3	43	#define CONFIG_CMD_SAVEENV
6f0da497 NI	44	#define CONFIG_CMD_IDE
	45	#define CONFIG_CMD_EXT2
	46	#define CONFIG_DOS_PARTITION
	47
	48	#define CONFIG_BAUDRATE 38400
	49	#define CONFIG_BOOTDELAY 3
	50	#define CONFIG_BOOTARGS "console=ttySC2,38400"
	51
	52	#define CONFIG_VERSION_VARIABLE
	53	#undef CONFIG_SHOW_BOOT_PROGRESS
	54
	55	/* SMC9118 */
736fead8 BW	56	#define CONFIG_NET_MULTI
	57	#define CONFIG_SMC911X 1
	58	#define CONFIG_SMC911X_32_BIT 1
	59	#define CONFIG_SMC911X_BASE 0xB6080000
6f0da497 NI	60
	61	/* MEMORY */
	62	#define AP325RXA_SDRAM_BASE (0x88000000)
	63	#define AP325RXA_FLASH_BASE_1 (0xA0000000)
	64	#define AP325RXA_FLASH_BANK_SIZE (128 * 1024 * 1024)
	65
	66	/* undef to save memory */
6d0f6bcf	67	#define CONFIG_SYS_LONGHELP
6f0da497	68	/* Monitor Command Prompt */
6d0f6bcf	69	#define CONFIG_SYS_PROMPT "=> "
6f0da497	70	/* Buffer size for input from the Console */
6d0f6bcf	71	#define CONFIG_SYS_CBSIZE 256
6f0da497	72	/* Buffer size for Console output */
6d0f6bcf	73	#define CONFIG_SYS_PBSIZE 256
6f0da497	74	/* max args accepted for monitor commands */
6d0f6bcf	75	#define CONFIG_SYS_MAXARGS 16
6f0da497	76	/* Buffer size for Boot Arguments passed to kernel */
6d0f6bcf	77	#define CONFIG_SYS_BARGSIZE 512
6f0da497	78	/* List of legal baudrate settings for this board */
6d0f6bcf	79	#define CONFIG_SYS_BAUDRATE_TABLE { 38400 }
6f0da497 NI	80
	81	/* SCIF */
	82	#define CONFIG_SCIF_CONSOLE 1
	83	#define CONFIG_SCIF_A 1 /* SH7723 has SCIF and SCIFA */
	84	#define CONFIG_CONS_SCIF5 1
	85
	86	/* Suppress display of console information at boot */
6d0f6bcf JCPV	87	#undef CONFIG_SYS_CONSOLE_INFO_QUIET
	88	#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
	89	#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
6f0da497	90
6d0f6bcf JCPV	91	#define CONFIG_SYS_MEMTEST_START (AP325RXA_SDRAM_BASE)
6d0f6bcf JCPV	92	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
6f0da497 NI	93
6f0da497 NI	94	/* Enable alternate, more extensive, memory test */
6d0f6bcf	95	#undef CONFIG_SYS_ALT_MEMTEST
6f0da497	96	/* Scratch address used by the alternate memory test */
6d0f6bcf	97	#undef CONFIG_SYS_MEMTEST_SCRATCH
6f0da497 NI	98
6f0da497 NI	99	/* Enable temporary baudrate change while serial download */
6d0f6bcf	100	#undef CONFIG_SYS_LOADS_BAUD_CHANGE
6f0da497	101
6d0f6bcf	102	#define CONFIG_SYS_SDRAM_BASE (AP325RXA_SDRAM_BASE)
6f0da497	103	/* maybe more, but if so u-boot doesn't know about it... */
6d0f6bcf	104	#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024)
6f0da497	105	/* default load address for scripts ?!? */
6d0f6bcf	106	#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
6f0da497 NI	107
6f0da497 NI	108	/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
6d0f6bcf	109	#define CONFIG_SYS_MONITOR_BASE (AP325RXA_FLASH_BASE_1)
6f0da497	110	/* Monitor size */
6d0f6bcf	111	#define CONFIG_SYS_MONITOR_LEN (128 * 1024)
6f0da497	112	/* Size of DRAM reserved for malloc() use */
6d0f6bcf	113	#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
6f0da497	114	/* size in bytes reserved for initial data */
6d0f6bcf	115	#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
6f0da497 NI	116
	117	/* FLASH */
	118	#define CONFIG_FLASH_CFI_DRIVER 1
6d0f6bcf JCPV	119	#define CONFIG_SYS_FLASH_CFI
6d0f6bcf JCPV	120	#undef CONFIG_SYS_FLASH_QUIET_TEST
6f0da497	121	/* print 'E' for empty sector on flinfo */
6d0f6bcf	122	#define CONFIG_SYS_FLASH_EMPTY_INFO
6f0da497	123	/* Physical start address of Flash memory */
6d0f6bcf	124	#define CONFIG_SYS_FLASH_BASE (AP325RXA_FLASH_BASE_1)
6f0da497	125	/* Max number of sectors on each Flash chip */
6d0f6bcf	126	#define CONFIG_SYS_MAX_FLASH_SECT 512
6f0da497 NI	127
	128	/*
	129	* IDE support
	130	*/
	131	#define CONFIG_IDE_RESET 1
6d0f6bcf JCPV	132	#define CONFIG_SYS_PIO_MODE 1
	133	#define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */
	134	#define CONFIG_SYS_IDE_MAXDEVICE 1
	135	#define CONFIG_SYS_ATA_BASE_ADDR 0xB4180000
	136	#define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */
	137	#define CONFIG_SYS_ATA_DATA_OFFSET 0x200 /* data reg offset */
	138	#define CONFIG_SYS_ATA_REG_OFFSET 0x200 /* reg offset */
	139	#define CONFIG_SYS_ATA_ALT_OFFSET 0x210 /* alternate register offset */
f2a37fcd	140	#define CONFIG_IDE_SWAP_IO
6f0da497 NI	141
6f0da497 NI	142	/* if you use all NOR Flash , you change dip-switch. Please see Manual. */
6d0f6bcf JCPV	143	#define CONFIG_SYS_MAX_FLASH_BANKS 1
6d0f6bcf JCPV	144	#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * AP325RXA_FLASH_BANK_SIZE)}
6f0da497 NI	145
6f0da497 NI	146	/* Timeout for Flash erase operations (in ms) */
6d0f6bcf	147	#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
6f0da497	148	/* Timeout for Flash write operations (in ms) */
6d0f6bcf	149	#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
6f0da497	150	/* Timeout for Flash set sector lock bit operations (in ms) */
6d0f6bcf	151	#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
6f0da497	152	/* Timeout for Flash clear lock bit operations (in ms) */
6d0f6bcf	153	#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
6f0da497 NI	154
	155	/*
	156	* Use hardware flash sectors protection instead
	157	* of U-Boot software protection
	158	*/
6d0f6bcf JCPV	159	#undef CONFIG_SYS_FLASH_PROTECTION
6d0f6bcf JCPV	160	#undef CONFIG_SYS_DIRECT_FLASH_TFTP
6f0da497 NI	161
6f0da497 NI	162	/* ENV setting */
5a1aceb0	163	#define CONFIG_ENV_IS_IN_FLASH
6f0da497	164	#define CONFIG_ENV_OVERWRITE 1
0e8d1586 JCPV	165	#define CONFIG_ENV_SECT_SIZE (128 * 1024)
0e8d1586 JCPV	166	#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
6d0f6bcf JCPV	167	#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
	168	/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
	169	#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
0e8d1586	170	#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
6f0da497 NI	171
	172	/* Board Clock */
	173	#define CONFIG_SYS_CLK_FREQ 33333333
be45c632	174	#define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
8dd29c87	175	#define CONFIG_SYS_HZ 1000
6f0da497 NI	176
6f0da497 NI	177	#endif /* __AP325RXA_H */