]>
Commit | Line | Data |
---|---|---|
c291e2fc PW |
1 | /* |
2 | * (C) Copyright 2010 | |
3 | * Marvell Semiconductor <www.marvell.com> | |
4 | * Written-by: Prafulla Wadaskar <prafulla@marvell.com> | |
5 | * Contributor: Mahavir Jain <mjain@marvell.com> | |
6 | * | |
1a459660 | 7 | * SPDX-License-Identifier: GPL-2.0+ |
c291e2fc PW |
8 | */ |
9 | ||
10 | #ifndef __CONFIG_ASPENITE_H | |
11 | #define __CONFIG_ASPENITE_H | |
12 | ||
13 | /* | |
14 | * Version number information | |
15 | */ | |
16 | #define CONFIG_IDENT_STRING "\nMarvell-Aspenite DB" | |
17 | ||
18 | /* | |
19 | * High Level Configuration Options | |
20 | */ | |
21 | #define CONFIG_SHEEVA_88SV331xV5 1 /* CPU Core subversion */ | |
22 | #define CONFIG_ARMADA100 1 /* SOC Family Name */ | |
23 | #define CONFIG_ARMADA168 1 /* SOC Used on this Board */ | |
24 | #define CONFIG_MACH_ASPENITE /* Machine type */ | |
25 | #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ | |
26 | ||
cf946c6d LW |
27 | /* |
28 | * There is no internal RAM in ARMADA100, using DRAM | |
29 | * TBD: dcache to be used for this | |
30 | */ | |
31 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE - 0x00200000) | |
32 | #define CONFIG_NR_DRAM_BANKS_MAX 2 | |
33 | ||
c291e2fc PW |
34 | /* |
35 | * Commands configuration | |
36 | */ | |
37 | #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ | |
38 | #include <config_cmd_default.h> | |
81a9ab21 | 39 | #define CONFIG_CMD_I2C |
c291e2fc PW |
40 | #undef CONFIG_CMD_NET |
41 | #undef CONFIG_CMD_NFS | |
42 | /* | |
43 | * mv-common.h should be defined after CMD configs since it used them | |
44 | * to enable certain macros | |
45 | */ | |
46 | #include "mv-common.h" | |
cf946c6d | 47 | #undef CONFIG_ARCH_MISC_INIT |
c291e2fc PW |
48 | |
49 | /* | |
50 | * Environment variables configurations | |
51 | */ | |
52 | #define CONFIG_ENV_IS_NOWHERE 1 /* if env in SDRAM */ | |
53 | #define CONFIG_ENV_SIZE 0x20000 /* 64k */ | |
54 | ||
55 | #endif /* __CONFIG_ASPENITE_H */ |