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0176d43e SP |
1 | /* |
2 | * (C) Copyright 2007-2008 | |
c9e798d3 | 3 | * Stelian Pop <stelian@popies.net> |
0176d43e SP |
4 | * Lead Tech Design <www.leadtechdesign.com> |
5 | * | |
df486b1f | 6 | * Configuation settings for the AT91SAM9260EK & AT91SAM9G20EK boards. |
0176d43e | 7 | * |
1a459660 | 8 | * SPDX-License-Identifier: GPL-2.0+ |
0176d43e SP |
9 | */ |
10 | ||
11 | #ifndef __CONFIG_H | |
12 | #define __CONFIG_H | |
13 | ||
8c6407fc RM |
14 | /* |
15 | * SoC must be defined first, before hardware.h is included. | |
16 | * In this case SoC is defined in boards.cfg. | |
17 | */ | |
18 | #include <asm/hardware.h> | |
425de62d | 19 | |
8c6407fc RM |
20 | /* |
21 | * Warning: changing CONFIG_SYS_TEXT_BASE requires | |
22 | * adapting the initial boot program. | |
23 | * Since the linker has to swallow that define, we must use a pure | |
24 | * hex number here! | |
25 | */ | |
26 | #define CONFIG_SYS_TEXT_BASE 0x21f00000 | |
0176d43e | 27 | |
8c6407fc RM |
28 | /* ARM asynchronous clock */ |
29 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ | |
30 | #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */ | |
df486b1f | 31 | |
8c6407fc RM |
32 | /* Define actual evaluation board type from used processor type */ |
33 | #ifdef CONFIG_AT91SAM9G20 | |
34 | # define CONFIG_AT91SAM9G20EK /* It's an Atmel AT91SAM9G20 EK */ | |
df486b1f | 35 | #else |
8c6407fc | 36 | # define CONFIG_AT91SAM9260EK /* It's an Atmel AT91SAM9260 EK */ |
df486b1f NF |
37 | #endif |
38 | ||
8c6407fc | 39 | /* Misc CPU related */ |
dc39ae95 | 40 | #define CONFIG_ARCH_CPU_INIT |
8c6407fc RM |
41 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
42 | #define CONFIG_SETUP_MEMORY_TAGS | |
43 | #define CONFIG_INITRD_TAG | |
0176d43e | 44 | #define CONFIG_SKIP_LOWLEVEL_INIT |
8c6407fc RM |
45 | #define CONFIG_BOARD_EARLY_INIT_F |
46 | #define CONFIG_DISPLAY_CPUINFO | |
47 | ||
48 | /* general purpose I/O */ | |
49 | #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ | |
50 | #define CONFIG_AT91_GPIO | |
51 | #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ | |
52 | ||
53 | /* serial console */ | |
54 | #define CONFIG_ATMEL_USART | |
55 | #define CONFIG_USART_BASE ATMEL_BASE_DBGU | |
56 | #define CONFIG_USART_ID ATMEL_ID_SYS | |
57 | #define CONFIG_BAUDRATE 115200 | |
0176d43e | 58 | |
a484b00b JCPV |
59 | /* LED */ |
60 | #define CONFIG_AT91_LED | |
61 | #define CONFIG_RED_LED AT91_PIN_PA9 /* this is the power led */ | |
62 | #define CONFIG_GREEN_LED AT91_PIN_PA6 /* this is the user led */ | |
63 | ||
0176d43e | 64 | |
0176d43e SP |
65 | /* |
66 | * BOOTP options | |
67 | */ | |
68 | #define CONFIG_BOOTP_BOOTFILESIZE 1 | |
69 | #define CONFIG_BOOTP_BOOTPATH 1 | |
70 | #define CONFIG_BOOTP_GATEWAY 1 | |
71 | #define CONFIG_BOOTP_HOSTNAME 1 | |
72 | ||
73 | /* | |
74 | * Command line configuration. | |
75 | */ | |
0176d43e | 76 | #define CONFIG_CMD_NAND 1 |
0176d43e | 77 | |
8c6407fc RM |
78 | /* |
79 | * SDRAM: 1 bank, min 32, max 128 MB | |
80 | * Initialized before u-boot gets started. | |
81 | */ | |
0176d43e | 82 | #define CONFIG_NR_DRAM_BANKS 1 |
8c6407fc RM |
83 | #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 |
84 | #define CONFIG_SYS_SDRAM_SIZE 0x04000000 | |
85 | ||
86 | /* | |
87 | * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, | |
88 | * leaving the correct space for initial global data structure above | |
89 | * that address while providing maximum stack area below. | |
90 | */ | |
91 | #ifdef CONFIG_AT91SAM9XE | |
92 | # define CONFIG_SYS_INIT_SP_ADDR \ | |
93 | (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE) | |
94 | #else | |
95 | # define CONFIG_SYS_INIT_SP_ADDR \ | |
96 | (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) | |
97 | #endif | |
0176d43e | 98 | |
d0a51373 AB |
99 | /* |
100 | * The (arm)linux board id set by generic code depending on configured board | |
101 | * (see boards.cfg for different boards) | |
102 | */ | |
103 | #ifdef CONFIG_AT91SAM9G20 | |
104 | /* the sam9g20 variants have two different board ids */ | |
105 | # ifdef CONFIG_AT91SAM9G20EK_2MMC | |
106 | /* we may be setup for the 2MMC variant of at91sam9g20ek */ | |
107 | # define CONFIG_MACH_TYPE MACH_TYPE_AT91SAM9G20EK_2MMC | |
108 | # else | |
109 | /* or the normal at91sam9g20ek */ | |
110 | # define CONFIG_MACH_TYPE MACH_TYPE_AT91SAM9G20EK | |
111 | # endif | |
112 | #else | |
113 | /* otherwise default to good old at91sam9260ek */ | |
114 | # define CONFIG_MACH_TYPE MACH_TYPE_AT91SAM9260EK | |
115 | #endif | |
116 | ||
8495faf5 | 117 | #ifndef CONFIG_AT91SAM9G20EK_2MMC |
f5702d7d | 118 | /* DataFlash */ |
4758ebdd | 119 | #define CONFIG_ATMEL_DATAFLASH_SPI |
0176d43e | 120 | #define CONFIG_HAS_DATAFLASH 1 |
6d0f6bcf JCPV |
121 | #define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 |
122 | #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ | |
123 | #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */ | |
79f0cb6e | 124 | #define AT91_SPI_CLK 15000000 |
f5702d7d WJ |
125 | #else |
126 | /* Enable MMC. The MCCK is conflicted with DataFlash */ | |
8495faf5 | 127 | #endif |
df486b1f NF |
128 | |
129 | #ifdef CONFIG_AT91SAM9G20EK | |
130 | #define DATAFLASH_TCSS (0x22 << 16) | |
131 | #else | |
0176d43e | 132 | #define DATAFLASH_TCSS (0x1a << 16) |
df486b1f | 133 | #endif |
0176d43e SP |
134 | #define DATAFLASH_TCHS (0x1 << 24) |
135 | ||
136 | /* NAND flash */ | |
74c076d6 JCPV |
137 | #ifdef CONFIG_CMD_NAND |
138 | #define CONFIG_NAND_ATMEL | |
8c6407fc RM |
139 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
140 | #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 | |
141 | #define CONFIG_SYS_NAND_DBW_8 | |
142 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) | |
143 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) | |
144 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 | |
145 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 | |
74c076d6 | 146 | #endif |
0176d43e | 147 | |
a73267a7 WJ |
148 | /* MMC */ |
149 | #ifdef CONFIG_CMD_MMC | |
150 | #define CONFIG_MMC | |
151 | #define CONFIG_GENERIC_MMC | |
152 | #define CONFIG_GENERIC_ATMEL_MCI | |
153 | #endif | |
154 | ||
155 | /* FAT */ | |
156 | #ifdef CONFIG_CMD_FAT | |
157 | #define CONFIG_DOS_PARTITION | |
158 | #endif | |
159 | ||
0176d43e | 160 | /* NOR flash - no real flash on this board */ |
6d0f6bcf | 161 | #define CONFIG_SYS_NO_FLASH 1 |
0176d43e SP |
162 | |
163 | /* Ethernet */ | |
164 | #define CONFIG_MACB 1 | |
165 | #define CONFIG_RMII 1 | |
0176d43e SP |
166 | #define CONFIG_NET_RETRY_COUNT 20 |
167 | #define CONFIG_RESET_PHY_R 1 | |
4535a24c | 168 | #define CONFIG_AT91_WANTS_COMMON_PHY |
0176d43e SP |
169 | |
170 | /* USB */ | |
2b7178af | 171 | #define CONFIG_USB_ATMEL |
dcd2f1a0 | 172 | #define CONFIG_USB_ATMEL_CLK_SEL_PLLB |
0176d43e | 173 | #define CONFIG_USB_OHCI_NEW 1 |
6d0f6bcf JCPV |
174 | #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 |
175 | #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */ | |
176 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" | |
177 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 | |
0176d43e SP |
178 | #define CONFIG_USB_STORAGE 1 |
179 | ||
6d0f6bcf | 180 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ |
0176d43e | 181 | |
8c6407fc | 182 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
6d0f6bcf | 183 | #define CONFIG_SYS_MEMTEST_END 0x23e00000 |
0176d43e | 184 | |
6d0f6bcf | 185 | #ifdef CONFIG_SYS_USE_DATAFLASH_CS0 |
0176d43e SP |
186 | |
187 | /* bootstrap + u-boot + env + linux in dataflash on CS0 */ | |
057c849c | 188 | #define CONFIG_ENV_IS_IN_DATAFLASH 1 |
6d0f6bcf | 189 | #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) |
0e8d1586 | 190 | #define CONFIG_ENV_OFFSET 0x4200 |
6d0f6bcf | 191 | #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) |
0e8d1586 | 192 | #define CONFIG_ENV_SIZE 0x4200 |
e139cb31 | 193 | #define CONFIG_BOOTCOMMAND "cp.b 0xC0084000 0x22000000 0x210000; bootm" |
96996ac2 SP |
194 | #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ |
195 | "root=/dev/mtdblock0 " \ | |
918319c7 | 196 | "mtdparts=atmel_nand:-(root) " \ |
96996ac2 | 197 | "rw rootfstype=jffs2" |
0176d43e | 198 | |
6d0f6bcf | 199 | #elif CONFIG_SYS_USE_DATAFLASH_CS1 |
0176d43e SP |
200 | |
201 | /* bootstrap + u-boot + env + linux in dataflash on CS1 */ | |
057c849c | 202 | #define CONFIG_ENV_IS_IN_DATAFLASH 1 |
6d0f6bcf | 203 | #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + 0x8400) |
0e8d1586 | 204 | #define CONFIG_ENV_OFFSET 0x4200 |
6d0f6bcf | 205 | #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + CONFIG_ENV_OFFSET) |
0e8d1586 | 206 | #define CONFIG_ENV_SIZE 0x4200 |
e139cb31 | 207 | #define CONFIG_BOOTCOMMAND "cp.b 0xD0084000 0x22000000 0x210000; bootm" |
96996ac2 SP |
208 | #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ |
209 | "root=/dev/mtdblock0 " \ | |
918319c7 | 210 | "mtdparts=atmel_nand:-(root) " \ |
96996ac2 | 211 | "rw rootfstype=jffs2" |
0176d43e | 212 | |
24802073 | 213 | #elif defined(CONFIG_SYS_USE_NANDFLASH) |
0176d43e SP |
214 | |
215 | /* bootstrap + u-boot + env + linux in nandflash */ | |
51bfee19 | 216 | #define CONFIG_ENV_IS_IN_NAND 1 |
0c58cfa9 BS |
217 | #define CONFIG_ENV_OFFSET 0xc0000 |
218 | #define CONFIG_ENV_OFFSET_REDUND 0x100000 | |
0e8d1586 | 219 | #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ |
0c58cfa9 BS |
220 | #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" |
221 | #define CONFIG_BOOTARGS \ | |
222 | "console=ttyS0,115200 earlyprintk " \ | |
223 | "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ | |
224 | "256k(env),256k(env_redundant),256k(spare)," \ | |
225 | "512k(dtb),6M(kernel)ro,-(rootfs) " \ | |
226 | "root=/dev/mtdblock7 rw rootfstype=jffs2" | |
0176d43e | 227 | |
24802073 WJ |
228 | #else /* CONFIG_SYS_USE_MMC */ |
229 | /* bootstrap + u-boot + env + linux in mmc */ | |
230 | #define CONFIG_ENV_IS_IN_MMC | |
231 | /* For FAT system, most cases it should be in the reserved sector */ | |
232 | #define CONFIG_ENV_OFFSET 0x2000 | |
233 | #define CONFIG_ENV_SIZE 0x1000 | |
234 | #define CONFIG_SYS_MMC_ENV_DEV 0 | |
235 | ||
236 | #define CONFIG_BOOTCOMMAND \ | |
237 | "fatload mmc 0:1 0x22000000 uImage; bootm" | |
238 | #define CONFIG_BOOTARGS \ | |
239 | "console=ttyS0,115200 earlyprintk " \ | |
240 | "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ | |
241 | "256k(env),256k(env_redundant),256k(spare)," \ | |
242 | "512k(dtb),6M(kernel)ro,-(rootfs) " \ | |
243 | "root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait" | |
0176d43e SP |
244 | #endif |
245 | ||
6d0f6bcf JCPV |
246 | #define CONFIG_SYS_CBSIZE 256 |
247 | #define CONFIG_SYS_MAXARGS 16 | |
6d0f6bcf | 248 | #define CONFIG_SYS_LONGHELP 1 |
0176d43e | 249 | #define CONFIG_CMDLINE_EDITING 1 |
e139cb31 | 250 | #define CONFIG_AUTO_COMPLETE |
0176d43e | 251 | |
0176d43e SP |
252 | /* |
253 | * Size of malloc() pool | |
254 | */ | |
6d0f6bcf | 255 | #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) |
0176d43e | 256 | |
0176d43e | 257 | #endif |