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Commit | Line | Data |
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06399329 | 1 | /* |
a187559e | 2 | * U-Boot - Configuration file for BF536 brettl2 board |
06399329 PM |
3 | */ |
4 | ||
5 | #ifndef __CONFIG_BCT_BRETTL2_H__ | |
6 | #define __CONFIG_BCT_BRETTL2_H__ | |
7 | ||
8 | #include <asm/config-pre.h> | |
9 | ||
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10 | /* |
11 | * Processor Settings | |
12 | */ | |
fbcf8e8c MF |
13 | #define CONFIG_BFIN_CPU bf536-0.3 |
14 | #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS | |
06399329 | 15 | |
06399329 PM |
16 | /* |
17 | * Clock Settings | |
18 | * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV | |
19 | * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV | |
20 | */ | |
21 | /* CONFIG_CLKIN_HZ is any value in Hz */ | |
22 | #define CONFIG_CLKIN_HZ 16384000 | |
071bc923 WD |
23 | /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ |
24 | /* 1 = CLKIN / 2 */ | |
06399329 PM |
25 | #define CONFIG_CLKIN_HALF 0 |
26 | /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ | |
071bc923 | 27 | /* 1 = bypass PLL */ |
06399329 PM |
28 | #define CONFIG_PLL_BYPASS 0 |
29 | /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ | |
30 | /* Values can range from 0-63 (where 0 means 64) */ | |
31 | #define CONFIG_VCO_MULT 24 | |
32 | /* CCLK_DIV controls the core clock divider */ | |
33 | /* Values can be 1, 2, 4, or 8 ONLY */ | |
34 | #define CONFIG_CCLK_DIV 1 | |
35 | /* SCLK_DIV controls the system clock divider */ | |
36 | /* Values can range from 1-15 */ | |
37 | #define CONFIG_SCLK_DIV 3 | |
071bc923 | 38 | #define CONFIG_VR_CTL_VAL (VLEV_110 | GAIN_20 | FREQ_1000) |
06399329 | 39 | |
06399329 PM |
40 | /* |
41 | * Memory Settings | |
42 | */ | |
43 | #define CONFIG_MEM_ADD_WDTH 9 | |
44 | #define CONFIG_MEM_SIZE 32 | |
45 | ||
06399329 PM |
46 | /* |
47 | * SDRAM Settings | |
48 | */ | |
49 | #define CONFIG_EBIU_SDRRC_VAL 0x07f6 | |
50 | #define CONFIG_EBIU_SDGCTL_VAL 0x9111cd | |
51 | ||
52 | #define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL) | |
53 | #define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3) | |
54 | #define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3) | |
55 | ||
56 | #define CONFIG_SYS_MONITOR_LEN (256 * 1024) | |
57 | #define CONFIG_SYS_MALLOC_LEN (128 * 1024) | |
58 | ||
06399329 PM |
59 | /* |
60 | * Network Settings | |
61 | */ | |
62 | #ifndef __ADSPBF534__ | |
63 | #define ADI_CMDS_NETWORK 1 | |
64 | #define CONFIG_BFIN_MAC 1 | |
65 | #define CONFIG_NETCONSOLE 1 | |
06399329 PM |
66 | #define CONFIG_HOSTNAME brettl2 |
67 | #define CONFIG_IPADDR 192.168.233.224 | |
68 | #define CONFIG_GATEWAYIP 192.168.233.1 | |
69 | #define CONFIG_SERVERIP 192.168.233.53 | |
8b3637c6 | 70 | #define CONFIG_ROOTPATH "/romfs/brettl2" |
06399329 PM |
71 | #endif |
72 | ||
06399329 PM |
73 | /* |
74 | * Flash Settings | |
75 | */ | |
76 | #define CONFIG_FLASH_CFI_DRIVER | |
77 | #define CONFIG_SYS_FLASH_CFI | |
78 | #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS | |
79 | #define CONFIG_SYS_FLASH_PROTECTION | |
80 | #define CONFIG_SYS_FLASH_BASE 0x20000000 | |
81 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 | |
82 | #define CONFIG_SYS_MAX_FLASH_SECT 135 | |
83 | ||
06399329 PM |
84 | /* |
85 | * Env Storage Settings | |
86 | */ | |
87 | #define CONFIG_ENV_IS_IN_FLASH 1 | |
88 | #define CONFIG_ENV_OFFSET 0x4000 | |
89 | #define CONFIG_ENV_SIZE 0x2000 | |
0d3fd562 | 90 | #define CONFIG_ENV_SECT_SIZE 0x12000 |
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91 | |
92 | #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS) | |
93 | #define ENV_IS_EMBEDDED | |
94 | #else | |
95 | #define CONFIG_ENV_IS_EMBEDDED_IN_LDR | |
96 | #endif | |
97 | ||
98 | #ifdef ENV_IS_EMBEDDED | |
99 | /* WARNING - the following is hand-optimized to fit within | |
100 | * the sector before the environment sector. If it throws | |
101 | * an error during compilation remove an object here to get | |
102 | * it linked after the configuration sector. | |
103 | */ | |
104 | # define LDS_BOARD_TEXT \ | |
e2906a59 MY |
105 | arch/blackfin/lib/built-in.o (.text*); \ |
106 | arch/blackfin/cpu/built-in.o (.text*); \ | |
071bc923 | 107 | . = DEFINED(env_offset) ? env_offset : .; \ |
c70e7ddb | 108 | common/env_embedded.o (.text*); |
06399329 PM |
109 | #endif |
110 | ||
06399329 PM |
111 | /* |
112 | * I2C Settings | |
113 | */ | |
c469703b | 114 | #define CONFIG_SYS_I2C |
fea9b69a | 115 | #define CONFIG_SYS_I2C_ADI |
06399329 | 116 | |
06399329 PM |
117 | /* |
118 | * Misc Settings | |
119 | */ | |
06399329 PM |
120 | #define CONFIG_LOADADDR 0x800000 |
121 | #define CONFIG_MISC_INIT_R | |
122 | #define CONFIG_UART_CONSOLE 0 | |
06399329 PM |
123 | #define CONFIG_MTD_DEVICE |
124 | #define CONFIG_MTD_PARTITIONS | |
06399329 PM |
125 | |
126 | /* | |
127 | * Pull in common ADI header for remaining command/environment setup | |
128 | */ | |
129 | #include <configs/bfin_adi_common.h> | |
130 | ||
131 | /* disable unnecessary features */ | |
132 | #undef CONFIG_BOOTM_RTEMS | |
133 | #undef CONFIG_BZIP2 | |
134 | #undef CONFIG_KALLSYMS | |
135 | ||
136 | #endif |