]> git.ipfire.org Git - people/ms/u-boot.git/blame - include/configs/ca9x4_ct_vxp.h
armv7: cache maintenance operations for armv7
[people/ms/u-boot.git] / include / configs / ca9x4_ct_vxp.h
CommitLineData
b80e41ac
MW
1/*
2 * (C) Copyright 2010 Linaro
3 * Matt Waddel, <matt.waddel@linaro.org>
4 *
5 * Configuration for Versatile Express. Parts were derived from other ARM
6 * configurations.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
30/* Board info register */
31#define SYS_ID 0x10000000
32#define CONFIG_REVISION_TAG 1
471eec58 33#define CONFIG_SYS_TEXT_BASE 0x60800000
b80e41ac
MW
34
35/* High Level Configuration Options */
36#define CONFIG_ARMV7 1
37
38#define CONFIG_SYS_MEMTEST_START 0x60000000
39#define CONFIG_SYS_MEMTEST_END 0x20000000
40#define CONFIG_SYS_HZ 1000
41
42#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
43#define CONFIG_SETUP_MEMORY_TAGS 1
44#define CONFIG_L2_OFF 1
45#define CONFIG_INITRD_TAG 1
46
2fa8ca98
GL
47#define CONFIG_OF_LIBFDT 1
48
b80e41ac
MW
49/* Size of malloc() pool */
50#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
b80e41ac
MW
51
52#define SCTL_BASE 0x10001000
53#define VEXPRESS_FLASHPROG_FLVPPEN (1 << 0)
54
55/* SMSC9115 Ethernet from SMSC9118 family */
56#define CONFIG_NET_MULTI
57#define CONFIG_SMC911X 1
58#define CONFIG_SMC911X_32_BIT 1
59#define CONFIG_SMC911X_BASE 0x4E000000
60
61/* PL011 Serial Configuration */
62#define CONFIG_PL011_SERIAL
63#define CONFIG_PL011_CLOCK 24000000
64#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \
65 (void *)CONFIG_SYS_SERIAL1}
66#define CONFIG_CONS_INDEX 0
67
68#define CONFIG_BAUDRATE 38400
69#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
70#define CONFIG_SYS_SERIAL0 0x10009000
71#define CONFIG_SYS_SERIAL1 0x1000A000
72
73/* Command line configuration */
74#define CONFIG_CMD_BDI
75#define CONFIG_CMD_DHCP
76#define CONFIG_CMD_ELF
77#define CONFIG_CMD_ENV
78#define CONFIG_CMD_FLASH
79#define CONFIG_CMD_IMI
80#define CONFIG_CMD_MEMORY
81#define CONFIG_CMD_NET
82#define CONFIG_CMD_PING
83#define CONFIG_CMD_SAVEENV
84#define CONFIG_NET_MULTI
85#define CONFIG_CMD_RUN
86
87#define CONFIG_CMD_FAT
88#define CONFIG_DOS_PARTITION 1
89#define CONFIG_MMC 1
90#define CONFIG_CMD_MMC
91#define CONFIG_GENERIC_MMC
f0c64526
MW
92#define CONFIG_ARM_PL180_MMCI
93#define CONFIG_ARM_PL180_MMCI_BASE 0x10005000
94#define CONFIG_SYS_MMC_MAX_BLK_COUNT 127
95#define CONFIG_ARM_PL180_MMCI_CLOCK_FREQ 6250000
b80e41ac
MW
96
97/* BOOTP options */
98#define CONFIG_BOOTP_BOOTFILESIZE
99#define CONFIG_BOOTP_BOOTPATH
100#define CONFIG_BOOTP_GATEWAY
101#define CONFIG_BOOTP_HOSTNAME
102
103/* Miscellaneous configurable options */
104#undef CONFIG_SYS_CLKS_IN_HZ
105#define CONFIG_SYS_LOAD_ADDR 0x60008000 /* load address */
106#define LINUX_BOOT_PARAM_ADDR 0x60000200
107#define CONFIG_BOOTDELAY 2
108
109/* Stack sizes are set up in start.S using the settings below */
110#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
111#ifdef CONFIG_USE_IRQ
112#define CONFIG_STACKSIZE_IRQ (4 * 1024) /* IRQ stack */
113#define CONFIG_STACKSIZE_FIQ (4 * 1024) /* FIQ stack */
114#endif
115
116/* Physical Memory Map */
117#define CONFIG_NR_DRAM_BANKS 2
118#define PHYS_SDRAM_1 0x60000000 /* SDRAM Bank #1 */
119#define PHYS_SDRAM_2 0x80000000 /* SDRAM Bank #1 */
120#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */
121#define PHYS_SDRAM_2_SIZE 0x20000000 /* 512 MB */
122
123/* additions for new relocation code */
124#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
553f0982 125#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
b80e41ac 126#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
553f0982 127 CONFIG_SYS_INIT_RAM_SIZE - \
25ddd1fb 128 GENERATED_GBL_DATA_SIZE)
b80e41ac
MW
129#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET
130
131/* Basic environment settings */
132#define CONFIG_BOOTCOMMAND "run bootflash;"
133#define CONFIG_EXTRA_ENV_SETTINGS \
134 "loadaddr=0x80008000\0" \
135 "initrd=0x61000000\0" \
136 "kerneladdr=0x44100000\0" \
137 "initrdaddr=0x44800000\0" \
138 "maxinitrd=0x1800000\0" \
139 "console=ttyAMA0,38400n8\0" \
140 "dram=1024M\0" \
141 "root=/dev/sda1 rw\0" \
142 "mtd=armflash:1M@0x800000(uboot),7M@0x1000000(kernel)," \
143 "24M@0x2000000(initrd)\0" \
144 "flashargs=setenv bootargs root=${root} console=${console} " \
145 "mem=${dram} mtdparts=${mtd} mmci.fmax=190000 " \
146 "devtmpfs.mount=0 vmalloc=256M\0" \
147 "bootflash=run flashargs; " \
148 "cp ${initrdaddr} ${initrd} ${maxinitrd}; " \
149 "bootm ${kerneladdr} ${initrd}\0"
150
151/* FLASH and environment organization */
152#define PHYS_FLASH_SIZE 0x04000000 /* 64MB */
153#define CONFIG_SYS_FLASH_CFI 1
154#define CONFIG_FLASH_CFI_DRIVER 1
155#define CONFIG_SYS_FLASH_SIZE 0x04000000
156#define CONFIG_SYS_MAX_FLASH_BANKS 2
157#define CONFIG_SYS_FLASH_BASE0 0x40000000
158#define CONFIG_SYS_FLASH_BASE1 0x44000000
159#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE0
160
161/* Timeout values in ticks */
162#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */
163#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */
164
165/* 255 0x40000 sectors + first or last sector may have 4 erase regions = 259 */
166#define CONFIG_SYS_MAX_FLASH_SECT 259 /* Max sectors */
167#define FLASH_MAX_SECTOR_SIZE 0x00040000 /* 256 KB sectors */
168
169/* Room required on the stack for the environment data */
170#define CONFIG_ENV_SIZE FLASH_MAX_SECTOR_SIZE
171
172/*
173 * Amount of flash used for environment:
174 * We don't know which end has the small erase blocks so we use the penultimate
175 * sector location for the environment
176 */
177#define CONFIG_ENV_SECT_SIZE FLASH_MAX_SECTOR_SIZE
178#define CONFIG_ENV_OVERWRITE 1
179
180/* Store environment at top of flash */
181#define CONFIG_ENV_IS_IN_FLASH 1
182#define CONFIG_ENV_OFFSET (PHYS_FLASH_SIZE - \
183 (2 * CONFIG_ENV_SECT_SIZE))
184#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE1 + \
185 CONFIG_ENV_OFFSET)
186#define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */
187#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */
188#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE0, \
189 CONFIG_SYS_FLASH_BASE1 }
190
191/* Monitor Command Prompt */
192#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
193#define CONFIG_SYS_PROMPT "VExpress# "
194#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
195 sizeof(CONFIG_SYS_PROMPT) + 16)
196#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */
197#define CONFIG_CMD_SOURCE
198#define CONFIG_SYS_LONGHELP
199#define CONFIG_CMDLINE_EDITING 1
200#define CONFIG_SYS_MAXARGS 16 /* max command args */
201
202#endif