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5e5f9ed2 WD |
1 | /* |
2 | * (C) Copyright 2005 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | #ifndef __CONFIG_H | |
25 | #define __CONFIG_H | |
26 | ||
27 | /* | |
28 | * High Level Configuration Options | |
29 | * (easy to change) | |
30 | */ | |
31 | ||
32 | #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ | |
33 | #define CONFIG_MPC5200 1 /* More exactly a MPC5200 */ | |
53677ef1 | 34 | #define CONFIG_CANMB 1 /* ... on canmb board - we need this for FEC.C */ |
5e5f9ed2 | 35 | |
6d0f6bcf | 36 | #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ |
5e5f9ed2 WD |
37 | |
38 | #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ | |
39 | #define BOOTFLAG_WARM 0x02 /* Software reboot */ | |
40 | ||
5e5f9ed2 WD |
41 | #define CONFIG_BOARD_EARLY_INIT_R |
42 | ||
31d82672 BB |
43 | #define CONFIG_HIGH_BATS 1 /* High BATs supported */ |
44 | ||
5e5f9ed2 WD |
45 | /* |
46 | * Serial console configuration | |
47 | */ | |
48 | #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */ | |
49 | #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */ | |
6d0f6bcf | 50 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } |
5e5f9ed2 | 51 | |
37e4f24b | 52 | |
80ff4f99 JL |
53 | /* |
54 | * BOOTP options | |
55 | */ | |
56 | #define CONFIG_BOOTP_BOOTFILESIZE | |
57 | #define CONFIG_BOOTP_BOOTPATH | |
58 | #define CONFIG_BOOTP_GATEWAY | |
59 | #define CONFIG_BOOTP_HOSTNAME | |
60 | ||
61 | ||
5e5f9ed2 | 62 | /* |
37e4f24b | 63 | * Command line configuration. |
5e5f9ed2 | 64 | */ |
37e4f24b JL |
65 | #include <config_cmd_default.h> |
66 | ||
67 | #define CONFIG_CMD_ASKENV | |
68 | #define CONFIG_CMD_DATE | |
69 | #define CONFIG_CMD_DHCP | |
70 | #define CONFIG_CMD_IMMAP | |
71 | #define CONFIG_CMD_MII | |
72 | #define CONFIG_CMD_NFS | |
73 | #define CONFIG_CMD_REGINFO | |
74 | #define CONFIG_CMD_SNTP | |
75 | ||
5e5f9ed2 WD |
76 | |
77 | /* | |
78 | * MUST be low boot - HIGHBOOT is not supported anymore | |
79 | */ | |
80 | #if (TEXT_BASE == 0xFE000000) /* Boot low with 32 MB Flash */ | |
6d0f6bcf JCPV |
81 | # define CONFIG_SYS_LOWBOOT 1 |
82 | # define CONFIG_SYS_LOWBOOT16 1 | |
5e5f9ed2 WD |
83 | #else |
84 | # error "TEXT_BASE must be 0xFE000000" | |
85 | #endif | |
86 | ||
87 | /* | |
88 | * Autobooting | |
89 | */ | |
90 | #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ | |
91 | ||
92 | #define CONFIG_PREBOOT "echo;" \ | |
32bf3d14 | 93 | "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \ |
5e5f9ed2 WD |
94 | "echo" |
95 | ||
96 | #undef CONFIG_BOOTARGS | |
97 | ||
98 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
99 | "netdev=eth0\0" \ | |
100 | "nfsargs=setenv bootargs root=/dev/nfs rw " \ | |
fe126d8b | 101 | "nfsroot=${serverip}:${rootpath}\0" \ |
5e5f9ed2 | 102 | "ramargs=setenv bootargs root=/dev/ram rw\0" \ |
fe126d8b WD |
103 | "addip=setenv bootargs ${bootargs} " \ |
104 | "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ | |
105 | ":${hostname}:${netdev}:off panic=1\0" \ | |
5e5f9ed2 | 106 | "flash_nfs=run nfsargs addip;" \ |
fe126d8b | 107 | "bootm ${kernel_addr}\0" \ |
5e5f9ed2 | 108 | "flash_self=run ramargs addip;" \ |
fe126d8b WD |
109 | "bootm ${kernel_addr} ${ramdisk_addr}\0" \ |
110 | "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \ | |
5e5f9ed2 WD |
111 | "rootpath=/opt/eldk/ppc_6xx\0" \ |
112 | "bootfile=/tftpboot/canmb/uImage\0" \ | |
113 | "" | |
114 | ||
115 | #define CONFIG_BOOTCOMMAND "run flash_self" | |
116 | ||
117 | /* | |
118 | * IPB Bus clocking configuration. | |
119 | */ | |
6d0f6bcf | 120 | #undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ |
5e5f9ed2 WD |
121 | |
122 | /* | |
123 | * Flash configuration, expect one 16 Megabyte Bank at most | |
124 | */ | |
6d0f6bcf JCPV |
125 | #define CONFIG_SYS_FLASH_BASE 0xFE000000 |
126 | #define CONFIG_SYS_FLASH_SIZE 0x02000000 | |
127 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */ | |
128 | #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sects on one chip */ | |
5e5f9ed2 | 129 | |
6d0f6bcf JCPV |
130 | #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ |
131 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ | |
5e5f9ed2 | 132 | |
00b1883a | 133 | #define CONFIG_FLASH_CFI_DRIVER |
6d0f6bcf JCPV |
134 | #define CONFIG_SYS_FLASH_CFI |
135 | #define CONFIG_SYS_FLASH_EMPTY_INFO | |
5e5f9ed2 | 136 | |
5e5f9ed2 WD |
137 | /* |
138 | * Environment settings | |
139 | */ | |
5a1aceb0 | 140 | #define CONFIG_ENV_IS_IN_FLASH 1 |
0e8d1586 JCPV |
141 | #define CONFIG_ENV_OFFSET (2*128*1024) |
142 | #define CONFIG_ENV_SIZE 0x2000 | |
143 | #define CONFIG_ENV_SECT_SIZE (128*1024) | |
5e5f9ed2 WD |
144 | |
145 | /* | |
146 | * Memory map | |
147 | * | |
148 | * Warning!!! with the current BestComm Task, MBAR MUST BE set to 0xf0000000 | |
149 | */ | |
6d0f6bcf JCPV |
150 | #define CONFIG_SYS_MBAR 0xf0000000 /* DO NOT CHANGE this */ |
151 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 | |
152 | #define CONFIG_SYS_DEFAULT_MBAR 0x80000000 | |
5e5f9ed2 WD |
153 | |
154 | /* Use SRAM until RAM will be available */ | |
6d0f6bcf JCPV |
155 | #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM |
156 | #define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE /* End of used area in DPRAM */ | |
5e5f9ed2 WD |
157 | |
158 | ||
6d0f6bcf JCPV |
159 | #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ |
160 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) | |
161 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET | |
5e5f9ed2 | 162 | |
6d0f6bcf JCPV |
163 | #define CONFIG_SYS_MONITOR_BASE TEXT_BASE |
164 | #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) | |
165 | # define CONFIG_SYS_RAMBOOT 1 | |
5e5f9ed2 WD |
166 | #endif |
167 | ||
6d0f6bcf JCPV |
168 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ |
169 | #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ | |
170 | #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ | |
5e5f9ed2 WD |
171 | |
172 | /* | |
173 | * Ethernet configuration | |
174 | */ | |
175 | #define CONFIG_MPC5xxx_FEC 1 | |
a6310928 | 176 | #define CONFIG_PHY_ADDR 0x0 |
5e5f9ed2 WD |
177 | /* |
178 | * GPIO configuration: | |
179 | * PSC1,2,3 predefined as UART | |
180 | * PCI disabled | |
181 | * Ethernet 100 with MD | |
182 | */ | |
6d0f6bcf | 183 | #define CONFIG_SYS_GPS_PORT_CONFIG 0x00058444 |
5e5f9ed2 WD |
184 | |
185 | /* | |
186 | * Miscellaneous configurable options | |
187 | */ | |
6d0f6bcf JCPV |
188 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
189 | #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ | |
37e4f24b | 190 | #if defined(CONFIG_CMD_KGDB) |
6d0f6bcf | 191 | # define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
5e5f9ed2 | 192 | #else |
6d0f6bcf | 193 | # define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
5e5f9ed2 | 194 | #endif |
6d0f6bcf JCPV |
195 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
196 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
197 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ | |
5e5f9ed2 | 198 | |
6d0f6bcf JCPV |
199 | #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ |
200 | #define CONFIG_SYS_MEMTEST_END 0x01f00000 /* 1 ... 31 MB in DRAM */ | |
5e5f9ed2 | 201 | |
6d0f6bcf | 202 | #define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */ |
5e5f9ed2 | 203 | |
6d0f6bcf | 204 | #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ |
5e5f9ed2 WD |
205 | |
206 | #define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */ | |
207 | ||
6d0f6bcf | 208 | #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */ |
37e4f24b | 209 | #if defined(CONFIG_CMD_KGDB) |
6d0f6bcf | 210 | # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ |
37e4f24b JL |
211 | #endif |
212 | ||
5e5f9ed2 WD |
213 | /* |
214 | * Various low-level settings | |
215 | */ | |
6d0f6bcf JCPV |
216 | #define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI |
217 | #define CONFIG_SYS_HID0_FINAL HID0_ICE | |
5e5f9ed2 | 218 | |
6d0f6bcf JCPV |
219 | #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE |
220 | #define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE | |
221 | #define CONFIG_SYS_BOOTCS_CFG 0x00047D01 | |
222 | #define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE | |
223 | #define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE | |
5e5f9ed2 | 224 | |
6d0f6bcf JCPV |
225 | #define CONFIG_SYS_CS_BURST 0x00000000 |
226 | #define CONFIG_SYS_CS_DEADCYCLE 0x33333333 | |
5e5f9ed2 | 227 | |
6d0f6bcf | 228 | #define CONFIG_SYS_RESET_ADDRESS 0x7f000000 |
5e5f9ed2 WD |
229 | |
230 | #endif /* __CONFIG_H */ |