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9b75bad0 SL |
1 | /* |
2 | * | |
3 | * Congatec Conga-QEVAl board configuration file. | |
4 | * | |
5 | * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. | |
6 | * Based on Freescale i.MX6Q Sabre Lite board configuration file. | |
7 | * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com> | |
8 | * Leo Sartre, <lsartre@adeneo-embedded.com> | |
9 | * | |
1a459660 | 10 | * SPDX-License-Identifier: GPL-2.0+ |
9b75bad0 SL |
11 | */ |
12 | ||
13 | #ifndef __CONFIG_CGTQMX6EVAL_H | |
14 | #define __CONFIG_CGTQMX6EVAL_H | |
15 | ||
16 | #define CONFIG_MX6 | |
17 | ||
18 | #include "mx6_common.h" | |
19 | ||
20 | #define CONFIG_DISPLAY_CPUINFO | |
21 | #define CONFIG_DISPLAY_BOARDINFO | |
22 | ||
23 | #define CONFIG_MACH_TYPE 4122 | |
24 | ||
9b75bad0 SL |
25 | #define CONFIG_CMDLINE_TAG |
26 | #define CONFIG_SETUP_MEMORY_TAGS | |
27 | #define CONFIG_INITRD_TAG | |
28 | #define CONFIG_REVISION_TAG | |
29 | ||
30 | /* Size of malloc() pool */ | |
31 | #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) | |
32 | ||
33 | #define CONFIG_BOARD_EARLY_INIT_F | |
34 | #define CONFIG_MISC_INIT_R | |
35 | #define CONFIG_MXC_GPIO | |
36 | ||
37 | #define CONFIG_MXC_UART | |
38 | #define CONFIG_MXC_UART_BASE UART2_BASE | |
39 | ||
40 | /* MMC Configs */ | |
41 | #define CONFIG_FSL_ESDHC | |
42 | #define CONFIG_FSL_USDHC | |
43 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 | |
44 | ||
45 | #define CONFIG_MMC | |
46 | #define CONFIG_CMD_MMC | |
47 | #define CONFIG_GENERIC_MMC | |
48 | #define CONFIG_BOUNCE_BUFFER | |
49 | #define CONFIG_CMD_EXT2 | |
50 | #define CONFIG_CMD_FAT | |
51 | #define CONFIG_DOS_PARTITION | |
52 | ||
53 | /* Miscellaneous commands */ | |
54 | #define CONFIG_CMD_BMODE | |
55 | ||
56 | /* allow to overwrite serial and ethaddr */ | |
57 | #define CONFIG_ENV_OVERWRITE | |
58 | #define CONFIG_CONS_INDEX 1 | |
59 | #define CONFIG_BAUDRATE 115200 | |
60 | ||
61 | /* Command definition */ | |
9b75bad0 SL |
62 | |
63 | #define CONFIG_BOOTDELAY 3 | |
64 | ||
65 | #define CONFIG_LOADADDR 0x12000000 | |
66 | #define CONFIG_SYS_TEXT_BASE 0x17800000 | |
67 | ||
68 | #define CONFIG_DEFAULT_FDT_FILE "imx6q-congatec.dtb" | |
69 | ||
70 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
71 | "script=boot.scr\0" \ | |
4ac0c2bf | 72 | "image=zImage\0" \ |
9b75bad0 SL |
73 | "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ |
74 | "boot_dir=/boot\0" \ | |
75 | "console=ttymxc1\0" \ | |
76 | "fdt_high=0xffffffff\0" \ | |
77 | "initrd_high=0xffffffff\0" \ | |
6584a1b5 | 78 | "fdt_addr=0x18000000\0" \ |
9b75bad0 SL |
79 | "boot_fdt=try\0" \ |
80 | "mmcdev=1\0" \ | |
81 | "mmcpart=1\0" \ | |
82 | "mmcroot=/dev/mmcblk0p1 rootwait rw\0" \ | |
83 | "mmcargs=setenv bootargs console=${console},${baudrate} " \ | |
84 | "root=${mmcroot}\0" \ | |
85 | "loadbootscript=" \ | |
86 | "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ | |
87 | "bootscript=echo Running bootscript from mmc ...; " \ | |
88 | "source\0" \ | |
4ac0c2bf OS |
89 | "loadimage=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \ |
90 | "${boot_dir}/${image}\0" \ | |
9b75bad0 SL |
91 | "loadfdt=ext2load mmc ${mmcdev}:${mmcpart} ${fdt_addr} " \ |
92 | "${boot_dir}/${fdt_file}\0" \ | |
93 | "mmcboot=echo Booting from mmc ...; " \ | |
94 | "run mmcargs; " \ | |
95 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ | |
96 | "if run loadfdt; then " \ | |
4ac0c2bf | 97 | "bootz ${loadaddr} - ${fdt_addr}; " \ |
9b75bad0 SL |
98 | "else " \ |
99 | "if test ${boot_fdt} = try; then " \ | |
4ac0c2bf | 100 | "bootz; " \ |
9b75bad0 SL |
101 | "else " \ |
102 | "echo WARN: Cannot load the DT; " \ | |
103 | "fi; " \ | |
104 | "fi; " \ | |
105 | "else " \ | |
4ac0c2bf | 106 | "bootz; " \ |
9b75bad0 SL |
107 | "fi;\0" |
108 | ||
109 | #define CONFIG_BOOTCOMMAND \ | |
110 | "mmc dev ${mmcdev};" \ | |
111 | "mmc dev ${mmcdev}; if mmc rescan; then " \ | |
112 | "if run loadbootscript; then " \ | |
113 | "run bootscript; " \ | |
114 | "else " \ | |
4ac0c2bf | 115 | "if run loadimage; then " \ |
9b75bad0 SL |
116 | "run mmcboot; " \ |
117 | "else "\ | |
118 | "echo ERR: Fail to boot from mmc; " \ | |
119 | "fi; " \ | |
120 | "fi; " \ | |
121 | "else echo ERR: Fail to boot from mmc; fi" | |
122 | ||
123 | /* Miscellaneous configurable options */ | |
124 | #define CONFIG_SYS_LONGHELP | |
125 | #define CONFIG_SYS_HUSH_PARSER | |
126 | #define CONFIG_SYS_PROMPT "CGT-QMX6-Quad U-Boot > " | |
127 | #define CONFIG_AUTO_COMPLETE | |
128 | #define CONFIG_SYS_CBSIZE 256 | |
129 | ||
130 | /* Print Buffer Size */ | |
131 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
132 | #define CONFIG_SYS_MAXARGS 16 | |
133 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
134 | ||
135 | #define CONFIG_SYS_MEMTEST_START 0x10000000 | |
136 | #define CONFIG_SYS_MEMTEST_END 0x10010000 | |
137 | #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 | |
138 | ||
139 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
9b75bad0 SL |
140 | |
141 | #define CONFIG_CMDLINE_EDITING | |
142 | ||
143 | /* Physical Memory Map */ | |
144 | #define CONFIG_NR_DRAM_BANKS 1 | |
145 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR | |
146 | #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) | |
147 | ||
148 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | |
149 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | |
150 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE | |
151 | ||
152 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
153 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
154 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
155 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
156 | ||
056845c2 | 157 | /* Environment organization */ |
9b75bad0 SL |
158 | #define CONFIG_ENV_SIZE (8 * 1024) |
159 | ||
160 | #define CONFIG_ENV_IS_IN_MMC | |
161 | ||
162 | #define CONFIG_ENV_OFFSET (6 * 64 * 1024) | |
163 | #define CONFIG_SYS_MMC_ENV_DEV 0 | |
164 | ||
165 | #define CONFIG_OF_LIBFDT | |
166 | #define CONFIG_CMD_BOOTZ | |
167 | ||
168 | #ifndef CONFIG_SYS_DCACHE_OFF | |
169 | #define CONFIG_CMD_CACHE | |
170 | #endif | |
171 | ||
172 | #endif /* __CONFIG_CGTQMX6EVAL_H */ |