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c74b2108 SK |
1 | /* |
2 | * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or | |
5 | * modify it under the terms of the GNU General Public License as | |
6 | * published by the Free Software Foundation; either version 2 of | |
7 | * the License, or (at your option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
17 | * MA 02111-1307 USA | |
18 | */ | |
19 | ||
20 | #ifndef __CONFIG_H | |
21 | #define __CONFIG_H | |
22 | #include <asm/sizes.h> | |
23 | ||
24 | /*=======*/ | |
25 | /* Board */ | |
26 | /*=======*/ | |
27 | #define SCHMOOGIE | |
6d0f6bcf JCPV |
28 | #define CONFIG_SYS_NAND_LARGEPAGE |
29 | #define CONFIG_SYS_USE_NAND | |
c74b2108 SK |
30 | /*===================*/ |
31 | /* SoC Configuration */ | |
32 | /*===================*/ | |
33 | #define CONFIG_ARM926EJS /* arm926ejs CPU core */ | |
34 | #define CONFIG_SYS_CLK_FREQ 297000000 /* Arm Clock frequency */ | |
6d0f6bcf JCPV |
35 | #define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */ |
36 | #define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */ | |
37 | #define CONFIG_SYS_HZ 1000 | |
c74b2108 SK |
38 | /*=============*/ |
39 | /* Memory Info */ | |
40 | /*=============*/ | |
6d0f6bcf JCPV |
41 | #define CONFIG_SYS_MALLOC_LEN (0x10000 + 256*1024) /* malloc() len */ |
42 | #define CONFIG_SYS_GBL_DATA_SIZE 128 /* reserved for initial data */ | |
43 | #define CONFIG_SYS_MEMTEST_START 0x80000000 /* memtest start address */ | |
44 | #define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */ | |
c74b2108 SK |
45 | #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ |
46 | #define CONFIG_STACKSIZE (256*1024) /* regular stack */ | |
47 | #define PHYS_SDRAM_1 0x80000000 /* DDR Start */ | |
48 | #define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */ | |
950a3924 | 49 | #define DDR_4BANKS /* 4-bank DDR2 (128MB) */ |
c74b2108 SK |
50 | /*====================*/ |
51 | /* Serial Driver info */ | |
52 | /*====================*/ | |
6d0f6bcf JCPV |
53 | #define CONFIG_SYS_NS16550 |
54 | #define CONFIG_SYS_NS16550_SERIAL | |
55 | #define CONFIG_SYS_NS16550_REG_SIZE 4 /* NS16550 register size */ | |
56 | #define CONFIG_SYS_NS16550_COM1 0x01c20000 /* Base address of UART0 */ | |
57 | #define CONFIG_SYS_NS16550_CLK 27000000 /* Input clock to NS16550 */ | |
c74b2108 SK |
58 | #define CONFIG_CONS_INDEX 1 /* use UART0 for console */ |
59 | #define CONFIG_BAUDRATE 115200 /* Default baud rate */ | |
6d0f6bcf | 60 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
c74b2108 SK |
61 | /*===================*/ |
62 | /* I2C Configuration */ | |
63 | /*===================*/ | |
64 | #define CONFIG_HARD_I2C | |
65 | #define CONFIG_DRIVER_DAVINCI_I2C | |
6d0f6bcf JCPV |
66 | #define CONFIG_SYS_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */ |
67 | #define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ | |
c74b2108 SK |
68 | /*==================================*/ |
69 | /* Network & Ethernet Configuration */ | |
70 | /*==================================*/ | |
71 | #define CONFIG_DRIVER_TI_EMAC | |
72 | #define CONFIG_MII | |
73 | #define CONFIG_BOOTP_DEFAULT | |
74 | #define CONFIG_BOOTP_DNS | |
75 | #define CONFIG_BOOTP_DNS2 | |
76 | #define CONFIG_BOOTP_SEND_HOSTNAME | |
77 | #define CONFIG_NET_RETRY_COUNT 10 | |
78 | #define CONFIG_OVERWRITE_ETHADDR_ONCE | |
79 | /*=====================*/ | |
80 | /* Flash & Environment */ | |
81 | /*=====================*/ | |
5a1aceb0 | 82 | #undef CONFIG_ENV_IS_IN_FLASH |
6d0f6bcf | 83 | #define CONFIG_SYS_NO_FLASH |
51bfee19 | 84 | #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ |
0e8d1586 JCPV |
85 | #define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */ |
86 | #define CONFIG_ENV_SIZE SZ_128K | |
c74b2108 SK |
87 | #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */ |
88 | #define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */ | |
6d0f6bcf JCPV |
89 | #define CONFIG_SYS_NAND_BASE 0x02000000 |
90 | #define CONFIG_SYS_NAND_HW_ECC | |
91 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ | |
c74b2108 | 92 | #define NAND_MAX_CHIPS 1 |
0e8d1586 | 93 | #define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ |
c74b2108 SK |
94 | /*=====================*/ |
95 | /* Board related stuff */ | |
96 | /*=====================*/ | |
97 | #define CONFIG_RTC_DS1307 /* RTC chip on SCHMOOGIE */ | |
6d0f6bcf | 98 | #define CONFIG_SYS_I2C_RTC_ADDR 0x6f /* RTC chip I2C address */ |
c74b2108 SK |
99 | #define CONFIG_HAS_UID |
100 | #define CONFIG_UID_DS28CM00 /* Unique ID on SCHMOOGIE */ | |
6d0f6bcf | 101 | #define CONFIG_SYS_UID_ADDR 0x50 /* UID chip I2C address */ |
c74b2108 SK |
102 | /*==============================*/ |
103 | /* U-Boot general configuration */ | |
104 | /*==============================*/ | |
53677ef1 | 105 | #undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ |
c74b2108 SK |
106 | #define CONFIG_MISC_INIT_R |
107 | #undef CONFIG_BOOTDELAY | |
108 | #define CONFIG_BOOTFILE "uImage" /* Boot file name */ | |
6d0f6bcf JCPV |
109 | #define CONFIG_SYS_PROMPT "U-Boot > " /* Monitor Command Prompt */ |
110 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ | |
111 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print buffer sz */ | |
112 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
113 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ | |
114 | #define CONFIG_SYS_LOAD_ADDR 0x80700000 /* default Linux kernel load address */ | |
c74b2108 SK |
115 | #define CONFIG_VERSION_VARIABLE |
116 | #define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */ | |
6d0f6bcf JCPV |
117 | #define CONFIG_SYS_HUSH_PARSER |
118 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " | |
c74b2108 | 119 | #define CONFIG_CMDLINE_EDITING |
6d0f6bcf | 120 | #define CONFIG_SYS_LONGHELP |
c74b2108 SK |
121 | #define CONFIG_CRC32_VERIFY |
122 | #define CONFIG_MX_CYCLIC | |
123 | /*===================*/ | |
124 | /* Linux Information */ | |
125 | /*===================*/ | |
126 | #define LINUX_BOOT_PARAM_ADDR 0x80000100 | |
127 | #define CONFIG_CMDLINE_TAG | |
128 | #define CONFIG_SETUP_MEMORY_TAGS | |
129 | #define CONFIG_BOOTARGS "mem=56M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp" | |
130 | #define CONFIG_BOOTCOMMAND "setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot" | |
131 | /*=================*/ | |
132 | /* U-Boot commands */ | |
133 | /*=================*/ | |
134 | #include <config_cmd_default.h> | |
135 | #define CONFIG_CMD_ASKENV | |
136 | #define CONFIG_CMD_DHCP | |
137 | #define CONFIG_CMD_DIAG | |
138 | #define CONFIG_CMD_I2C | |
139 | #define CONFIG_CMD_MII | |
140 | #define CONFIG_CMD_PING | |
141 | #define CONFIG_CMD_SAVES | |
142 | #define CONFIG_CMD_DATE | |
143 | #define CONFIG_CMD_NAND | |
144 | #undef CONFIG_CMD_EEPROM | |
145 | #undef CONFIG_CMD_BDI | |
146 | #undef CONFIG_CMD_FPGA | |
147 | #undef CONFIG_CMD_SETGETDCR | |
148 | #undef CONFIG_CMD_FLASH | |
149 | #undef CONFIG_CMD_IMLS | |
150 | /*=======================*/ | |
151 | /* KGDB support (if any) */ | |
152 | /*=======================*/ | |
153 | #ifdef CONFIG_CMD_KGDB | |
154 | #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ | |
155 | #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ | |
156 | #endif | |
157 | #endif /* __CONFIG_H */ |