[people/ms/u-boot.git] / include / configs / db-88f6820-gp.h

/*
 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef _CONFIG_DB_88F6820_GP_H
#define _CONFIG_DB_88F6820_GP_H

/*
 * High Level Configuration Options (easy to change)
 */

#define CONFIG_DISPLAY_BOARDINFO_LATE

/*
 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
 * for DDR ECC byte filling in the SPL before loading the main
 * U-Boot into it.
 */
#define CONFIG_SYS_TCLK		250000000	/* 250MHz */

/*
 * Commands configuration
 */

/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0		MVEBU_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE		0x0
#define CONFIG_SYS_I2C_SPEED		100000

/* SPI NOR flash default params, used by sf commands */
#define CONFIG_SF_DEFAULT_SPEED		1000000
#define CONFIG_SF_DEFAULT_MODE		SPI_MODE_3

/*
 * SDIO/MMC Card Configuration
 */
#define CONFIG_SYS_MMC_BASE		MVEBU_SDIO_BASE

/*
 * SATA/SCSI/AHCI configuration
 */
#define CONFIG_SCSI_AHCI_PLAT
#define CONFIG_SYS_SCSI_MAX_SCSI_ID	2
#define CONFIG_SYS_SCSI_MAX_LUN		1
#define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
					 CONFIG_SYS_SCSI_MAX_LUN)

/* USB/EHCI configuration */
#define CONFIG_EHCI_IS_TDI

/* Environment in SPI NOR flash */
#define CONFIG_ENV_OFFSET		(1 << 20) /* 1MiB in */
#define CONFIG_ENV_SIZE			(64 << 10) /* 64KiB */
#define CONFIG_ENV_SECT_SIZE		(256 << 10) /* 256KiB sectors */

#define CONFIG_PHY_MARVELL		/* there is a marvell phy */
#define PHY_ANEG_TIMEOUT	8000	/* PHY needs a longer aneg time */

/* PCIe support */
#ifndef CONFIG_SPL_BUILD
#define CONFIG_PCI_MVEBU
#define CONFIG_PCI_SCAN_SHOW
#endif

#define CONFIG_SYS_ALT_MEMTEST

/* Keep device tree and initrd in lower memory so the kernel can access them */
#define CONFIG_EXTRA_ENV_SETTINGS	\
	"fdt_high=0x10000000\0"		\
	"initrd_high=0x10000000\0"

/* SPL */
/*
 * Select the boot device here
 *
 * Currently supported are:
 * SPL_BOOT_SPI_NOR_FLASH	- Booting via SPI NOR flash
 * SPL_BOOT_SDIO_MMC_CARD	- Booting via SDIO/MMC card (partition 1)
 */
#define SPL_BOOT_SPI_NOR_FLASH		1
#define SPL_BOOT_SDIO_MMC_CARD		2
#define CONFIG_SPL_BOOT_DEVICE		SPL_BOOT_SPI_NOR_FLASH

/* Defines for SPL */
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_SIZE			(140 << 10)
#define CONFIG_SPL_TEXT_BASE		0x40000030
#define CONFIG_SPL_MAX_SIZE		(CONFIG_SPL_SIZE - 0x0030)

#define CONFIG_SPL_BSS_START_ADDR	(0x40000000 + CONFIG_SPL_SIZE)
#define CONFIG_SPL_BSS_MAX_SIZE		(16 << 10)

#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_MALLOC_SIMPLE
#endif

#define CONFIG_SPL_STACK		(0x40000000 + ((192 - 16) << 10))
#define CONFIG_SPL_BOOTROM_SAVE		(CONFIG_SPL_STACK + 4)

#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
/* SPL related SPI defines */
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x24000
#define CONFIG_SYS_U_BOOT_OFFS		CONFIG_SYS_SPI_U_BOOT_OFFS
#endif

#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
/* SPL related MMC defines */
#define CONFIG_SYS_MMC_U_BOOT_OFFS		(160 << 10)
#define CONFIG_SYS_U_BOOT_OFFS			CONFIG_SYS_MMC_U_BOOT_OFFS
#ifdef CONFIG_SPL_BUILD
#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER	0x00180000	/* in SDRAM */
#endif
#endif

/*
 * mv-common.h should be defined after CMD configs since it used them
 * to enable certain macros
 */
#include "mv-common.h"

#endif /* _CONFIG_DB_88F6820_GP_H */
Commit	Line	Data
2bae75a4 SR	1	/*
	2	* Copyright (C) 2014 Stefan Roese <sr@denx.de>
	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*/
	6
	7	#ifndef _CONFIG_DB_88F6820_GP_H
	8	#define _CONFIG_DB_88F6820_GP_H
	9
	10	/*
	11	* High Level Configuration Options (easy to change)
	12	*/
2bae75a4	13
2bae75a4 SR	14	#define CONFIG_DISPLAY_BOARDINFO_LATE
2bae75a4 SR	15
2923c2d2 SR	16	/*
	17	* TEXT_BASE needs to be below 16MiB, since this area is scrubbed
	18	* for DDR ECC byte filling in the SPL before loading the main
	19	* U-Boot into it.
	20	*/
2bae75a4 SR	21	#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
	22
	23	/*
	24	* Commands configuration
	25	*/
2bae75a4 SR	26
	27	/* I2C */
	28	#define CONFIG_SYS_I2C
	29	#define CONFIG_SYS_I2C_MVTWSI
	30	#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
	31	#define CONFIG_SYS_I2C_SLAVE 0x0
	32	#define CONFIG_SYS_I2C_SPEED 100000
	33
	34	/* SPI NOR flash default params, used by sf commands */
	35	#define CONFIG_SF_DEFAULT_SPEED 1000000
	36	#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
2bae75a4	37
e80f1e85 SR	38	/*
	39	* SDIO/MMC Card Configuration
	40	*/
e80f1e85 SR	41	#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
e80f1e85 SR	42
7cbaff95 SR	43	/*
	44	* SATA/SCSI/AHCI configuration
	45	*/
7cbaff95 SR	46	#define CONFIG_SCSI_AHCI_PLAT
	47	#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
	48	#define CONFIG_SYS_SCSI_MAX_LUN 1
	49	#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
	50	CONFIG_SYS_SCSI_MAX_LUN)
	51
59565736	52	/* USB/EHCI configuration */
59565736 SR	53	#define CONFIG_EHCI_IS_TDI
59565736 SR	54
2bae75a4	55	/* Environment in SPI NOR flash */
2bae75a4 SR	56	#define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */
	57	#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
	58	#define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */
	59
	60	#define CONFIG_PHY_MARVELL /* there is a marvell phy */
2bae75a4 SR	61	#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
2bae75a4 SR	62
ce2cb1d3	63	/* PCIe support */
6451223a	64	#ifndef CONFIG_SPL_BUILD
ce2cb1d3	65	#define CONFIG_PCI_MVEBU
ce2cb1d3	66	#define CONFIG_PCI_SCAN_SHOW
6451223a	67	#endif
ce2cb1d3	68
2bae75a4 SR	69	#define CONFIG_SYS_ALT_MEMTEST
2bae75a4 SR	70
3fd38af7 KS	71	/* Keep device tree and initrd in lower memory so the kernel can access them */
	72	#define CONFIG_EXTRA_ENV_SETTINGS \
	73	"fdt_high=0x10000000\0" \
	74	"initrd_high=0x10000000\0"
	75
9e30b31d	76	/* SPL */
7853c508 SR	77	/*
	78	* Select the boot device here
	79	*
	80	* Currently supported are:
	81	* SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
	82	* SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1)
	83	*/
	84	#define SPL_BOOT_SPI_NOR_FLASH 1
	85	#define SPL_BOOT_SDIO_MMC_CARD 2
	86	#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH
	87
9e30b31d SR	88	/* Defines for SPL */
	89	#define CONFIG_SPL_FRAMEWORK
	90	#define CONFIG_SPL_SIZE (140 << 10)
	91	#define CONFIG_SPL_TEXT_BASE 0x40000030
	92	#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030)
	93
	94	#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
	95	#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
	96
6451223a SR	97	#ifdef CONFIG_SPL_BUILD
	98	#define CONFIG_SYS_MALLOC_SIMPLE
	99	#endif
9e30b31d SR	100
	101	#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
	102	#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
	103
7853c508	104	#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
9e30b31d	105	/* SPL related SPI defines */
9e30b31d	106	#define CONFIG_SPL_SPI_LOAD
09a54c00	107	#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000
7853c508 SR	108	#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
	109	#endif
	110
	111	#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
	112	/* SPL related MMC defines */
7853c508 SR	113	#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
7853c508 SR	114	#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
7853c508 SR	115	#ifdef CONFIG_SPL_BUILD
	116	#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
	117	#endif
	118	#endif
9e30b31d	119
2bae75a4 SR	120	/*
	121	* mv-common.h should be defined after CMD configs since it used them
	122	* to enable certain macros
	123	*/
	124	#include "mv-common.h"
	125
	126	#endif /* _CONFIG_DB_88F6820_GP_H */