[people/ms/u-boot.git] / include / configs / gr_cpci_ax2000.h

/* Configuration header file for Gaisler GR-CPCI-AX2000
 * AX board. Note that since the AX is removable the configuration
 * for this board must be edited below.
 *
 * (C) Copyright 2003-2005
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * (C) Copyright 2008
 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H__
#define __CONFIG_H__

/*
 * High Level Configuration Options
 * (easy to change)
 */

#define CONFIG_CPCI_AX2000	1	/* ... on GR-CPCI-AX2000 board */

#define CONFIG_LEON_RAM_SRAM 1
#define CONFIG_LEON_RAM_SDRAM 2
#define CONFIG_LEON_RAM_SDRAM_NOSRAM 3

/* Select Memory to run from
 *
 * SRAM          - UBoot is run in SRAM, SRAM-0x40000000, SDRAM-0x60000000
 * SDRAM         - UBoot is run in SDRAM, SRAM-0x40000000 and SDRAM-0x60000000
 * SDRAM_NOSRAM  - UBoot is run in SDRAM, SRAM not available, SDRAM at 0x40000000
 *
 * Note, if Linux is to be used, SDRAM or SDRAM_NOSRAM is required since
 * it doesn't fit into the 4Mb SRAM.
 *
 * SRAM is default since it will work for all systems, however will not
 * be able to boot linux.
 */
#define CONFIG_LEON_RAM_SELECT CONFIG_LEON_RAM_SRAM

/* CPU / AMBA BUS configuration */
#define CONFIG_SYS_CLK_FREQ	20000000	/* 20MHz */

/*
 * Serial console configuration
 */
#define CONFIG_BAUDRATE		38400	/* ... at 38400 bps */
#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }

/* Partitions */
#define CONFIG_ISO_PARTITION

/*
 * Supported commands
 */
#define CONFIG_CMD_REGINFO
#define CONFIG_CMD_DIAG
#define CONFIG_CMD_IRQ

/*
 * Autobooting
 */

#define CONFIG_PREBOOT	"echo;"	\
	"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
	"echo"

#undef	CONFIG_BOOTARGS

#define	CONFIG_EXTRA_ENV_SETTINGS_BASE					\
	"netdev=eth0\0"							\
	"nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw "	\
		"nfsroot=${serverip}:${rootpath}\0"			\
	"ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0"			\
	"addip=setenv bootargs ${bootargs} "				\
		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
		":${hostname}:${netdev}:off panic=1\0"			\
	"flash_nfs=run nfsargs addip;"					\
		"bootm ${kernel_addr}\0"				\
	"flash_self=run ramargs addip;"					\
		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
	"getkernel=tftpboot $(scratch) $(bootfile)\0" \
	"bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.206:192.168.0.20:192.168.0.1:255.255.255.0:ax2000:eth0\0"

#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SRAM
#define CONFIG_EXTRA_ENV_SETTINGS_SELECT \
	"net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0"	\
	"scratch=40200000\0"					\
	""
#elif CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM
#define CONFIG_EXTRA_ENV_SETTINGS_SELECT \
	"net_nfs=tftp 60000000 ${bootfile};run nfsargs addip;bootm\0"	\
	"scratch=60800000\0"					\
	""
#else
/* More than 4Mb is assumed when running from SDRAM */
#define CONFIG_EXTRA_ENV_SETTINGS_SELECT \
	"net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0"	\
	"scratch=40800000\0"					\
	""
#endif

#define	CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_SETTINGS_BASE CONFIG_EXTRA_ENV_SETTINGS_SELECT

#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_GATEWAYIP 192.168.0.1
#define CONFIG_SERVERIP 192.168.0.20
#define CONFIG_IPADDR 192.168.0.206
#define CONFIG_ROOTPATH "/export/rootfs"
#define CONFIG_HOSTNAME  ax2000
#define CONFIG_BOOTFILE "/uImage"

#define CONFIG_BOOTCOMMAND	"run flash_self"

/* Memory MAP
 *
 *  Flash:
 *  |--------------------------------|
 *  | 0x00000000 Text & Data & BSS   | *
 *  |            for Monitor         | *
 *  | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
 *  | UNUSED / Growth                | * 256kb
 *  |--------------------------------|
 *  | 0x00050000 Base custom area    | *
 *  |            kernel / FS         | *
 *  |                                | * Rest of Flash
 *  |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
 *  | END-0x00008000 Environment     | * 32kb
 *  |--------------------------------|
 *
 *
 *
 *  Main Memory (4Mb SRAM or XMb SDRAM):
 *  |--------------------------------|
 *  | UNUSED / scratch area          |
 *  |                                |
 *  |                                |
 *  |                                |
 *  |                                |
 *  |--------------------------------|
 *  | Monitor .Text / .DATA / .BSS   | * 256kb
 *  | Relocated!                     | *
 *  |--------------------------------|
 *  | Monitor Malloc                 | * 128kb (contains relocated environment)
 *  |--------------------------------|
 *  | Monitor/kernel STACK           | * 64kb
 *  |--------------------------------|
 *  | Page Table for MMU systems     | * 2k
 *  |--------------------------------|
 *  | PROM Code accessed from Linux  | * 6kb-128b
 *  |--------------------------------|
 *  | Global data (avail from kernel)| * 128b
 *  |--------------------------------|
 *
 */

/*
 * Flash configuration (8,16 or 32 MB)
 * TEXT base always at 0xFFF00000
 * ENV_ADDR always at  0xFFF40000
 * FLASH_BASE at 0xFC000000 for 64 MB
 *               0xFE000000 for 32 MB
 *               0xFF000000 for 16 MB
 *               0xFF800000 for  8 MB
 */
/*#define CONFIG_SYS_NO_FLASH		1*/
#define CONFIG_SYS_FLASH_BASE		0x00000000
#define CONFIG_SYS_FLASH_SIZE		0x00800000

#define PHYS_FLASH_SECT_SIZE	0x00020000	/* 128 KB sectors */
#define CONFIG_SYS_MAX_FLASH_SECT	64	/* max num of sects on one chip */
#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max num of memory banks      */

#define CONFIG_SYS_FLASH_ERASE_TOUT	240000	/* Flash Erase Timeout (in ms)  */
#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Flash Write Timeout (in ms)  */
#define CONFIG_SYS_FLASH_LOCK_TOUT	5	/* Timeout for Flash Set Lock Bit (in ms) */
#define CONFIG_SYS_FLASH_UNLOCK_TOUT	10000	/* Timeout for Flash Clear Lock Bits (in ms) */
#define CONFIG_SYS_FLASH_PROTECTION	/* "Real" (hardware) sectors protection */

/*** CFI CONFIG ***/
#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_8BIT
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_CFI
/* Bypass cache when reading regs from flash memory */
#define CONFIG_SYS_FLASH_CFI_BYPASS_READ
/* Buffered writes (32byte/go) instead of single accesses */
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE

/*
 * Environment settings
 */
/*#define CONFIG_ENV_IS_NOWHERE 1*/
#define CONFIG_ENV_IS_IN_FLASH	1
/* CONFIG_ENV_ADDR need to be at sector boundary */
#define CONFIG_ENV_SIZE		0x8000
#define CONFIG_ENV_SECT_SIZE	0x20000
#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_OVERWRITE	1

/*
 * Memory map
 *
 * Always 4Mb SRAM available
 * SDRAM module may be available on 0x60000000, SDRAM
 * is configured as if a 128Mb SDRAM module is available.
 */

#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
#define CONFIG_SYS_SDRAM_BASE		0x40000000
#else
#define CONFIG_SYS_SDRAM_BASE		0x60000000
#endif

#define CONFIG_SYS_SDRAM_SIZE		0x08000000
#define CONFIG_SYS_SDRAM_END		(CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)

/* 4Mb SRAM available */
#if CONFIG_LEON_RAM_SELECT != CONFIG_LEON_RAM_SDRAM_NOSRAM
#define CONFIG_SYS_SRAM_BASE 0x40000000
#define CONFIG_SYS_SRAM_SIZE 0x400000
#define CONFIG_SYS_SRAM_END  (CONFIG_SYS_SRAM_BASE+CONFIG_SYS_SRAM_SIZE)
#endif

/* Select RAM used to run U-BOOT from... */
#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SRAM
#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SRAM_BASE
#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SRAM_SIZE
#define CONFIG_SYS_RAM_END CONFIG_SYS_SRAM_END
#else
#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
#endif

#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)

#define CONFIG_SYS_PROM_SIZE		(8192-GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_PROM_OFFSET		(CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)

#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_PROM_OFFSET-32)
#define CONFIG_SYS_STACK_SIZE		(0x10000-32)

#define CONFIG_SYS_MONITOR_BASE    CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#   define CONFIG_SYS_RAMBOOT		1
#endif

#define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor   */
#define CONFIG_SYS_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()  */
#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */

#define CONFIG_SYS_MALLOC_END		(CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
#define CONFIG_SYS_MALLOC_BASE		(CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)

/* relocated monitor area */
#define CONFIG_SYS_RELOC_MONITOR_MAX_END   CONFIG_SYS_MALLOC_BASE
#define CONFIG_SYS_RELOC_MONITOR_BASE     (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)

/* make un relocated address from relocated address */
#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))

/*
 * Ethernet configuration uses on board SMC91C111
 */
#define CONFIG_SMC91111          1
#define CONFIG_SMC91111_BASE		0x20000300	/* chip select 3         */
#define CONFIG_SMC_USE_32_BIT		1	/* 32 bit bus  */
#undef  CONFIG_SMC_91111_EXT_PHY	/* we use internal phy   */
/*#define CONFIG_SHOW_ACTIVITY*/
#define CONFIG_NET_RETRY_COUNT		10	/* # of retries          */

#define CONFIG_PHY_ADDR	 0x00

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_LONGHELP		/* undef to save memory     */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size  */
#else
#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size  */
#endif
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)	/* Print Buffer Size */
#define CONFIG_SYS_MAXARGS		16	/* max number of command args   */
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size    */

#define CONFIG_SYS_MEMTEST_START	0x00100000	/* memtest works on */
#define CONFIG_SYS_MEMTEST_END		0x00f00000	/* 1 ... 15 MB in DRAM  */

#define CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address */

/*
 * Various low-level settings
 */

/*-----------------------------------------------------------------------
 * USB stuff
 *-----------------------------------------------------------------------
 */
#define CONFIG_USB_CLOCK	0x0001BBBB
#define CONFIG_USB_CONFIG	0x00005000

/***** Gaisler GRLIB IP-Cores Config ********/

#define CONFIG_SYS_GRLIB_SDRAM    0

/* No SDRAM Configuration */
#undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1

/* See, GRLIB Docs (grip.pdf) on how to set up
 * These the memory controller registers.
 */
#define CONFIG_SYS_GRLIB_ESA_MCTRL1
#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1   (0x10f800ff | (1<<11))
#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2   0x82206000
#else
#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2   0x82205260
#endif
#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3   0x0809a000

/* GRLIB FT-MCTRL configuration */
#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1   (0x10f800ff | (1<<11))
#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2   0x82206000
#else
#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2   0x82205260
#endif
#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3   0x0809a000

/* no DDR controller */
#undef CONFIG_SYS_GRLIB_GAISLER_DDRSPA1

/* no DDR2 Controller */
#undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1

/* default kernel command line */
#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"

#endif				/* __CONFIG_H */
Commit	Line	Data
6ed8a43a DH	1	/* Configuration header file for Gaisler GR-CPCI-AX2000
	2	* AX board. Note that since the AX is removable the configuration
	3	* for this board must be edited below.
	4	*
	5	* (C) Copyright 2003-2005
	6	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	7	*
	8	* (C) Copyright 2008
	9	* Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
	10	*
3765b3e7	11	* SPDX-License-Identifier: GPL-2.0+
6ed8a43a DH	12	*/
	13
	14	#ifndef __CONFIG_H__
	15	#define __CONFIG_H__
	16
	17	/*
	18	* High Level Configuration Options
	19	* (easy to change)
	20	*/
	21
6ed8a43a DH	22	#define CONFIG_CPCI_AX2000 1 /* ... on GR-CPCI-AX2000 board */
	23
	24	#define CONFIG_LEON_RAM_SRAM 1
	25	#define CONFIG_LEON_RAM_SDRAM 2
	26	#define CONFIG_LEON_RAM_SDRAM_NOSRAM 3
	27
	28	/* Select Memory to run from
	29	*
	30	* SRAM - UBoot is run in SRAM, SRAM-0x40000000, SDRAM-0x60000000
	31	* SDRAM - UBoot is run in SDRAM, SRAM-0x40000000 and SDRAM-0x60000000
	32	* SDRAM_NOSRAM - UBoot is run in SDRAM, SRAM not available, SDRAM at 0x40000000
	33	*
	34	* Note, if Linux is to be used, SDRAM or SDRAM_NOSRAM is required since
	35	* it doesn't fit into the 4Mb SRAM.
	36	*
	37	* SRAM is default since it will work for all systems, however will not
	38	* be able to boot linux.
	39	*/
	40	#define CONFIG_LEON_RAM_SELECT CONFIG_LEON_RAM_SRAM
	41
	42	/* CPU / AMBA BUS configuration */
53677ef1	43	#define CONFIG_SYS_CLK_FREQ 20000000 /* 20MHz */
6ed8a43a	44
6ed8a43a DH	45	/*
	46	* Serial console configuration
	47	*/
	48	#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
6d0f6bcf	49	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
6ed8a43a DH	50
6ed8a43a DH	51	/* Partitions */
6ed8a43a DH	52	#define CONFIG_ISO_PARTITION
	53
	54	/*
	55	* Supported commands
	56	*/
6ed8a43a	57	#define CONFIG_CMD_REGINFO
6ed8a43a DH	58	#define CONFIG_CMD_DIAG
	59	#define CONFIG_CMD_IRQ
	60
	61	/*
	62	* Autobooting
	63	*/
6ed8a43a DH	64
	65	#define CONFIG_PREBOOT "echo;" \
	66	"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
	67	"echo"
	68
	69	#undef CONFIG_BOOTARGS
	70
	71	#define CONFIG_EXTRA_ENV_SETTINGS_BASE \
	72	"netdev=eth0\0" \
	73	"nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \
	74	"nfsroot=${serverip}:${rootpath}\0" \
	75	"ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \
	76	"addip=setenv bootargs ${bootargs} " \
	77	"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
	78	":${hostname}:${netdev}:off panic=1\0" \
	79	"flash_nfs=run nfsargs addip;" \
	80	"bootm ${kernel_addr}\0" \
	81	"flash_self=run ramargs addip;" \
	82	"bootm ${kernel_addr} ${ramdisk_addr}\0" \
3a2b9f28	83	"getkernel=tftpboot $(scratch) $(bootfile)\0" \
6ed8a43a DH	84	"bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.206:192.168.0.20:192.168.0.1:255.255.255.0:ax2000:eth0\0"
	85
	86	#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SRAM
	87	#define CONFIG_EXTRA_ENV_SETTINGS_SELECT \
	88	"net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
	89	"scratch=40200000\0" \
	90	""
	91	#elif CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM
	92	#define CONFIG_EXTRA_ENV_SETTINGS_SELECT \
	93	"net_nfs=tftp 60000000 ${bootfile};run nfsargs addip;bootm\0" \
	94	"scratch=60800000\0" \
	95	""
	96	#else
	97	/* More than 4Mb is assumed when running from SDRAM */
	98	#define CONFIG_EXTRA_ENV_SETTINGS_SELECT \
	99	"net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
	100	"scratch=40800000\0" \
	101	""
	102	#endif
	103
	104	#define CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_SETTINGS_BASE CONFIG_EXTRA_ENV_SETTINGS_SELECT
	105
	106	#define CONFIG_NETMASK 255.255.255.0
	107	#define CONFIG_GATEWAYIP 192.168.0.1
	108	#define CONFIG_SERVERIP 192.168.0.20
	109	#define CONFIG_IPADDR 192.168.0.206
8b3637c6	110	#define CONFIG_ROOTPATH "/export/rootfs"
6ed8a43a	111	#define CONFIG_HOSTNAME ax2000
b3f44c21	112	#define CONFIG_BOOTFILE "/uImage"
6ed8a43a DH	113
	114	#define CONFIG_BOOTCOMMAND "run flash_self"
	115
	116	/* Memory MAP
	117	*
	118	* Flash:
	119	* \|--------------------------------\|
	120	* \| 0x00000000 Text & Data & BSS \| *
	121	* \| for Monitor \| *
	122	* \| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\| *
	123	* \| UNUSED / Growth \| * 256kb
	124	* \|--------------------------------\|
	125	* \| 0x00050000 Base custom area \| *
	126	* \| kernel / FS \| *
	127	* \| \| * Rest of Flash
	128	* \|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\|
	129	* \| END-0x00008000 Environment \| * 32kb
	130	* \|--------------------------------\|
	131	*
	132	*
	133	*
	134	* Main Memory (4Mb SRAM or XMb SDRAM):
	135	* \|--------------------------------\|
	136	* \| UNUSED / scratch area \|
	137	* \| \|
	138	* \| \|
	139	* \| \|
	140	* \| \|
	141	* \|--------------------------------\|
	142	* \| Monitor .Text / .DATA / .BSS \| * 256kb
	143	* \| Relocated! \| *
	144	* \|--------------------------------\|
	145	* \| Monitor Malloc \| * 128kb (contains relocated environment)
	146	* \|--------------------------------\|
	147	* \| Monitor/kernel STACK \| * 64kb
	148	* \|--------------------------------\|
	149	* \| Page Table for MMU systems \| * 2k
	150	* \|--------------------------------\|
	151	* \| PROM Code accessed from Linux \| * 6kb-128b
	152	* \|--------------------------------\|
	153	* \| Global data (avail from kernel)\| * 128b
	154	* \|--------------------------------\|
	155	*
	156	*/
	157
	158	/*
	159	* Flash configuration (8,16 or 32 MB)
	160	* TEXT base always at 0xFFF00000
	161	* ENV_ADDR always at 0xFFF40000
	162	* FLASH_BASE at 0xFC000000 for 64 MB
	163	* 0xFE000000 for 32 MB
	164	* 0xFF000000 for 16 MB
	165	* 0xFF800000 for 8 MB
	166	*/
6d0f6bcf JCPV	167	/#define CONFIG_SYS_NO_FLASH 1/
	168	#define CONFIG_SYS_FLASH_BASE 0x00000000
	169	#define CONFIG_SYS_FLASH_SIZE 0x00800000
6ed8a43a DH	170
6ed8a43a DH	171	#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
6d0f6bcf JCPV	172	#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
6d0f6bcf JCPV	173	#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
6ed8a43a	174
6d0f6bcf JCPV	175	#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
	176	#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
	177	#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
	178	#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
	179	#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
6ed8a43a DH	180
6ed8a43a DH	181	/* CFI CONFIG */
6d0f6bcf	182	#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
00b1883a	183	#define CONFIG_FLASH_CFI_DRIVER
6d0f6bcf	184	#define CONFIG_SYS_FLASH_CFI
6ed8a43a	185	/* Bypass cache when reading regs from flash memory */
6d0f6bcf	186	#define CONFIG_SYS_FLASH_CFI_BYPASS_READ
6ed8a43a	187	/* Buffered writes (32byte/go) instead of single accesses */
6d0f6bcf	188	#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
6ed8a43a DH	189
	190	/*
	191	* Environment settings
	192	*/
93f6d725	193	/#define CONFIG_ENV_IS_NOWHERE 1/
5a1aceb0	194	#define CONFIG_ENV_IS_IN_FLASH 1
0e8d1586 JCPV	195	/* CONFIG_ENV_ADDR need to be at sector boundary */
	196	#define CONFIG_ENV_SIZE 0x8000
	197	#define CONFIG_ENV_SECT_SIZE 0x20000
6d0f6bcf	198	#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE)
6ed8a43a DH	199	#define CONFIG_ENV_OVERWRITE 1
	200
	201	/*
	202	* Memory map
	203	*
	204	* Always 4Mb SRAM available
	205	* SDRAM module may be available on 0x60000000, SDRAM
	206	* is configured as if a 128Mb SDRAM module is available.
	207	*/
	208
	209	#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
6d0f6bcf	210	#define CONFIG_SYS_SDRAM_BASE 0x40000000
6ed8a43a	211	#else
6d0f6bcf	212	#define CONFIG_SYS_SDRAM_BASE 0x60000000
6ed8a43a DH	213	#endif
6ed8a43a DH	214
6d0f6bcf JCPV	215	#define CONFIG_SYS_SDRAM_SIZE 0x08000000
6d0f6bcf JCPV	216	#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
6ed8a43a DH	217
	218	/* 4Mb SRAM available */
	219	#if CONFIG_LEON_RAM_SELECT != CONFIG_LEON_RAM_SDRAM_NOSRAM
6d0f6bcf JCPV	220	#define CONFIG_SYS_SRAM_BASE 0x40000000
	221	#define CONFIG_SYS_SRAM_SIZE 0x400000
	222	#define CONFIG_SYS_SRAM_END (CONFIG_SYS_SRAM_BASE+CONFIG_SYS_SRAM_SIZE)
6ed8a43a DH	223	#endif
	224
	225	/* Select RAM used to run U-BOOT from... */
	226	#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SRAM
6d0f6bcf JCPV	227	#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SRAM_BASE
	228	#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SRAM_SIZE
	229	#define CONFIG_SYS_RAM_END CONFIG_SYS_SRAM_END
6ed8a43a	230	#else
6d0f6bcf JCPV	231	#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
	232	#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
	233	#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
6ed8a43a DH	234	#endif
6ed8a43a DH	235
25ddd1fb	236	#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
6ed8a43a	237
25ddd1fb	238	#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
6d0f6bcf	239	#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
6ed8a43a	240
6d0f6bcf JCPV	241	#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
6d0f6bcf JCPV	242	#define CONFIG_SYS_STACK_SIZE (0x10000-32)
6ed8a43a	243
14d0a02a	244	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
6d0f6bcf JCPV	245	#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
6d0f6bcf JCPV	246	# define CONFIG_SYS_RAMBOOT 1
6ed8a43a DH	247	#endif
6ed8a43a DH	248
6d0f6bcf JCPV	249	#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
	250	#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
	251	#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
6ed8a43a	252
6d0f6bcf JCPV	253	#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
6d0f6bcf JCPV	254	#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
6ed8a43a DH	255
6ed8a43a DH	256	/* relocated monitor area */
6d0f6bcf JCPV	257	#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
6d0f6bcf JCPV	258	#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
6ed8a43a DH	259
6ed8a43a DH	260	/* make un relocated address from relocated address */
14d0a02a	261	#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
6ed8a43a DH	262
	263	/*
	264	* Ethernet configuration uses on board SMC91C111
	265	*/
7194ab80	266	#define CONFIG_SMC91111 1
6ed8a43a DH	267	#define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */
	268	#define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */
	269	#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */
	270	/#define CONFIG_SHOW_ACTIVITY/
	271	#define CONFIG_NET_RETRY_COUNT 10 /* # of retries */
	272
6ed8a43a DH	273	#define CONFIG_PHY_ADDR 0x00
	274
	275	/*
	276	* Miscellaneous configurable options
	277	*/
6d0f6bcf	278	#define CONFIG_SYS_LONGHELP /* undef to save memory */
6ed8a43a	279	#if defined(CONFIG_CMD_KGDB)
6d0f6bcf	280	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
6ed8a43a	281	#else
6d0f6bcf	282	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
6ed8a43a	283	#endif
6d0f6bcf JCPV	284	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
	285	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	286	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
6ed8a43a	287
6d0f6bcf JCPV	288	#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
6d0f6bcf JCPV	289	#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
6ed8a43a	290
6d0f6bcf	291	#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
6ed8a43a	292
6ed8a43a DH	293	/*
	294	* Various low-level settings
	295	*/
	296
	297	/*-----------------------------------------------------------------------
	298	* USB stuff
	299	*-----------------------------------------------------------------------
	300	*/
	301	#define CONFIG_USB_CLOCK 0x0001BBBB
	302	#define CONFIG_USB_CONFIG 0x00005000
	303
	304	/*** Gaisler GRLIB IP-Cores Config ******/
	305
6d0f6bcf	306	#define CONFIG_SYS_GRLIB_SDRAM 0
6ed8a43a	307
cff009ed DH	308	/* No SDRAM Configuration */
	309	#undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1
	310
6ed8a43a DH	311	/* See, GRLIB Docs (grip.pdf) on how to set up
	312	* These the memory controller registers.
	313	*/
cff009ed DH	314	#define CONFIG_SYS_GRLIB_ESA_MCTRL1
cff009ed DH	315	#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1 (0x10f800ff \| (1<<11))
6ed8a43a	316	#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
cff009ed	317	#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x82206000
6ed8a43a	318	#else
cff009ed	319	#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x82205260
6ed8a43a	320	#endif
cff009ed	321	#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3 0x0809a000
6ed8a43a	322
cff009ed DH	323	/* GRLIB FT-MCTRL configuration */
	324	#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
	325	#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1 (0x10f800ff \| (1<<11))
6ed8a43a	326	#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
cff009ed	327	#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x82206000
6ed8a43a	328	#else
cff009ed	329	#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x82205260
6ed8a43a	330	#endif
cff009ed	331	#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3 0x0809a000
6ed8a43a DH	332
6ed8a43a DH	333	/* no DDR controller */
cff009ed	334	#undef CONFIG_SYS_GRLIB_GAISLER_DDRSPA1
6ed8a43a DH	335
6ed8a43a DH	336	/* no DDR2 Controller */
cff009ed	337	#undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
6ed8a43a	338
6ed8a43a DH	339	/* default kernel command line */
	340	#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
	341
	342	#endif /* __CONFIG_H */