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1/* Configuration header file for Gaisler Research AB's Template
2 * design (GPL Open Source SPARC/LEON3 96MHz) for Altera NIOS
3 * Development board Stratix II edition, with the FPGA device
4 * EP2S60.
5 *
6 * (C) Copyright 2003-2005
7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 *
9 * (C) Copyright 2008
10 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
11 *
12 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * MA 02111-1307 USA
29 */
30
31#ifndef __CONFIG_H__
32#define __CONFIG_H__
33
34/*
35 * High Level Configuration Options
36 * (easy to change)
37 */
38
39#define CONFIG_LEON3 /* This is an LEON3 CPU */
40#define CONFIG_LEON 1 /* This is an LEON CPU */
41/* Altera NIOS Development board, Stratix II board */
53677ef1 42#define CONFIG_GR_EP2S60 1
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43
44/* CPU / AMBA BUS configuration */
53677ef1 45#define CONFIG_SYS_CLK_FREQ 96000000 /* 96MHz */
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46
47/* Number of SPARC register windows */
6d0f6bcf 48#define CONFIG_SYS_SPARC_NWINDOWS 8
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49
50/* Define this is the GR-2S60-MEZZ mezzanine is available and you
51 * want to use the USB and GRETH functionality of the board
52 */
53#undef GR_2S60_MEZZ
54
55#ifdef GR_2S60_MEZZ
56#define USE_GRETH 1
57#define USE_GRUSB 1
58#endif
59
60/*
61 * Serial console configuration
62 */
63#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
6d0f6bcf 64#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
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65
66/* Partitions */
67#define CONFIG_DOS_PARTITION
68#define CONFIG_MAC_PARTITION
69#define CONFIG_ISO_PARTITION
70
71/*
72 * Supported commands
73 */
74#include <config_cmd_default.h>
75
76#define CONFIG_CMD_REGINFO
77#define CONFIG_CMD_AMBAPP
78#define CONFIG_CMD_PING
79#define CONFIG_CMD_DIAG
80#define CONFIG_CMD_IRQ
81
82/* USB support */
83#if USE_GRUSB
84#define CONFIG_USB_UHCI
85#define CONFIG_CMD_FAT
86#define CONFIG_CMD_EXT2
87#define CONFIG_CMD_USB
88#define CONFIG_USB_STORAGE
89/* Enable needed helper functions */
6d0f6bcf 90#define CONFIG_SYS_DEVICE_DEREGISTER /* needs device_deregister */
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91#endif
92
93/*
94 * Autobooting
95 */
96#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
97
98#define CONFIG_PREBOOT "echo;" \
99 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
100 "echo"
101
102#undef CONFIG_BOOTARGS
103
104#define CONFIG_EXTRA_ENV_SETTINGS \
105 "netdev=eth0\0" \
106 "nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \
107 "nfsroot=${serverip}:${rootpath}\0" \
108 "ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \
109 "addip=setenv bootargs ${bootargs} " \
110 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
111 ":${hostname}:${netdev}:off panic=1\0" \
112 "flash_nfs=run nfsargs addip;" \
113 "bootm ${kernel_addr}\0" \
114 "flash_self=run ramargs addip;" \
115 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
116 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
117 "scratch=40800000\0" \
118 "getkernel=tftpboot \$\(scratch\)\ \$\(bootfile\)\0" \
119 "bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.207:192.168.0.20:192.168.0.1:255.255.255.0:ml401:eth0\0" \
120 ""
121
122#define CONFIG_NETMASK 255.255.255.0
123#define CONFIG_GATEWAYIP 192.168.0.1
124#define CONFIG_SERVERIP 192.168.0.20
125#define CONFIG_IPADDR 192.168.0.207
126#define CONFIG_ROOTPATH /export/rootfs
127#define CONFIG_HOSTNAME ml401
128#define CONFIG_BOOTFILE /uImage
129
130#define CONFIG_BOOTCOMMAND "run flash_self"
131
132/* Memory MAP
133 *
134 * Flash:
135 * |--------------------------------|
136 * | 0x00000000 Text & Data & BSS | *
137 * | for Monitor | *
138 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
139 * | UNUSED / Growth | * 256kb
140 * |--------------------------------|
141 * | 0x00050000 Base custom area | *
142 * | kernel / FS | *
143 * | | * Rest of Flash
144 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
145 * | END-0x00008000 Environment | * 32kb
146 * |--------------------------------|
147 *
148 *
149 *
150 * Main Memory:
151 * |--------------------------------|
152 * | UNUSED / scratch area |
153 * | |
154 * | |
155 * | |
156 * | |
157 * |--------------------------------|
158 * | Monitor .Text / .DATA / .BSS | * 512kb
159 * | Relocated! | *
160 * |--------------------------------|
161 * | Monitor Malloc | * 128kb (contains relocated environment)
162 * |--------------------------------|
163 * | Monitor/kernel STACK | * 64kb
164 * |--------------------------------|
165 * | Page Table for MMU systems | * 2k
166 * |--------------------------------|
167 * | PROM Code accessed from Linux | * 6kb-128b
168 * |--------------------------------|
169 * | Global data (avail from kernel)| * 128b
170 * |--------------------------------|
171 *
172 */
173
174/*
175 * Flash configuration (8,16 or 32 MB)
176 * TEXT base always at 0xFFF00000
177 * ENV_ADDR always at 0xFFF40000
178 * FLASH_BASE at 0xFC000000 for 64 MB
179 * 0xFE000000 for 32 MB
180 * 0xFF000000 for 16 MB
181 * 0xFF800000 for 8 MB
182 */
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183/*#define CONFIG_SYS_NO_FLASH 1*/
184#define CONFIG_SYS_FLASH_BASE 0x00000000
185#define CONFIG_SYS_FLASH_SIZE 0x00400000 /* FPGA Bit file is in top of FLASH, we only ues the bottom 4Mb */
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186
187#define PHYS_FLASH_SECT_SIZE 0x00010000 /* 64 KB sectors */
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188#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sects on one chip */
189#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
6940383d 190
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191#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
192#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
193#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
194#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
195#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
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196
197/*** CFI CONFIG ***/
6d0f6bcf 198#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
00b1883a 199#define CONFIG_FLASH_CFI_DRIVER
6d0f6bcf 200#define CONFIG_SYS_FLASH_CFI
6940383d 201/* Bypass cache when reading regs from flash memory */
6d0f6bcf 202#define CONFIG_SYS_FLASH_CFI_BYPASS_READ
6940383d 203/* Buffered writes (32byte/go) instead of single accesses */
6d0f6bcf 204#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
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205
206/*
207 * Environment settings
208 */
93f6d725 209/*#define CONFIG_ENV_IS_NOWHERE 1*/
5a1aceb0 210#define CONFIG_ENV_IS_IN_FLASH 1
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211/* CONFIG_ENV_ADDR need to be at sector boundary */
212#define CONFIG_ENV_SIZE 0x8000
213#define CONFIG_ENV_SECT_SIZE 0x20000
6d0f6bcf 214#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE)
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215#define CONFIG_ENV_OVERWRITE 1
216
217/*
218 * Memory map
219 */
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220#define CONFIG_SYS_SDRAM_BASE 0x40000000
221#define CONFIG_SYS_SDRAM_SIZE 0x02000000
222#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
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223
224/* no SRAM available */
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225#undef CONFIG_SYS_SRAM_BASE
226#undef CONFIG_SYS_SRAM_SIZE
6940383d 227
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228#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
229#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
230#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
6940383d 231
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232#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
233#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_END - CONFIG_SYS_GBL_DATA_SIZE)
6940383d 234
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235#define CONFIG_SYS_PROM_SIZE (8192-CONFIG_SYS_GBL_DATA_SIZE)
236#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
6940383d 237
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238#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
239#define CONFIG_SYS_STACK_SIZE (0x10000-32)
6940383d 240
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241#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
242#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
243# define CONFIG_SYS_RAMBOOT 1
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244#endif
245
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246#define CONFIG_SYS_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
247#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
248#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
6940383d 249
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250#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
251#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
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252
253/* relocated monitor area */
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254#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
255#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
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256
257/* make un relocated address from relocated address */
6d0f6bcf 258#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-TEXT_BASE))
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259
260/*
261 * Ethernet configuration uses on board SMC91C111, however if a mezzanine
262 * with a PHY is attached the GRETH can be used on this board.
263 * Define USE_GRETH in order to use the mezzanine provided PHY with the
264 * onchip GRETH network MAC, note that this is not supported by the
265 * template design.
266 */
267#ifndef USE_GRETH
268
269/* USE SMC91C111 MAC */
270#define CONFIG_DRIVER_SMC91111 1
271#define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */
272#define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */
273#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */
274/*#define CONFIG_SHOW_ACTIVITY*/
275#define CONFIG_NET_RETRY_COUNT 10 /* # of retries */
276
277#else
278
279/* USE GRETH Ethernet Driver */
280#define CONFIG_NET_MULTI 1
281#define CONFIG_GRETH 1
282
283/* Default GRETH Ethernet HARDWARE address */
284#define GRETH_HWADDR_0 0x00
285#define GRETH_HWADDR_1 0x00
286#define GRETH_HWADDR_2 0x7a
287#define GRETH_HWADDR_3 0xcc
288#define GRETH_HWADDR_4 0x00
289#define GRETH_HWADDR_5 0x13
290#endif
291
292#define CONFIG_ETHADDR 00:00:7a:cc:00:13
293#define CONFIG_PHY_ADDR 0x00
294
295/*
296 * Miscellaneous configurable options
297 */
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298#define CONFIG_SYS_LONGHELP /* undef to save memory */
299#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
6940383d 300#if defined(CONFIG_CMD_KGDB)
6d0f6bcf 301#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
6940383d 302#else
6d0f6bcf 303#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
6940383d 304#endif
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305#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
306#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
307#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
6940383d 308
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309#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
310#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
6940383d 311
6d0f6bcf 312#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
6940383d 313
6d0f6bcf 314#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
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315
316/*-----------------------------------------------------------------------
317 * USB stuff
318 *-----------------------------------------------------------------------
319 */
320#define CONFIG_USB_CLOCK 0x0001BBBB
321#define CONFIG_USB_CONFIG 0x00005000
322
323/***** Gaisler GRLIB IP-Cores Config ********/
324
325/* AMBA Plug & Play info display on startup */
6d0f6bcf 326/*#define CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP*/
6940383d 327
6d0f6bcf 328#define CONFIG_SYS_GRLIB_SDRAM 0
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329
330/* See, GRLIB Docs (grip.pdf) on how to set up
331 * These the memory controller registers.
332 */
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333#define CONFIG_SYS_GRLIB_MEMCFG1 (0x10f800ff | (1<<11))
334#define CONFIG_SYS_GRLIB_MEMCFG2 0x00000000
335#define CONFIG_SYS_GRLIB_MEMCFG3 0x00000000
6940383d 336
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337#define CONFIG_SYS_GRLIB_FT_MEMCFG1 (0x10f800ff | (1<<11))
338#define CONFIG_SYS_GRLIB_FT_MEMCFG2 0x00000000
339#define CONFIG_SYS_GRLIB_FT_MEMCFG3 0x00000000
6940383d 340
6d0f6bcf 341#define CONFIG_SYS_GRLIB_DDR_CFG 0xa900830a
6940383d 342
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343#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
344#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000
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345
346/* Calculate scaler register value from default baudrate */
6d0f6bcf 347#define CONFIG_SYS_GRLIB_APBUART_SCALER \
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348 ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)
349
350/* Identification string */
351#define CONFIG_IDENT_STRING "GAISLER LEON3 EP2S60"
352
353/* default kernel command line */
354#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
355
356#endif /* __CONFIG_H */