]> git.ipfire.org Git - u-boot.git/blame - include/configs/highbank.h
bootcount: Migrate CONFIG_SYS_BOOTCOUNT_ADDR
[u-boot.git] / include / configs / highbank.h
CommitLineData
37fc0ed2
RH
1/*
2 * Copyright 2010-2011 Calxeda, Inc.
3 *
1a459660 4 * SPDX-License-Identifier: GPL-2.0+
37fc0ed2
RH
5 */
6
7#ifndef __CONFIG_H
8#define __CONFIG_H
9
185a5bb0 10#define CONFIG_SYS_DCACHE_OFF
37fc0ed2 11
37fc0ed2
RH
12#define CONFIG_SYS_BOOTMAPSZ (16 << 20)
13
9df1bd41
RH
14#define CONFIG_SYS_TIMER_RATE (150000000/256)
15#define CONFIG_SYS_TIMER_COUNTER (0xFFF34000 + 0x4)
16#define CONFIG_SYS_TIMER_COUNTS_DOWN
17
37fc0ed2
RH
18/*
19 * Size of malloc() pool
20 */
21#define CONFIG_SYS_MALLOC_LEN (512 * 1024)
22
37fc0ed2
RH
23#define CONFIG_PL011_CLOCK 150000000
24#define CONFIG_PL01x_PORTS { (void *)(0xFFF36000) }
25#define CONFIG_CONS_INDEX 0
26
0044c42e 27#define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */
877012df 28
37fc0ed2 29#define CONFIG_MISC_INIT_R
37fc0ed2
RH
30#define CONFIG_SCSI_AHCI_PLAT
31#define CONFIG_SYS_SCSI_MAX_SCSI_ID 5
32#define CONFIG_SYS_SCSI_MAX_LUN 1
33#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
34 CONFIG_SYS_SCSI_MAX_LUN)
35
9a420986
RH
36#define CONFIG_CALXEDA_XGMAC
37
37fc0ed2
RH
38/*
39 * Command line configuration.
40 */
37fc0ed2 41
e1df283c
RH
42#define CONFIG_BOOT_RETRY_TIME -1
43#define CONFIG_RESET_TO_RETRY
d126e016 44
37fc0ed2
RH
45/*
46 * Miscellaneous configurable options
47 */
185a5bb0 48#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
37fc0ed2 49#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
37fc0ed2
RH
50
51#define CONFIG_SYS_LOAD_ADDR 0x800000
185a5bb0
RH
52#define CONFIG_SYS_64BIT_LBA
53
37fc0ed2
RH
54/*-----------------------------------------------------------------------
55 * Physical Memory Map
32b4a8a2 56 * The DRAM is already setup, so do not touch the DT node later.
37fc0ed2 57 */
32b4a8a2 58#define CONFIG_NR_DRAM_BANKS 0
37fc0ed2
RH
59#define PHYS_SDRAM_1_SIZE (4089 << 20)
60#define CONFIG_SYS_MEMTEST_START 0x100000
61#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1_SIZE - 0x100000)
62
a34e8549
JH
63/* Environment data setup
64*/
a34e8549
JH
65#define CONFIG_SYS_NVRAM_BASE_ADDR 0xfff88000 /* NVRAM base address */
66#define CONFIG_SYS_NVRAM_SIZE 0x8000 /* NVRAM size */
67#define CONFIG_ENV_SIZE 0x2000 /* Size of Environ */
68#define CONFIG_ENV_ADDR CONFIG_SYS_NVRAM_BASE_ADDR
37fc0ed2
RH
69
70#define CONFIG_SYS_SDRAM_BASE 0x00000000
37fc0ed2
RH
71#define CONFIG_SYS_INIT_SP_ADDR 0x01000000
72#define CONFIG_SKIP_LOWLEVEL_INIT
73
74#endif