[people/ms/u-boot.git] / include / configs / imx31_phycore.h

/*
 * (C) Copyright 2004
 * Texas Instruments.
 * Richard Woodruff <r-woodruff2@ti.com>
 * Kshitij Gupta <kshitij@ti.com>
 *
 * Configuration settings for the 242x TI H4 board.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

 /* High Level Configuration Options */
#define CONFIG_ARM1136		1    /* This is an arm1136 CPU core */
#define CONFIG_MX31		1    /* in a mx31 */
#define CONFIG_MX31_HCLK_FREQ	26000000
#define CONFIG_MX31_CLK32	32000

#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO

/* Temporarily disabled */
#if 0
#define CONFIG_OF_LIBFDT		1
#define CONFIG_FIT			1
#define CONFIG_FIT_VERBOSE		1
#endif

#define CONFIG_CMDLINE_TAG		1    /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS	1
#define CONFIG_INITRD_TAG		1

/*
 * Size of malloc() pool
 */
#define CFG_MALLOC_LEN		(CFG_ENV_SIZE + 128 * 1024)
#define CFG_GBL_DATA_SIZE	128  /* num bytes reserved for initial data */

/*
 * Hardware drivers
 */

#define CONFIG_HARD_I2C		1
#define CONFIG_I2C_MXC		1
#define CFG_I2C_MX31_PORT2	1
#define CFG_I2C_SPEED		100000
#define CFG_I2C_SLAVE		0xfe

#define CONFIG_MX31_UART	1
#define CFG_MX31_UART1		1

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX	1
#define CONFIG_BAUDRATE		115200
#define CFG_BAUDRATE_TABLE	{9600, 19200, 38400, 57600, 115200}

/***********************************************************
 * Command definition
 ***********************************************************/

#include <config_cmd_default.h>

#define CONFIG_CMD_PING
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_I2C

#define CONFIG_BOOTDELAY	3

#define MTDPARTS_DEFAULT	\
	"mtdparts=physmap-flash.0:128k(uboot)ro,1536k(kernel),-(root)"

#define CONFIG_NETMASK		255.255.255.0
#define CONFIG_IPADDR		192.168.23.168
#define CONFIG_SERVERIP		192.168.23.2

#define	CONFIG_EXTRA_ENV_SETTINGS				\
	"bootargs_base=setenv bootargs console=ttySMX0,115200\0"	\
	"bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs "	\
		"ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0"	\
	"bootargs_flash=setenv bootargs $(bootargs) "			\
		"root=/dev/mtdblock2 rootfstype=jffs2\0"		\
	"bootargs_mtd=setenv bootargs $(bootargs) $(mtdparts)\0"	\
	"bootcmd=run bootcmd_net\0"			       		\
	"bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; " 	\
		"tftpboot 0x80000000 $(uimage); bootm\0"		\
	"bootcmd_flash=run bootargs_base bootargs_mtd bootargs_flash; "	\
		"bootm 0x80000000\0"					\
	"unlock=yes\0"							\
	"mtdparts=" MTDPARTS_DEFAULT "\0"				\
	"prg_uboot=tftpboot 0x80000000 $(uboot); " 			\
		"protect off 0xa0000000 +0x20000; "			\
		"erase 0xa0000000 +0x20000; "				\
		"cp.b 0x80000000 0xa0000000 $(filesize)\0" 		\
	"prg_kernel=tftpboot 0x80000000 $(uimage); "			\
		"erase 0xa0040000 +0x180000; "				\
		"cp.b 0x80000000 0xa0040000 $(filesize)\0"		\
	"prg_jffs2=tftpboot 0x80000000 $(jffs2); " 			\
		"erase 0xa01c0000 0xa1ffffff; "				\
		"cp.b 0x80000000 0xa01c0000 $(filesize)\0"

#define CONFIG_DRIVER_SMC911X		1
#define CONFIG_DRIVER_SMC911X_BASE	0xa8000000

/*
 * Miscellaneous configurable options
 */
#define CFG_LONGHELP		/* undef to save memory */
#define CFG_PROMPT		"uboot> "
#define CFG_CBSIZE		256  /* Console I/O Buffer Size */
/* Print Buffer Size */
#define CFG_PBSIZE		(CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
#define CFG_MAXARGS		16          /* max number of command args */
#define CFG_BARGSIZE		CFG_CBSIZE  /* Boot Argument Buffer Size */

#define CFG_MEMTEST_START	0  /* memtest works on */
#define CFG_MEMTEST_END		0x10000

#define CFG_LOAD_ADDR		0 /* default load address */

#define CFG_HZ			32000

#define CONFIG_CMDLINE_EDITING	1

/*-----------------------------------------------------------------------
 * Stack sizes
 *
 * The stack sizes are set up in start.S using the settings below  */
#define CONFIG_STACKSIZE	(128 * 1024) /* regular stack */

/*-----------------------------------------------------------------------
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS	1
#define PHYS_SDRAM_1		0x80000000
#define PHYS_SDRAM_1_SIZE	(128 * 1024 * 1024)

/*-----------------------------------------------------------------------
 * FLASH and environment organization
 */
#define CFG_FLASH_BASE		0xa0000000
#define CFG_MAX_FLASH_BANKS	1 /* max number of memory banks */
#define CFG_MAX_FLASH_SECT	259 /* max number of sectors on one chip */
#define CFG_MONITOR_BASE CFG_FLASH_BASE /* Monitor at beginning of flash */

#define	CFG_ENV_IS_IN_EEPROM		1
#define CFG_ENV_OFFSET			0x00	/* environment starts here */
#define CFG_ENV_SIZE			4096
#define CFG_I2C_EEPROM_ADDR		0x52
#define CFG_EEPROM_PAGE_WRITE_BITS	5	/* 5 bits = 32 octets */
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS	10	/* between stop and start */
#define CFG_I2C_EEPROM_ADDR_LEN		2 /* length of byte address */

/*-----------------------------------------------------------------------
 * CFI FLASH driver setup
 */
#define CFG_FLASH_CFI		1	/* Flash memory is CFI compliant */
#define CFG_FLASH_CFI_DRIVER	1	/* Use drivers/cfi_flash.c */
#define CFG_FLASH_USE_BUFFER_WRITE 1	/* Use buffered writes (~10x faster) */
#define CFG_FLASH_PROTECTION	1	/* Use hardware sector protection */

/* timeout values are in ticks */
#define CFG_FLASH_ERASE_TOUT	(100*CFG_HZ) /* Timeout for Flash Erase */
#define CFG_FLASH_WRITE_TOUT	(100*CFG_HZ) /* Timeout for Flash Write */

/*
 * JFFS2 partitions
 */
#undef CONFIG_JFFS2_CMDLINE
#define CONFIG_JFFS2_DEV	"nor0"

#endif /* __CONFIG_H */
Commit	Line	Data
c88ae205 SH	1	/*
	2	* (C) Copyright 2004
	3	* Texas Instruments.
	4	* Richard Woodruff <r-woodruff2@ti.com>
	5	* Kshitij Gupta <kshitij@ti.com>
	6	*
	7	* Configuration settings for the 242x TI H4 board.
	8	*
	9	* See file CREDITS for list of people who contributed to this
	10	* project.
	11	*
	12	* This program is free software; you can redistribute it and/or
	13	* modify it under the terms of the GNU General Public License as
	14	* published by the Free Software Foundation; either version 2 of
	15	* the License, or (at your option) any later version.
	16	*
	17	* This program is distributed in the hope that it will be useful,
	18	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	20	* GNU General Public License for more details.
	21	*
	22	* You should have received a copy of the GNU General Public License
	23	* along with this program; if not, write to the Free Software
	24	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	25	* MA 02111-1307 USA
	26	*/
	27
	28	#ifndef __CONFIG_H
	29	#define __CONFIG_H
	30
	31	/* High Level Configuration Options */
	32	#define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
	33	#define CONFIG_MX31 1 /* in a mx31 */
	34	#define CONFIG_MX31_HCLK_FREQ 26000000
	35	#define CONFIG_MX31_CLK32 32000
	36
	37	#define CONFIG_DISPLAY_CPUINFO
	38	#define CONFIG_DISPLAY_BOARDINFO
	39
	40	/* Temporarily disabled */
	41	#if 0
	42	#define CONFIG_OF_LIBFDT 1
	43	#define CONFIG_FIT 1
	44	#define CONFIG_FIT_VERBOSE 1
	45	#endif
	46
	47	#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
	48	#define CONFIG_SETUP_MEMORY_TAGS 1
	49	#define CONFIG_INITRD_TAG 1
	50
	51	/*
	52	* Size of malloc() pool
	53	*/
	54	#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128 * 1024)
	55	#define CFG_GBL_DATA_SIZE 128 /* num bytes reserved for initial data */
	56
	57	/*
	58	* Hardware drivers
	59	*/
	60
	61	#define CONFIG_HARD_I2C 1
	62	#define CONFIG_I2C_MXC 1
	63	#define CFG_I2C_MX31_PORT2 1
	64	#define CFG_I2C_SPEED 100000
65	#define CFG_I2C_SLAVE 0xfe
66
67	#define CONFIG_MX31_UART 1
68	#define CFG_MX31_UART1 1
69
70	/* allow to overwrite serial and ethaddr */
71	#define CONFIG_ENV_OVERWRITE
72	#define CONFIG_CONS_INDEX 1
73	#define CONFIG_BAUDRATE 115200
74	#define CFG_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
75
76	/***********************************************************
77	* Command definition
78	***********************************************************/
79
80	#include <config_cmd_default.h>
81
82	#define CONFIG_CMD_PING
83	#define CONFIG_CMD_EEPROM
84	#define CONFIG_CMD_I2C
85
86	#define CONFIG_BOOTDELAY 3
87
88	#define MTDPARTS_DEFAULT \
89	"mtdparts=physmap-flash.0:128k(uboot)ro,1536k(kernel),-(root)"
90
91	#define CONFIG_NETMASK 255.255.255.0
92	#define CONFIG_IPADDR 192.168.23.168
93	#define CONFIG_SERVERIP 192.168.23.2
94
95	#define CONFIG_EXTRA_ENV_SETTINGS \
96	"bootargs_base=setenv bootargs console=ttySMX0,115200\0" \
97	"bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs " \
98	"ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \
99	"bootargs_flash=setenv bootargs $(bootargs) " \
100	"root=/dev/mtdblock2 rootfstype=jffs2\0" \
101	"bootargs_mtd=setenv bootargs $(bootargs) $(mtdparts)\0" \
102	"bootcmd=run bootcmd_net\0" \
103	"bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; " \
104	"tftpboot 0x80000000 $(uimage); bootm\0" \
105	"bootcmd_flash=run bootargs_base bootargs_mtd bootargs_flash; " \
106	"bootm 0x80000000\0" \
107	"unlock=yes\0" \
108	"mtdparts=" MTDPARTS_DEFAULT "\0" \
109	"prg_uboot=tftpboot 0x80000000 $(uboot); " \
110	"protect off 0xa0000000 +0x20000; " \
111	"erase 0xa0000000 +0x20000; " \
112	"cp.b 0x80000000 0xa0000000 $(filesize)\0" \
113	"prg_kernel=tftpboot 0x80000000 $(uimage); " \
114	"erase 0xa0040000 +0x180000; " \
115	"cp.b 0x80000000 0xa0040000 $(filesize)\0" \
116	"prg_jffs2=tftpboot 0x80000000 $(jffs2); " \
117	"erase 0xa01c0000 0xa1ffffff; " \
118	"cp.b 0x80000000 0xa01c0000 $(filesize)\0"
119
120	#define CONFIG_DRIVER_SMC911X 1
121	#define CONFIG_DRIVER_SMC911X_BASE 0xa8000000
122
123	/*
124	* Miscellaneous configurable options
125	*/
126	#define CFG_LONGHELP /* undef to save memory */
127	#define CFG_PROMPT "uboot> "
128	#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
129	/* Print Buffer Size */
130	#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
131	#define CFG_MAXARGS 16 /* max number of command args */
132	#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
133
134	#define CFG_MEMTEST_START 0 /* memtest works on */
135	#define CFG_MEMTEST_END 0x10000
136
137	#define CFG_LOAD_ADDR 0 /* default load address */
138
139	#define CFG_HZ 32000
140
141	#define CONFIG_CMDLINE_EDITING 1
142
143	/*-----------------------------------------------------------------------
144	* Stack sizes
145	*
146	* The stack sizes are set up in start.S using the settings below */
147	#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
148
149	/*-----------------------------------------------------------------------
150	* Physical Memory Map
151	*/
152	#define CONFIG_NR_DRAM_BANKS 1
153	#define PHYS_SDRAM_1 0x80000000
154	#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
155
156	/*-----------------------------------------------------------------------
157	* FLASH and environment organization
158	*/
159	#define CFG_FLASH_BASE 0xa0000000
160	#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
161	#define CFG_MAX_FLASH_SECT 259 /* max number of sectors on one chip */
162	#define CFG_MONITOR_BASE CFG_FLASH_BASE /* Monitor at beginning of flash */
163
164	#define CFG_ENV_IS_IN_EEPROM 1
165	#define CFG_ENV_OFFSET 0x00 /* environment starts here */
166	#define CFG_ENV_SIZE 4096
167	#define CFG_I2C_EEPROM_ADDR 0x52
168	#define CFG_EEPROM_PAGE_WRITE_BITS 5 /* 5 bits = 32 octets */
169	#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* between stop and start */
170	#define CFG_I2C_EEPROM_ADDR_LEN 2 /* length of byte address */
171
172	/*-----------------------------------------------------------------------
173	* CFI FLASH driver setup
174	*/
175	#define CFG_FLASH_CFI 1 /* Flash memory is CFI compliant */
176	#define CFG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */
177	#define CFG_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
178	#define CFG_FLASH_PROTECTION 1 /* Use hardware sector protection */
179
180	/* timeout values are in ticks */
181	#define CFG_FLASH_ERASE_TOUT (100CFG_HZ) / Timeout for Flash Erase */
182	#define CFG_FLASH_WRITE_TOUT (100CFG_HZ) / Timeout for Flash Write */
183
184	/*
185	* JFFS2 partitions
186	*/
187	#undef CONFIG_JFFS2_CMDLINE
188	#define CONFIG_JFFS2_DEV "nor0"
189
190	#endif /* __CONFIG_H */