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fc102728 MV |
1 | /* |
2 | * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> | |
3 | * on behalf of DENX Software Engineering GmbH | |
4 | * | |
3765b3e7 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
fc102728 | 6 | */ |
5434caf5 MV |
7 | #ifndef __CONFIGS_M28EVK_H__ |
8 | #define __CONFIGS_M28EVK_H__ | |
fc102728 | 9 | |
5434caf5 MV |
10 | /* System configurations */ |
11 | #define CONFIG_MX28 /* i.MX28 SoC */ | |
5f71bca7 | 12 | #define CONFIG_MACH_TYPE MACH_TYPE_M28EVK |
fc102728 | 13 | |
31b57a52 MV |
14 | #define CONFIG_TIMESTAMP /* Print image info with timestamp */ |
15 | ||
5434caf5 | 16 | /* U-Boot Commands */ |
31b57a52 | 17 | #define CONFIG_FAT_WRITE |
fc102728 | 18 | |
5f71bca7 | 19 | #define CONFIG_CMD_NAND |
32cc24d3 | 20 | #define CONFIG_CMD_NAND_TRIMFFS |
fc102728 | 21 | |
5434caf5 | 22 | /* Memory configuration */ |
5f71bca7 WD |
23 | #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ |
24 | #define PHYS_SDRAM_1 0x40000000 /* Base address */ | |
25 | #define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */ | |
5f71bca7 | 26 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
fc102728 | 27 | |
5434caf5 | 28 | /* Environment */ |
5f71bca7 | 29 | #define CONFIG_ENV_SIZE (16 * 1024) |
5434caf5 | 30 | #define CONFIG_ENV_IS_IN_NAND |
fc102728 MV |
31 | |
32 | /* Environment is in NAND */ | |
5434caf5 | 33 | #if defined(CONFIG_CMD_NAND) && defined(CONFIG_ENV_IS_IN_NAND) |
5f71bca7 WD |
34 | #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE |
35 | #define CONFIG_ENV_SECT_SIZE (128 * 1024) | |
76582f9d MV |
36 | #define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SECT_SIZE) |
37 | #define CONFIG_ENV_OFFSET (24 * CONFIG_ENV_SECT_SIZE) /* 3 MiB */ | |
5f71bca7 | 38 | #define CONFIG_ENV_OFFSET_REDUND \ |
fc102728 MV |
39 | (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) |
40 | ||
5f71bca7 WD |
41 | #define CONFIG_CMD_UBIFS |
42 | #define CONFIG_CMD_MTDPARTS | |
43 | #define CONFIG_RBTREE | |
44 | #define CONFIG_LZO | |
45 | #define CONFIG_MTD_DEVICE | |
46 | #define CONFIG_MTD_PARTITIONS | |
47 | #define MTDIDS_DEFAULT "nand0=gpmi-nand" | |
48 | #define MTDPARTS_DEFAULT \ | |
c16ecb09 | 49 | "mtdparts=gpmi-nand:" \ |
76582f9d MV |
50 | "3m(u-boot)," \ |
51 | "512k(env1)," \ | |
52 | "512k(env2)," \ | |
53 | "14m(boot)," \ | |
54 | "238m(data)," \ | |
55 | "-@4096k(UBI)" | |
c660a541 | 56 | #else |
5f71bca7 | 57 | #define CONFIG_ENV_IS_NOWHERE |
fc102728 MV |
58 | #endif |
59 | ||
5434caf5 MV |
60 | /* FEC Ethernet on SoC */ |
61 | #ifdef CONFIG_CMD_NET | |
5f71bca7 | 62 | #define CONFIG_FEC_MXC |
fc102728 MV |
63 | #endif |
64 | ||
5434caf5 MV |
65 | /* RTC */ |
66 | #ifdef CONFIG_CMD_DATE | |
fc102728 | 67 | /* Use the internal RTC in the MXS chip */ |
5f71bca7 | 68 | #define CONFIG_RTC_INTERNAL |
5434caf5 | 69 | #ifdef CONFIG_RTC_INTERNAL |
5f71bca7 | 70 | #define CONFIG_RTC_MXS |
fc102728 | 71 | #else |
5f71bca7 WD |
72 | #define CONFIG_RTC_M41T62 |
73 | #define CONFIG_SYS_I2C_RTC_ADDR 0x68 | |
74 | #define CONFIG_SYS_M41T11_BASE_YEAR 2000 | |
fc102728 MV |
75 | #endif |
76 | #endif | |
77 | ||
5434caf5 MV |
78 | /* USB */ |
79 | #ifdef CONFIG_CMD_USB | |
afa87210 MV |
80 | #define CONFIG_EHCI_MXS_PORT0 |
81 | #define CONFIG_EHCI_MXS_PORT1 | |
82 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 | |
8f59bc1f MV |
83 | #endif |
84 | ||
5434caf5 MV |
85 | /* SPI */ |
86 | #ifdef CONFIG_CMD_SPI | |
5f71bca7 WD |
87 | #define CONFIG_DEFAULT_SPI_BUS 2 |
88 | #define CONFIG_DEFAULT_SPI_CS 0 | |
89 | #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0 | |
fc102728 MV |
90 | |
91 | /* SPI FLASH */ | |
5434caf5 | 92 | #ifdef CONFIG_CMD_SF |
5f71bca7 WD |
93 | #define CONFIG_SF_DEFAULT_BUS 2 |
94 | #define CONFIG_SF_DEFAULT_CS 0 | |
95 | #define CONFIG_SF_DEFAULT_SPEED 40000000 | |
96 | #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 | |
fc102728 | 97 | |
5f71bca7 WD |
98 | #define CONFIG_ENV_SPI_BUS 2 |
99 | #define CONFIG_ENV_SPI_CS 0 | |
100 | #define CONFIG_ENV_SPI_MAX_HZ 40000000 | |
101 | #define CONFIG_ENV_SPI_MODE SPI_MODE_0 | |
fc102728 | 102 | #endif |
5434caf5 | 103 | |
fc102728 MV |
104 | #endif |
105 | ||
5434caf5 MV |
106 | /* LCD */ |
107 | #ifdef CONFIG_VIDEO | |
d782c1fe | 108 | #define CONFIG_VIDEO_LOGO |
d782c1fe | 109 | #define CONFIG_SPLASH_SCREEN |
d782c1fe MV |
110 | #define CONFIG_BMP_16BPP |
111 | #define CONFIG_VIDEO_BMP_RLE8 | |
112 | #define CONFIG_VIDEO_BMP_GZIP | |
31b57a52 | 113 | #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20) |
d782c1fe MV |
114 | #endif |
115 | ||
5434caf5 | 116 | /* Booting Linux */ |
a428ac91 | 117 | #define CONFIG_BOOTFILE "fitImage" |
5f71bca7 | 118 | #define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 " |
a428ac91 | 119 | #define CONFIG_BOOTCOMMAND "run mmc_mmc" |
5f71bca7 WD |
120 | #define CONFIG_LOADADDR 0x42000000 |
121 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
fc102728 | 122 | |
5434caf5 | 123 | /* Extra Environment */ |
a428ac91 LR |
124 | #define CONFIG_PREBOOT "run try_bootscript" |
125 | #define CONFIG_HOSTNAME m28evk | |
126 | ||
5f71bca7 | 127 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
a428ac91 LR |
128 | "consdev=ttyAMA0\0" \ |
129 | "baudrate=115200\0" \ | |
d12159b6 | 130 | "bootscript=boot.scr\0" \ |
a428ac91 LR |
131 | "bootdev=/dev/mmcblk0p2\0" \ |
132 | "rootdev=/dev/mmcblk0p3\0" \ | |
133 | "netdev=eth0\0" \ | |
134 | "hostname=m28evk\0" \ | |
135 | "rootpath=/opt/eldk-5.5/armv5te/rootfs-qte-sdk\0" \ | |
136 | "kernel_addr_r=0x42000000\0" \ | |
137 | "videomode=video=ctfb:x:800,y:480,depth:18,mode:0,pclk:30066," \ | |
138 | "le:0,ri:256,up:0,lo:45,hs:1,vs:1,sync:100663296," \ | |
139 | "vmode:0\0" \ | |
fc102728 MV |
140 | "update_nand_full_filename=u-boot.nand\0" \ |
141 | "update_nand_firmware_filename=u-boot.sb\0" \ | |
9a0f98d3 | 142 | "update_sd_firmware_filename=u-boot.sd\0" \ |
fc102728 MV |
143 | "update_nand_firmware_maxsz=0x100000\0" \ |
144 | "update_nand_stride=0x40\0" /* MX28 datasheet ch. 12.12 */ \ | |
145 | "update_nand_count=0x4\0" /* MX28 datasheet ch. 12.12 */ \ | |
146 | "update_nand_get_fcb_size=" /* Get size of FCB blocks */ \ | |
147 | "nand device 0 ; " \ | |
148 | "nand info ; " \ | |
149 | "setexpr fcb_sz ${update_nand_stride} * ${update_nand_count};" \ | |
150 | "setexpr update_nand_fcb ${fcb_sz} * ${nand_writesize}\0" \ | |
151 | "update_nand_full=" /* Update FCB, DBBT and FW */ \ | |
152 | "if tftp ${update_nand_full_filename} ; then " \ | |
153 | "run update_nand_get_fcb_size ; " \ | |
154 | "nand scrub -y 0x0 ${filesize} ; " \ | |
a428ac91 | 155 | "nand write.raw ${loadaddr} 0x0 ${fcb_sz} ; " \ |
fc102728 MV |
156 | "setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \ |
157 | "setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \ | |
158 | "nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \ | |
159 | "fi\0" \ | |
160 | "update_nand_firmware=" /* Update only firmware */ \ | |
161 | "if tftp ${update_nand_firmware_filename} ; then " \ | |
162 | "run update_nand_get_fcb_size ; " \ | |
163 | "setexpr fcb_sz ${update_nand_fcb} * 2 ; " /* FCB + DBBT */ \ | |
164 | "setexpr fw_sz ${update_nand_firmware_maxsz} * 2 ; " \ | |
165 | "setexpr fw_off ${fcb_sz} + ${update_nand_firmware_maxsz};" \ | |
166 | "nand erase ${fcb_sz} ${fw_sz} ; " \ | |
167 | "nand write ${loadaddr} ${fcb_sz} ${filesize} ; " \ | |
168 | "nand write ${loadaddr} ${fw_off} ${filesize} ; " \ | |
9a0f98d3 MV |
169 | "fi\0" \ |
170 | "update_sd_firmware=" /* Update the SD firmware partition */ \ | |
171 | "if mmc rescan ; then " \ | |
172 | "if tftp ${update_sd_firmware_filename} ; then " \ | |
173 | "setexpr fw_sz ${filesize} / 0x200 ; " /* SD block size */ \ | |
174 | "setexpr fw_sz ${fw_sz} + 1 ; " \ | |
175 | "mmc write ${loadaddr} 0x800 ${fw_sz} ; " \ | |
176 | "fi ; " \ | |
a428ac91 LR |
177 | "fi\0" \ |
178 | "addcons=" \ | |
179 | "setenv bootargs ${bootargs} " \ | |
180 | "console=${consdev},${baudrate}\0" \ | |
181 | "addip=" \ | |
182 | "setenv bootargs ${bootargs} " \ | |
183 | "ip=${ipaddr}:${serverip}:${gatewayip}:" \ | |
184 | "${netmask}:${hostname}:${netdev}:off\0" \ | |
185 | "addmisc=" \ | |
186 | "setenv bootargs ${bootargs} ${miscargs}\0" \ | |
187 | "adddfltmtd=" \ | |
188 | "if test \"x${mtdparts}\" == \"x\" ; then " \ | |
189 | "mtdparts default ; " \ | |
190 | "fi\0" \ | |
191 | "addmtd=" \ | |
192 | "run adddfltmtd ; " \ | |
193 | "setenv bootargs ${bootargs} ${mtdparts}\0" \ | |
194 | "addargs=run addcons addmtd addmisc\0" \ | |
195 | "mmcload=" \ | |
196 | "mmc rescan ; " \ | |
fc532a92 | 197 | "load mmc 0:2 ${kernel_addr_r} ${bootfile}\0" \ |
a428ac91 LR |
198 | "ubiload=" \ |
199 | "ubi part UBI ; ubifsmount ubi0:rootfs ; " \ | |
200 | "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \ | |
201 | "netload=" \ | |
202 | "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \ | |
203 | "miscargs=nohlt panic=1\0" \ | |
204 | "mmcargs=setenv bootargs root=${rootdev} rw rootwait\0" \ | |
205 | "ubiargs=" \ | |
206 | "setenv bootargs ubi.mtd=5 " \ | |
207 | "root=ubi0:rootfs rootfstype=ubifs\0" \ | |
208 | "nfsargs=" \ | |
209 | "setenv bootargs root=/dev/nfs rw " \ | |
210 | "nfsroot=${serverip}:${rootpath},v3,tcp\0" \ | |
211 | "mmc_mmc=" \ | |
212 | "run mmcload mmcargs addargs ; " \ | |
213 | "bootm ${kernel_addr_r}\0" \ | |
214 | "mmc_ubi=" \ | |
215 | "run mmcload ubiargs addargs ; " \ | |
216 | "bootm ${kernel_addr_r}\0" \ | |
217 | "mmc_nfs=" \ | |
218 | "run mmcload nfsargs addip addargs ; " \ | |
219 | "bootm ${kernel_addr_r}\0" \ | |
220 | "ubi_mmc=" \ | |
221 | "run ubiload mmcargs addargs ; " \ | |
222 | "bootm ${kernel_addr_r}\0" \ | |
223 | "ubi_ubi=" \ | |
224 | "run ubiload ubiargs addargs ; " \ | |
225 | "bootm ${kernel_addr_r}\0" \ | |
226 | "ubi_nfs=" \ | |
227 | "run ubiload nfsargs addip addargs ; " \ | |
228 | "bootm ${kernel_addr_r}\0" \ | |
229 | "net_mmc=" \ | |
230 | "run netload mmcargs addargs ; " \ | |
231 | "bootm ${kernel_addr_r}\0" \ | |
232 | "net_ubi=" \ | |
233 | "run netload ubiargs addargs ; " \ | |
234 | "bootm ${kernel_addr_r}\0" \ | |
235 | "net_nfs=" \ | |
236 | "run netload nfsargs addip addargs ; " \ | |
237 | "bootm ${kernel_addr_r}\0" \ | |
238 | "try_bootscript=" \ | |
239 | "mmc rescan;" \ | |
4ba9b1c2 | 240 | "if test -e mmc 0:2 ${bootscript} ; then " \ |
fc532a92 | 241 | "if load mmc 0:2 ${kernel_addr_r} ${bootscript};" \ |
46f8a4b7 MV |
242 | "then ; " \ |
243 | "echo Running bootscript... ; " \ | |
244 | "source ${kernel_addr_r} ; " \ | |
4ba9b1c2 | 245 | "fi ; " \ |
fc102728 MV |
246 | "fi\0" |
247 | ||
5434caf5 MV |
248 | /* The rest of the configuration is shared */ |
249 | #include <configs/mxs.h> | |
250 | ||
251 | #endif /* __CONFIGS_M28EVK_H__ */ |