[people/ms/u-boot.git] / include / configs / ml300.h

/*
 * ML300.h: ML300 specific config options
 *
 * http://www.xilinx.com/ml300
 *
 * Derived from : ML2.h
 *
 *     Author: Xilinx, Inc.
 *
 *
 *     This program is free software; you can redistribute it and/or modify it
 *     under the terms of the GNU General Public License as published by the
 *     Free Software Foundation; either version 2 of the License, or (at your
 *     option) any later version.
 *
 *
 *     XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
 *     COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
 *     ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
 *     XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
 *     FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR
 *     OBTAINING ANY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
 *     XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
 *     THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
 *     WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
 *     CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
 *     FITNESS FOR A PARTICULAR PURPOSE.
 *
 *
 *     Xilinx products are not intended for use in life support appliances,
 *     devices, or systems. Use in such applications is expressly prohibited.
 *
 *
 *     (c) Copyright 2002 Xilinx Inc.
 *     All rights reserved.
 *
 *
 *     You should have received a copy of the GNU General Public License along
 *     with this program; if not, write to the Free Software Foundation, Inc.,
 *     675 Mass Ave, Cambridge, MA 02139, USA.
  *
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/* #define DEBUG */
/* #define ET_DEBUG 1 */

/*
 * High Level Configuration Options
 * (easy to change)
 */

#define CONFIG_405		1	/* This is a PPC405 CPU		*/
#define CONFIG_4xx		1	/* ...member of PPC4xx family	*/
#define CONFIG_XILINX_ML300	1	/* ...on a Xilinx ML300 board	*/

#define CFG_ENV_IS_NOWHERE	1	/* environment is in RAM */
#define CFG_NO_FLASH		1	/* no flash */
#define CFG_ENV_SIZE		0x2000
#define CONFIG_BAUDRATE		9600
#define CONFIG_BOOTDELAY	3	/* autoboot after 3 seconds	*/

#define CONFIG_BOOTCOMMAND	"bootp" /* autoboot command	*/

#define CONFIG_BOOTARGS		"console=ttyS0,9600 ip=off " \
				"root=/dev/xsysace/disc0/part3 rw"

#define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/
#define CFG_LOADS_BAUD_CHANGE	1	/* allow baudrate change	*/

#define REMOVE_COMMANDS	       (CFG_CMD_FLASH | CFG_CMD_LOADS | CFG_CMD_FAT | \
				CFG_CMD_IMLS )
#define CONFIG_COMMANDS	       ((CONFIG_CMD_DFL | CFG_CMD_NET) \
				& ~REMOVE_COMMANDS)

/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>

/* #define CONFIG_SYS_CLK_FREQ XPAR_CORE_CLOCK_FREQ_HZ */
/* 300000000 */

/*
 * Miscellaneous configurable options
 */
#define CFG_LONGHELP		/* undef to save memory		*/
#define CFG_PROMPT	"=> "	/* Monitor Command Prompt	*/

#define CFG_CBSIZE	256	/* Console I/O Buffer Size	*/

#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)	/* Print Buffer Size */
#define CFG_MAXARGS	16	/* max number of command args	*/
#define CFG_BARGSIZE	CFG_CBSIZE	/* Boot Argument Buffer Size	*/

#define CFG_MEMTEST_START	0x0400000	/* memtest works on	*/
#define CFG_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/

#define CFG_DUART_CHAN		0
#define CFG_NS16550_REG_SIZE -4
#define CFG_NS16550 1
#define CFG_INIT_CHAN1	 1

/* The following table includes the supported baudrates */
#define CFG_BAUDRATE_TABLE  \
    {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}

#define CFG_LOAD_ADDR		0x400000	/* default load address */
#define CFG_EXTBDINFO		1	/* To use extended board_into (bd_t) */

#define CFG_HZ		1000	/* decrementer freq: 1 ms ticks */

/*-----------------------------------------------------------------------
 * Start addresses for the final memory configuration
 * (Set up by the startup code)
 * Please note that CFG_SDRAM_BASE _must_ start at 0
 */
#define CFG_SDRAM_BASE		0x00000000
#define CFG_MONITOR_BASE	0x04000000
#define CFG_MONITOR_LEN		(192 * 1024)	/* Reserve 196 kB for Monitor	*/
#define CFG_MALLOC_LEN		(128 * 1024)	/* Reserve 128 kB for malloc()	*/

/*
 * For booting Linux, the board info and command line data
 * have to be in the first 8 MB of memory, since this is
 * the maximum mapped by the Linux kernel during initialization.
 */
#define CFG_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */

/*-----------------------------------------------------------------------
 * Cache Configuration
 */
#define CFG_DCACHE_SIZE		16384	/* For IBM 405 CPUs	*/
#define CFG_CACHELINE_SIZE	32	/* ...			*/

/*-----------------------------------------------------------------------
 * Definitions for initial stack pointer and data area (in DPRAM)
 */

#define CFG_INIT_RAM_ADDR	0x800000  /* inside of SDRAM */
#define CFG_INIT_RAM_END	0x2000	  /* End of used area in RAM */
#define CFG_GBL_DATA_SIZE	128	  /* size in bytes reserved for initial data */
#define CFG_GBL_DATA_OFFSET    (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET

/*
 * Internal Definitions
 *
 * Boot Flags
 */
#define BOOTFLAG_COLD	0x01	/* Normal Power-On: Boot from FLASH	*/
#define BOOTFLAG_WARM	0x02	/* Software reboot			*/

#endif				/* __CONFIG_H */
Commit	Line	Data
028ab6b5 WD	1	/*
	2	* ML300.h: ML300 specific config options
	3	*
	4	* http://www.xilinx.com/ml300
	5	*
	6	* Derived from : ML2.h
	7	*
	8	* Author: Xilinx, Inc.
	9	*
	10	*
	11	* This program is free software; you can redistribute it and/or modify it
	12	* under the terms of the GNU General Public License as published by the
	13	* Free Software Foundation; either version 2 of the License, or (at your
	14	* option) any later version.
	15	*
	16	*
	17	* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
	18	* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
	19	* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
	20	* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
	21	* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR
	22	* OBTAINING ANY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
	23	* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
	24	* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
	25	* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
	26	* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
	27	* FITNESS FOR A PARTICULAR PURPOSE.
	28	*
	29	*
	30	* Xilinx products are not intended for use in life support appliances,
	31	* devices, or systems. Use in such applications is expressly prohibited.
	32	*
	33	*
	34	* (c) Copyright 2002 Xilinx Inc.
	35	* All rights reserved.
	36	*
	37	*
	38	* You should have received a copy of the GNU General Public License along
	39	* with this program; if not, write to the Free Software Foundation, Inc.,
	40	* 675 Mass Ave, Cambridge, MA 02139, USA.
	41	*
	42	*/
	43
	44	#ifndef __CONFIG_H
	45	#define __CONFIG_H
	46
	47	/* #define DEBUG */
	48	/* #define ET_DEBUG 1 */
	49
	50	/*
	51	* High Level Configuration Options
	52	* (easy to change)
	53	*/
	54
	55	#define CONFIG_405 1 /* This is a PPC405 CPU */
	56	#define CONFIG_4xx 1 /* ...member of PPC4xx family */
	57	#define CONFIG_XILINX_ML300 1 /* ...on a Xilinx ML300 board */
	58
	59	#define CFG_ENV_IS_NOWHERE 1 /* environment is in RAM */
	60	#define CFG_NO_FLASH 1 /* no flash */
	61	#define CFG_ENV_SIZE 0x2000
	62	#define CONFIG_BAUDRATE 9600
	63	#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
	64
65	#define CONFIG_BOOTCOMMAND "bootp" /* autoboot command */
66
67	#define CONFIG_BOOTARGS "console=ttyS0,9600 ip=off " \
68	"root=/dev/xsysace/disc0/part3 rw"
69
70	#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
71	#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
72
73	#define REMOVE_COMMANDS (CFG_CMD_FLASH \| CFG_CMD_LOADS \| CFG_CMD_FAT \| \
74	CFG_CMD_IMLS )
75	#define CONFIG_COMMANDS ((CONFIG_CMD_DFL \| CFG_CMD_NET) \
76	& ~REMOVE_COMMANDS)
77
78	/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
79	#include <cmd_confdefs.h>
80
81	/* #define CONFIG_SYS_CLK_FREQ XPAR_CORE_CLOCK_FREQ_HZ */
82	/* 300000000 */
83
84	/*
85	* Miscellaneous configurable options
86	*/
87	#define CFG_LONGHELP /* undef to save memory */
88	#define CFG_PROMPT "=> " /* Monitor Command Prompt */
89
90	#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
91
92	#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
93	#define CFG_MAXARGS 16 /* max number of command args */
94	#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
95
96	#define CFG_MEMTEST_START 0x0400000 /* memtest works on */
97	#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
98
99	#define CFG_DUART_CHAN 0
100	#define CFG_NS16550_REG_SIZE -4
101	#define CFG_NS16550 1
102	#define CFG_INIT_CHAN1 1
103
104	/* The following table includes the supported baudrates */
105	#define CFG_BAUDRATE_TABLE \
106	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
107
108	#define CFG_LOAD_ADDR 0x400000 /* default load address */
109	#define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
110
111	#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
112
113	/*-----------------------------------------------------------------------
114	* Start addresses for the final memory configuration
115	* (Set up by the startup code)
116	* Please note that CFG_SDRAM_BASE _must_ start at 0
117	*/
118	#define CFG_SDRAM_BASE 0x00000000
119	#define CFG_MONITOR_BASE 0x04000000
120	#define CFG_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */
121	#define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
122
123	/*
124	* For booting Linux, the board info and command line data
125	* have to be in the first 8 MB of memory, since this is
126	* the maximum mapped by the Linux kernel during initialization.
127	*/
128	#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
129
130	/*-----------------------------------------------------------------------
131	* Cache Configuration
132	*/
133	#define CFG_DCACHE_SIZE 16384 /* For IBM 405 CPUs */
134	#define CFG_CACHELINE_SIZE 32 /* ... */
135
136	/*-----------------------------------------------------------------------
137	* Definitions for initial stack pointer and data area (in DPRAM)
138	*/
139
140	#define CFG_INIT_RAM_ADDR 0x800000 /* inside of SDRAM */
141	#define CFG_INIT_RAM_END 0x2000 /* End of used area in RAM */
142	#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
143	#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
144	#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
145
146	/*
147	* Internal Definitions
148	*
149	* Boot Flags
150	*/
151	#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
152	#define BOOTFLAG_WARM 0x02 /* Software reboot */
153
154	#endif /* __CONFIG_H */