[people/ms/u-boot.git] / include / configs / motionpro.h

/*
 * (C) Copyright 2003-2007
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * Based on PRO Motion board config file by Andy Joseph, andy@promessdev.com
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * High Level Configuration Options
 */

/* CPU and board */
#define CONFIG_MPC5xxx		1	/* This is an MPC5xxx CPU */
#define CONFIG_MPC5200		1	/* More exactly a MPC5200 */
#define CONFIG_MOTIONPRO	1	/* ... on Promess Motion-PRO board */

#define CONFIG_HIGH_BATS	1	/* High BATs supported */

#define	CONFIG_SYS_TEXT_BASE	0xfff00000

/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME

/*
 * Command line configuration.
 */
#include <config_cmd_default.h>

#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_BEDBUG
#define CONFIG_CMD_DATE
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_DTT
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_ELF
#define CONFIG_CMD_FAT
#define CONFIG_CMD_I2C
#define CONFIG_CMD_IDE
#define CONFIG_CMD_IMMAP
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_MII
#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_REGINFO

/*
 * Serial console configuration
 */
#define CONFIG_PSC_CONSOLE	1	/* console is on PSC1 */
#define CONFIG_NETCONSOLE	1	/* network console */
#define CONFIG_BAUDRATE		115200
#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }

/*
 * Ethernet configuration
 */
#define CONFIG_MPC5xxx_FEC	1
#define CONFIG_MPC5xxx_FEC_MII100
#define CONFIG_PHY_ADDR		0x2
#define CONFIG_PHY_TYPE		0x79c874
#define CONFIG_RESET_PHY_R	1

/*
 * Autobooting
 */
#define CONFIG_BOOTDELAY	2	/* autoboot after 2 seconds */
#define CONFIG_AUTOBOOT_KEYED
#define CONFIG_AUTOBOOT_STOP_STR	"\x1b\x1b"
#define DEBUG_BOOTKEYS		0
#undef CONFIG_AUTOBOOT_DELAY_STR
#undef CONFIG_BOOTARGS
#define CONFIG_AUTOBOOT_PROMPT	"Autobooting in %d seconds, "		\
				"press \"<Esc><Esc>\" to stop\n", bootdelay

#define CONFIG_CMDLINE_EDITING		1	/* add command line history	*/
#define	CONFIG_SYS_HUSH_PARSER		1	/* use "hush" command parser	*/
#define	CONFIG_SYS_PROMPT_HUSH_PS2	"> "

#define CONFIG_ETHADDR		00:50:C2:40:10:00
#define CONFIG_OVERWRITE_ETHADDR_ONCE	1
#define CONFIG_VERSION_VARIABLE	1	/* include version env variable */

/*
 * Default environment settings
 */
#define CONFIG_EXTRA_ENV_SETTINGS					\
	"netdev=eth0\0"							\
	"hostname=motionpro\0"						\
	"netmask=255.255.0.0\0"						\
	"ipaddr=192.168.160.22\0"					\
	"serverip=192.168.1.1\0"					\
	"gatewayip=192.168.1.1\0"					\
	"console=ttyPSC0,115200\0"					\
	"u-boot_addr=400000\0"						\
	"kernel_addr=400000\0"						\
	"fdt_addr=700000\0"						\
	"ramdisk_addr=800000\0"						\
	"multi_image_addr=800000\0"					\
	"rootpath=/opt/eldk/ppc_6xx\0"					\
	"u-boot=motionpro/u-boot.bin\0"					\
	"bootfile=motionpro/uImage\0"					\
	"fdt_file=motionpro/motionpro.dtb\0"				\
	"ramdisk_file=motionpro/uRamdisk\0"				\
	"multi_image_file=kernel+initrd+dtb.img\0"			\
	"load=tftp ${u-boot_addr} ${u-boot}\0"				\
	"update=prot off fff00000 +${filesize};"			\
		"era fff00000 +${filesize}; "				\
		"cp.b ${u-boot_addr} fff00000 ${filesize};"		\
		"prot on fff00000 +${filesize}\0"			\
	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
		"nfsroot=${serverip}:${rootpath}\0"			\
	"fat_args=setenv bootargs rw\0"					\
	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
	"addip=setenv bootargs ${bootargs} "				\
		"ip=${ipaddr}:${serverip}:${gatewayip}:"		\
		"${netmask}:${hostname}:${netdev}:off panic=1 "		\
		"console=${console}\0"					\
	"net_nfs=tftp ${kernel_addr} ${bootfile}; "			\
		"tftp ${fdt_addr} ${fdt_file}; run nfsargs addip; "	\
		"bootm ${kernel_addr} - ${fdt_addr}\0"			\
	"net_self=tftp ${kernel_addr} ${bootfile}; "			\
		"tftp ${fdt_addr} ${fdt_file}; "			\
		"tftp ${ramdisk_addr} ${ramdisk_file}; "		\
		"run ramargs addip; "					\
		"bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0"	\
	"fat_multi=run fat_args addip; fatload ide 0:1 "		\
		"${multi_image_addr} ${multi_image_file}; "		\
		"bootm ${multi_image_addr}\0"				\
	""
#define CONFIG_BOOTCOMMAND	"run net_nfs"

/*
 * do board-specific init
 */
#define CONFIG_BOARD_EARLY_INIT_R	1

/*
 * Low level configuration
 */

/*
 * Clock configuration: SYS_XTALIN = 33MHz
 */
#define CONFIG_SYS_MPC5XXX_CLKIN	33000000

/*
 * Set IPB speed to 100MHz
 */
#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK

/*
 * Memory map
 */
/*
 * Warning!!! with the current BestComm Task, MBAR MUST BE set to 0xf0000000.
 * Setting MBAR to otherwise will cause system hang when using SmartDMA such
 * as network commands.
 */
#define CONFIG_SYS_MBAR			0xf0000000
#define CONFIG_SYS_SDRAM_BASE		0x00000000

/*
 * If building for running out of SDRAM, then MBAR has been set up beforehand
 * (e.g., by the BDI). Otherwise we must specify the default boot-up value of
 * MBAR, as given in the doccumentation.
 */
#if CONFIG_SYS_TEXT_BASE == 0x00100000
#define CONFIG_SYS_DEFAULT_MBAR	0xf0000000
#else /* CONFIG_SYS_TEXT_BASE != 0x00100000 */
#define CONFIG_SYS_DEFAULT_MBAR	0x80000000
#define CONFIG_SYS_LOWBOOT		1
#endif /* CONFIG_SYS_TEXT_BASE == 0x00100000 */

/* Use SRAM until RAM will be available */
#define CONFIG_SYS_INIT_RAM_ADDR	MPC5XXX_SRAM
#define CONFIG_SYS_INIT_RAM_SIZE	MPC5XXX_SRAM_SIZE

#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET

#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT		1
#endif

#define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* 256 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN		(1024 << 10)	/* 1 MiB for malloc() */
#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* initial mem map for Linux */

/*
 * Chip selects configuration
 */
/* Boot Chipselect */
#define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
#define CONFIG_SYS_BOOTCS_CFG		0x00045D00

/* Flash memory addressing */
#define CONFIG_SYS_CS0_START		CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_CS0_SIZE		CONFIG_SYS_FLASH_SIZE
#define CONFIG_SYS_CS0_CFG		CONFIG_SYS_BOOTCS_CFG

/* Dual Port SRAM -- Kollmorgen Drive memory addressing */
#define CONFIG_SYS_CS1_START		0x50000000
#define CONFIG_SYS_CS1_SIZE		0x10000
#define CONFIG_SYS_CS1_CFG		0x05055800

/* Local register access */
#define CONFIG_SYS_CS2_START		0x50010000
#define CONFIG_SYS_CS2_SIZE		0x10000
#define CONFIG_SYS_CS2_CFG		0x05055800

/* Anybus CompactCom Module memory addressing */
#define CONFIG_SYS_CS3_START		0x50020000
#define CONFIG_SYS_CS3_SIZE		0x10000
#define CONFIG_SYS_CS3_CFG		0x05055800

/* No burst and dead cycle = 2 for all CSs */
#define CONFIG_SYS_CS_BURST		0x00000000
#define CONFIG_SYS_CS_DEADCYCLE	0x22222222

/*
 * SDRAM configuration
 */
/* 2 x MT48LC16M16A2BG-75 IT:D, CASL 3, 32 bit data bus */
#define SDRAM_CONFIG1		0x62322900
#define SDRAM_CONFIG2		0x88c70000
#define SDRAM_CONTROL		0x504f0000
#define SDRAM_MODE		0x00cd0000

/*
 * Flash configuration
 */
#define CONFIG_SYS_FLASH_CFI		1	/* Flash is CFI conformant */
#define CONFIG_FLASH_CFI_DRIVER	1
#define CONFIG_SYS_FLASH_BASE		0xff000000
#define CONFIG_SYS_FLASH_SIZE		0x01000000
#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max num of memory banks */
#define CONFIG_SYS_FLASH_BANKS_LIST	{ CONFIG_SYS_FLASH_BASE }
#define CONFIG_SYS_MAX_FLASH_SECT	128	/* max num of sects on one chip */
#define CONFIG_FLASH_16BIT		/* Flash is 16-bit */

/*
 * MTD configuration
 */
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_DEVICE		/* needed for mtdparts commands */
#define CONFIG_FLASH_CFI_MTD
#define MTDIDS_DEFAULT		"nor0=motionpro-0"
#define MTDPARTS_DEFAULT	"mtdparts=motionpro-0:"			  \
					"13m(fs),2m(kernel),256k(uboot)," \
					"128k(env),128k(redund_env),"	  \
					"128k(dtb),-(user_data)"

/*
 * IDE/ATA configuration
 */
#define CONFIG_SYS_ATA_BASE_ADDR	MPC5XXX_ATA
#define CONFIG_SYS_IDE_MAXBUS		1
#define CONFIG_SYS_IDE_MAXDEVICE	1
#define CONFIG_IDE_PREINIT

#define CONFIG_SYS_ATA_DATA_OFFSET	0x0060
#define CONFIG_SYS_ATA_REG_OFFSET	CONFIG_SYS_ATA_DATA_OFFSET
#define CONFIG_SYS_ATA_STRIDE		4
#define CONFIG_DOS_PARTITION

/*
 * I2C configuration
 */
#define CONFIG_HARD_I2C		1	/* I2C with hardware support */
#define CONFIG_SYS_I2C_MODULE		2	/* select I2C module #2 */
#define CONFIG_SYS_I2C_SPEED		100000	/* 100 kHz */
#define CONFIG_SYS_I2C_SLAVE		0x7F

/*
 * EEPROM configuration
 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	1	/* 2 bytes per write cycle */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5	/* 2ms/cycle + 3ms extra */
#define CONFIG_SYS_I2C_MULTI_EEPROMS		1	/* 2 EEPROMs (addr:50,52) */

/*
 * RTC configuration
 */
#define CONFIG_RTC_DS1337	1
#define CONFIG_SYS_I2C_RTC_ADDR	0x68

/*
 * Status LED configuration
 */
#define CONFIG_STATUS_LED		/* Status LED enabled */
#define CONFIG_BOARD_SPECIFIC_LED

#define ENABLE_GPIO_OUT		0x00000024
#define LED_ON			0x00000010

#ifndef __ASSEMBLY__
/*
 * In case of Motion-PRO, a LED is identified by its corresponding
 * GPT Enable and Mode Select Register.
 */
typedef volatile unsigned long * led_id_t;

extern void __led_init(led_id_t id, int state);
extern void __led_toggle(led_id_t id);
extern void __led_set(led_id_t id, int state);
#endif /* __ASSEMBLY__ */

/*
 * Temperature sensor
 */
#define CONFIG_DTT_LM75		1
#define CONFIG_DTT_SENSORS	{ 0x49 }

/*
 * Environment settings
 */
#define CONFIG_ENV_IS_IN_FLASH	1
/* This has to be a multiple of the Flash sector size */
#define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
#define CONFIG_ENV_SIZE		0x1000
#define CONFIG_ENV_SECT_SIZE	0x20000

/* Configuration of redundant environment */
#define CONFIG_ENV_ADDR_REDUND	(CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SIZE)

/*
 * Pin multiplexing configuration
 */

/* PSC1: UART1
 * PSC2: GPIO (default)
 * PSC3: GPIO (default)
 * USB: 2xUART4/5
 * Ethernet: Ethernet 100Mbit with MD
 * Timer: CAN2/GPIO
 * PSC6/IRDA: GPIO (default)
 */
#define CONFIG_SYS_GPS_PORT_CONFIG	0x1105a004

/*
 * Motion-PRO's CPLD revision control register
 */
#define CPLD_REV_REGISTER	(CONFIG_SYS_CS2_START + 0x06)

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_LONGHELP			/* undef to save memory    */
#define CONFIG_SYS_PROMPT		"=> "	/* Monitor Command Prompt   */
#define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)	/* Print Buffer Size */
#define CONFIG_SYS_MAXARGS		16		/* max number of command args */
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size */

#define CONFIG_SYS_MEMTEST_START	0x00100000	/* memtest works on */
#define CONFIG_SYS_MEMTEST_END		0x03e00000	/* 1 ... 62 MiB in DRAM */
#define CONFIG_SYS_ALT_MEMTEST

#define CONFIG_SYS_LOAD_ADDR		0x200000	/* default kernel load addr */

#define CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks */

/*
 * Various low-level settings
 */
#define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
#define CONFIG_SYS_HID0_FINAL		HID0_ICE

#define CONFIG_SYS_CACHELINE_SIZE	32	/* For MPC5xxx CPUs */

/* Not needed for MPC 5xxx U-Boot, but used by tools/updater */
#define CONFIG_SYS_RESET_ADDRESS	0xfff00100

/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT	1
#define CONFIG_OF_BOARD_SETUP	1

#define OF_CPU			"PowerPC,5200@0"
#define OF_SOC			"soc5200@f0000000"
#define OF_TBCLK		(bd->bi_busfreq / 4)
#define OF_STDOUT_PATH		"/soc5200@f0000000/serial@2000"

#endif /* __CONFIG_H */
Commit	Line	Data
53d4a498 BS	1	/*
	2	* (C) Copyright 2003-2007
	3	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	4	*
	5	* Based on PRO Motion board config file by Andy Joseph, andy@promessdev.com
	6	*
	7	* See file CREDITS for list of people who contributed to this
	8	* project.
	9	*
	10	* This program is free software; you can redistribute it and/or
	11	* modify it under the terms of the GNU General Public License as
	12	* published by the Free Software Foundation; either version 2 of
	13	* the License, or (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	23	* MA 02111-1307 USA
	24	*/
	25
	26	#ifndef __CONFIG_H
	27	#define __CONFIG_H
	28
53d4a498 BS	29	/*
	30	* High Level Configuration Options
	31	*/
	32
53d4a498 BS	33	/* CPU and board */
	34	#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
	35	#define CONFIG_MPC5200 1 /* More exactly a MPC5200 */
	36	#define CONFIG_MOTIONPRO 1 /* ... on Promess Motion-PRO board */
	37
31d82672	38	#define CONFIG_HIGH_BATS 1 /* High BATs supported */
53d4a498	39
2ae18241 WD	40	#define CONFIG_SYS_TEXT_BASE 0xfff00000
2ae18241 WD	41
079a136c JL	42	/*
	43	* BOOTP options
	44	*/
	45	#define CONFIG_BOOTP_BOOTFILESIZE
	46	#define CONFIG_BOOTP_BOOTPATH
	47	#define CONFIG_BOOTP_GATEWAY
	48	#define CONFIG_BOOTP_HOSTNAME
	49
53d4a498	50	/*
5dc11a51	51	* Command line configuration.
53d4a498	52	*/
5dc11a51	53	#include <config_cmd_default.h>
53d4a498	54
5dc11a51	55	#define CONFIG_CMD_ASKENV
7a8ddeea WD	56	#define CONFIG_CMD_BEDBUG
7a8ddeea WD	57	#define CONFIG_CMD_DATE
5dc11a51	58	#define CONFIG_CMD_DHCP
7a8ddeea WD	59	#define CONFIG_CMD_DTT
7a8ddeea WD	60	#define CONFIG_CMD_EEPROM
5dc11a51	61	#define CONFIG_CMD_ELF
7a8ddeea WD	62	#define CONFIG_CMD_FAT
	63	#define CONFIG_CMD_I2C
	64	#define CONFIG_CMD_IDE
	65	#define CONFIG_CMD_IMMAP
	66	#define CONFIG_CMD_JFFS2
5dc11a51	67	#define CONFIG_CMD_MII
5dc11a51 JL	68	#define CONFIG_CMD_NET
5dc11a51 JL	69	#define CONFIG_CMD_PING
7a8ddeea	70	#define CONFIG_CMD_REGINFO
53d4a498 BS	71
	72	/*
	73	* Serial console configuration
	74	*/
	75	#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
	76	#define CONFIG_NETCONSOLE 1 /* network console */
	77	#define CONFIG_BAUDRATE 115200
6d0f6bcf	78	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
53d4a498	79
53d4a498 BS	80	/*
	81	* Ethernet configuration
	82	*/
	83	#define CONFIG_MPC5xxx_FEC 1
86321fc1	84	#define CONFIG_MPC5xxx_FEC_MII100
53d4a498 BS	85	#define CONFIG_PHY_ADDR 0x2
53d4a498 BS	86	#define CONFIG_PHY_TYPE 0x79c874
c00125e0	87	#define CONFIG_RESET_PHY_R 1
53d4a498 BS	88
	89	/*
	90	* Autobooting
	91	*/
	92	#define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */
	93	#define CONFIG_AUTOBOOT_KEYED
	94	#define CONFIG_AUTOBOOT_STOP_STR "\x1b\x1b"
	95	#define DEBUG_BOOTKEYS 0
	96	#undef CONFIG_AUTOBOOT_DELAY_STR
	97	#undef CONFIG_BOOTARGS
	98	#define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds, " \
c37207d7	99	"press \"<Esc><Esc>\" to stop\n", bootdelay
53d4a498	100
7a8ddeea WD	101	#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
	102	#define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser */
	103	#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
	104
53d4a498 BS	105	#define CONFIG_ETHADDR 00:50:C2:40:10:00
	106	#define CONFIG_OVERWRITE_ETHADDR_ONCE 1
	107	#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
	108
53d4a498 BS	109	/*
	110	* Default environment settings
	111	*/
	112	#define CONFIG_EXTRA_ENV_SETTINGS \
53d4a498 BS	113	"netdev=eth0\0" \
	114	"hostname=motionpro\0" \
	115	"netmask=255.255.0.0\0" \
	116	"ipaddr=192.168.160.22\0" \
	117	"serverip=192.168.1.1\0" \
	118	"gatewayip=192.168.1.1\0" \
1f1369c3	119	"console=ttyPSC0,115200\0" \
7a8ddeea WD	120	"u-boot_addr=400000\0" \
	121	"kernel_addr=400000\0" \
	122	"fdt_addr=700000\0" \
	123	"ramdisk_addr=800000\0" \
fa5c2ba1	124	"multi_image_addr=800000\0" \
7a8ddeea WD	125	"rootpath=/opt/eldk/ppc_6xx\0" \
	126	"u-boot=motionpro/u-boot.bin\0" \
	127	"bootfile=motionpro/uImage\0" \
	128	"fdt_file=motionpro/motionpro.dtb\0" \
	129	"ramdisk_file=motionpro/uRamdisk\0" \
fa5c2ba1	130	"multi_image_file=kernel+initrd+dtb.img\0" \
7049288f	131	"load=tftp ${u-boot_addr} ${u-boot}\0" \
7a8ddeea WD	132	"update=prot off fff00000 +${filesize};" \
7a8ddeea WD	133	"era fff00000 +${filesize}; " \
7049288f	134	"cp.b ${u-boot_addr} fff00000 ${filesize};" \
7a8ddeea	135	"prot on fff00000 +${filesize}\0" \
53d4a498	136	"ramargs=setenv bootargs root=/dev/ram rw\0" \
53d4a498	137	"nfsargs=setenv bootargs root=/dev/nfs rw " \
7049288f	138	"nfsroot=${serverip}:${rootpath}\0" \
fa5c2ba1	139	"fat_args=setenv bootargs rw\0" \
7049288f BS	140	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
	141	"addip=setenv bootargs ${bootargs} " \
	142	"ip=${ipaddr}:${serverip}:${gatewayip}:" \
	143	"${netmask}:${hostname}:${netdev}:off panic=1 " \
	144	"console=${console}\0" \
	145	"net_nfs=tftp ${kernel_addr} ${bootfile}; " \
	146	"tftp ${fdt_addr} ${fdt_file}; run nfsargs addip; " \
	147	"bootm ${kernel_addr} - ${fdt_addr}\0" \
	148	"net_self=tftp ${kernel_addr} ${bootfile}; " \
	149	"tftp ${fdt_addr} ${fdt_file}; " \
	150	"tftp ${ramdisk_addr} ${ramdisk_file}; " \
1f1369c3	151	"run ramargs addip; " \
7049288f	152	"bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
fa5c2ba1 BS	153	"fat_multi=run fat_args addip; fatload ide 0:1 " \
	154	"${multi_image_addr} ${multi_image_file}; " \
	155	"bootm ${multi_image_addr}\0" \
53d4a498 BS	156	""
	157	#define CONFIG_BOOTCOMMAND "run net_nfs"
	158
53d4a498 BS	159	/*
	160	* do board-specific init
	161	*/
	162	#define CONFIG_BOARD_EARLY_INIT_R 1
	163
53d4a498 BS	164	/*
	165	* Low level configuration
	166	*/
	167
53d4a498	168	/*
d3afa1ee	169	* Clock configuration: SYS_XTALIN = 33MHz
53d4a498	170	*/
6d0f6bcf	171	#define CONFIG_SYS_MPC5XXX_CLKIN 33000000
53d4a498	172
06241d50	173	/*
c99512d6	174	* Set IPB speed to 100MHz
06241d50	175	*/
6d0f6bcf	176	#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK
06241d50	177
53d4a498 BS	178	/*
	179	* Memory map
	180	*/
	181	/*
	182	* Warning!!! with the current BestComm Task, MBAR MUST BE set to 0xf0000000.
	183	* Setting MBAR to otherwise will cause system hang when using SmartDMA such
	184	* as network commands.
	185	*/
7a8ddeea	186	#define CONFIG_SYS_MBAR 0xf0000000
6d0f6bcf	187	#define CONFIG_SYS_SDRAM_BASE 0x00000000
53d4a498 BS	188
	189	/*
	190	* If building for running out of SDRAM, then MBAR has been set up beforehand
	191	* (e.g., by the BDI). Otherwise we must specify the default boot-up value of
	192	* MBAR, as given in the doccumentation.
	193	*/
14d0a02a	194	#if CONFIG_SYS_TEXT_BASE == 0x00100000
6d0f6bcf	195	#define CONFIG_SYS_DEFAULT_MBAR 0xf0000000
14d0a02a	196	#else /* CONFIG_SYS_TEXT_BASE != 0x00100000 */
6d0f6bcf JCPV	197	#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
6d0f6bcf JCPV	198	#define CONFIG_SYS_LOWBOOT 1
14d0a02a	199	#endif /* CONFIG_SYS_TEXT_BASE == 0x00100000 */
53d4a498 BS	200
53d4a498 BS	201	/* Use SRAM until RAM will be available */
6d0f6bcf	202	#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
553f0982	203	#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
53d4a498	204
25ddd1fb	205	#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
6d0f6bcf	206	#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
53d4a498	207
14d0a02a	208	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
6d0f6bcf JCPV	209	#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
6d0f6bcf JCPV	210	#define CONFIG_SYS_RAMBOOT 1
53d4a498 BS	211	#endif
53d4a498 BS	212
6d0f6bcf JCPV	213	#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 kB for Monitor */
	214	#define CONFIG_SYS_MALLOC_LEN (1024 << 10) /* 1 MiB for malloc() */
	215	#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* initial mem map for Linux */
53d4a498	216
53d4a498 BS	217	/*
	218	* Chip selects configuration
	219	*/
	220	/* Boot Chipselect */
6d0f6bcf JCPV	221	#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
	222	#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
	223	#define CONFIG_SYS_BOOTCS_CFG 0x00045D00
53d4a498 BS	224
53d4a498 BS	225	/* Flash memory addressing */
6d0f6bcf JCPV	226	#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
	227	#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
	228	#define CONFIG_SYS_CS0_CFG CONFIG_SYS_BOOTCS_CFG
53d4a498 BS	229
53d4a498 BS	230	/* Dual Port SRAM -- Kollmorgen Drive memory addressing */
6d0f6bcf JCPV	231	#define CONFIG_SYS_CS1_START 0x50000000
	232	#define CONFIG_SYS_CS1_SIZE 0x10000
	233	#define CONFIG_SYS_CS1_CFG 0x05055800
53d4a498 BS	234
53d4a498 BS	235	/* Local register access */
6d0f6bcf JCPV	236	#define CONFIG_SYS_CS2_START 0x50010000
	237	#define CONFIG_SYS_CS2_SIZE 0x10000
	238	#define CONFIG_SYS_CS2_CFG 0x05055800
53d4a498 BS	239
53d4a498 BS	240	/* Anybus CompactCom Module memory addressing */
6d0f6bcf JCPV	241	#define CONFIG_SYS_CS3_START 0x50020000
	242	#define CONFIG_SYS_CS3_SIZE 0x10000
	243	#define CONFIG_SYS_CS3_CFG 0x05055800
53d4a498 BS	244
53d4a498 BS	245	/* No burst and dead cycle = 2 for all CSs */
6d0f6bcf JCPV	246	#define CONFIG_SYS_CS_BURST 0x00000000
6d0f6bcf JCPV	247	#define CONFIG_SYS_CS_DEADCYCLE 0x22222222
53d4a498	248
53d4a498 BS	249	/*
	250	* SDRAM configuration
	251	*/
d3afa1ee BS	252	/* 2 x MT48LC16M16A2BG-75 IT:D, CASL 3, 32 bit data bus */
	253	#define SDRAM_CONFIG1 0x62322900
	254	#define SDRAM_CONFIG2 0x88c70000
	255	#define SDRAM_CONTROL 0x504f0000
	256	#define SDRAM_MODE 0x00cd0000
53d4a498	257
53d4a498 BS	258	/*
	259	* Flash configuration
	260	*/
6d0f6bcf	261	#define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */
00b1883a	262	#define CONFIG_FLASH_CFI_DRIVER 1
6d0f6bcf JCPV	263	#define CONFIG_SYS_FLASH_BASE 0xff000000
	264	#define CONFIG_SYS_FLASH_SIZE 0x01000000
	265	#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
	266	#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
	267	#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max num of sects on one chip */
53d4a498 BS	268	#define CONFIG_FLASH_16BIT /* Flash is 16-bit */
53d4a498 BS	269
7d98ba77 PK	270	/*
	271	* MTD configuration
	272	*/
68d7d651	273	#define CONFIG_CMD_MTDPARTS
942556a9 SR	274	#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
942556a9 SR	275	#define CONFIG_FLASH_CFI_MTD
7d98ba77 PK	276	#define MTDIDS_DEFAULT "nor0=motionpro-0"
	277	#define MTDPARTS_DEFAULT "mtdparts=motionpro-0:" \
	278	"13m(fs),2m(kernel),256k(uboot)," \
d3afa1ee BS	279	"128k(env),128k(redund_env)," \
d3afa1ee BS	280	"128k(dtb),-(user_data)"
53d4a498	281
fa5c2ba1 BS	282	/*
	283	* IDE/ATA configuration
	284	*/
6d0f6bcf JCPV	285	#define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
	286	#define CONFIG_SYS_IDE_MAXBUS 1
	287	#define CONFIG_SYS_IDE_MAXDEVICE 1
fa5c2ba1 BS	288	#define CONFIG_IDE_PREINIT
fa5c2ba1 BS	289
6d0f6bcf JCPV	290	#define CONFIG_SYS_ATA_DATA_OFFSET 0x0060
	291	#define CONFIG_SYS_ATA_REG_OFFSET CONFIG_SYS_ATA_DATA_OFFSET
	292	#define CONFIG_SYS_ATA_STRIDE 4
fa5c2ba1 BS	293	#define CONFIG_DOS_PARTITION
fa5c2ba1 BS	294
de1de02a PK	295	/*
	296	* I2C configuration
	297	*/
	298	#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
6d0f6bcf JCPV	299	#define CONFIG_SYS_I2C_MODULE 2 /* select I2C module #2 */
	300	#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
	301	#define CONFIG_SYS_I2C_SLAVE 0x7F
de1de02a	302
de1de02a PK	303	/*
	304	* EEPROM configuration
	305	*/
6d0f6bcf JCPV	306	#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
	307	#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 1 /* 2 bytes per write cycle */
	308	#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 /* 2ms/cycle + 3ms extra */
	309	#define CONFIG_SYS_I2C_MULTI_EEPROMS 1 /* 2 EEPROMs (addr:50,52) */
de1de02a	310
de1de02a PK	311	/*
	312	* RTC configuration
	313	*/
	314	#define CONFIG_RTC_DS1337 1
6d0f6bcf	315	#define CONFIG_SYS_I2C_RTC_ADDR 0x68
de1de02a	316
a11c0b85 BS	317	/*
	318	* Status LED configuration
	319	*/
	320	#define CONFIG_STATUS_LED /* Status LED enabled */
	321	#define CONFIG_BOARD_SPECIFIC_LED
	322
	323	#define ENABLE_GPIO_OUT 0x00000024
	324	#define LED_ON 0x00000010
	325
	326	#ifndef __ASSEMBLY__
	327	/*
	328	* In case of Motion-PRO, a LED is identified by its corresponding
	329	* GPT Enable and Mode Select Register.
	330	*/
	331	typedef volatile unsigned long * led_id_t;
	332
	333	extern void __led_init(led_id_t id, int state);
	334	extern void __led_toggle(led_id_t id);
	335	extern void __led_set(led_id_t id, int state);
	336	#endif /* __ASSEMBLY__ */
	337
93b78f53 BS	338	/*
	339	* Temperature sensor
	340	*/
	341	#define CONFIG_DTT_LM75 1
	342	#define CONFIG_DTT_SENSORS { 0x49 }
	343
53d4a498 BS	344	/*
	345	* Environment settings
	346	*/
5a1aceb0	347	#define CONFIG_ENV_IS_IN_FLASH 1
53d4a498	348	/* This has to be a multiple of the Flash sector size */
6d0f6bcf	349	#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
0e8d1586 JCPV	350	#define CONFIG_ENV_SIZE 0x1000
0e8d1586 JCPV	351	#define CONFIG_ENV_SECT_SIZE 0x20000
53d4a498	352
4520fd4d	353	/* Configuration of redundant environment */
0e8d1586 JCPV	354	#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
0e8d1586 JCPV	355	#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
53d4a498 BS	356
	357	/*
	358	* Pin multiplexing configuration
	359	*/
	360
	361	/* PSC1: UART1
	362	* PSC2: GPIO (default)
	363	* PSC3: GPIO (default)
	364	* USB: 2xUART4/5
	365	* Ethernet: Ethernet 100Mbit with MD
	366	* Timer: CAN2/GPIO
	367	* PSC6/IRDA: GPIO (default)
	368	*/
6d0f6bcf	369	#define CONFIG_SYS_GPS_PORT_CONFIG 0x1105a004
53d4a498	370
c75e6396 BS	371	/*
	372	* Motion-PRO's CPLD revision control register
	373	*/
6d0f6bcf	374	#define CPLD_REV_REGISTER (CONFIG_SYS_CS2_START + 0x06)
c75e6396	375
53d4a498 BS	376	/*
	377	* Miscellaneous configurable options
	378	*/
6d0f6bcf JCPV	379	#define CONFIG_SYS_LONGHELP /* undef to save memory */
	380	#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
	381	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
	382	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
	383	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	384	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
53d4a498	385
6d0f6bcf JCPV	386	#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
	387	#define CONFIG_SYS_MEMTEST_END 0x03e00000 /* 1 ... 62 MiB in DRAM */
	388	#define CONFIG_SYS_ALT_MEMTEST
53d4a498	389
6d0f6bcf	390	#define CONFIG_SYS_LOAD_ADDR 0x200000 /* default kernel load addr */
53d4a498	391
6d0f6bcf	392	#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
53d4a498	393
53d4a498 BS	394	/*
	395	* Various low-level settings
	396	*/
6d0f6bcf JCPV	397	#define CONFIG_SYS_HID0_INIT HID0_ICE \| HID0_ICFI
6d0f6bcf JCPV	398	#define CONFIG_SYS_HID0_FINAL HID0_ICE
53d4a498	399
6d0f6bcf	400	#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
53d4a498	401
53d4a498	402	/* Not needed for MPC 5xxx U-Boot, but used by tools/updater */
6d0f6bcf	403	#define CONFIG_SYS_RESET_ADDRESS 0xfff00100
53d4a498	404
1f1369c3	405	/* pass open firmware flat tree */
cf2817a8	406	#define CONFIG_OF_LIBFDT 1
1f1369c3 BS	407	#define CONFIG_OF_BOARD_SETUP 1
1f1369c3 BS	408
1f1369c3 BS	409	#define OF_CPU "PowerPC,5200@0"
	410	#define OF_SOC "soc5200@f0000000"
	411	#define OF_TBCLK (bd->bi_busfreq / 4)
7049288f	412	#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
1f1369c3	413
53d4a498	414	#endif /* __CONFIG_H */